HP Probook 6545b (Compal LA-4961P)

A B C D E
1 1
Compal confidential 2
Schematics Document
Mobile AMD S1G3 CPU with ATI
3
RS880M(NB) & SB710(SB) core logic 3
2009-08-27
REV:1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2009/03/23 Deciphered Date 2010/03/23 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
Size Document Number R ev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-4961P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, August 27, 2009 Sheet 1 of 54
A B C D E
A B C D E
Compal Confidential TAG UMA

Accelerometer Thermal Sensor Caspian 72QFN
ST LIS302DLTR ADM1032 AMD S1G3 CPU DDR2-SO-DIMM X2 Clock Generator
Page 30 Page 4 DDR2 800MHz 1.8V BANK 0, 1, 2, 3 Page 8, 9
ICS9LPRS476E
Dual Channel
1
Fan conn
638-PIN uFCPGA 638 Page 15 1
Page 4
Page 4, 5, 6, 7
Hyper Transport Link Side-Port DDR2 SDRAM

16X16
512Mbits(32Mbx16)-64MB
LVDS Panel Page 13
Interface Page 17
DDR2 400MHz
WWAN USB X 1
CRT
ATI RS880M Page 27
Page 16
USB x2(Docking)Page 33
Display Port Page 10, 11, 12, 13, 14 FingerPrinter VFM451

Page 18 daughter board
daughter board USBx1 Page 30
2
A-Link Express II 2
Mini Card UWB 4X PCI-E USB conn x 2(For I/O)
Express Card 54 PCIE X 1 BT Conn USB x 1Page 30
PCIE X1 + USB X1
USB2.0
Page 31
Page 27
USB ConnX2 daughter board
Azalia Page 31
ATI SB710 SATA0
sub BD
USB x1(Camara)
Page 17
SATA1
PCI-E BUS
Page 19, 20, 21 ,22, 23
WLAN Card MDC V1.5 RJ11
10/100/1000 LAN Rico R5U230 Page 28 Page 28
USB + PCIE X1
88E8072
Controller Audio CKT TPA6041A
Page 27
Page 25 Page 31 92HD75 Page 31 AMP & Audio Jack Page 31
daughter board
3
RJ45 CONN SATA ODD Connector 3
Page 24
1394 port Smart Card P38
Page 26 Docking CONN.
LPC BUS 2.5" SATA HDD Connector
Page 24
(1) PCI Express x1 channels
daughter board (2) PS/2 Interfaces
(2) USB 2.channels
(2) SATA Channels
(2) Display Port Channels
SMSC Super I/O (1) Serial Port
TPM1.2 SMSC KBC 1098 (1) Parallel Port
SLB9635TT ITE IT8305Page 35 (1) Line In
Page 29 page 34 (1) Line Out
Power OK CKT. (1) RJ45 (10/100/1000)
page 36 C OM1 LPT (1) VGA
TrackPoint CONN. Int.KBD ( Docking ) ( Docking ) (1) 2 LAN indicator LED's
LED CKT. Page 28
Page 28 Page 33 Page 33 (1) Power Button
4
Power On/Off CKT. (1) I2C interface 4
Page 31
page 28 Touch Pad CONN. SPI ROM
Page 31
RTC CKT. 2 MB Page 29
DC/DC Interface CKT.
Page 31
Page 33 Security Classification Compal Secret Data Compal Electronics, Inc.
Block Diagram
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4961P 1.0
A B C D E
A B C D E
O MEANS ON X MEANS OFF

Voltage Rails Symbol Note :
1 1
: means Digital Ground
+5VS
+3VS : means Analog Ground
+1.5VS
power
plane +0.9V
+CPU_CORE_0
+5VALW +1.8V +2.5VS
+B +1.8VS
Layout Notes
+3VALW +NB_VDDC
VL
+VDDA11PCIE
: Question Area Mark.(Wait check)
State +3VL
"*" as default BOM setting
@ : means just reserve , no build
45@ : Install when 45 level Assy.
2 CONN@:means ME part 2
S0
O O O O
S1
O O O O
S3
O O O X
S5 S4/AC
O O X X
S5 S4/ Battery only
O X X X
S5 S4/AC & Battery
don't exist X X X X
3 3
SMBUS Control Table
THERMAL
SOURCE INVERTER BATT EEPROM SENSOR SODIMM CLK CHIP MINI CARD LCD HDMI G-Sensor
CPU &
SERIAL ADM1032 I / II Slot 2
SMB_CK_CLK0
SMB_CK_DAT0
SB710 X X X V V X X X X V
SMB_CK_CLK1
SMB_CK_DAT1
SB710 X X X X X X X X X X
4 4

Notes List
A B C D E
A B C D E
1 1
+1.2V_HT
VLDT CAP.
250 mil
1 1 1 1 1 1
C1 C2 C3 C4 C5 C6
H_CADIP[0..15] H_CADOP[0..15] 10U_0805_10V4Z 10U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J
<10> H_CADIP[0..15] H_CADOP[0..15] <10>
H_CADIN[0..15] H_CADON[0..15] 2 2 2 2 2 2
<10> H_CADIN[0..15] H_CADON[0..15] <10>
change 4.7U to 10U for AMD S1G3 request. HP 12/8 Near CPU Socket
+1.2V_HT +1.2V_HT
JCPU1A
VLDT=500mA D1
VLDT_A0 HT LINK VLDT_B0
AE2 1 2
D2 AE3 C7 10U_0805_10V4Z
D3
D4
VLDT_A1
VLDT_A2
VLDT_B1
VLDT_B2 AE4
AE5
Thermal Sensor EMC1402
VLDT_A3 VLDT_B3
H_CADIP0 E3 AD1 H_CADOP0 +3VS U1
H _CADIN0 L0_CADIN_H0 L0_CADOUT_H0 H_CADON0
E2 AC1
H_CADIP1 L0_CADIN_L0 L0_CADOUT_L0 H_CADOP1
E1 L0_CADIN_H1 L0_CADOUT_H1 AC2
H _CADIN1 F1 AC3 H_CADON1 1 8
L0_CADIN_L1 L0_CADOUT_L1 VDD SMCLK SMB_CK_CLK0 <6,8,9,15,21,30>
0.1U_0402_16V4Z
H_CADIP2 G3 AB1 H_CADOP2 1
H _CADIN2 L0_CADIN_H2 L0_CADOUT_H2 H_CADON2 NB_THERMAL_DA
G2 AA1 2 7 SMB_CK_DAT0 <6,8,9,15,21,30>
2 H_CADIP3 L0_CADIN_L2 L0_CADOUT_L2 H_CADOP3 C8 C9 DP SMDATA 2
G1 L0_CADIN_H3 L0_CADOUT_H3 AA2
H _CADIN3 H1 AA3 H_CADON3 12 NB_THERMAL_DC 3 6 FAN_PWM_R
H_CADIP4 L0_CADIN_L3 L0_CADOUT_L3 H_CADOP4 2 2200P_0402_50V7K DN ALERT#
J1 W2
H _CADIN4 L0_CADIN_H4 L0_CADOUT_H4 H_CADON4 CPU_THERMTRIP#_R 4
K1 L0_CADIN_L4 L0_CADOUT_L4 W3 <6> CPU_THERMTRIP#_R THERM# GND 5
H_CADIP5 L3 V1 H_CADOP5
H _CADIN5 L0_CADIN_H5 L0_CADOUT_H5 H_CADON5 HP 3/30
L2 U1
L1 L0_CADIN_H6 L0_CADOUT_H6 U2
H _CADIN6 M1 U3 H_CADON6 EMC1402-1-ACZL-TR_MSOP8
N3 L0_CADIN_H7 L0_CADOUT_H7 T1
H _CADIN7 N2 R1 H_CADON7
E5 L0_CADIN_H8 L0_CADOUT_H8 AD4
H _CADIN8 F5 AD3 H_CADON8 change from ADM1032 to EMC1402 12/1
H_CADIP9 L0_CADIN_L8 L0_CADOUT_L8 H_CADOP9 NB_THERMAL_DA
F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 <11> NB_THERMAL_DA
H _CADIN9 F4 AC5 H_CADON9 NB_THERMAL_DC address: 4C
L0_CADIN_L9 L0_CADOUT_L9 <11> NB_THERMAL_DC
H_CADIP10 G5 AB4 H_CADOP10
H_CADIN10 L0_CADIN_H10 L0_CADOUT_H10 H_CADON10
H5 AB3
H3 AB5
H4 AA5
K3 Y5
K4 L0_CADIN_L12 L0_CADOUT_L12 W5
H_CADIP13 L5 V4 H_CADOP13
M5 V3
M3 V5
M4 U5
N5 T4
H_CADIN15 P5
L0_CADIN_H15
L0_CADIN_L15
L0_CADOUT_H15
L0_CADOUT_L15
T3 H_CADON15 PWM Fan Control
<10>
<10>
H_CLKIP0
H_CLKIN0
J3
J2
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKOUT_H0
L0_CLKOUT_L0
Y1
W1
H_CLKOP0
H_CLKON0
<10>
<10>
circuit
<10> H_CLKIP1 J5 Y4 H_CLKOP1 <10>
L0_CLKIN_H1 L0_CLKOUT_H1
<10> H_CLKIN1 K5 Y3 H_CLKON1 <10>
L0_CLKIN_L1 L0_CLKOUT_L1
3 3
<10> H_CTLIP0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 H_CTLOP0 <10>
<10> H_CTLIN0 P1 L0_CTLIN_L0 L0_CTLOUT_L0 R3 H_CTLON0 <10>
<10> H_CTLIP1 P3 T5 H_CTLOP1 <10>
L0_CTLIN_H1 L0_CTLOUT_H1 +5VS
<10> H_CTLIN1 P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5 H_CTLON1 <10> +1.8V +5VS
FOX_PZ6382A-284S-41F_GRIFFIN
1
CONN@
Athlon 64 S1
0_0603_5%
1
1
Processor Socket
9/20 SP07000DM00/SP07000EQ00 30K_0402_5% R471
10K_0402_5%
2
R556 R557 +3VS
C10
2
1 2 conn@
5
U2 @ 0.1U_0402_10V6K JP1
2
B
Q108 2 1 FAN_PWM_R 1 1
P
<33> FAN_PWM INB 1
R1 3K_0402_5% 4 2 1 2 4
O 2 G1
E
3 1 2 R534 2.2K_0402_5% 3 5
<6,46> H_PROCHOT# INA 3 G2
G
PMBT3904_SOT23 for RF, HP 12/10 ACES_85204-03001
3
TC7SH00FU_SSOP5
for Fan shake issue when in 70 degree. Compal 3/23
4 4

AMD CPU S1G2 HT I/F
A B C D E
A B C D E
Processor DDR2 Memory Interface

1 JCPU1C 1
<9> DDR_B_D[63..0]
MEM:DATA
DDR_B_D0 DDR_A_D0 DDR_A_D[63..0] <8>
C11 MB_DATA0 MA_DATA0 G12
DDR_B_D1 A11 F12 DDR_A_D1
DDR_B_D2 MB_DATA1 MA_DATA1 DDR_A_D2
A14 H14
B14 MB_DATA3 MA_DATA3 G14
DDR_B_D4 G11 H11 DDR_A_D4
E11 MB_DATA5 MA_DATA5 H12
DDR_B_D6 D12 C13 DDR_A_D6
A13 E13
A15 MB_DATA8 MA_DATA8 H15
DDR_B_D9 A16 E15 DDR_A_D9
A19 MB_DATA10 MA_DATA10 E17
DDR_B_D11 A20 H17 DDR_A_D11
C14 E14
+1.8V DDR_B_D13 MB_DATA12 MA_DATA12 DDR_A_D13
D14 F14
C18 MB_DATA14 MA_DATA14 C17
9/23 HP DDR_B_D15 D18 G17 DDR_A_D15
MB_DATA15 MA_DATA15
2
DDR_B_D16 D20 G18 DDR_A_D16
R2 DDR_B_D17 MB_DATA16 MA_DATA16 DDR_A_D17
A21 C19
D24 D22
1K_0402_1% DDR_B_D19 MB_DATA18 MA_DATA18 DDR_A_D19
C25 E20
B20 E18
1
+MCH_REF DDR_B_D21 MB_DATA20 MA_DATA20 DDR_A_D21
C20 MB_DATA21 MA_DATA21 F18
DDR_B_D22 B24 B22 DDR_A_D22
MB_DATA22 MA_DATA22
2
1 1 DDR_B_D23 C24 C23 DDR_A_D23
R3 C12 C13 DDR_B_D24 MB_DATA23 MA_DATA23 DDR_A_D24
E23 F20
E24 F22
1K_0402_1% DDR_B_D26 MB_DATA25 MA_DATA25 DDR_A_D26
G25 MB_DATA26 MA_DATA26 H24
2 2 DDR_B_D27 G26 J19 DDR_A_D27
1
1000P_0402_25V8J DDR_B_D28 MB_DATA27 MA_DATA27 DDR_A_D28
C26 E21
0.1U_0402_16V4Z DDR_B_D29 MB_DATA28 MA_DATA28 DDR_A_D29
D26 E22
2 DDR_B_D30 MB_DATA29 MA_DATA29 DDR_A_D30 2
G23 MB_DATA30 MA_DATA30 H20
+0.9V +0.9V DDR_B_D31 G24 H22 DDR_A_D31
JCPU1B DDR_B_D32 MB_DATA31 MA_DATA31 DDR_A_D32
AA24 Y24
AA23 MB_DATA33 MA_DATA33 AB24
D10 W10 DDR_B_D34 AD24 AB22 DDR_A_D34
VTT1 MEM:CMD/CTRL/CLK VTT5 DDR_B_D35 MB_DATA34 MA_DATA34 DDR_A_D35
Place them close to CPU within 1" C10
VTT2 VTT6
AC10 AE24
MB_DATA35 MA_DATA35
AA21
B10 AB10 DDR_B_D36 AA26 W22 DDR_A_D36
VTT3 VTT7 DDR_B_D37 MB_DATA36 MA_DATA36 DDR_A_D37
AD10 AA10 AA25 W21
R4 39.2_0402_1% VTT4 VTT8 DDR_B_D38 MB_DATA37 MA_DATA37 DDR_A_D38
VTT9 A10 AD26 MB_DATA38 MA_DATA38 Y22
1 2 MEMZP AF10 DDR_B_D39 AE25 AA22 DDR_A_D39
MEMZN MEMZP DDR_B_D40 MB_DATA39 MA_DATA39 DDR_A_D40
+1.8V 1 2 AE10 MEMZN VTT_SENSE Y10 AC22 MB_DATA40 MA_DATA40 Y20
R5 39.2_0402_1% DDR_B_D41 AD22 AA20 DDR_A_D41
+MCH_REF DDR_B_D42 MB_DATA41 MA_DATA41 DDR_A_D42
H16 RSVD_M1 MEMVREF W17 AE20 MB_DATA42 MA_DATA42 AA18
DDR_B_D43 AF20 AB18 DDR_A_D43
DDR_A_ODT0 DDR_B_D44 MB_DATA43 MA_DATA43 DDR_A_D44
<8> DDR_A_ODT0 T19 B18 AF24 AB21
DDR_A_ODT1 MA0_ODT0 RSVD_M2 DDR_B_D45 MB_DATA44 MA_DATA44 DDR_A_D45
<8> DDR_A_ODT1 V22 AF23 AD21
MA0_ODT1 DDR_B_ODT0 DDR_B_D46 MB_DATA45 MA_DATA45 DDR_A_D46
U21 W26 DDR_B_ODT0 <9> AC20 AD19
MA1_ODT0 MB0_ODT0 DDR_B_ODT1 DDR_B_D47 MB_DATA46 MA_DATA46 DDR_A_D47
V19 W23 DDR_B_ODT1 <9> AD20 Y18
MA1_ODT1 MB0_ODT1 DDR_B_D48 MB_DATA47 MA_DATA47 DDR_A_D48
Y26 AD18 AD17
DDR_CS0_DIMMA# MB1_ODT0 DDR_B_D49 MB_DATA48 MA_DATA48 DDR_A_D49
<8> DDR_CS0_DIMMA# T20 MA0_CS_L0 AE18 MB_DATA49 MA_DATA49 W16
DDR_CS1_DIMMA# U19 V26 DDR_CS0_DIMMB# DDR_B_D50 AC14 W14 DDR_A_D50
<8> DDR_CS1_DIMMA# MA0_CS_L1 MB0_CS_L0 DDR_CS0_DIMMB# <9> MB_DATA50 MA_DATA50
U20 W25 DDR_CS1_DIMMB# DDR_B_D51 AD14 Y14 DDR_A_D51
MA1_CS_L0 MB0_CS_L1 DDR_CS1_DIMMB# <9> DDR_B_D52 MB_DATA51 MA_DATA51 DDR_A_D52
V20 U22 AF19 Y17
MA1_CS_L1 MB1_CS_L0 DDR_B_D53 MB_DATA52 MA_DATA52 DDR_A_D53
AC18 AB17
DDR_CKE0_DIMMA DDR_CKE0_DIMMB DDR_B_D54 MB_DATA53 MA_DATA53 DDR_A_D54
<8> DDR_CKE0_DIMMA J22 J25 DDR_CKE0_DIMMB <9> AF16 AB15
DDR_CKE1_DIMMA MA_CKE0 MB_CKE0 DDR_CKE1_DIMMB DDR_B_D55 MB_DATA54 MA_DATA54 DDR_A_D55
<8> DDR_CKE1_DIMMA J20 H26 DDR_CKE1_DIMMB <9> AF15 AD15
MA_CKE1 MB_CKE1 DDR_B_D56 MB_DATA55 MA_DATA55 DDR_A_D56
AF13 MB_DATA56 MA_DATA56 AB13
N19 P22 DDR_B_D57 AC12 AD13 DDR_A_D57
MA_CLK_H5 MB_CLK_H5 DDR_B_D58 MB_DATA57 MA_DATA57 DDR_A_D58
N20 R22 AB11 Y12
DDR_A_CLK0 MA_CLK_L5 MB_CLK_L5 DDR_B_CLK0 DDR_B_D59 MB_DATA58 MA_DATA58 DDR_A_D59
<8> DDR_A_CLK0 E16 A17 DDR_B_CLK0 <9> Y11 W11
DDR_A_CLK#0 MA_CLK_H1 MB_CLK_H1 DDR_B_CLK#0 DDR_B_D60 MB_DATA59 MA_DATA59 DDR_A_D60
<8> DDR_A_CLK#0 F16 A18 DDR_B_CLK#0 <9> AE14 AB14
DDR_A_CLK1 MA_CLK_L1 MB_CLK_L1 DDR_B_CLK1 DDR_B_D61 MB_DATA60 MA_DATA60 DDR_A_D61
<8> DDR_A_CLK1 Y16 AF18 DDR_B_CLK1 <9> AF14 AA14
3 DDR_A_CLK#1 MA_CLK_H7 MB_CLK_H7 DDR_B_CLK#1 DDR_B_D62 MB_DATA61 MA_DATA61 DDR_A_D62 3
<8> DDR_A_CLK#1 AA16 MA_CLK_L7 MB_CLK_L7 AF17 DDR_B_CLK#1 <9> AF11 MB_DATA62 MA_DATA62 AB12
P19 R26 DDR_B_D63 AD11 AA12 DDR_A_D63
MA_CLK_H4 MB_CLK_H4 MB_DATA63 MA_DATA63
P20 R25 <9> DDR_B_DM[7..0] DDR_A_DM[7..0] <8>
MA_CLK_L4 MB_CLK_L4 DDR_B_DM0 DDR_A_DM0
<8> DDR_A_MA[15..0] DDR_B_MA[15..0] <9> A12 MB_DM0 MA_DM0 E12
DDR_A_MA0 N21 P24 DDR_B_MA0 DDR_B_DM1 B16 C15 DDR_A_DM1
DDR_A_MA1 MA_ADD0 MB_ADD0 DDR_B_MA1 DDR_B_DM2 MB_DM1 MA_DM1 DDR_A_DM2
M20 N24 A22 E19
N22 P26 E25 F24
M19 N23 AB26 AC24
M22 N26 AE22 Y19
L20 MA_ADD5 MB_ADD5 L23 AC16 MB_DM6 MA_DM6 AB16
DDR_A_MA6 M24 N25 DDR_B_MA6 DDR_B_DM7 AD12 Y13 DDR_A_DM7
DDR_A_MA7 MA_ADD6 MB_ADD6 DDR_B_MA7 MB_DM7 MA_DM7
L21 L24
DDR_A_MA8 MA_ADD7 MB_ADD7 DDR_B_MA8 DDR_B_DQS0 DDR_A_DQS0
L19 MA_ADD8 MB_ADD8 M26 <9> DDR_B_DQS0 C12 MB_DQS_H0 MA_DQS_H0 G13 DDR_A_DQS0 <8>
DDR_A_MA9 K22 K26 DDR_B_MA9 DDR_B_DQS#0 B12 H13 DDR_A_DQS#0
MA_ADD9 MB_ADD9 <9> DDR_B_DQS#0 MB_DQS_L0 MA_DQS_L0 DDR_A_DQS#0 <8>
DDR_A_MA10 R21 T26 DDR_B_MA10 DDR_B_DQS1 D16 G16 DDR_A_DQS1
DDR_A_MA11 MA_ADD10 MB_ADD10 DDR_B_MA11 <9> DDR_B_DQS1 DDR_B_DQS#1 MB_DQS_H1 MA_DQS_H1 DDR_A_DQS#1 DDR_A_DQS1 <8>
L22 L26 <9> DDR_B_DQS#1 C16 G15 DDR_A_DQS#1 <8>
DDR_A_MA12 MA_ADD11 MB_ADD11 DDR_B_MA12 DDR_B_DQS2 MB_DQS_L1 MA_DQS_L1 DDR_A_DQS2
K20 L25 <9> DDR_B_DQS2 A24 C22 DDR_A_DQS2 <8>
DDR_A_MA13 MA_ADD12 MB_ADD12 DDR_B_MA13 DDR_B_DQS#2 MB_DQS_H2 MA_DQS_H2 DDR_A_DQS#2
V24 W24 <9> DDR_B_DQS#2 A23 C21 DDR_A_DQS#2 <8>
DDR_A_MA14 MA_ADD13 MB_ADD13 DDR_B_MA14 DDR_B_DQS3 MB_DQS_L2 MA_DQS_L2 DDR_A_DQS3
K24 J23 <9> DDR_B_DQS3 F26 G22 DDR_A_DQS3 <8>
DDR_A_MA15 MA_ADD14 MB_ADD14 DDR_B_MA15 DDR_B_DQS#3 MB_DQS_H3 MA_DQS_H3 DDR_A_DQS#3
K19 J24 <9> DDR_B_DQS#3 E26 G21 DDR_A_DQS#3 <8>
MA_ADD15 MB_ADD15 DDR_B_DQS4 MB_DQS_L3 MA_DQS_L3 DDR_A_DQS4
<9> DDR_B_DQS4 AC25 AD23 DDR_A_DQS4 <8>
DDR_A_BS#0 DDR_B_BS#0 DDR_B_DQS#4 MB_DQS_H4 MA_DQS_H4 DDR_A_DQS#4
<8> DDR_A_BS#0 R20 MA_BANK0 MB_BANK0 R24 DDR_B_BS#0 <9> <9> DDR_B_DQS#4 AC26 MB_DQS_L4 MA_DQS_L4 AC23 DDR_A_DQS#4 <8>
DDR_A_BS#1 R23 U26 DDR_B_BS#1 DDR_B_DQS5 AF21 AB19 DDR_A_DQS5
<8> DDR_A_BS#1 DDR_A_BS#2 MA_BANK1 MB_BANK1 DDR_B_BS#2 DDR_B_BS#1 <9> <9> DDR_B_DQS5 DDR_B_DQS#5 MB_DQS_H5 MA_DQS_H5 DDR_A_DQS#5 DDR_A_DQS5 <8>
<8> DDR_A_BS#2 J21 MA_BANK2 MB_BANK2 J26 DDR_B_BS#2 <9> <9> DDR_B_DQS#5 AF22 MB_DQS_L5 MA_DQS_L5 AB20 DDR_A_DQS#5 <8>
DDR_B_DQS6 AE16 Y15 DDR_A_DQS6
<9> DDR_B_DQS6 MB_DQS_H6 MA_DQS_H6 DDR_A_DQS6 <8>
DDR_A_RAS# R19 U25 DDR_B_RAS# DDR_B_DQS#6 AD16 W15 DDR_A_DQS#6
<8> DDR_A_RAS# MA_RAS_L MB_RAS_L DDR_B_RAS# <9> <9> DDR_B_DQS#6 MB_DQS_L6 MA_DQS_L6 DDR_A_DQS#6 <8>
DDR_A_CAS# T22 U24 DDR_B_CAS# DDR_B_DQS7 AF12 W12 DDR_A_DQS7
<8> DDR_A_CAS# DDR_A_WE# MA_CAS_L MB_CAS_L DDR_B_WE# DDR_B_CAS# <9> <9> DDR_B_DQS7 DDR_B_DQS#7 MB_DQS_H7 MA_DQS_H7 DDR_A_DQS#7 DDR_A_DQS7 <8>
<8> DDR_A_WE# T24 U23 DDR_B_WE# <9> <9> DDR_B_DQS#7 AE12 W13 DDR_A_DQS#7 <8>
MA_WE_L MB_WE_L MB_DQS_L7 MA_DQS_L7
FOX_PZ6382A-284S-41F_GRIFFIN FOX_PZ6382A-284S-41F_GRIFFIN
Athlon 64 S1 Athlon 64 S1
4 Processor Processor Socket 4
Socket CONN@
CONN@

AMD CPU S1G2 DDRII I/F
A B C D E
A B C D E
HP, 6/12
+2.5VDDA VDDA=300mA
L1
R572
+2.5VS 1 2 3300P_0402_50V7K
R7
1 FBM_L11_201209_300L_0805 2 1 LDT_RST#
1 1 1 +1.8V 1 2
@ C14 +
1K_0402_1%
2
B
100U_D2_10VM 4.7U_0805_10V4Z C15 C16 C17 680_0402_5% Q10
0.22U_0603_16V4Z
2 2 2 2
C
CPU_THERMTRIP#_R 3 1 H_THERMTRIP# <21>
PMBT3904_SOT23
JCPU1D
F8 VDDA1 KEY1 M11

1 HP 3/30 1
Place close to CPU wihtin 1.5" F9 VDDA2 KEY2 W18
H_PROCHOT# 1 2 +1.8V
1 2 3900P_0402_50V7K CPU_CLKIN_SC_P A9 A6 CPU_SVC R8 300_0402_5%
<15> CLK_CPU_BCLK CLKIN_H SVC CPU_SVC <45>
C18 CPU_CLKIN_SC_N A8 A4 CPU_SVD
CLKIN_L SVD CPU_SVD <45>
1
change from +1.8VS to +1.8V
LDT_RST# B7 HP 3/30 for lekage issue HP 12/18
H_PWRGD_CPU RESET_L
0718 Silego -- 216 ohm R9 A7
PWROK
169_0402_1% LDT_STOP# F10 AF6 CPU_THERMTRIP#_R
LDTSTOP_L THERMTRIP_L H_PROCHOT# CPU_THERMTRIP#_R <4> +1.8V
C6 AC7 H_PROCHOT# <4,46>
2
LDTREQ_L PROCHOT_L
<15> CLK_CPU_BCLK# 1 2 AA8
C19 3900P_0402_50V7K CPU_SIC MEMHOT_L R10 1K_0402_5%
AF4 SIC
CPU_SID AF5 CPU_SVC 1 2
ALERT SID CPU_SVD
AE6 ALERT_L THERMDC W7 1 2
2 1 +1.8V W8 R11 1K_0402_5%
10K_0402_5% R12 R13 THERMDA
1 2 44.2_0402_1% CPU_HTREF0 R6
R15 HT_REF0 10/29 HP
2 1 +1.2V_HT 1 2 44.2_0402_1% CPU_HTREF1 P6
1K_0402_5% R14 HT_REF1
2
Q11 10/29 HP CPU_VDD0_FB_H

B
<45> CPU_VDD0_FB_H F6 W9
CPU_VDD0_FB_L VDD0_FB_H VDDIO_FB_H
<45> CPU_VDD0_FB_L E6 VDD0_FB_L VDDIO_FB_L Y9
ALERT route as differential +CPU_CORE_NB
C
<21> THERM_SC# 1 3
PMBT3904_SOT23 Y6 H6 as short as possible
VDD1_FB_H VDDNB_FB_H VDD_NB_FB_H <45>
AMD recommend NC 10/15 AB6
VDD1_FB_L VDDNB_FB_L
G6 VDD_NB_FB_L <45> test point under the package R16 10_0402_5%
VDD_NB_FB_H 1 2
CPU_DBRDY G10 VDD_NB_FB_L 1 2
CPU_TMS DBRDY CPU_DBREQ#
AA9 E10 10/29 HP R17 10_0402_5%
CPU_TCK TMS DBREQ_L
AC9 TCK
CPU_TRST# AD9 AE9 CPU_TDO Close to CPU
CPU_TDI TRST_L TDO
10/29 HP AF9 10/29 HP
TDI
+1.8VS R489 1 2 300_0402_5% AD7 J7 CPU_TEST28_H_PLLCHRZ_P +1.8V
+CPU_CORE_0 TEST23 TEST28_H CPU_TEST28_L_PLLCHRZ_N PAD T9
H8 PAD T10
R18 10_0402_5% CPU_TEST19_PLLTEST0 TEST28_L R490 390_0402_5%
H10
TEST18
2
2 2
1 2 CPU_VDD0_FB_H R509 CPU_TEST18_PLLTEST1 G9 TEST19 TEST17 D7 CPU_TEST17_BP3
PAD T11
CPU_SIC 1 2
R19 1 2 CPU_VDD0_FB_L 510_0402_5% E7 CPU_TEST16_BP2
PAD T12
CPU_SID 1 2
TEST16
300_0402_5% R20 10_0402_5% 1 2 CPU_TEST25_H_BYPASSCLK_H E9 F7 CPU_TEST15_BP1
PAD T1
R491 390_0402_5%
CPU_TEST25_L_BYPASSCLK_L TEST25_H TEST15 CPU_TEST14_BP0
+1.8V 1 2 E8 TEST25_L TEST14 C7 PAD T2
Close to CPU R510 300_0402_5% +1.2V_HT 10/29 HP
1
LDT_RST# CPU_TEST21_SCANEN AB8 C3 @

<19> LDT_RST# TEST21 TEST7
11/6 HP CPU_TEST20_SCANCLK2 AF7 K8 R508 1 2 590_0402_1%
CPU_TEST24_SCANCLK1 TEST20 TEST10
AE7
CPU_TEST22_SCANSHIFTEN TEST24
AE8 C4 11/6 HP
CPU_TEST12_SCANSHIFTENB TEST22 TEST8
T17 PAD AC8
CPU_TEST27_SINGLECHAIN TEST12
T18 PAD AF8 TEST27
C9 CPU_TEST29_H_FBCLKOUT_P
TEST29_H PAD T15
C2 C8 CPU_TEST29_L_FBCLKOUT_N
TEST9 TEST29_L PAD
AA6 T16
TEST6
A3 H18
+1.8VS RSVD1 RSVD10
A5 H19
RSVD2 RSVD9
B3 AA7
RSVD3 RSVD8
B5 D5
RSVD4 RSVD7
2
C1 C5 CPU_TEST21_SCANEN R24 1 2 300_0402_5%

R25 RSVD5 RSVD6 CPU_TEST20_SCANCLK2 R26 300_0402_5%
2 1
300_0402_5% CPU_TEST24_SCANCLK1 R27 2 1 300_0402_5%
FOX_PZ6382A-284S-41F_GRIFFIN CPU_TEST22_SCANSHIFTEN R28 2 1 @ 300_0402_5%
CONN@
1
H_PWRGD_CPU CPU_TEST15_BP1 R30 2 1 @ 300_0402_5%

<19> H_PWRGD_CPU
CPU_TEST19_PLLTEST0 R32 2 1 @ 300_0402_5%
CPU_TEST18_PLLTEST1 R33 2 1 @ 300_0402_5%
9/23 HP
3 +3VS 11/6 HP 3
11/6 HP
+1.8V
1
+1.8VS
R34
HDT Connector
@ 220_0402_5% R36
@ 220_0402_5% R37
@ 220_0402_5% R38
@ 220_0402_5% R39
@ 220_0402_5% R41
300_0402_5% R40
HP 4/6
2
+5VS 1.5K_0402_5%
1
R35
1
560_0402_5%
JP2
1
1
1 2
2
LDT_STOP# C705
<11,19> LDT_STOP#
2
0.1U_0402_25V6 3 4
2
CPU_SMCLK CPU_SIC CPU_DBREQ# 5 6
<4,8,9,15,21,30> SMB_CK_CLK0 1 6 3 4
2 CPU_DBRDY 7 8
CPU_TCK 9 10
Q4A Q4B 1 11 12
CPU_TMS +3VS
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
C20 220P_0402_25V8J CPU_TDI 13 14
CPU_TRST# 15 16
17 18
5
+5VS 2 CPU_TDO U3
19 20 LDT_RST#
2
P
21 22 HDT_RST# 4 B
23 24 Y
1 SB_PWRGD <21,33,45>
26 A
G
2
+1.8VS NC7SZ08P5X_NL_SC70-5
3
SAMTEC_ASP-68200-07
<4,8,9,15,21,30> SMB_CK_DAT0 1 6CPU_SMDATA 3 4 CPU_SID
2
R42 1
Q5A Q5B R43
1K_0402_5%
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
C21 220P_0402_25V8J
4.7K_0402_5%
1
4 CPU_LDT_REQ# 2 4
CPU_LDT_REQ# <11,19>

AMD CPU S1G2 CTRL
A B C D E
A B C D E
18A/720mil/36vias JCPU1F
L 18A/720mil/36vias L
VDD(+CPU_CORE) decoupling. +CPU_CORE_0 JCPU1E +CPU_CORE_0
AA4
AA11
VSS1
VSS2
VSS66
VSS67
J6
J8
10/6 HP AA13 VSS3 VSS68 J10
G4 VDD0_1 VDD1_1 P8 AA15 VSS4 VSS69 J12
H2 VDD0_2 VDD1_2 P10 AA17 VSS5 VSS70 J14
+CPU_CORE_0 +CPU_CORE_0 J9 R4 AA19 J16
VDD0_3 VDD1_3 VSS6 VSS71
J11 R7 AB2 J18
J13 VDD0_5 VDD1_5 R9 AB7 VSS8 VSS73 K2
J15 R11 AB9 K7
1 1 1 1 K6 VDD0_7 VDD1_7 T2 AB23 VSS10 VSS75 K9
K10 T6 AB25 K11
+ C22 + C23 + C24 + C25 VDD0_8 VDD1_8 VSS11 VSS76
K12 VDD0_9 VDD1_9 T8 AC11 VSS12 VSS77 K13
1 330U_X_2VM_R6M 330U_X_2VM_R6M 330U_X_2VM_R6M 330U_X_2VM_R6M 1
K14 VDD0_10 VDD1_10 T10 AC13 VSS13 VSS78 K15
L4 VDD0_11 VDD1_11 T12 AC15 VSS14 VSS79 K17
2 2 2 2 L7 T14 AC17 L6
L9 U7 AC19 L8
Near CPU Socket L11
L13
VDD0_14
VDD0_15
VDD1_14
VDD1_15
U9
U11
AC21
AD6
VSS17
VSS18
VSS82
VSS83
L10
L12
L15 U13 AD8 L14
M2 VDD0_17 VDD1_17 U15 AD25 VSS20 VSS85 L16
M6 VDD0_18 VDD1_18 V6 AE11 VSS21 VSS86 L18
M8 V8 AE13 M7
+CPU_CORE_0 +0.8V~+1.1V, 3A M10 VDD0_20 VDD1_20 V10 AE15 VSS23 VSS88 M9
+CPU_CORE_0 N7 V12 AE17 AC6
(+-25mV_dc, +-125mV_ac) VDD0_21 VDD1_21 VSS24 VSS89
N9 VDD0_22 VDD1_22 V14 AE19 VSS25 VSS90 M17
+CPU_CORE_NB N11 W4 AE21 N4
1 1 1 1 Y2 AE23 N8
C26 C27 C28 C29 VDD1_24 VSS27 VSS92
1 1 1 1 K16 AC4 B4 N10
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M C30 C31 C32 C33 VDDNB_1 VDD1_25 +1.8V VSS28 VSS93
M16 VDDNB_2 VDD1_26 AD2 B6 VSS29 VSS94 N16
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M P16 B8 N18
2 2 2 2 VDDNB_3 VSS30 VSS95
T16 VDDNB_4 VDDIO27 Y25 B9 VSS31 VSS96 P2
2 2 2 2 2A ,(+-100mV_dc,
+1.8V V16 V25 B11 P7
VDDNB_5 VDDIO26 VSS32 VSS97
+-150mV_ac) V23 B13 P9
+CPU_CORE_0 VDDIO25 VSS33 VSS98
H25 V21 B15 P11
+CPU_CORE_0 VDDIO1 VDDIO24 VSS34 VSS99
J17 VDDIO2 VDDIO23 V18 B17 VSS35 VSS100 P17
K18 VDDIO3 VDDIO22 U17 B19 VSS36 VSS101 R8
K21 T25 B21 R10
VDDIO4 VDDIO21 VSS37 VSS102
1 1 1 1 1 1 K23 VDDIO5 VDDIO20 T23 B23 VSS38 VSS103 R16
C34 C35 C36 C37 C38 C39 K25 T21 B25 R18
0.22U_0603_16V4Z 0.01U_0402_25V4Z 180P_0402_50V8J 0.22U_0603_16V4Z 0.01U_0402_25V4Z 180P_0402_50V8J VDDIO6 VDDIO19 VSS39 VSS104
L17 T18 D6 T7
M18 VDDIO8 VDDIO17 R17 D8 VSS41 VSS106 T9
2 2 2 2 2 2 M21 P25 D9 T11
Under CPU Socket M23
M25
VDDIO10
VDDIO11
VDDIO15
VDDIO14
P23
P21
D11
D13
VSS43
VSS44
VSS108
VSS109
T13
T15
2 2
N17 VDDIO12 VDDIO13 P18 D15 VSS45 VSS110 T17
D17 U4
VSS46 VSS111
D19 U6
FOX_PZ6382A-284S-41F_GRIFFIN VSS47 VSS112
D21 VSS48 VSS113 U8
Athlon 64 S1 D23 U10
Processor Socket VSS49 VSS114
D25 U12
CONN@ VSS50 VSS115
E4 VSS51 VSS116 U14
F2 U16
VSS52 VSS117
F11 VSS53 VSS118 U18
F13 V2
VSS54 VSS119
F15 V7
+CPU_CORE_NB decoupling. F17
F19
VSS55
VSS56
VSS57
VSS120
VSS121
VSS122
V9
V11
F21 V13
VDDIO decoupling. +CPU_CORE_NB
F23
F25
VSS58
VSS59
VSS60
VSS123
VSS124
VSS125
V15
V17
H7 W6
VSS61 VSS126
H9 Y21
VSS62 VSS127
1 1 1 H21 Y23
+1.8V C40 C41 C42 VSS63 VSS128
H23 VSS64 VSS129 N6
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M J4
VSS65
2 2 2 FOX_PZ6382A-284S-41F_GRIFFIN
1 1 1 1 1 1 Athlon 64 S1
C43 C44 C45 C46 C47 C48 Processor Socket
22U_0805_6.3V6M 22U_0805_6.3V6M CONN@
0.22U_0603_16V4Z 0.22U_0603_16V4Z 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2
+0.9V
3 Under CPU Socket Near Power Supply 3
VTT decoupling. 1
C: Change to NBO CAP
+ C49
220U_Y_4VM
2
Between CPU Socket and DIMM
+1.8V
+0.9V
1 1 1 1
C50 C51 C52 C53
0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z
2 2 2 2 1 1 1 1 1 1 1 1
C54 C55 C56 C57 C58 C59 C60 C61
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_25V8J 1000P_0402_25V8J 180P_0402_50V8J 180P_0402_50V8J
180PF Qt'y follow the distance between 2 2 2 2 2 2 2 2

+1.8V +1.8V CPU socket and DIMM0. <2.5inch>
1 1 1 1 1 1
Near CPU Socket Right side.
C62 C63 C64 C65 C66 C67 +0.9V
0.01U_0402_25V4Z 0.01U_0402_25V4Z 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2
1 1 1 1 1 1 1 1
C68 C69 C70 C71 C72 C73 C74 C75
4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0603_16V4Z 0.22U_0603_16V4Z 1000P_0402_25V8J 1000P_0402_25V8J 180P_0402_50V8J 180P_0402_50V8J
+1.8V
2 2 2 2 2 2 2 2
4 4
1
C: Change to NBO CAP
1 1 1 1
+ C76 Near CPU Socket Left side.
C77 C78 C79 C80 220U_Y_4VM
4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z
2 2 2 2 2 @

AMD CPU S1G2 PWR & GND
A B C D E
A B C D E
+V_DDR_MCH_REF
+0.9V
+1.8V JDIMMA +1.8V +1.8V
1 2 RP1
VREF VSS DDR_A_D4 D DR_A_D[0..63] DDR_A_MA6
3 VSS DQ4 4 DDR_A_D[0..63] <5> 8 1 1 2
DDR_A_D0 5 6 DDR_A_D5 DDR_A_MA7 7 2 C81 0.1U_0402_16V4Z
DDR_A_D1 DQ0 DQ5 DDR_A_DM[0..7] DDR_A_MA11
7 DQ1 VSS 8 DDR_A_DM[0..7] <5> 6 3 1 2
9 10 DDR_A_DM0 DDR_A_MA14 5 4 C82 0.1U_0402_16V4Z
DDR_A_DQS#0 VSS DM0 D DR_A_DQS[0..7]
11 DQS0# VSS 12
1 DDR_A_DQS0 DDR_A_D6 DDR_A_DQS[0..7] <5> 47_0804_8P4R_5% 1
13 DQS0 DQ6 14
15 16 DDR_A_D7 DDR_A_MA[0..15]
VSS DQ7 DDR_A_MA[0..15] <5>
DDR_A_D2 17 18 DDR_CKE0_DIMMA R4782 1 47_0402_5% 1 2
DDR_A_D3 DQ2 VSS DDR_A_D12 DDR_A_DQS#[0..7] DDR_CKE1_DIMMA R4792 47_0402_5% C83 0.1U_0402_16V4Z
19 20 1
DQ3 DQ12 DDR_A_D13 DDR_A_DQS#[0..7] <5> DDR_A_MA15 R4802 47_0402_5%
21 22 1 1 2
DDR_A_D8 VSS DQ13 DDR_A_BS#2 R4812 47_0402_5% C84 0.1U_0402_16V4Z
23 DQ8 VSS 24 1
DDR_A_D9 25 26 DDR_A_DM1
DQ9 DM1
27 VSS VSS 28
DDR_A_DQS#1 29 30 RP3
DQS1# CK0 DDR_A_CLK0 <5>
DDR_A_DQS1 31 32 DDR_A_BS#1 8 1 1 2
DQS1 CK0# DDR_A_CLK#0 <5> DDR_A_MA0
33 34 7 2 C85 0.1U_0402_16V4Z
DDR_A_D10 VSS VSS DDR_A_D14 DDR_A_MA2
35 36 6 3 1 2
DDR_A_D11 DQ10 DQ14 DDR_A_D15 +1.8V DDR_A_MA4 C86 0.1U_0402_16V4Z
37 DQ11 DQ15 38 5 4
39 40
VSS VSS 47_0804_8P4R_5%
2
RP4
41 42 @ R44 DDR_A_MA12 8 1 1 2
DDR_A_D16 VSS VSS DDR_A_D20 1K_0402_1% DDR_A_MA9 C87 0.1U_0402_16V4Z
43 44 7 2
DDR_A_D17 DQ16 DQ20 DDR_A_D21 DDR_A_MA8
45 DQ17 DQ21 46 6 3 1 2
47 48 DDR_A_MA5 5 4 C88 0.1U_0402_16V4Z
1
DDR_A_DQS#2 VSS VSS +V_DDR_MCH_REF
49 50 +V_DDR_MCH_REF <9,44>
DDR_A_DQS2 DQS2# NC DDR_A_DM2 47_0804_8P4R_5%
51 52
DQS2 DM2 RP5
53 VSS VSS 54 1 1
2
DDR_A_D18 55 56 DDR_A_D22 C90 C91 @ DDR_A_MA3 8 1 1 2
DDR_A_D19 DQ18 DQ22 DDR_A_D23 R45 DDR_A_MA1 C89 0.1U_0402_16V4Z
57 58 7 2
DQ19 DQ23 1K_0402_1% DDR_A_MA10
59 VSS VSS 60 6 3 1 2
DDR_A_D24 61 62 DDR_A_D28 2 2 DDR_A_BS#0 5 4 C92 0.1U_0402_16V4Z
DDR_A_D25 DQ24 DQ28 DDR_A_D29 1000P_0402_25V8J
63 64
1
DQ25 DQ29 47_0804_8P4R_5%
65 VSS VSS 66
DDR_A_DM3 67 68 DDR_A_DQS#3 0.1U_0402_16V4Z RP6
DM3 DQS3# DDR_A_DQS3 DDR_A_WE#
69 70 8 1 1 2
NC DQS3 DDR_A_CAS# C93 0.1U_0402_16V4Z
71 72 7 2
2 DDR_A_D26 VSS VSS DDR_A_D30 DDR_CS1_DIMMA# 2
73 DQ26 DQ30 74 6 3 1 2
DDR_A_D27 75 76 DDR_A_D31 DDR_A_ODT1 5 4 C94 0.1U_0402_16V4Z
DQ27 DQ31
77 78
DDR_CKE0_DIMMA VSS VSS DDR_CKE1_DIMMA 47_0804_8P4R_5%
<5> DDR_CKE0_DIMMA 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMA <5>
81 82 RP7
VDD VDD DDR_A_MA15 DDR_A_MA13
83 84 8 1 1 2
DDR_A_BS#2 NC NC/A15 DDR_A_MA14 DDR_A_ODT0 C95 0.1U_0402_16V4Z
<5> DDR_A_BS#2 85 BA2 NC/A14 86 7 2
87 88 DDR_CS0_DIMMA# 6 3 1 2
DDR_A_MA12 VDD VDD DDR_A_MA11 DDR_A_RAS# C96 0.1U_0402_16V4Z
89 A12 A11 90 5 4
DDR_A_MA9 91 92 DDR_A_MA7
DDR_A_MA8 A9 A7 DDR_A_MA6 47_0804_8P4R_5%
93 A8 A6 94
95
VDD VDD
96 Cross between +1.8V and +0.9V power plan
DDR_A_MA5 97 98 DDR_A_MA4
DDR_A_MA3 A5 A4 DDR_A_MA2
99 100
DDR_A_MA1 A3 A2 DDR_A_MA0
101 102
A1 A0
103 104
DDR_A_MA10 VDD VDD DDR_A_BS#1
105 106 DDR_A_BS#1 <5>
DDR_A_BS#0 A10/AP BA1 DDR_A_RAS#
<5> DDR_A_BS#0 107 108 DDR_A_RAS# <5>
DDR_A_WE# BA0 RAS# DDR_CS0_DIMMA#
<5> DDR_A_WE# 109 110 DDR_CS0_DIMMA# <5>
WE# S0#
111 VDD VDD 112
DDR_A_CAS# 113 114 DDR_A_ODT0
<5> DDR_A_CAS# CAS# ODT0 DDR_A_ODT0 <5>
DDR_CS1_DIMMA# 115 116 DDR_A_MA13
<5> DDR_CS1_DIMMA# NC/S1# NC/A13
117 118
DDR_A_ODT1 VDD VDD +1.8V
<5> DDR_A_ODT1 119 120
NC/ODT1 NC
121 122
DDR_A_D32 VSS VSS DDR_A_D36
123 124
DDR_A_D33 DQ32 DQ36 DDR_A_D37
125 DQ33 DQ37 126
127 128
DDR_A_DQS#4 VSS VSS DDR_A_DM4
129 130
DDR_A_DQS4 DQS4# DM4
131 132 2 2
DQS4 VSS DDR_A_D38
133 134
DDR_A_D34 VSS DQ38 DDR_A_D39 @ C720 @ C721
135 136
3 DDR_A_D35 DQ34 DQ39 0.1U_0402_16V4Z 3
137 DQ35 VSS 138 0.1U_0402_16V4Z
DDR_A_D44 1 1
139 VSS DQ44 140
DDR_A_D40 141 142 DDR_A_D45
DDR_A_D41 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_A_DQS#5
DDR_A_DM5 VSS DQS5# DDR_A_DQS5
147 148
DM5 DQS5
149 150
151 152
153 154
DQ43 DQ47
155 VSS VSS 156
DDR_A_D48 157 158 DDR_A_D52 Compal EMI 6/11
159 160
DQ49 DQ53
161 VSS VSS 162
163 164 DDR_A_CLK1 <5>
NC,TEST CK1
165 VSS CK1# 166 DDR_A_CLK#1 <5>
DDR_A_DQS#6 167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 170
DQS6 DM6
171 172
173 174
175 176
DQ51 DQ55
177 178
179 DQ56 DQ60 180
DDR_A_D57 181 182 DDR_A_D61
DQ57 DQ61
183 VSS VSS 184
DDR_A_DM7 185 186 DDR_A_DQS#7
DM7 DQS7# DDR_A_DQS7
187 188
DDR_A_D58 VSS DQS7
189 DQ58 VSS 190
DDR_A_D59 191 192 DDR_A_D62
DQ59 DQ62 DDR_A_D63
193 194
VSS DQ63
<4,6,9,15,21,30> SMB_CK_DAT0 195 196
SDA VSS
<4,6,9,15,21,30> SMB_CK_CLK0 197 198
SCL SAO
+3VS 199 VDDSPD SA1 200
4 4
1 201 202
GND GND
C97 TYCO_292527-4
0.1U_0402_16V4Z CONN@
2 9/20 SP07000BZ00/SP07000EU00
DDR2 SOCKET H9.2 (REV)

DDRII SO-DIMM 1
A B C D E
A B C D E
+1.8V +1.8V +0.9V +1.8V

JDIMMB RP8
1 2 D DR_B_D[0..63] DDR_B_MA6 8 1 2 1
<8,44> +V_DDR_MCH_REF VREF VSS DDR_B_D4 DDR_B_D[0..63] <5> DDR_B_MA2
3 4 7 2 C98 0.1U_0402_16V4Z
DDR_B_D0 VSS DQ4 DDR_B_D5 DDR_B_DM[0..7] DDR_B_MA0
5 6 DDR_B_DM[0..7] <5> 6 3 1 2
DDR_B_D1 DQ0 DQ5 DDR_CS0_DIMMB# C99 0.1U_0402_16V4Z
7 DQ1 VSS 8 5 4
1 9 10 DDR_B_DM0 D DR_B_DQS[0..7]
C100 DDR_B_DQS#0 VSS DM0 DDR_B_DQS[0..7] <5> 47_0804_8P4R_5%
11 DQS0# VSS 12
DDR_B_DQS0 13 14 DDR_B_D6 DDR_B_MA[0..15]
DQS0 DQ6 DDR_B_MA[0..15] <5>
15 16 DDR_B_D7 RP9
1 2 DDR_B_D2 VSS DQ7 DDR_B_DQS#[0..7] DDR_B_MA14 1
17 DQ2 VSS 18 DDR_B_DQS#[0..7] <5> 8 1 2 1
1000P_0402_25V8J DDR_B_D3 19 20 DDR_B_D12 DDR_B_MA11 7 2 C101 0.1U_0402_16V4Z
DQ3 DQ12 DDR_B_D9 DDR_B_MA7
21 VSS DQ13 22 6 3 1 2
DDR_B_D8 23 24 DDR_B_MA4 5 4 C102 0.1U_0402_16V4Z
DDR_B_D13 DQ8 VSS DDR_B_DM1
25 26
DQ9 DM1 47_0804_8P4R_5%
27 VSS VSS 28
DDR_B_DQS#1 29 30
DDR_B_DQS1 DQS1# CK0 DDR_B_CLK0 <5>
31 DQS1 CK0# 32 DDR_B_CLK#0 <5>
33 34 DDR_CKE1_DIMMB R524 2 1 47_0402_5% 2 1
DDR_B_D10 VSS VSS DDR_B_D14 DDR_B_MA15 R525 47_0402_5% C103 0.1U_0402_16V4Z
35 36 2 1
DDR_B_D11 DQ10 DQ14 DDR_B_D15 DDR_CKE0_DIMMB R526 47_0402_5%
37 DQ11 DQ15 38 2 1 1 2
39 40 DDR_B_BS#2 R527 2 1 47_0402_5% C104 0.1U_0402_16V4Z
VSS VSS
change 8P4R to 0402 for improve layout placement. Compal 12/5
41 42
DDR_B_D21 VSS VSS DDR_B_D20 RP11
43 44
DDR_B_D17 DQ16 DQ20 DDR_B_D16 DDR_B_MA8
45 DQ17 DQ21 46 8 1 2 1
47 48 DDR_B_MA5 7 2 C105 0.1U_0402_16V4Z
DDR_B_DQS#2 VSS VSS DDR_B_MA12
49 DQS2# NC 50 6 3 1 2
DDR_B_DQS2 51 52 DDR_B_DM2 DDR_B_MA9 5 4 C106 0.1U_0402_16V4Z
DQS2 DM2
53 54
DDR_B_D18 VSS VSS DDR_B_D22 47_0804_8P4R_5%
55 56
DDR_B_D19 DQ18 DQ22 DDR_B_D23
57 DQ19 DQ23 58
59 60 RP12
DDR_B_D24 VSS VSS DDR_B_D28 DDR_B_MA10
61 62 8 1 2 1
DDR_B_D25 DQ24 DQ28 DDR_B_D29 DDR_B_BS#0 C107 0.1U_0402_16V4Z
63 DQ25 DQ29 64 7 2
65 66 DDR_B_MA1 6 3 1 2
DDR_B_DM3 VSS VSS DDR_B_DQS#3 DDR_B_MA3 C108 0.1U_0402_16V4Z
67 68 5 4
DM3 DQS3# DDR_B_DQS3
69 NC DQS3 70
71 72 47_0804_8P4R_5%
DDR_B_D26 VSS VSS DDR_B_D30
73 74
DDR_B_D27 DQ26 DQ30 DDR_B_D31 RP13
75 76
2 DQ27 DQ31 DDR_B_ODT1 2
77 VSS VSS 78 8 1 2 1
DDR_CKE0_DIMMB 79 80 DDR_CKE1_DIMMB DDR_CS1_DIMMB# 7 2 C109 0.1U_0402_16V4Z
<5> DDR_CKE0_DIMMB CKE0 NC/CKE1 DDR_CKE1_DIMMB <5> DDR_B_CAS#
81 82 6 3 1 2
VDD VDD DDR_B_MA15 DDR_B_WE# C110 0.1U_0402_16V4Z
83 NC NC/A15 84 5 4
DDR_B_BS#2 85 86 DDR_B_MA14
<5> DDR_B_BS#2 BA2 NC/A14
87 88 47_0804_8P4R_5%
DDR_B_MA12 VDD VDD DDR_B_MA11
89 A12 A11 90
DDR_B_MA9 91 92 DDR_B_MA7 RP14
DDR_B_MA8 A9 A7 DDR_B_MA6 DDR_B_BS#1
93 A8 A6 94 8 1 2 1
95 96 DDR_B_RAS# 7 2 C111 0.1U_0402_16V4Z
DDR_B_MA5 VDD VDD DDR_B_MA4 DDR_B_ODT0
97 A5 A4 98 6 3 1 2
DDR_B_MA3 99 100 DDR_B_MA2 DDR_B_MA13 5 4 C112 0.1U_0402_16V4Z
DDR_B_MA1 A3 A2 DDR_B_MA0
101 A1 A0 102
103 104 47_0804_8P4R_5%
DDR_B_MA10 VDD VDD DDR_B_BS#1
105
A10/AP BA1
106 DDR_B_BS#1 <5> Cross between +1.8V and +0.9V power plan
DDR_B_BS#0 107 108 DDR_B_RAS#
<5> DDR_B_BS#0 BA0 RAS# DDR_B_RAS# <5>
DDR_B_WE# 109 110 DDR_CS0_DIMMB#
<5> DDR_B_WE# WE# S0# DDR_CS0_DIMMB# <5>
111 112
DDR_B_CAS# VDD VDD DDR_B_ODT0
<5> DDR_B_CAS# 113 114 DDR_B_ODT0 <5>
DDR_CS1_DIMMB# CAS# ODT0 DDR_B_MA13
<5> DDR_CS1_DIMMB# 115 NC/S1# NC/A13 116
117 118
DDR_B_ODT1 VDD VDD
<5> DDR_B_ODT1 119 120
NC/ODT1 NC
121 122
123 124
125 126
DQ33 DQ37
127 128
DDR_B_DQS#4 VSS VSS DDR_B_DM4
129 DQS4# DM4 130
DDR_B_DQS4 131 132
DQS4 VSS DDR_B_D38
133 134
DDR_B_D34 VSS DQ38 DDR_B_D39
135 136
DDR_B_D35 DQ34 DQ39
137 138
DQ35 VSS DDR_B_D44
139 140
3 DDR_B_D40 VSS DQ44 DDR_B_D45 3
141 DQ40 DQ45 142
DDR_B_D41 143 144
DQ41 VSS DDR_B_DQS#5
145 146
DDR_B_DM5 VSS DQS5# DDR_B_DQS5
147 DM5 DQS5 148
149 150
151 152
153 154
DQ43 DQ47
155 156
157 158
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 DDR_B_CLK1 <5>
NC,TEST CK1
165 VSS CK1# 166 DDR_B_CLK#1 <5>
DDR_B_DQS#6 167 168
DDR_B_DQS6 DQS6# VSS DDR_B_DM6
169 DQS6 DM6 170
171 172
173 174
175 176
DQ51 DQ55
177 178
179 180
181 182
DQ57 DQ61
183 VSS VSS 184
DDR_B_DM7 185 186 DDR_B_DQS#7
DM7 DQS7# DDR_B_DQS7
187 VSS DQS7 188
DDR_B_D58 189 190
DDR_B_D59 DQ58 VSS DDR_B_D62
191 192
DQ59 DQ62 DDR_B_D63
193 VSS DQ63 194
<4,6,8,15,21,30> SMB_CK_DAT0 195 196
SDA VSS
<4,6,8,15,21,30> SMB_CK_CLK0 197 198
SCL SAO
199 200 +3VS
+3VS VDDSPD SA1
1 201 202
GND GND
4 C113 TYCO_292527-4 4
0.1U_0402_16V4Z CONN@
2
9/20 SP07000ET00/SP07000GN00

DDRII SO-DIMM 2
A B C D E
A B C D E
U4B
D4 GFX_RX0P GFX_TX0P A5 DPA_TXP0 <18>
C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5 DPA_TXN0 <18>
A3 GFX_RX1P GFX_TX1P A4 DPA_TXP1 <18>
B3 GFX_RX1N GFX_TX1N B4 DPA_TXN1 <18>
C2 C3 DPA_TXP2 <18>
GFX_RX2P GFX_TX2P
C1 GFX_RX2N GFX_TX2N B2 DPA_TXN2 <18>
E5 D1 DPA_TXP3 <18>
GFX_RX3P GFX_TX3P
F5 D2
G5
G6
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_TX3N
GFX_TX4P
GFX_TX4N
E2
E1
DPA_TXN3
DPB_TXP0
DPB_TXN0
<18>
<32>
<32>
Display Port
1 1
H5 GFX_RX5P GFX_TX5P F4 DPB_TXP1 <32>
H6 GFX_RX5N GFX_TX5N F3 DPB_TXN1 <32>
J6 GFX_RX6P GFX_TX6P F1 DPB_TXP2 <32>
J5 F2 DPB_TXN2 <32>
GFX_RX6N GFX_TX6N
J7 H4 DPB_TXP3 <32>
GFX_RX7P GFX_TX7P
J8 GFX_RX7N GFX_TX7N H3 DPB_TXN3 <32>
L5 H1 DPC_TXP0 <32>
GFX_RX8P GFX_TX8P
L6 GFX_RX8N GFX_TX8N H2 DPC_TXN0 <32>
M8 GFX_RX9P GFX_TX9P J2 DPC_TXP1 <32>
L8 J1 DPC_TXN1 <32>
GFX_RX9N GFX_TX9N
P7 K4 DPC_TXP2 <32>
PCIE I/F GFX

GFX_RX10P GFX_TX10P
M7 K3 DPC_TXN2 <32>
GFX_RX10N GFX_TX10N
P5 GFX_RX11P GFX_TX11P K1 DPC_TXP3 <32>
M5 K2 DPC_TXN3 <32>
GFX_RX11N GFX_TX11N
R8 M4
GFX_RX12P GFX_TX12P
P8 M3
GFX_RX12N GFX_TX12N
R6 GFX_RX13P GFX_TX13P M1
R5 M2
GFX_RX13N GFX_TX13N
P4 GFX_RX14P GFX_TX14P N2
P3 N1
GFX_RX14N GFX_TX14N
T4 P1
GFX_RX15P GFX_TX15P
T3 P2
GFX_RX15N GFX_TX15N
AE3 AC1 PCIE_PTX_DRX_P0 C114 1 2 0.1U_0402_16V7K
<25> PCIE_PRX_DTX_P0 GPP_RX0P GPP_TX0P PCIE_PTX_DRX_N0 PCIE_PTX_C_DRX_P0 <25>
<25> PCIE_PRX_DTX_N0 AD4
GPP_RX0N GPP_TX0N
AC2 C115 1 2 0.1U_0402_16V7K PCIE_PTX_C_DRX_N0 <25> NIC
AE2 AB4 PCIE_PTX_DRX_P1 C116 1 2 0.1U_0402_16V7K
<31> PCIE_PRX_DTX_N1 AD3
GPP_RX1N GPP_TX1N
AB3 C117 1 2 0.1U_0402_16V7K PCIE_PTX_C_DRX_N1 <31> Media Card
AD1 AA2
GPP_RX2P GPP_TX2P
AD2 GPP_RX2N PCIE I/F GPP GPP_TX2N AA1
PCIE_PTX_DRX_P3
V5 Y1 C118 1 2 0.1U_0402_16V7K
<31> PCIE_PRX_DTX_N3 W6
GPP_RX3N GPP_TX3N
Y2 C119 1 2 0.1U_0402_16V7K PCIE_PTX_C_DRX_N3 <31> EXP
U5 Y4 PCIE_PTX_DRX_P4 C120 1 2 0.1U_0402_16V7K
2 <27> PCIE_PRX_DTX_P4 GPP_RX4P GPP_TX4P PCIE_PTX_DRX_N4 PCIE_PTX_C_DRX_P4 <27> H_CADOP[0..15] H_CADIP[0..15] 2
<27> PCIE_PRX_DTX_N4 U6 GPP_RX4N GPP_TX4N Y3 C121 1 2 0.1U_0402_16V7K PCIE_PTX_C_DRX_N4 <27> WLAN <4> H_CADOP[0..15] H_CADIP[0..15] <4>
U8 V1
GPP_RX5P GPP_TX5P H_CADON[0..15] H_CADIN[0..15]
remove UWB , 10/21 HP U7 V2 remove UWB , 10/21 HP <4> H_CADON[0..15] H_CADIN[0..15] <4>
GPP_RX5N GPP_TX5N
<19> SB_RX0P AA8 AD7 SB_TX0P_C C124 1 2 0.1U_0402_16V7K
SB_RX0P SB_TX0P SB_TX0N_C SB_TX0P <19>
<19> SB_RX0N Y8 AE7 C125 1 2 0.1U_0402_16V7K
SB_RX0N SB_TX0N SB_TX0N <19>
<19> SB_RX1P AA7 AE6 SB_TX1P_C C126 1 2 0.1U_0402_16V7K
SB_RX1P SB_TX1P SB_TX1P <19>
<19> SB_RX1N Y7 AD6 SB_TX1N_C C127 1 2 0.1U_0402_16V7K U4A
SB_RX1N SB_TX1N SB_TX2P_C SB_TX1N <19> H_CADOP0 H_CADIP0
<19> SB_RX2P AA5 PCIE I/F SB AB6 C128 1 2 0.1U_0402_16V7K Y25 D24
SB_RX2P SB_TX2P SB_TX2N_C SB_TX2P <19> H_CADON0 HT_RXCAD0P HT_TXCAD0P H _CADIN0
<19> SB_RX2N AA6 AC6 C129 1 2 0.1U_0402_16V7K Y24 PART 1 OF 6 D25
SB_RX2N SB_TX2N SB_TX3P_C SB_TX2N <19> H_CADOP1 HT_RXCAD0N HT_TXCAD0N H_CADIP1
<19> SB_RX3P W5 AD5 C130 1 2 0.1U_0402_16V7K V22 E24
SB_RX3P SB_TX3P SB_TX3P <19> HT_RXCAD1P HT_TXCAD1P
<19> SB_RX3N Y5 AE5 SB_TX3N_C C131 1 2 0.1U_0402_16V7K H_CADON1 V23 E25 H _CADIN1
SB_RX3N SB_TX3N SB_TX3N <19> HT_RXCAD1N HT_TXCAD1N
H_CADOP2 V25 F24 H_CADIP2
R46 1.27K_0402_1% H_CADON2 HT_RXCAD2P HT_TXCAD2P H _CADIN2
AC8 1 2 V24 F25
PCE_CALRP(PCE_BCALRP) R47 2K_0402_1% H_CADOP3 HT_RXCAD2N HT_TXCAD2N H_CADIP3
AB8 1 2 +1.1VS U24 F23
PCE_CALRN(PCE_BCALRN) H_CADON3 HT_RXCAD3P HT_TXCAD3P H _CADIN3
U25 F22
H_CADOP4 HT_RXCAD3N HT_TXCAD3N H_CADIP4
RS880MN_FCBGA528 H_CADON4
T25
HT_RXCAD4P HT_TXCAD4P
H23
H _CADIN4
T24 H22
RS780M Display Port Support (muxed on GFX) P22
HT_RXCAD5P HT_TXCAD5P
J25
H_CADON5 P23 J24 H _CADIN5
HYPER TRANSPORT CPU I/F

P25 K24
GFX_TX0,TX1,TX2 and TX3 H_CADON6 HT_RXCAD6P HT_TXCAD6P H _CADIN6
P24 K25
DP0 H_CADOP7 HT_RXCAD6N HT_TXCAD6N H_CADIP7
N24 K23
AUX0 and HPD0 H_CADON7 HT_RXCAD7P HT_TXCAD7P H _CADIN7
N25 K22
HT_RXCAD7N HT_TXCAD7N
H_CADOP8 AC24 F21 H_CADIP8
GFX_TX4,TX5,TX6 and TX7 H_CADON8 HT_RXCAD8P HT_TXCAD8P H _CADIN8
AC25 HT_RXCAD8N HT_TXCAD8N G21
DP1 H_CADOP9 AB25 G20 H_CADIP9
AUX1 and HPD1 H_CADON9 HT_RXCAD9P HT_TXCAD9P H _CADIN9
AB24 H21
AA24 J20
H_CADON10 HT_RXCAD10P HT_TXCAD10P H_CADIN10
AA25 J21
9/20 SA00001ZG00(A11) S IC 216-0674001-00/RS780M FCBGA528P 0FH Y22 J18
3 H_CADON11 HT_RXCAD11P HT_TXCAD11P H_CADIN11 3
Y23 HT_RXCAD11N HT_TXCAD11N K17
H_CADOP12 W21 L19 H_CADIP12
W20 J19
V21 HT_RXCAD13P HT_TXCAD13P M19
H_CADON13 V20 L18 H_CADIN13
U20 M21
U21 P21
U19 P18
U18 M18
HT_RXCAD15N HT_TXCAD15N
<4> H_CLKOP0 T22 HT_RXCLK0P HT_TXCLK0P H24 H_CLKIP0 <4>

<4> H_CLKON0 T23 H25 H_CLKIN0 <4>
HT_RXCLK0N HT_TXCLK0N
<4> H_CLKOP1 AB23 HT_RXCLK1P HT_TXCLK1P L21 H_CLKIP1 <4>
<4> H_CLKON1 AA22 L20 H_CLKIN1 <4>
HT_RXCLK1N HT_TXCLK1N
H_CTLOP0 M22 M24 H_CTLIP0
<4> H_CTLOP0 HT_RXCTL0P HT_TXCTL0P H_CTLIP0 <4>
H_CTLON0 M23 M25 H_CTLIN0
<4> H_CTLON0 H_CTLOP1 HT_RXCTL0N HT_TXCTL0N H_CTLIP1 H_CTLIN0 <4>
<4> H_CTLOP1 R21 P19 H_CTLIP1 <4>
H_CTLON1 HT_RXCTL1P HT_TXCTL1P H_CTLIN1
<4> H_CTLON1 R20 R18 H_CTLIN1 <4>
HT_RXCTL1N HT_TXCTL1N
1 R48 2 301_0402_1% C23 B24 1 R49 2 301_0402_1%
HT_RXCALP HT_TXCALP
A24 HT_RXCALN HT_TXCALN B25
Place within 1" RS880MN_FCBGA528 Place within 1"

layout 1:2 (W/S=5mil/10mil) layout 1:2 (W/S=5mil/10mil)
4 4

RS880-HT/PCIE
A B C D E
A B C D E
1 1
+3VS
L2 AVDD=150mA
1 2 +AVDD1
+1.8VS
BLM18PG121SN1D_0603 1
L3
+AVDD2 C132
+1.8VS 0_0603_5% 2.2U_0603_6.3V4Z
<6,19> LDT_STOP# 1
R50
2 NB_LDTSTOP# 1
L4
2 +AVDDQ C133
1 2
LVDS
FBMA-L11-160808-221LMT_0603 2.2U_0603_6.3V4Z U4C
0_0402_5% 2
1 F12 AVDD1(NC) A22 LVDS_A0+ <17>
TXOUT_L0P(NC)
E12 AVDD2(NC) PART 3 OF 6 TXOUT_L0N(NC)
B22 LVDS_A0- <17>
C134 F14 AVDDDI(NC) A21 LVDS_A1+ <17>
2.2U_0603_6.3V4Z TXOUT_L1P(NC)
R51 G15 B21 LVDS_A1- <17>
2 AVSSDI(NC) TXOUT_L1N(NC)
H15 AVDDQ(NC) TXOUT_L2P(NC) B20 LVDS_A2+ <17>
1 2 NB_ALLOW_LDTSTOP H14 AVSSQ(NC) A20 LVDS_A2- <17>
<6,19> CPU_LDT_REQ# TXOUT_L2N(DBG_GPIO0)
A19
0_0402_5% TXOUT_L3P(NC)
E17 B19
C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2)
F17
CRT/TVOUT
Y(DFT_GPIO2)
F15 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) B18 LVDS_B0+ <17>
A18 LVDS_B0- <17>
D_RED TXOUT_U0N(NC)
<16> D_RED G18 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) A17 LVDS_B1+ <17>
G17 B17 LVDS_B1- <17>
D_GREEN REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2)
<16> D_GREEN E18 D20 LVDS_B2+ <17>
GREEN(DFT_GPIO1) TXOUT_U2P(NC)
F18 GREENb(NC) TXOUT_U2N(NC) D21 LVDS_B2- <17>
D_BLUE E19 D18
<16> D_BLUE BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5)
F19 D19
BLUEb(NC) TXOUT_U3N(NC)
2 +1.1VS L5 CR T_HSYNC A11 B16 2
<14,16> CRT_HSYNC DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) LVDS_ACLK+ <17>
1 2 CRT_VSYNC B11 A16 LVDS_ACLK- <17>
<14,16> CRT_VSYNC DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3)
FBMA-L11-160808-221LMT_0603 1 F8 D16 LVDS_BCLK+ <17>
+1.8VS <16,32> CRT_DDC_CLK DAC_SCL(PCE_RCALRN) TXCLK_UP(PCIE_RESET_GPIO4)
L6 C135 E8 D17 LVDS_BCLK- <17>
<16,32> CRT_DDC_DATA DAC_SDA(PCE_TCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
1 2
FBMA-L11-160808-221LMT_0603 1 2.2U_0603_6.3V4Z R52 1 2 715_0402_1% G14 L7
+1.8VS L8 C136 2 DAC_RSET(PWM_GPIO1) +VDDLTP18
VDDLTP18(NC) A13 1 2 +1.8VS
1 2 +NB_PLLVDD A12 B13 1 1 FBMA-L11-160808-221LMT_0603
FBMA-L11-160808-221LMT_0603 2.2U_0603_6.3V4Z +NB_HTPVDD PLLVDD(NC) VSSLTP18(NC)
1 D14 PLLVDD18(NC)
+1.8VS L9 C139 2 B12 A15 +VDDLT18 C137 C138
LVTM
PLLVSS(NC) VDDLT18_1(NC) 2.2U_0603_6.3V4Z 0.1U_0402_16V4Z
1 2 B15
PLL PWR
FBMA-L11-160808-221LMT_0603 2.2U_0603_6.3V4Z +VDDA18HTPLL VDDLT18_2(NC) 2 L10 2
1 H17 A14
2 VDDA18HTPLL VDDLT33_1(NC)
VDDLT33_2(NC) B14 1 2 +1.8VS
C140 +VDDA18PCIEPLL D7 1 1 FBMA-L11-160808-221LMT_0603
2.2U_0603_6.3V4Z VDDA18PCIEPLL1
E7 C14
2 R53 0_0402_5% VDDA18PCIEPLL2 VSSLT1(VSS) C141 C142
D15
NB_RESET# VSSLT2(VSS) 0.1U_0402_16V4Z 4.7U_0805_10V4Z
<19,25,27,29,31,34> PLT_RST# 1 2 D8 C16
NB_PWRGD SYSRESETb VSSLT3(VSS) 2 2
<21> NB_PWRGD A10 C18
NB_LDTSTOP# POWERGOOD VSSLT4(VSS)
C10
NB_ALLOW_LDTSTOP C12 LDTSTOPb VSSLT5(VSS)
C20
L 0.08A/10mil/1vias
+1.8VS 1 2 E20
PM
R54 300_0402_5% ALLOW_LDTSTOP VSSLT6(VSS)
C22
VSSLT7(VSS) install 10/25 HP
<15> CLK_NBHT C25
HT_REFCLKP
<15> CLK_NBHT# C24
HT_REFCLKN
E11
CLOCKs
<15> NB_OSC_14.318M REFCLK_P/OSCIN(OSCIN) ENAVDD
F11 E9 ENAVDD <17> R55
REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) NB_PWM 0_0402_5%
LVDS_BLON(PCE_RCALRP) F7 1 2 INV_PWM <17>
1 2 1 2 T2 G12 ENABLT
+1.8VS <15> NBGFX_CLK GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2) ENABLT <17>
R56 R57 T1
<15> NBGFX_CLK# GFX_REFCLKN
4.7K_0402_5% 2.2K_0402_5%
U1 ENAVDD R58 1 2 10K_0402_5%
GPP_REFCLKP ENABLT R59 1
U2 2 10K_0402_5%
3 GPP_REFCLKN 3
<15> CLK_SBLINK_BCLK V4 GPPSB_REFCLKP(SB_REFCLKP)

<15> CLK_SBLINK_BCLK# V3 HPD <18> HP 2/6
GPPSB_REFCLKN(SB_REFCLKN)
B9 R60 1 2 100K_0402_5%
<17> DDC2_CLK I2C_CLK HP request 12/02
<17> DDC2_DATA A9
B8
I2C_DATA MIS. TMDS_HPD(NC)
D9
D10 1 2
<18,32> HDMIDAT_UMA DDC_DATA0/AUX0N(NC) HPD(NC) DPC_HPD <32>
A8 R61 0_0402_5%
<18,32> HDMICLK_UMA DDC_CLK0/AUX0P(NC)
<32> DOCK_AUX+ B7 D12 SUS_STAT# <21>
DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5)
<32> DOCK_AUX- A7 DDC_DATA1/AUX1N(NC)
THERMALDIODE_P AE8 NB_THERMAL_DA NB_THERMAL_DA <4>
<43> DYN_PWR_EN 2 1 B10 AD8 NB_THERMAL_DC NB_THERMAL_DC <4>
R63 5.1K_0402_1% STRP_DATA THERMALDIODE_N
G11 D13 1 2
RSVD TESTMODE R64
1
C8 1.8K_0402_5%
<14> AUX_CAL AUX_CAL(NC)
R65 Strap pin
2K_0402_5% RS880MN_FCBGA528
2
4 4

RS880 VEDIO/CLK GEN
A B C D E
A B C D E
U4F
1 1
A25 VSSAHT1 VSSAPCIE1 A2
D23 VSSAHT2 PART 6/6 VSSAPCIE2 B1
E22 VSSAHT3 VSSAPCIE3 D3
G22 D5
VSSAHT4 VSSAPCIE4
L 0.6A/50mil/4vias G24
VSSAHT5 VSSAPCIE5
E4
10/09 HP G25 VSSAHT6 VSSAPCIE6 G1
2A H19
VSSAHT7 VSSAPCIE7
G2
+VDDHT J22 G4
+1.1VS VSSAHT8 VSSAPCIE8
0.1U_0402_16V4Z 0.1U_0402_16V4Z L17 H7
VSSAHT9 VSSAPCIE9
1 C144 1 1 C1461 1 L22
VSSAHT10 VSSAPCIE10
J4
C147 0.7A/60mil/4vias L12 L24 R7
C143 L 1 2 +1.1VS L25
VSSAHT11
VSSAHT12
VSSAPCIE11
VSSAPCIE12
L1
4.7U_0805_10V4Z
2 2
C145
2 2 2
0.1U_0402_16V4Z
U4E VDDA_12=2.5A FBMA-L11-201209-221LMA30T_0805 M20 VSSAHT13 VSSAPCIE13 L2
N22 L4
0.1U_0402_16V4Z +VDDA11PCIE VSSAHT14 VSSAPCIE14
J17 A6 P20 L7
VDDHT_1 VDDPCIE_1 C148 10U_0805_10V4Z VSSAHT15 VSSAPCIE15
K16
VDDHT_2 PART 5/6 VDDPCIE_2
B6 R19
VSSAHT16 VSSAPCIE16
M6
10/09 HP 0.45A/40mil/3vias L16 C6 R22 N4
L +VDDHTRX
M16
VDDHT_3
VDDHT_4
VDDPCIE_3
VDDPCIE_4
D6 C149 10U_0805_10V4Z R24
VSSAHT17
VSSAHT18
VSSAPCIE17
VSSAPCIE18
P6
2A P16 VDDHT_5 VDDPCIE_5 E6 R25 VSSAHT19 VSSAPCIE19 R1
0.1U_0402_16V4Z 0.1U_0402_16V4Z R16 F6 C150 1 2 1U_0402_6.3V4Z H20 R2
VDDHT_6 VDDPCIE_6 VSSAHT20 VSSAPCIE20
1 1 1 C156 1 1 T16
VDDHT_7 VDDPCIE_7
G7 C151 1 2 1U_0402_6.3V4Z U22
VSSAHT21 VSSAPCIE21
R4
C154 C157 H8 C152 1 2 1U_0402_6.3V4Z V19 V7
C153 VDDPCIE_8 C158 1U_0402_6.3V4Z VSSAHT22 VSSAPCIE22
H18 J9 1 2 W22 U4
GROUND
4.7U_0805_10V4Z C155 0.1U_0402_16V4Z VDDHTRX_1 VDDPCIE_9 C159 0.1U_0402_16V4Z VSSAHT23 VSSAPCIE23
G19 VDDHTRX_2 VDDPCIE_10 K9 2 1 W24 VSSAHT24 VSSAPCIE24 V8
2 2 2 2 2 F20 M9 C160 2 1 0.1U_0402_16V4Z W25 V6
0.1U_0402_16V4Z VDDHTRX_3 VDDPCIE_11 VSSAHT25 VSSAPCIE25
E21 VDDHTRX_4 VDDPCIE_12 L9 Y21 VSSAHT26 VSSAPCIE26 W1
D22 P9 AD25 W2
VDDHTRX_5 VDDPCIE_13 VSSAHT27 VSSAPCIE27
B23 R9 W4
VDDHTRX_6 VDDPCIE_14 VSSAPCIE28
L 0.5A/50mil/4vias A23 VDDHTRX_7 VDDPCIE_15 T9 L12 VSS11 VSSAPCIE29 W7
L14 V9 M14 W8
+VDDHTTX VDDPCIE_16 VSS12 VSSAPCIE30
+1.2V_HT 1 2 2A AE25
VDDHTTX_1 VDDPCIE_17
U9 N13
VSS13 VSSAPCIE31
Y6
FBMA-L11-201209-221LMA30T_0805 AD24 P12 AA4
2 VDDHTTX_2 VSS14 VSSAPCIE32 2
1 1 1 1 1 AC23 VDDHTTX_3 VDDC_1 K12 P15 VSS15 VSSAPCIE33 AB5
AB22 J14 R11 AB1
C161 C162 C163 C164 C165 VDDHTTX_4 VDDC_2 VSS16 VSSAPCIE34
AA21 U16 R14 AB7
VDDHTTX_5 VDDC_3 VSS17 VSSAPCIE35
Y20 VDDHTTX_6 VDDC_4 J11 T12 VSS18 VSSAPCIE36 AC3
2 2 2 2 2 W19 K15 U14 AC4
V18 M12
L 7A/280mil/16vias VDD_CORE=5A U11 AE1
POWER
U17 VDDHTTX_9 VDDC_7 L14 U15 VSS21 VSSAPCIE39 AE4
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z T17 L11 330U_D2E_2.5VM_R15 +NB_VDDC V12 AB2
0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDHTTX_10 VDDC_8 VSS22 VSSAPCIE40
R17 VDDHTTX_11 VDDC_9 M13 W11 VSS23
P17 M15 W15
VDDHTTX_12 VDDC_10 VSS24
L 0.25A/30mil/2vias M17 VDDHTTX_13 VDDC_11 N12 AC12 VSS25 VSS1 AE14
C167
C168
C169
C170
C171
C172
C173
C174
C175
C176
C177
L15 2A VDDC_12
N14 1 AA14
VSS26 VSS2
D11
1 2 +VDDA18PCIE J10 P11 1 1 1 1 1 1 1 1 1 1 1 C166 Y18 G8
+1.8VS VDDA18PCIE_1 VDDC_13 + VSS27 VSS3
FBMA-L11-201209-221LMA30T_0805 P10 P13 AB11 E14
VDDA18PCIE_2 VDDC_14 VSS28 VSS4
1 1 1 1 1 1 K10 P14 AB15 E15
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
10U_0805_10V4Z
M10 R12 AB17 J15
C178 C179 C180 C181 C182 C183 VDDA18PCIE_4 VDDC_16 2 2 2 2 2 2 2 2 2 2 2 2 VSS30 VSS6
L10 R15 AB19 J12
4.7U_0805_10V4Z VDDA18PCIE_5 VDDC_17 VSS31 VSS7
W9 T11 AE20 K14
2 2 2 2 2 2 VDDA18PCIE_6 VDDC_18 VSS32 VSS8
H9 T15 AB21 M11
T10 VDDA18PCIE_8 VDDC_20 U12 K11 VSS34 VSS10 L15
R10 T14
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDA18PCIE_9 VDDC_21 RS880MN_FCBGA528
Y9 J16
0.1U_0402_16V4Z 0.1U_0402_16V4Z VDDA18PCIE_10 VDDC_22
AA9
VDDA18PCIE_11
AB9 AE10
VDDA18PCIE_12 VDD_MEM1(NC) +1.8VS
AD9 AA11
VDDA18PCIE_13 VDD_MEM2(NC)
AE9 Y11
VDDA18PCIE_14 VDD_MEM3(NC)
U10 VDDA18PCIE_15 VDD_MEM4(NC) AD10
AB10 C184 2 1 4.7U_0805_10V4Z
VDD_MEM5(NC)
+1.8VS F9 AC10 +1.8V_VDD_MEM C185 2 1 0.1U_0402_16V4Z
VDD18_1 VDD_MEM6(NC) C186 0.1U_0402_16V4Z
G9 2 1
+1.8V_VDD_SP VDD18_2 C187 0.1U_0402_16V4Z
+1.8VS AE11
VDD18_MEM1(NC) VDD33_1(NC)
H11
L 0.15A/30mil/2vias 2 1
AD11 H12 C188 2 1 0.1U_0402_16V4Z
3 VDD18_MEM2(NC) VDD33_2(NC) 3
1 1 RS880MN_FCBGA528
C189 10/07 HP +3VS
1U_0402_6.3V4Z C190
1U_0402_6.3V4Z 1 2
2 2 0.1U_0402_16V4Z C191
1 2
0.1U_0402_16V4Z C192
4 4

RS880 PWR/GND
A B C D E
A B C D E
@ U5 U4D
MEM_BA0 L2 B9 MEM_DQ15 PAR 4 OF 6
MEM_BA1 BA0 DQ15 MEM_DQ11 MEM_A0 MEM_DQ0
L3 BA1 DQ14 B1 AB12 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) AA18
D9 MEM_DQ13 MEM_A1 AE16 AA20 MEM_DQ1
MEM_A12 DQ13 MEM_DQ12 MEM_A2 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) MEM_DQ2
R2 A12 DQ12 D1 V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
MEM_A11 P7 D3 MEM_DQ8 MEM_A3 AE15 Y19 MEM_DQ3
MEM_A10 A11 DQ11 MEM_DQ10 MEM_A4 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) MEM_DQ4
M2 A10/AP DQ10 D7 AA12 MEM_A4(NC) MEM_DQ4(NC) V17
1 MEM_A9 MEM_DQ9 MEM_A5 MEM_DQ5 1
P3 A9 DQ9 C2 AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17
MEM_A8 P8 C8 MEM_DQ14 MEM_A6 AB14 AA15 MEM_DQ6
P2 A7 DQ7 F9 AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
MEM_A6 N7 F1 MEM_DQ7 MEM_A8 AD13 AC20 MEM_DQ8
N3 H9 AD15 AD19
A5 DQ5 MEM_A9(NC) MEM_DQ9/DVO_D5(NC)
SBD_MEM/DVO_I/F
MEM_A4 N8 H1 MEM_DQ6 MEM_A10 AC16 AE22 MEM_DQ10
N2 H3 AE13 AC18
M7 A2 DQ2 H7 AC14 MEM_A12(NC) MEM_DQ12(NC) AB20
MEM_A1 M3 G2 MEM_DQ4 Y14 AD22 MEM_DQ13
MEM_A0 A1 DQ1 MEM_DQ2 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) MEM_DQ14
M8 G8 AC22
A0 DQ0 MEM_BA0 MEM_DQ14/DVO_D10(NC) MEM_DQ15
AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
1
MEM_BA1 AE17
@ R68 MEM_CLKN MEM_BA2 MEM_BA1(NC) MEM_DQS_P0
K8 CK VDDQ1 A9 +1.8V_MEM_VDDQ AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17
MEM_CLKP J8 C1 W18 MEM_DQS_N0 MEM_COMP_P and MEM_COMP_N trace
100_0402_1% CK VDDQ2 MEM_RAS# MEM_DQS0N/DVO_IDCKN(NC) MEM_DQS_P1
C3 W12 AD20
MEM_CKE K2
VDDQ3
C7 MEM_CAS# Y12
MEM_RASb(NC) MEM_DQS1P(NC)
AE21 MEM_DQS_N1 width >=10mils and 10mils spacing from
2
CKE VDDQ4 MEM_CASb(NC) MEM_DQS1N(NC)

VDDQ5 C9 MEM_WE# AD18 MEM_WEb(NC) other Signals in X,Y,Z directions
E9 MEM_CS# AB13 W17 MEM_DM0
VDDQ6 MEM_CKE MEM_CSb(NC) MEM_DM0(NC) MEM_DM1 +1.8VS
VDDQ7 G1 AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
MEM_CS# L8 G3 MEM_ODT V14 15mA L16
CS VDDQ8 MEM_ODT(NC) L17 +1.8V_IOPLLVDD
G7 AE23 1 2
MEM_WE# VDDQ9 MEM_CLKP IOPLLVDD18(NC) +NB_IOPLLVDD FBMA-L11-160808-221LMT_0603
K3 G9 V15 AE24 1 2 +1.1VS
WE VDDQ10 MEM_CLKN MEM_CKP(NC) IOPLLVDD(NC) FBMA-L11-160808-221LMT_0603
W14 MEM_CKN(NC) 1 1
MEM_RAS# K7 A1 AD23 1
RAS VDD1 MEM_COMP_P IOPLLVSS(NC) C193 C194
E1 2 1 AE12
MEM_CAS# VDD2 R69 40.2_0402_1% MEM_COMPP(NC) +MEM_VREF1 2.2U_0603_6.3V4Z C195 2.2U_0603_6.3V4Z
L7 CAS VDD3 J9 AD12 MEM_COMPN(NC) MEM_VREF(NC) AE18
M9 2 1 MEM_COMP_N 2 0.1U_0402_16V4Z 2
VDD4 +1.8V_MEM_VDDQ 2
MEM_DM0 F3 R1 R70 40.2_0402_1% RS880MN_FCBGA528
MEM_DM1 LDM VDD5 L44
B3 UDM
J1 +VDDL 1 2
VDDL +1.8V_MEM_VDDQ
J7 FBMA-L11-160808-221LMT_0603 AMD recommends 200 Ohm @ 100Mhz
MEM_ODT VSSDL
K9 1
2 ODT 10/22 HP 2
C196
MEM_DQS_P0 F7 1U_0603_10V6K
MEM_DQS_N0 LDQS 2
E8 LDQS VSSQ1 A7 Layout Note: 50 mil for VSSDL
VSSQ2 B2
B8
VSSQ3
VSSQ4 D2
MEM_DQS_P1 B7 D8
MEM_DQS_N1 UDQS VSSQ5
A8 UDQS VSSQ6 E7
F2
VSSQ7
VSSQ8 F8
+MEM_VREF J2 H2
VREF VSSQ9
VSSQ10 H8
A2
NC#A2
E2 A3
MEM_BA2 NC#E2 VSS1
L1 E3
NC#L1 VSS2
R3 J3
NC#R3 VSS3
R7 N1
NC#R7 VSS4
R8 P9
NC#R8 VSS5
K4N51163QG-HC25 FBGA84 ~D
3 3
Side Port disable,VREF need
connect to +1.8VS for DDR2
+1.8V_MEM_VDDQ +1.8V_MEM_VDDQ
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
1K_0402_1%
1K_0402_1%
1 1
+1.8V_MEM_VDDQ
+1.8VS
C197
C198
10/07 HP
R71
R72
2 2
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
22U_0805_6.3V6M
+MEM_VREF +MEM_VREF1
2 2 1 1 1 220 ohm @ 100MHz,2A
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C199
C200
C201
C202
C203
1 1
2
1 1 2 2 2
1K_0402_1%
1K_0402_1%
C204
C205
2 2
R73
R74
1
4 4

RS880 Side-Port DDR2 SDRAM
A B C D E
A B C D E
1 1
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
RS780 DFT_GPIO5 mux at CRT_VSYNC pull low to 3K
<11,16> CRT_VSYNC 2 1 +3VS Enables the Test Debug Bus using GPIO.
R75 1K_0402_5% 1 : Disable (RS780) Enable (RX780)
2 1 0 : Enable (RS780) Disable (RX780)
R76 @ 1K_0402_5%
PIN: RX780:NB_TV_C; RS740: RS740_DFT_GPIO5; RS780: VSYNC#
2 2
<11> AUX_CAL 1 2
R77 150_0402_1%
3 3
DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb
RX780: Enables the Test Debug Bus using PCIE bus

1 : Disable ( Can still be enabled using nbcfg register access )
0 : Enable
RS780 use HSYNC to enable SIDE PORT (internal pull high)
RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)
1. Disable (RS740/RS780)
<11,16> CRT_HSYNC 2 1 0 : Enable (RS740/RS780)
R78 3K_0402_5%
2 1 +3VS
@ R79 3K_0402_5%
4 4

RS880 STRAPS
A B C D E
A B C D E
+1.2V_HT +VDDCLK_IO +3VS_CLK

L43
L45 +3VS 1 2
FBMA-L11-201209-221LMA30T_0805 1 1 1 1 1 1 1 1
1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z C207 C208 C209 C210 C211 C212 C213
FBMA-L11-201209-601LMT_0805~D 1 1 1 1 1 1 10/6 HP C206
22U_0805_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0402_6.3V4Z
10/22 HP C214 C215 C216 C217 C218 C219 2 2 2 2 2 2 2 2
22U_0805_6.3V6M
2 2 2 2 2 2
+3VS_CLK
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 1 1 1
1 C220 C221 C222 C223 1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

2 2 2 2
CLK_XTAL_OUT
4.7P_0402_50V8C C224
CLK_XTAL_IN 1 2
CLK_48M_USB_R R82 1 2 22_0402_5%

CLK_48M_USB <21>
CLK_SB_14M <19>
Y1
10K_0402_5% 10K_0402_5% R493
2 1 R492 2 1 1 2
14.31818MHZ_20P_6X1430004201 2 1 12P_0402_50V8J @ C668
+3VS_CLK
1 1 @ C667 1 2
C225 C226 12P_0402_50V8J
2
R84 33_0402_5% R85 1 2 33_0402_5%
22P_0402_50V8J 22P_0402_50V8J R523 1 2 33_0402_5% CLK_14M_KBC <33>
NB_OSC_14.318M_R
2 2 CLK_14M_SIO <34> add CLK_14M_SIO for super IO. Compal 12/4
CLK_NBHT <11>
+3VS_CLK
+3VS_CLK
CLK_NBHT# <11> NB
1 2 +3VS_CLK
SEL_SATA 1
CLK_XTAL_OUT
Routing the trace at least 10mil R86 4.7K_0402_5%
CLK_CPU_BCLK <6>
CLK_XTAL_IN
2
27M_SEL
2 2
CLK_CPU_BCLK_R 1 2 R88
R87 0_0402_5% @ 261_0402_1% CPU
CLK_CPU_BCLK#_R 1 2
R89 0_0402_5%
1
CLK_CPU_BCLK# <6>
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
U6
VSS_48
48MHz_0
48MHz_1
VDD_48
REF_0/SEL_HTT66
REF_2/SEL_27
HTT_0/66M_0
HTT_0#/66M_1
PD#
CPU_K8_0
CPU_K8_0#
XTAL_OUT
VSS_REF
VDD_REF
VDD_HTT
VSS_HTT
REF_1/SEL_SATA
GND
XTAL_IN
1 54 +3VS_CLK
<4,6,8,9,21,30> SMB_CK_CLK0 SCL VDD_CPU
2 53 +VDDCLK_IO
<4,6,8,9,21,30> SMB_CK_DAT0 SDA VDD_CPU_I/O
+3VS_CLK 3 52
VDD_DOT VSS_CPU CLK_PCIE_LAN_REQ#_R
4 51
SRC_7#/27M CLKREQ_1# CLK_PCIE_WLAN_REQ#
5 50 CLK_PCIE_WLAN_REQ# <27>
SRC_7/27M_SS CLKREQ_2#
6 49 +3VS_CLK
VSS_DOT VDD_A
7 SRC_5# VSS_A 48
8 47
SRC_5 VSS_SATA
9 46
SRC_4# SRC_6/SATA
10 45
SRC_4 SRC_6#/SATA#
11 44 +3VS_CLK For ICS need to pull high.
VSS_SRC VDD_SATA CPPE_NC#_R
+VDDCLK_IO 12 43 For SLG is NC
VDD_SRC_IO CLKREQ_3#
<31> CLK_PCIE_EXP# 13 42 10/29 HP
SRC_3# CLKREQ_4#
EXP <31> CLK_PCIE_EXP 14 SRC_3 SB_SRC_SLOW# 41 1 2 +3VS_CLK
15 40 R90 10K_0402_5%
<27> CLK_PCIE_MCARD# SRC_2# SB_SRC_0 CLK_SBSRC_BCLK <19>
WLAN <27> CLK_PCIE_MCARD 16
SRC_2 SB_SRC_0#
39 CLK_SBSRC_BCLK# <19> SB SRC
+3VS_CLK 17 38 +3VS_CLK
VDD_SRC VDD_SB_SRC
+VDDCLK_IO 18 37 +VDDCLK_IO
VDD_SRC_IO VDD_SB_SRC_IO
VSS_SB_SRC
VDD_ATIG_IO
3 3
ATIGCLK_2#
ATIGCLK_1#
ATIGCLK_0#
CLKREQ_0#
SB_SRC_1#
ATIGCLK_2
ATIGCLK_1
ATIGCLK_0
SB_SRC_1
VDD_ATIG
VSS_ATIG
VSS_SRC
+3VS
SRC_1#
SRC_0#
SRC_1
SRC_0
LP_EN# <21,25>
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
2
ICS9LPRS476EKLFT_QFN72_10x10
NB_OSC_14.318M_R1 2 NB_OSC_14.318M R92
R91 158_0402_1% NB_OSC_14.318M <11> 8.2K_0402_5%
5
1 2
R93 90.9_0402_1%
1
CLK_PCIE_LAN_REQ#_R 3 4
+3VS_CLK
+VDDCLK_IO
DMN66D0LDW-7_SOT363-6 Q6B
+3VS_CLK CLK_SBLINK_BCLK <11>
CLK_SBLINK_BCLK# <11> SB LINK
NBGFX_CLK <11>
NBGFX_CLK# <11> NB GFX
2 1 CRD_REQ# +3VS
R94 10K_0402_5%
CLK_PCIE_WLAN_REQ# R96
2 1 8.2K_0402_5%
R95 10K_0402_5% change CLK_PCIE_CARD/# from Pin25,26 to Pin22,23 HP 12/8 2 1
CRD_REQ#
CRD_REQ# <21,31>
CLK_PCIE_CARD <31>
2
CLK_PCIE_CARD# <31> Media Card
CLK_PCIE_LAN <25>
CPPE_NC#_R
CLK_PCIE_LAN# <25> NIC <20,21,31> CPPE_NC# 6 1
4 DMN66D0LDW-7_SOT363-6 4
NB CLOCK INPUT TABLE Q6A

NB CLOCKS RX780 RS780
HT_REFCLKP
100M DIFF 100M DIFF
HT_REFCLKN 100M DIFF 100M DIFF
REFCLK_P
14M SE (1.8V) 14M SE (1.1V)
REFCLK_N NC v r ef
Clock generator
GFX_REFCLK 100M DIFF 100M DIFF(IN/OUT)* DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4961P 1.0
A B C D E
A B C D E
+C RTVDD
D_RE D D5
D_G REEN 4 2 RED
D _BLUE VIN IO1
R97
R98
R99
GR EEN 3 1
IO2 GND
change to LCL filtter 10/23 HP
1
@ CM1293A-02SR_SOT143-4
1 L Place cloce to NB 1
2
L 19 L 20 +C RTVDD
150_0402_1%
150_0402_1%
150_0402_1%
CS0805-68NJ-S_0805 CS0805-68NJ-S_0805 D6
<11> D_RE D D_RE D 1 2 1 2 4 2 B LUE
R E D_R <32> VIN IO1
L 21 L 22
CS0805-68NJ-S_0805 CS0805-68NJ-S_0805 3 1
D_G REEN 01/16 ESD IO2 GND
<11> D_ GREEN 1 2 1 2 GRE EN_R <32>
L 23 L 24 @ CM1293A-02SR_SOT143-4
CS0805-68NJ-S_0805 CS0805-68NJ-S_0805
<11> D_ BLUE D _BLUE 1 2 1 2 B LUE_R <32> +5VS +RC RT_VCC +C RTVDD
27P_0402_50V8J
27P_0402_50V8J
27P_0402_50V8J
F1 D4
C2 31
C2 32
C2 33
1 1 1 1.1A_6VDC_FUSE CH4 91D_SC59
1 2 2 1 +C RTVDD
10/29 HP W=40mils D7
4 2 D _ HS Y NC
2 2 2 VIN IO1
1
C2 27 D_V S Y NC 3 1
IO2 GND
0.1U_0402_16V4Z @ CM1293A-02SR_SOT143-4
2
J C RT1
6
11
R4 72 1 2 R 473 1 2 0_0805_5% RED 1
<32> VGA_RED
0_0805_5% 7
D_D DCDATA 12
R4 74 1 2 R 475 1 2 0_0805_5% GR EEN 2
<32> VGA_GRN
0_0805_5% 8
13
2 R4 76 1 2 R 477 1 2 0_0805_5% B LUE 3 2
<32> VGA_BLU
0_0805_5% 9
R4 63
R4 62
R4 61
@ C 686
@ C 687
@ C 688
14 16
4 17
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10
1 1 1 D_DDCC LK 15 C ONN@
140_0402_1%
140_0402_1%
140_0402_1%
5
SUYIN_070912HR015S239ZR_15P
2
2 2 2
+5VS +5VS 10/23 HP
because RS880 confirmed +5V torelence on I2C DDC,
C 234 C2 35 level-shifter is not required. (DB2 11/28)
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 2 1 2
+5VS
Place cloce to JCRT1
5
U7
D _ HS Y NC <32>
R1 03
R1 04
M74VHC1GT125DF2G SC70
P
OE#
1
4.7K_0402_5%
4.7K_0402_5%
2 4 H S Y NC R1 00 1 2 0_0402_5% D _ HS Y NC
<11,14> CRT_HS Y NC A Y
G
U8
D_V S Y NC <32>
P
OE#
3
2 4 V S Y NC R1 05 1 2 0_0402_5% D_V S Y NC
<11,14> CRT_V SYNC
2
A Y
G
M74VHC1GT125DF2G SC70 1 1 <11,32> D_D DCDATA C RT_DDC_DATA <11,32>

3
C2 36 C 237
5P_0402_50V8C 5P_0402_50V8C
3 2 2 3
L Place cloce to NB
<11,32> D_DDCC LK CRT_ DDC_CLK <11,32>
layout note: D_HSYNC Place cloce to NB

& D_VSYNC should be
L
routed to docking
connector then to VGA
connector
4 4

CRT Connector
Size D ocument Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS L A-4961P 1.0
Dat e: Thursday, August 27, 2009 Sheet 16 of 54
A B C D E
5 4 3 2 1
LCD/PANEL BD. CONN.
+5VS
D 10
4 2 USB20_P 4_R solved panel flashing issue HP 2/6
D VIN IO1 D
R5 40
U SB20_N4_R 3 1
JLVDS1 IO2 GND D ISP_OFF# ENABLT
1 2 ENABLT <11>
1
CM1293A-02SR_SOT143-4
I NVPWR_B+ 1 2 +3VS R 108
1 2 2K_0402_5% 100K_0402_1%
3 3 4 4
+LCDV DD 5 5 6 6
7 8 ESD 2/18
2
7 8 DA C _BRIG
9 9 10 10 D 42
+5V_WEBCAM 11 12 CAMERA_OFF#
D ISP_OFF# 11 12 INV_PWM LI D_SW#
13 13 14 14 INV_PWM <11> 2 1 LI D_SW# <21,28,33>
15 15 16 16
USB20_P 4_R 17 18 D DC2_DATA
17 18 D DC2_DATA <11>
U SB20_N4_R 19 20 DDC2_ CLK CH751H-40PT_SOD323-2
19 20 DDC2 _CLK <11>
21 21 22 22
<11> LVDS_ACLK- 23 23 24 24 LVDS_B2+ <11>
<11> LVDS_ACLK+ 25 25 26 26 LVDS_B2- <11>
27 28 LVDS_B1+ <11> INV_PWM
27 28
<11> LVDS_A0- 29 29 30 30 LVDS_B1- <11>
<11> LVDS_A0+ 31 31 32 32 LVDS_B0+ <11> 1
<11> LVDS_A1- 33 34 LVDS_B0- <11> 680P_0402_50V7K
33 34 C6 53
<11> LVDS_A1+ 35 35 36 36
<11> LVDS_A2- 37 37 38 38 LVDS_BCLK+ <11> 2
<11> LVDS_A2+ 39 39 40 40 LVDS_BCLK- <11>
41 41 42 42
+5VS 4/11 HP +5V_WEBCAM
ACES_87216-4016_40P
C ONN@
+3VS
1U_0603_10V4Z
4.7K_0402_5%
47P_0402_50V8J
0.01U_0402_16V7K
0.1U_0402_16V4Z
4.7U_0805_10V4Z
1
C2 42
R1 12
C Compal ME request 12/03 4/11 HP HP, 4/17 C
1
C2 43
C2 44
C2 45
@ R 437 0_0402_5% 1 1 1
1
1 2 +3VS
C 672
WCM2012F2S-900T04_0805 R5 07 2
2
1.8K_0402_1% 2 2 2
4 4 3 3
USB20_P 4_R
<21> USB20_P4
1
U SB20_N4_R CAMERA_OFF#
<21> USB20_N4
2
1 2 R4 47
1 2 DA C _BRIG 100K_0402_1%
L 49
3
2
1 2 R5 06
@ R 438 0_0402_5% 1K_0402_1%
DMN66D0LDW-7_SOT363-6
<20> CAMERA_OFF 5
compal EMI , 6/13 Q7B
4
+3VS
4.7K_0402_5% 1 2 R 452 DDC2_ CLK

For CCFL panel
4.7K_0402_5% 1 2 R4 53 D DC2_DATA
LCD POWER CIRCUIT

+LCDV DD +LCD VDD +3VS
+LCDV DD I NVPWR_B+ B+ +3VS
HP, 4/8
1
1 2 Q26
B R 439 0_0805_5% R1 16 1 3 AP2301GN 1P_SOT23 B
S
+5VS
680P_0402_50V7K
680P_0402_50V7K
100_0402_1%
@ 47P_0402_50V8J
C 656
@ 47P_0402_50V8J
C 658
1 1
1
1
C6 55
C6 57
C 654
G
6 2
2
680P_0402_50V7K R1 17 1 2 1M_0402_5%
2
2 2 Q7A
2 R 118 1 2 47K_0402_5% C2 49 1 2 0.1U_0402_16V4Z
1 1 1
1
C2 50 C2 51 C2 52
0.1U_0402_16V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z
1
2 2 2
OUT
<11> E N AVDD 2 IN Q28
GND
DTC124EKAT146_SC59-3
1
R 119
3
100K_0402_1%
2
A A

LCD CONN & Q-Switch & GPIO Ext.
5 4 3 2 1
A B C D E
10/17 HP
+3VS
B+ +3VS
C502
2
2 1 R409
100K_0402_5%
0.1U_0402_16V4Z
2
1 1
1
Q98A Q20A Q20B R411
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 100K_0402_5%
1 6 6 1 4 3 DP AUX-
<11,32> HDMIDAT_UMA
1
2
2
5
R412
100K_0402_5%
1
6
Q98B DMN66D0LDW-7_SOT363-6
5
DMN66D0LDW-7_SOT363-6 2
Q22A
DP AUX+ Q22B
<11,32> HDMICLK_UMA 4 3 6 1 4 3
3
2
Q21A Q21B
5
C503
R410 5 NB_CAD
100K_0402_5%
2 1
4
1
0.1U_0402_16V4Z
HP 12/02 10/25 HP
1 2 B+
R535
2 200K_0402_5% 2
+3VS
6
Q9A
2 +3VS
Display port Connector
SDM10U45-7_SOD523-2
1
0_1206_5%
2
D OCK_ID
@ D46
R484
add level sfit for displayport. HP 12/15
1
NANOSMDC050F 0.5A 13.2V POLY-FUSE
+DPA_3V
HP, 611
HP 12/02
+DPA_VCC
Q113A
0.01U_0402_16V7K
1 6 DPB_HPD
DPB_HPD <32>
0_1206_5%
10U_0805_10V4Z
2
2
1 1
@
B+
2
2
R485
C693
C694
R568 F2
470K_0402_5%
1
3 R125 1 2 2 2 3
HPD <11>
1
100K_0402_5%
compal 2/19 200K_0402_5%
1
Q113B
2
HP 2/6 R486
1
@ R569 DMN66D0LDW-7_SOT363-6
2
C719 470K_0402_5%
1U_0603_10V6K JDP1
2
5 D OCK_ID 20
1
Q9B DP_PWR
19
RTN
4
DMN66D0LDW-7_SOT363-6 HDMI_HPD 18
4
DP AUX- HP_DET
5 DOCK_ID <20,32> 17 AUX_CH-
16
DP AUX+ GND
15 AUX_CH+
14
NB_CAD GND
13
3
CA_DET
5.1M_0402_5%
<10> DPA_TXN3
0.1U_0402_16V4Z 2 1 C695R_DPA_TXN3 12
LAN3-
1
1M_0402_5%
HDMI_HPD 11 21
LAN3_shield GND
R488
<10> DPA_TXP3
0.1U_0402_16V4Z 2 1 C696 R_DPA_TXP3 10 22
LAN3+ GND
R487
<10> DPA_TXN2
0.1U_0402_16V4Z 2 1 C697R_DPA_TXN2 9 23
LAN2- GND
8 24
LAN2_shield GND
<10> DPA_TXP2
0.1U_0402_16V4Z 2 1 C698 R_DPA_TXP2 7
2
LAN2+
<10> DPA_TXN1
0.1U_0402_16V4Z 2 1 C699R_DPA_TXN1 6 LAN1-
5
LAN1_shield
<10> DPA_TXP1
0.1U_0402_16V4Z 2 1 C700 R_DPA_TXP1 4 LAN1+
<10> DPA_TXN0
0.1U_0402_16V4Z 2 1 C701R_DPA_TXN0 3
LAN0-
2
LAN0_shield
<10> DPA_TXP0
0.1U_0402_16V4Z 2 1 C702 R_DPA_TXP0 1 LAN0+
MOLEX_105020-0001_20P
4 4

Display port
A B C D E
A B C D E
+3VALW
C263
2 1 Check AMD need pull low or not
5
@ 0.1U_0402_16V4Z U9
2 1 2 NB_RST#_R U10A
P
B
Y 4 PLT_RST# PLT_RST# <11,25,27,29,31,34>
R142 @ 8.2K_0402_5%
SB710
NB_RST#_R 1 NB_RST#_R N2 P4 CLK_PCI_TPM_R R143 1 2 22_0402_5% CLK_PCI_TPM
A A_RST# PCICLK0 CLK_PCI_TPM <29>
G
@ NC7SZ08P5X_NL_SC70-5 Part 1 of 5 P3 CLK_PCI_SIO_R R144 1 2 22_0402_5% CLK_PCI_SIO
PCICLK1 CLK_PCI_SIO <34>
C264 0.1U_0402_16V7K SB_RX0P_C PCI_CLK2_R PCI_CLK2
PC I CLKS
1 2 V23 P1 R145 1 2 22_0402_5%
<10> SB_RX0P PCI_CLK2 <22>
3
C265 0.1U_0402_16V7K SB_RX0N_C PCIE_TX0P PCICLK2 CLK_PCI_KBC_R R146 22_0402_5% CLK_PCI_KBC
<10> SB_RX0N 1 2 V22 PCIE_TX0N PCICLK3 P2 1 2 CLK_PCI_KBC <22,33>
C266 1 2 0.1U_0402_16V7K SB_RX1P_C V24 T4 CLK_PCI_DB_R R147 1 2 22_0402_5% CLK_PCI_DB
<10> SB_RX1P SB_RX1N_C PCIE_TX1P PCICLK4 PCI_CLK5_R PCI_CLK5 CLK_PCI_DB <22,29>
C267 1 2 0.1U_0402_16V7K V25 T3 R148 1 2 22_0402_5%
<10> SB_RX1N SB_RX2P_C PCIE_TX1N PCICLK5/GPIO41 PCI_CLK5 <22>
2 1 C268 1 2 0.1U_0402_16V7K U25
<10> SB_RX2P PCIE_TX2P
R149 33_0402_5% C269 1 2 0.1U_0402_16V7K SB_RX2N_C U24
1 <10> SB_RX2N SB_RX3P_C PCIE_TX2N CLK_PCI_TPM 1
C270 1 2 0.1U_0402_16V7K T23 C2711 2 22P_0402_50V8J
<10> SB_RX3P SB_RX3N_C PCIE_TX3P CLK_PCI_SIO
C272 1 2 0.1U_0402_16V7K T22 N1 PCI_RST# <27,29> C2731 2 22P_0402_50V8J
<10> SB_RX3N PCIE_TX3N PCIRST# PCI_CLK2 C2741 2 22P_0402_50V8J
PCI EXPRESS INTERFACE

<10> SB_TX0P U22 CLK_PCI_KBC C2751 2 22P_0402_50V8J
PCIE_RX0P CLK_PCI_DB C2761 22P_0402_50V8J
<10> SB_TX0N U21 U2 2
PCIE_RX0N AD0 PCI_CLK5 C2771 22P_0402_50V8J
<10> SB_TX1P U19 PCIE_RX1P AD1 P7 2
<10> SB_TX1N V19 V4 CLK_PCI_EC C2781 2 12P_0402_50V8J
PCIE_RX1N AD2
<10> SB_TX2P R20 PCIE_RX2P AD3 T1
<10> SB_TX2N R21 PCIE_RX2N AD4 V3
<10> SB_TX3P R18 U1
PCIE_RX3P AD5
<10> SB_TX3N R17 PCIE_RX3N AD6 V1
V2
R150 AD7
2 1 562_0402_1% T25 PCIE_CALRP AD8 T2
+PCIE_VDDR R151 2 1 2.05K_0402_1% T24 W1
PCIE_CALRN AD9
T9
L29 1 +SB_PCIEVDD AD10
+1.2V_HT 2 P24 R6
FBMA-L11-201209-221LMA30T_0805 1 PCIE_PVDD AD11
1 AD12 R7
P25 R5
C279 C280 PCIE_PVSS AD13
AD14 U8
10U_0805_10V4Z 1U_0402_6.3V4Z U5
2 2 AD15
Y7
AD16
W8
AD17
AD18 V9
Close to SB AD19 Y8
AA8
AD20
AD21 Y4
Y3
AD22 PCI_AD23
Y2 PCI_AD23 <22>
AD23 PCI_AD24
AD24 AA2 PCI_AD24 <22>
AB4 PCI_AD25
AD25 PCI_AD25 <22>
N25 AA1 PCI_AD26
<15> CLK_SBSRC_BCLK PCIE_RCLKP/NB_LNK_CLKP AD26 PCI_AD26 <22>
N24 AB3 PCI_AD27
2 <15> CLK_SBSRC_BCLK# PCIE_RCLKN/NB_LNK_CLKN AD27 PCI_AD27 <22> 2
AB2 PCI_AD28
AD28 PCI_AD28 <22>
K23 AC1
NB_DISP_CLKP AD29
K22 AC2
NB_DISP_CLKN AD30
AD31 AD1
M24 W2
PCI INTERFACE
NB_HT_CLKP CBE0#
M25 U7
NB_HT_CLKN CBE1#
CBE2# AA7
P17 Y1
CPU_HT_CLKP CBE3#
M18 CPU_HT_CLKN FRAME# AA6
W5
DEVSEL#
M23 SLT_GFX_CLKP IRDY# AA5
M22 Y5
SLT_GFX_CLKN TRDY#
PAR U6
J19 W6
GPP_CLK0P STOP#
J18 W4
GPP_CLK0N PERR#
V7 PCI_SERR# <29,33>
SERR#
L20 AC3
GPP_CLK1P REQ0#
L19 AD4
@ R152 20M_0402_5% GPP_CLK1N REQ1# R495 33_0402_5%
AB7
REQ2# LPCCLK1
1 2 M19 GPP_CLK2P REQ3#/GPIO70 AE6 1 2 CLK_PCI_DEBUG <27>
M20 AB6
GPP_CLK2N REQ4#/GPIO71
C281 AD2
GNT0#
CLO CK GENERATOR
N22 AE4
SB_32KHI GPP_CLK3P GNT1#
1 2 P22 AD5
GPP_CLK3N GNT2#
GNT3#/GPIO72
AC6 for 80 port debug card 10/31
18P_0402_50V8J Y2 2 1 L18 AE5
<15> CLK_SB_14M 25M_48M_66M_OSC GNT4#/GPIO73
1
4 3 R451 0_0402_5% AD6 R1531 33_0402_5%

2 PM_CLKRUN# <29,33,34>
R154 OSC NC CLKRUN#
V5
LOCK#
1 2 2 1 J21
20M_0402_5% OSC NC R155 1K_0402_5% 14M_X1 +3VS
AD3
32.768KHZ_12.5PF_Q13MC14610050_10PPM INTE#/GPIO33
C282 AC4
2
INTF#/GPIO34
AE2
3 SB_32KHO INTG#/GPIO35 3
1 2 J20 14M_X2 INTH#/GPIO36 AE3 PCI_PIRQH# R156 2 1 0_0402_5% ACCEL_INT# <30>
LPC_LAD0 1 2
18P_0402_50V8J R158 33_0402_5% 10K_0402_5% R157 @
LPCCLK0 G22 CLK_PCI_EC_R 1 2 CLK_PCI_EC CLK_PCI_EC <22>
LPC_LAD1 1 2
Close to SB E22 LPCCLK1 LPCCLK1 <22> 10K_0402_5% R159 @
SB_32KHI LPCCLK1 LPC_LAD2
A3
X1 LAD0
H24 LPC_LAD0 <27,29,33,34> STRAP PIN 1
10K_0402_5%
2
R160 @
LAD1
H23 LPC_LAD1 <27,29,33,34> EC & Debug LPC_LAD3
J25 LPC_LAD2 <27,29,33,34> 1 2
LAD2 10K_0402_5% R161 @
J24 LPC_LAD3 <27,29,33,34>
RTC XTAL
LAD3
L PC
SB_32KHO B3 H25 LPC_LFRAME# <27,29,33,34> LPC_LDRQ#0 1 2
X2 LFRAME# 10K_0402_5% R163 @
LDRQ0# H22 LPC_LDRQ#0 <34>
AB8 BMREQ# 1 2
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65 AD7 BMREQ# 10K_0402_5% R164
2 1 PROCHOT# V15
+3VS SERIRQ SIRQ <29,33,34>
R165 10K_0402_5%
CPU_LDT_REQ# F23 LPCCLK1 C6761 2 12P_0402_50V8J
<6,11> CPU_LDT_REQ# ALLOW_LDTSTP
R167 PROCHOT# F24 C3 RTC_CLK <22> STRAP PIN @
H_PWRGD_SB H_PWRGD_SB PROCHOT# RTCCLK
<6> H_PWRGD_CPU 1 2 F22 C2 R166 1 2
LDT_PG INTRUDER_ALERT# 1M_0402_5%
G25 B2
C PU
<6,11> LDT_STOP# LDT_STP# VBAT +RTCVCC

0_0402_5% G24 for battery life cycle issue ,HP 2/11
<6> LDT_RST# LDT_RST#
2 CONN@
JBATT1
RTC
C679 +RTCVCC +VREG3_51125 BATT1.1 E-T_3801-E02N-01R_2P
1
2
218S7EALA11FG_BGA528_SB700 0.1U_0402_16V4Z
D43
2
1 R456
W=20mils 3 1 2
W=20mils W=20mils
1 C681 DAN202U_SC70 1K_0402_5%
4 1U_0603_10V4Z 4
2 Place near IBEX-M

SB710-PCIE/PCI/ACPI/LPC/RTC
A B C D E
A B C D E
10P_0402_50V8J 2 1 C283 SATA_X1
1
Y3
R169
25MHz_20pF_6X25000017 10M_0402_5%
2
10P_0402_50V8J 2 1 C284 SATA_X2
1 1
U10B
C285 1 2 0.01U_0402_25V7K SATA_STX_DRX_P0 AD9

SB710 AA24
<24> SATA_STX_C_DRX_P0 SATA_TX0P IDE_IORDY
<24> SATA_STX_C_DRX_N0 C286 1 2 0.01U_0402_25V7K SATA_STX_DRX_N0 AE9 Part 2 of 5 AA25
SATA_TX0N IDE_IRQ
Y22
HDD <24> SATA_SRX_C_DTX_N0
SATA_SRX_C_DTX_N0 AB10
IDE_A0
AB23
SATA_SRX_C_DTX_P0 SATA_RX0N IDE_A1
<24> SATA_SRX_C_DTX_P0 AC10 SATA_RX0P IDE_A2 Y23
AB24
C287 SATA_STX_DRX_P1 IDE_DACK#
<24> SATA_STX_C_DRX_P1 1 2 0.01U_0402_25V7K AE10 SATA_TX1P IDE_DRQ AD25
C288 1 2 0.01U_0402_25V7K SATA_STX_DRX_N1 AD10 AC25
<24> SATA_STX_C_DRX_N1 SATA_TX1N IDE_IOR#
ODD <24> SATA_SRX_C_DTX_N1
SATA_SRX_C_DTX_N1 AD11
IDE_IOW# AC24
Y25
SATA_SRX_C_DTX_P1 SATA_RX1N IDE_CS1#
<24> SATA_SRX_C_DTX_P1 AE11 Y24
SATA_RX1P IDE_CS3#
SATA_STX_DRX_P2 HP 5/29 AB12 AD24
<32> SATA_STX_DRX_P2 SATA_TX2P IDE_D0/GPIO15
SATA_STX_DRX_N2 AC12 AD23
<32> SATA_STX_DRX_N2 SATA_TX2N IDE_D1/GPIO16 remove UWB , 10/21 HP
ATA 66/100/133
Dock <32> SATA_SRX_DTX_N2 SATA_SRX_DTX_N2 AE12
IDE_D2/GPIO17 AE22
AC22
SATA_SRX_DTX_P2 SATA_RX2N IDE_D3/GPIO18
<32> SATA_SRX_DTX_P2 AD12 AD21
SATA_RX2P IDE_D4/GPIO19
AE20
SATA_STX_DRX_P3 HP 5/29 IDE_D5/GPIO20
<32> SATA_STX_DRX_P3 AD13 SATA_TX3P IDE_D6/GPIO21 AB20
SATA_STX_DRX_N3 AE13 AD19
<32> SATA_STX_DRX_N3 SATA_TX3N IDE_D7/GPIO22
Dock
SERIAL ATA
AE19
SATA_SRX_DTX_N3 IDE_D8/GPIO23
<32> SATA_SRX_DTX_N3 AB14 SATA_RX3N IDE_D9/GPIO24 AC20
SATA_SRX_DTX_P3 AC14 AD20
<32> SATA_SRX_DTX_P3 SATA_RX3P IDE_D10/GPIO25
AE21
IDE_D11/GPIO26
AE14 SATA_TX4P IDE_D12/GPIO27 AB22
AD14 SATA_TX4N IDE_D13/GPIO28 AD22
AE23
IDE_D14/GPIO29
AD15 AC23
2 SATA_RX4N IDE_D15/GPIO30 2
AE15 SATA_RX4P
AB16
SATA_TX5P
AC16 SATA_TX5N
SPI_DI/GPIO12 G6 KBC_SPI_SO <33>
AE16 D2 KBC_SPI_SI <33>
SATA_RX5N SPI_DO/GPIO11
AD16 SATA_RX5P SPI_CLK/GPIO47 D1 KBC_SPI_CLK <33>
F4 HP, 6/10
SPI ROM
SATA_CAL SPI_HOLD#/GPIO31 +3VS
2 1 V12 SATA_CAL SPI_CS1#/GPIO32 F3 KBC_SPI_CS0# <33>
R171 1K_0402_1%
SATA_X1 Y12 U15
SATA_X1 LAN_RST#/GPIO13 NPCI_RST# <33,34>
R172 10K_0402_5% J1 HDD_HALTLED <31>
SATA_X2 ROM_RST#/GPIO14
+3VS 1 2 AA12 SATA_X2
2
M8 WXMIT_OFF# <27>
FANOUT0/GPIO3 R175
<31,32> SATA_LED# W11 M5 1 2 ADP_PRES <25,31,33,36,39,46>
+1.2V_HT SATA_ACT#/GPIO67 FANOUT1/GPIO48 R170 150K_0402_5%
M7 100K_0402_5%
L30 FANOUT2/GPIO49
1 2 +PLLVDD_SATA AA11 P5 HP 2/5 @ R573 0_0402_5%
CAMERA_OFF <17>
1
FBMA-L11-201209-221LMA30T_0805 PLLVDD_SATA FANIN0/GPIO50
P8 1 2
FANIN1/GPIO51
SATA PWR
2 2 2 10U_0603_6.3V6M W12 R8 GPIO52 HP 5/29
XTLVDD_SATA FANIN2/GPIO52
1
C294 D Q112
C293 C677 C6 R1771 2 150_0402_1% 2 DOCK_ID <18,32>
1U_0402_6.3V4Z TEMP_COMM G
B6
1 1 1 TEMPIN0/GPIO61 2N7002_SOT23-3
A6 S
3
change to 0603 for layout placement TEMPIN1/GPIO62 HP, 6/10
A5
1U_0402_6.3V4Z TEMPIN2/GPIO63 +3VS HP, 6/10
B5 2 1
HW MONITOR
TEMPIN3/TALERT#/GPIO64 R178 10K_0402_5%
+3VS A4 GPIO53
L31 VIN0/GPIO53
B4
+XTLVDD_SATA VIN1/GPIO54 CPPE_NC#
1 2 C4 CPPE_NC# <15,21,31>
FBMA-L11-201209-221LMA30T_0805 VIN2/GPIO55 CRD_REQ#_R
2 D4 CRD_REQ#_R <21>
VIN3/GPIO56
D5
VIN4/GPIO57
1
3 C295 HP 4/9 @ 3
VIN5/GPIO58 D6
1U_0402_6.3V4Z A7 R549 @ R550
1 VIN6/GPIO59
B7 10K_0402_5% 10K_0402_5%
VIN7/GPIO60
+3VALW
2
F6 +SB_AVDD
AVDD GPIO53 GPIO52
1 1
G7
AVSS C297
2.2U_0603_6.3V4Z
1
2 2 @
218S7EALA11FG_BGA528_SB700
C296 @ R551 R176
0.1U_0402_16V4Z 10K_0402_5% 10K_0402_5%
2
<>
VRAM ID, Compal 2/17
VRAM ID GPIO52 GPIO53
Hynix 64MB (main source) 0 0

Samsung 128MB(2nd source) 0 1
4 4
Hynix 128MB (2nd source) 1 0
Samsung 128MB (2nd source) 1 1

SB710 SATA/IDE/SPI
A B C D E
A B C D E
change +3VALW to +3VL Compal 2/3
+3VL
HP 4/7
U10D
6.81K_0402_5%
1
+3VALW Part 4 of 5
R179 E1
SB710
PCI_PME#/GEVENT4#
<25,27,31> LAN_PCIE_WAKE# E2 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC C8 CLK_48M_USB <15>
1 1
C298 H7 SLP_S2/GPM9#
5
U11 F5 G8 USB_RCOMP 1 2
<31,33,36,39> SLP_S3#
2
SLP_S3# USB_RCOMP 11.8K_0402_1% R180
G1
ACPI / WAKE UP EVENTS

<36,42> SLP_S5# SLP_S5#
USB MISC
<25,28,32> ON/OFFBTN# 1 2 2 4 H2
I O PWR_BTN#
1 <6,33,45> SB_PWRGD H1
NC PWR_GOOD
G
SUS_STAT# K3
4.7U_0603_6.3V6M <11> SUS_STAT# SUS_STAT# USB20_P13
SN74LVC1G17DBVR SOT23-5 H5 E6 USB20_P13 <29>
3
TEST2 USB_FSD13P USB20_N13
H4 TEST1 USB_FSD13N E7 USB20_N13 <29> USB-13 FPR
CH751H-40PT_SOD323-2 H3 TEST0
U SB 1.1
<33> GATEA20 1 2 Y15 F7
D12 GA20IN/GEVENT0# USB_FSD12P
W15 KBRST#/GEVENT1# USB_FSD12N E8
<25,26,32> LANLINK_STATUS# K4
LPC_PME#/GEVENT3# USB20_P11
<33> RUNSCI_EC# K24 LPC_SMI#/EXTEVNT1# USB_HSD11P H11 USB20_P11 <30>
1
+3VS D USB20_N11
F1
S3_STATE/GEVENT5# USB_HSD11N
J10 USB20_N11 <30> USB-11 Bluetooth
2 Q29 J2
<33> KB_RST# SYS_RESET#/GPM7#
1 2 SUS_STAT# G H6 E11
<32> PREP# WAKE#/GEVENT8# USB_HSD10P delete USB20_P10/N10 for remove NIC8075. HP 12/5
R181 4.7K_0402_5% S F2 F11
3
2N7002_SOT23-3 H_THERMTRIP# J6 BLINK/GPM6# USB_HSD10N
+3VS <6> H_THERMTRIP# SMBALERT#/THRMTRIP#/GEVENT2#
NB_PWRGD W14 A11
<11> NB_PWRGD NB_PWRGD USB_HSD9P
B11
R182 SMB_CK_CLK0 PM_RSMRST# USB_HSD9N
1 2 2.2K_0402_5% <33,42> PM_RSMRST# D3
RSMRST# USB20_P8
C10 USB20_P8 <32>
R183 SMB_CK_DAT0 USB_HSD8P USB20_N8
1 2 2.2K_0402_5% USB_HSD8N D10 USB20_N8 <32> USB-8 Dock
+3VS
R184 2 1 10K_0402_5% SATA_ISO# SATA_ISO#
AE18 G11 USB20_P7
SATA_IS0#/GPIO10 USB_HSD7P USB20_P7 <27>
R185 2 110K_0402_5% AD18 H12 USB20_N7 USB-7 MiniCard(WWAN)
+3VALW CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USB20_N7 <27>
10/21 HP <15,25> LP_EN# AA19
SMARTVOLT1/SATA_IS2#/GPIO4
W17 E12 USB20_P6
CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P USB20_P6 <32>
R187 1 2 2.2K_0402_5% SMB_CK_CLK1 V17 E14 USB20_N6 USB-6 Dock
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N USB20_N6 <32>
R188 2 1 10K_0402_5% W20
R189 SMB_CK_DAT1 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40 USB20_P5
1 2 2.2K_0402_5% <31> HDA_SPKR W21 C12
U SB 2.0
SMB_CK_CLK0 AA18 SPKR/GPIO2 USB_HSD5P USB20_N5 USB20_P5 <30>
2 <4,6,8,9,15,30> SMB_CK_CLK0
SMB_CK_DAT0 W18 SCL0/GPOC0# USB_HSD5N
D12 USB20_N5 <30> USB-5 left side 2
<4,6,8,9,15,30> SMB_CK_DAT0 SDA0/GPOC1#
SMB_CK_CLK1 K1 B12 USB20_P4
XMIT_OFF# SMB_CK_DAT1 SCL1/GPOC2# USB_HSD4P USB20_N4 USB20_P4 <17>
R190 1 2100K_0402_5% K2 A12 USB-4 USB Camera
SDA1/GPOC3# USB_HSD4N USB20_N4 <17>
R454 2 1 10K_0402_5% HDA_SDIN0 <27> XMIT_OFF# AA20 DDC1_SCL/GPIO9
GPIO
R455 2 1 10K_0402_5% HDA_SDIN1 Y18 G12 USB20_P3
+3VS <27> WLAN_OFF DDC1_SDA/GPIO8 USB_HSD3P USB20_P3 <30>
R563 2 1 10K_0402_5% SLP_S5# C1 G14 USB20_N3 USB-3 left side
LLB#/GPIO66 USB_HSD3N USB20_N3 <30>
<30> BT_OFF Y19 SMARTVOLT2/SHUTDOWN#/GPIO5
G5 H14 USB20_P2
HP, 4/13 <26> LOM_PWR# DDR3_RST#/GEVENT7# USB_HSD2P USB20_N2 USB20_P2 <31>
USB_HSD2N H15 USB20_N2 <31> USB-2 daughter board
2
Q110
G
A13 USB20_P1
USB_HSD1P USB20_P1 <31>
1 3 B13 USB20_N1 USB-1 Express card
<17,28,33> LID_SW# USB_HSD1N USB20_N1 <31>
D
B14 USB20_P0
USB_HSD0P USB20_N0 USB20_P0 <30>
2N7002_SOT23-3 B9 A14 USB-0 Left side (S/W Debug Port)
HP, 7/3 USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USB20_N0 <30>
+3VALW 2 1 B8
R191 10K_0402_5% USB_OC5#/IR_TX0/GPM5#
<6> THERM_SC# A8 A18
USB OC
USB_OC4#/IR_RX0/GPM4# IMC_GPIO8
A9 B18
USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
E5 F21
USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10
<15,20,31> CPPE_NC# F8 USB_OC1#/GPM1# SCL2/IMC_GPIO11 D21
R192 33_0402_5% 1 2 CRD_REQ#_R E4 F19
<31> HDA_BIT_CLK_CODEC USB_OC0#/GPM0# SDA2/IMC_GPIO12
R193 33_0402_5% 1 2 HDABITCLK E20
<28> HDA_BITCLK_MDC SCL3_LV/IMC_GPIO13
R194 33_0402_5% 1 2 M1 E21
<28> HDA_SDOUT_MDC AZ_BITCLK SDA3_LV/IMC_GPIO14
R195 33_0402_5% 1 2 HDA_SDOUT M2 E19
<31> HDA_SDOUT_CODEC HDA_SDIN0 AZ_SDOUT IMC_PWM1/IMC_GPIO15
<31> HDA_SDIN0 HDA_SDIN1
J7
AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16
D19 GPIO16 <22> STRAP PIN
<28> HDA_SDIN1 J8
AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17
E18 GPIO17 <22> STRAP PIN
L8 AZ_SDIN2/GPIO44
H D AUDIO
WOL_EN M3 G20
<25> WOL_EN HDA_SYNC AZ_SDIN3/GPIO46 IMC_GPIO18
R196 33_0402_5% 1 2 L6 G21
<28> HDA_SYNC_MDC AZ_SYNC IMC_GPIO19
R197 33_0402_5% 1 2 M4 D25
<31> HDA_SYNC_CODEC AZ_RST# IMC_GPIO20
L5 D24
HDARST# AZ_DOCK_RST#/GPM8# IMC_GPIO21
INTEGRATED uC
R198 33_0402_5% 1 2 C25
3 <31> HDA_RST#_CODEC IMC_GPIO22 3
R199 33_0402_5% 1 2 C24
<28> HDA_RST#_MDC IMC_GPIO23
IMC_GPIO24 B25
STRAP PIN IMC_GPIO25
C23
<22> HDARST#
B24
IMC_GPIO26
B23
CRD_REQ#_R IMC_GPIO27
CRD_REQ#_R <20> A23
IMC_GPIO28
C22
IMC_GPIO29
A22
IMC_GPIO30
IMC_GPIO31 B22
+3VS B21
C299 82P_0402_50V8J IMC_GPIO32
A21
IMC_GPIO33
1
HDA_BIT_CLK_CODEC D
1 2 H19 IMC_GPIO0 IMC_GPIO34 D20
Q104 2 H20 C20
IMC_GPIO1 IMC_GPIO35
INTEGRATED uC
C300 82P_0402_50V8J G H21 A20
HDA_BITCLK_MDC SPI_CS2#/IMC_GPIO2 IMC_GPIO36
1 2 S F25 B20
3
2N7002_SOT23-3 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37

B19
C301 82P_0402_50V8J IMC_GPIO38
D22 A19
HDA_SDOUT_MDC IMC_GPIO4 IMC_GPIO39
1 2 E24 D18
IMC_GPIO5 IMC_GPIO40
<15,31> CRD_REQ# E25 C18
C302 82P_0402_50V8J IMC_GPIO6 IMC_GPIO41
D23
HDA_SDOUT_CODEC IMC_GPIO7
1 2
HP 2/6 218S7EALA11FG_BGA528_SB700
4 4

SB710 USB/AC97
A B C D E
A B C D E
REQUIRED STRAPS NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 AZ_RST_CD# LPC_CLK1 RTC_CLK LPC_CLK0 GP17 GP16
PULL BOOTFAIL USE RESERVED RESERVED ENABLE PCI CLKGEN INTERNAL EC Internal pull up
1 HIGH TIMER DEBUG MEM BOOT ENABLED RTC ENABLED 1
ENABLED STRAPS H,H = Reserved
DEFAULT
H,L = SPI ROM
EXT. RTC
PULL BOOTFAIL IGNORE DISABLE PCI CLKGEN (PD on X1, EC
LOW TIMER DEBUG MEM BOOT DISABLED apply DISABLED L,H = LPC ROM (Default)
DISABLED STRAPS 32KHz to DEFAULT L,L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)
+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW
1
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
R208
@ R209
R200
R201
R202
R203
R204
R205
R206
R207
2.2K_0402_5%
2
@
@ @ @ @ @ @
<19> PCI_CLK2
<19,33> CLK_PCI_KBC
<19,29> CLK_PCI_DB
<19> PCI_CLK5
<19> CLK_PCI_EC
<19> LPCCLK1
2 <19> RTC_CLK 2
<21> HDARST#
<21> GPIO17
<21> GPIO16
1
10K_0402_5%
10K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
R216
R218
R219
@ R210
R211
R212
R213
R214
R215
R217
@
2
@ @ @
DEBUG STRAPS
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
3
PULL LONG PLL BCLK PLL PCIE STRAPS 3
HIGH RESET
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM

LOW SHORT PCI PLL ACPI PLL PCIE STRAPS
RESET BCLK
<19> PCI_AD28
<19> PCI_AD27
<19> PCI_AD26
<19> PCI_AD25
<19> PCI_AD24
<19> PCI_AD23
1
1
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
R220
R221
R222
R223
R224
R225
2
2
@ @ @ @ @ @
4 4

SB710 STRAPS
A B C D E
A B C D E
L 0.6A/50mil/4vias U10E
U10C 10/07 HP
L 0.45A/40mil/3vias ? SB710 +1.2V_SB_CORE
+3VS L9
M9
VDDQ_1
Part 3 of 5
VDD_1 L15
M12
+1.2V_HT SB710 A2
VDDQ_2 VDD_2 VSS_1
+
2 1 T15 VDDQ_3 VDD_3 M14 1 2 VSS_2 A25
1 C303 22U_0805_6.3V6M 22U_A_4VM C304 1
U9 N13 B1
CORE S0
C305 1U_0402_6.3V4Z VDDQ_4 VDD_4 1U_0402_6.3V4Z C306 VSS_3
1 2 U16 VDDQ_5 VDD_5 P12 2 1 VSS_4 D7
C307 1 2 1U_0402_6.3V4Z U17 P14 1U_0402_6.3V4Z 2 1 C308 T10 F20
VDDQ_6 VDD_6 AVSS_SATA_1 VSS_5
PCI/GPIO I/O
C309 1 2 1U_0402_6.3V4Z V8 R11 1U_0402_6.3V4Z 2 1 C310 U10 G19
C311 1U_0402_6.3V4Z VDDQ_7 VDD_7 1U_0402_6.3V4Z C312 AVSS_SATA_2 VSS_6
1 2 W7 R15 2 1 U11 H8
C313 1U_0402_6.3V4Z VDDQ_8 VDD_8 0.1U_0402_16V4Z C314 AVSS_SATA_3 VSS_7
1 2 Y6 VDDQ_9 VDD_9 T16 2 1 U12 AVSS_SATA_4 VSS_8 K9
C315 1 2 1U_0402_6.3V4Z AA4 0.1U_0402_16V4Z 2 1 C316 V11 K11
C317 0.1U_0402_16V4Z VDDQ_10 AVSS_SATA_5 VSS_9
1 2 AB5 VDDQ_11 V14 AVSS_SATA_6 VSS_10 K16
C318 1 2 0.1U_0402_16V4Z AB21 W9 L4
VDDQ_12 AVSS_SATA_7 VSS_11
Y9 L7
AVSS_SATA_8 VSS_12
Y11 AVSS_SATA_9 VSS_13 L10
0.3A/30mil/2vias 10/07 HP Y14 L11
0_0402_5% R539 L +1.2V_CKVDD
Y17
AVSS_SATA_10
AVSS_SATA_11
VSS_14
VSS_15 L12
2 1 Y20 L21 +1.2V_HT AA9 L14
HP 2/5 VDD33_18_1 CKVDD_1.2V_1 AVSS_SATA_12 VSS_16
AA21 L22 AB9 L16
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_13 VSS_17
AA22 L24 AB11 M6
IDE/FLSH I/O
CLKGEN I/O
VDD33_18_3 CKVDD_1.2V_3 AVSS_SATA_14 VSS_18
AE25 VDD33_18_4 CKVDD_1.2V_4 L25 AB13 AVSS_SATA_15 VSS_19 M10
@ C323 1 2 1U_0402_6.3V4Z +3VS @ C322 1 2 1U_0402_6.3V4Z AB15 M11
AVSS_SATA_16 VSS_20
AB17 AVSS_SATA_17 VSS_21 M13
remove C319, C321, C325 for layout 10/22 HP @ C327 1 2 10U_0805_10V4Z AC8 M15
AVSS_SATA_18 VSS_22
AD8 N4
AVSS_SATA_19 VSS_23
AE8 N12
remove C320, C324, C326 for layout 10/22 HP AVSS_SATA_20 VSS_24
VSS_25 N14
+PCIE_VDDR
L 0.8A/50mil/4vias POWER VSS_26 P6
L33 P9
VSS_27
+1.2V_HT 1 2 VSS_28 P10
FBMA-L11-201209-221LMA30T_0805 A15 P11
AVSS_USB_1 VSS_29
2 1 P18
PCIE_VDDR_1
10/07 HP B15
AVSS_USB_2 VSS_30
P13
C678 10U_0805_10V6K +3VALW
P19 PCIE_VDDR_2 L 0.1A/30mil/2vias ? C14 AVSS_USB_3 VSS_31 P15
2 1 P20 PCIE_VDDR_3 D8 AVSS_USB_4 VSS_32 R1
C328 4.7U_0805_10V4Z P21 A17 +S5_3V D9 R2
A-LINK I/O
C329 1 PCIE_VDDR_4 S5_3.3V_1 AVSS_USB_5 VSS_33
2 1U_0402_6.3V4Z R22 A24 D11 R4
2 C330 1 PCIE_VDDR_5 S5_3.3V_2 AVSS_USB_6 VSS_34 2
2 1U_0402_6.3V4Z R24 PCIE_VDDR_6 S5_3.3V_3 B17 1 2 D13 AVSS_USB_7 VSS_35 R9
C331 1 2 1U_0402_6.3V4Z 22U_0805_6.3V6M C332
GROUND
R25 J4 D14 R10
C333 1 PCIE_VDDR_7 S5_3.3V_4 AVSS_USB_8 VSS_36
2 1U_0402_6.3V4Z J5 1U_0402_6.3V4Z 2 1 C335 D15 R12
3.3V_S5 I/O
C334 1 S5_3.3V_5 AVSS_USB_9 VSS_37
2 0.1U_0402_16V4Z S5_3.3V_6 L1 1U_0402_6.3V4Z 2 1 C337 E15 AVSS_USB_10 VSS_38 R14
C336 1 2 0.1U_0402_16V4Z L2 1U_0402_6.3V4Z 2 1 C338 F12 T11
S5_3.3V_7 0.1U_0402_16V4Z 2 C339 AVSS_USB_11 VSS_39
1 F14 T12
L34 +1.2V_SATA 0.1U_0402_16V4Z 2 C340 AVSS_USB_12 VSS_40
1 G9 AVSS_USB_13 VSS_41 T14
+1.2V_HT 1 2 AA14
AVDD_SATA_1
0.1U_0402_16V4Z 2 1 C341 10/07 HP H9
AVSS_USB_14 VSS_42
U4
FBMA-L11-201209-221LMA30T_0805 AB18 +1.2VALW H17 U14
AVDD_SATA_4 AVSS_USB_15 VSS_43
L <1.25A/50mil/4vias AA15
AVDD_SATA_2 +S5_1.2V
J9
AVSS_USB_16 VSS_44
V6
2 1 AA17 G2 J11 Y21
CORE S5
AVDD_SATA_3 S5_1.2V_1 AVSS_USB_17 VSS_45
SATA I/O
C342 22U_0805_6.3V6M AC18 G4 J12 AB1
AVDD_SATA_5 S5_1.2V_2 +1.2VALW AVSS_USB_18 VSS_46
C343 1 2 1U_0805_16V7K AD17 AVDD_SATA_6
10/07 HP 1U_0402_6.3V4Z 2 1 C344 J14 AVSS_USB_19 VSS_47 AB19
C345 1 2 1U_0805_16V7K AE17 0.1U_0402_16V4Z 2 1 C346 J15 AB25
C347 0.1U_0402_16V4Z AVDD_SATA_7 +1.2_USB AVSS_USB_20 VSS_48
1 2 K10 AE1
C348 0.1U_0402_16V4Z AVSS_USB_21 VSS_49
1 2 A10 K12 AE24
USB_PHY_1.2V_1 AVSS_USB_22 VSS_50
+
B10 1 2 K14
USB_PHY_1.2V_2 22U_A_4VM C349 AVSS_USB_23
K15
0.1U_0402_16V4Z 2 C350 AVSS_USB_24
1 P23
1U_0402_6.3V4Z 2 C351 PCIE_CK_VSS_9
1 PCIE_CK_VSS_10 R16
R19
+AVDD_USB PCIE_CK_VSS_11
T17
L37 PCIE_CK_VSS_12
U18
+V5_VREF 1K_0402_5% 2 PCIE_CK_VSS_13
+3VALW 1 2 A16 AE7 1 R230 +5VS H18 U20
FBMA-L11-201209-221LMA30T_0805 AVDDTX_0 V5_VREF D13 PCIE_CK_VSS_1 PCIE_CK_VSS_14
B16 J17 V18
L <1.25A/50mil/4vias? C16
AVDDTX_1
AVDDTX_2 AVDDCK_3.3V
J16 +AVDDCK_3.3V
2 2
1 2 +3VS J22
PCIE_CK_VSS_2
PCIE_CK_VSS_3
PCIE_CK_VSS_15
PCIE_CK_VSS_16
V20
C352 1 2 10U_0805_10V4Z D16 C353 C354 K25 V21
C355 10U_0805_10V4Z AVDDTX_3 +AVDDCK_1.2V0.1U_0402_16V4Z 1U_0603_10V4Z CH751H-40PT_SOD323-2 PCIE_CK_VSS_4 PCIE_CK_VSS_17
1 2 D17 K17 M16 W19
PLL
C356 1U_0402_6.3V4Z AVDDTX_4 AVDDCK_1.2V 1 1 PCIE_CK_VSS_5 PCIE_CK_VSS_18

1 2 E17 M17 W22
AVDDTX_5 PCIE_CK_VSS_6 PCIE_CK_VSS_19
USB I/O
C357 1 2 1U_0402_6.3V4Z F15 E9 +AVDDC M21 W24

C358 0.1U_0402_16V4Z AVDDRX_0 AVDDC PCIE_CK_VSS_7 PCIE_CK_VSS_20
1 2 F17 P16 W25
C359 0.1U_0402_16V4Z AVDDRX_1 L38 PCIE_CK_VSS_8 PCIE_CK_VSS_21
1 2 F18
3 C360 0.1U_0402_16V4Z AVDDRX_2 3
1 2 G15 AVDDRX_3 1 2 +3VALW F9 AVSSC AVSSCK L17
G17 FBMA-L11-201209-221LMA30T_0805 Part 5 of 5
AVDDRX_4
G18
AVDDRX_5 2.2U_0603_6.3V4Z 2 C361 218S7EALA11FG_BGA528_SB700
1
0.1U_0402_16V4Z 2 1 C362
218S7EALA11FG_BGA528_SB700
L39
+AVDDCK_1.2V 1 2 +1.2V_HT
FBMA-L11-201209-221LMA30T_0805
2.2U_0603_6.3V4Z 2 1 C363
0.1U_0402_16V4Z 2 1 C364
L40
+AVDDCK_3.3V 1 2 +3VS
FBMA-L11-201209-221LMA30T_0805
2.2U_0603_6.3V4Z 2 1 C365
0.1U_0402_16V4Z 2 1 C366
4 4

SB710 PWR/GND
A B C D E
A B C D E
HDD Connector
+5VS JHDD1
1
GND
0.1U_0402_16V4Z
10U_0805_10V4Z
2 SATA_STX_C_DRX_P0
A+ SATA_STX_C_DRX_P0 <20>
1 1 1 1 3 SATA_STX_C_DRX_N0 SATA_STX_C_DRX_N0 <20>
A-
C367
C370
GND 4
1 C368 C369 SATA_SRX_DTX_N0 SATA_SRX_C_DTX_N0 1
B- 5 2 1 C371 0.01U_0402_16V7K SATA_SRX_C_DTX_N0 <20>
6 SATA_SRX_DTX_P0 2 1 C372 0.01U_0402_16V7K SATA_SRX_C_DTX_P0
2 2 2 2 B+ SATA_SRX_C_DTX_P0 <20>
GND 7
0.1U_0402_16V4Z 0.1U_0402_16V4Z
Near CONN side.
V33 8
9
V33
V33 10
GND 11
12
GND
GND 13
14
V5 +5VS
V5 15
16
V5
17
GND
18
Reserved
GND 19
20
V12
V12 21
22
V12
SUYIN_127043FR022G528_22P_NR-T
CONN@
CD-ROM Connector
CONN@
JODD1
2 +5VS 2
1
GND SATA_STX_C_DRX_P1
Placea caps. near ODD CONN. A+
2 SATA_STX_C_DRX_P1 <20>
3 SATA_STX_C_DRX_N1 SATA_STX_C_DRX_N1 <20>
A-
GND 4
5 SATA_SRX_DTX_N1 2 1 C377 0.01U_0402_16V7K SATA_SRX_C_DTX_N1
B- SATA_SRX_C_DTX_N1 <20>
6 SATA_SRX_DTX_P1 2 1 C378 0.01U_0402_16V7K SATA_SRX_C_DTX_P1 SATA_SRX_C_DTX_P1 <20>
B+
0.1U_0402_16V4Z
1U_0603_10V4Z
10U_0805_10V4Z
7
1 1 1 1 GND Near CONN side.
C379
8 R2321 2
DP
C380
C381
C382 9 0_0402_5%
10U_0805_10V4Z V5
V5 10 +5VS
2 2 2 2 11
MD
12
GND
13
GND
SANTA_202001-1_13P-T
3 3
4 4

HDD/CDROM
A B C D E
5 4 3 2 1
5/9 HP
+5VALW +3VALW
+3V_LAN +3V_LAN V1.2_LAN
V1.8_LAN
D
3 1
1
DMN66D0LDW-7_SOT363-6 Q30 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
<20,31,33,36,39,46> ADP_PRES R233 1 2 100K_0402_5% 2 SI2301BDS_SOT23 1 1 1 1 1 0.1U_0402_16V4Z 1 1 1 1
2
C383 C384 C385 C386
G
1 1
2
Q1A R234 C387 C396 C397 C398 C399
10K_0402_5% 0.1U_0402_16V4Z C388 C389 0.1U_0402_16V4Z
1
D 2 2 2 2 2 2 2 2 2
6
2 Q31 HP 3/25 R235 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z
<21> WOL_EN
1
G SSM3K7002FU_SC70-3 2 1 0.1U_0402_16V4Z
S 47K_0402_5%
3
PLT_RST#_R V1.2_LAN
D D
LP_EN 0.1U_0402_16V4Z
3
1 1 1 1
<21,28,32> ON/OFFBTN# 5/9 HP
3 R554 Q34B C402 C403 C404 C405
2 1 5 0.1U_0402_16V4Z
Q2B 15K_0402_5% 2 2 2 2
6
DMN66D0LDW-7_SOT363-6 0.1U_0402_16V4Z 0.1U_0402_16V4Z
4
<30,31,32,36> SLP_S5 5 Q34A 1
C712
DMN66D0LDW-7_SOT363-6 2 0.022U_0402_16V7K power-down NIC instead of low-power mode HP, 3/23
<15,21> LP_EN#
4
DMN66D0LDW-7_SOT363-6 HP, 4/13 2
1
LAN_PCIE_WAKE# +3V_LAN 5/9 HP
LAN_PCIE_WAKE# <21,27,31>
+3V_LAN
workaround a out-of-box S4 WOL issue with SB70010/08 HP 4.7U_0805_10V4Z C406 @ R237 4.7K_0402_5%
U12 HP 2/14 2 1 2 1
R544 0_0402_5%
3
42 LED 59 1 2 LAN_ACT# LAN_ACT# <26,32> Q32
CLKREQn LED_ACTn
2
G
<10> PCIE_PRX_DTX_P0 0.1U_0402_16V4Z 2 1 C400 PCIE_RXP0_LAN49 60
TX_P LED_LINK10/100n
<10> PCIE_PRX_DTX_N0 0.1U_0402_16V4Z 2 1 C401 PCIE_RXN0_LAN50 62 @ 1 CTRL12
Q2A TX_N LED_LINK1000n
DMN66D0LDW-7_SOT363-6 <10> PCIE_PTX_C_DRX_P0 54 RX_P PCI-E LED_DUPLEXn 63 3 1 LANLINK_STATUS# <21,26,32>
D
<10> PCIE_PTX_C_DRX_N0 53 RX_N
LAN_PCIE_WAKE# 6 1 6 46 2N7002_SOT23-3 2SB1188T100R_SC62-3
TEST V1.2_LAN
2
WAKEn TESTMODE HP 2/14
<15> CLK_PCIE_LAN 55 REFCLKP Q107
56 8 R545 1 2 0_0402_5% +3V_LAN 10U_0805_10V4Z C408
<15> CLK_PCIE_LAN# PLT_RST#_R REFCLKN AVDDH
<11,19,27,29,31,34> PLT_RST# 1 2 5 2 1
2
+3V_LAN R236 10K_0402_5% PERSTn

AVDD 19 V1.8_LAN
<26> LAN_MDI0P 17 MDIP0 POWER NC 22
+3V_LAN
<26> LAN_MDI0N 18 23
MDIN0 NC
C <26> LAN_MDI1P 20
MDIP1 & AVDD
28
+3V_LAN C
21 HP 2/14
<26> LAN_MDI1N MDIN1
<26> LAN_MDI2P 26
MDIP2 Media GROUND VDDO_TTL
1 R546 1 2 0_0402_5% 4.7U_0805_10V4Z C410 R245 4.7K_0402_5%
for DC mode can't boot issue1/15 HP 27 40 2 1 2 1
<26> LAN_MDI2N MDIN2 VDDO_TTL
<26> LAN_MDI3P 30 MDIP3 VDDO_TTL 45
3
<26> LAN_MDI3N 31 61 Q33
MDIN3 VDDO_TTL HP 2/14 V1.2_LAN 2SB1188T100R_SC62-3
LAN_EE_CLK 38 2 R547 1 2 0_0402_5% 1 CTRL18
LAN_EE_DATA VPD_CLK VDD
41
VPD_DATA EEPROM VDD
7
VDD 13
+3V_LAN 34 33 V1.8_LAN
2
SPI_DO VDD
35 SPI_DI VDD 39
remove 8075@ portion 37 FLASH 44 10U_0805_10V4Z C412
SPI_CLK VDD
1
36 SPI_CS
MEMORY VDD 48 2 1
R249 58
LAN_X1 VDD remove 8075@, HP 12/5
100K_0402_5% 15 65
XTALI EAPD
LAN_X2 14
XTALO
CLOCK HP 2/14
51 R548 1 2 0_0402_5% +3V_LAN
2
LAN_DIS# NC
10 52
LOM_DISABLEn(USB_DM-) NC remove 8075@, HP 12/5
9 32
+3VS remove 8075@, HP 12/5 SWITCH_VAUX(USB_DP+) (PD18LDO)NC
SMALERTn 57 2 1
11 64 R242 10K_0402_5%
SWITCH_VCC(LOM_DISABLEn) SMCLK
+3V_LAN 12
VAUX_AVLBL
6
+3VS 1 2 47
VMAIN_AVLBL No Connect
Q19A R239 10K_0402_5% 24
CTRL18 Reserved
2 CTRL12
4
3
CTRL18 Reserved
25
29
+1.2VALW to V1.2_LAN
CTRL12 Reserved
1 2 4.99K_0402_1% 16
RSET Analog SMDATA 43
+1.2VALW V1.2_LAN
DMN66D0LDW-7_SOT363-6 10/08 HP
1
R246 88E8072 & 88E8075_QFN64 remove 8075@, HP 12/5

LP_EN#
4.7U_0805_10V4Z
B
1 1 1 B
Q79 C571 @ C568
HP 5/29 8 1 @ C569
D S 0.1U_0603_25V7K
7 2
D S 2 2 2
6 D S 3
5 4
D G 1U_0402_6.3V4Z
SI4800BDY_SO8 B+
1 1
@ C685 C570 1 2
27P_0402_50V8J C407 0.1U_0603_25V7K 4.7U_0805_10V4Z
2 2 R499 750K_0402_5%
2 1
2
Y4
25MHZ_20P_1BG25000CK1A
3
27P_0402_50V8J C409 LAN_X1
1
2 1 LAN_X2
5 LP_EN
4
Q19B
+3V_LAN
C411
2 1 remove 8075@, HP 12/5
for can't power on in AC mode 5/9 HP
0.1U_0402_16V4Z
1
A R250 R251 A
4.7K_0402_5% 4.7K_0402_5%
U13
2
1 A0 VCC 8
2 7
A1 WP LAN_EE_CLK
3 NC SCL 6
4 5 LAN_EE_DATA
GND SDA
CAT24C08WI-GT3 SO 8P
2008/09/15 2009/09/15 Title
Issued Date Deciphered Date
Giga LAN 88E8072
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
5 4 3 2 1
5 4 3 2 1
D D
V_3P3_LAN_LED +3VALW
1 10K_0402_5%
R4 69
2
R 252
C C
10K_0402_5%
J RJ 45
2
<25> LAN_MDI0P LAN_MDI0P V_3P3_LAN_LED 13
1
L AN_MDI0N Yellow LED+
<25> L AN_MDI0N
<25,32> LAN_ACT# LAN_A CT# R 253 1 2 300_0603_5% 14
LAN_MDI1P Yellow LED-
<25> LAN_MDI1P SHLD1 16
L AN_MDI1N MDO3- 8
<25> L AN_MDI1N PR4-
1 2 DETECT PIN1 9 1 2 LOM_PWR# <21>
LAN_MDI2P @ 680P_0402_50V7K C 428 MDO3+ 7 499_0402_1% R2 54
<25> LAN_MDI2P PR4+
L AN_MDI2N
<25> L AN_MDI2N
MDO1- 6
LAN_MDI3P PR2-
<25> LAN_MDI3P 1 2
L AN_MDI3N MDO2- 5 @ 680P_0402_50V7K C 429
<25> L AN_MDI3N V_3P3_LAN_LED PR3-
MDO2+ 4 PR3+
MDO1+ 3 PR2+
1 10K_0402_5%
R2 55
MDO0- 2 PR1-
DETCET PIN2 10
V1.8_LAN
Pin Swap. 10/05 MDO0+ 1 PR1+
15 connection the pin10 to GND. 12/31
2
SHLD1
Swap P & N. 10/09 V_3P3_LAN_LED 11 Green LED+
T3
L AN_MDI0N 12 13 MDO0- <21,25,32> LANLINK_STATUS# LANLINK _STATUS# R 258 1 2 300_0603_5% 12
TD4- MX4- MDO0- <32> Green LED-
2
R 256 FOX_JM3611A-P1123-7H_14P
0_0805_5%
1 2
LAN_MDI0P 11 14 MDO0+ R2 57 @ 680P_0402_50V7K C 432
MDO0+ <32>
1
TD4+ 1:1 MX4+ 75_0402_1%

1 2 TRM_CT 10 15 M CT0 C 431 1 2 0.01U_0402_50V7K 1 2
B C 430 TCT4 MCT4 B
L AN_MDI1N 9 16 MDO1- @
TD3- MX3- MDO1- <32>
0.1U_0402_16V7K PACDN042Y3R_SOT23-3
2 LAN_A CT#
1
LAN_MDI1P 8 17 MDO1+ R2 59 3 LANLINK _STATUS#
TD3+ 1:1 MX3+ MDO1+ <32>
75_0402_1%
1 2 TRM_CT 7 18 M CT1 C 434 1 2 0.01U_0402_50V7K 1 2 D47
C 433 TCT3 MCT3 HP, 4/8
0.1U_0402_16V7K L AN_MDI2N 6 19 MDO2-
TD2- MX2- MDO2- <32>
11/04 ESD request 20 mil
+3V_LAN V_3P3_LAN_LED
LAN_MDI2P 5 20 MDO2+ R2 60
TD21+ 1:1 MX2+ MDO2+ <32>
75_0402_1%
R2 61
1 2 TRM_CT 4 21 M CT2 C 436 1 2 0.01U_0402_50V7K 1 2
C 435 TCT2 MCT2
20 mil 1 2
L AN_MDI3N 3 22 MDO3-
TD1- MX1- MDO3- <32>
0.1U_0402_16V7K
0_0402_5%
LAN_MDI3P 2 23 MDO3+ R2 62
TD1+ 1:1 MX1+ MDO3+ <32>
75_0402_1%
1 2 TRM_CT 1 24 M CT3 C 438 1 2 0.01U_0402_50V7K 1 2 C4 39 1 2 1000P_1808_3KV7K
C 437 TCT1 MCT1
NS892402 1G
0.1U_0402_16V7K
A A

Magnetic & RJ45
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS L A-4961P 1 .0
5 4 3 2 1
A B C D E
Reserve for port80 card use for FCS in factory side.

Mini Card Slot 1---WLAN DEG_FRAME# R263 0_0402_5%
1 2 LPC_LFRAME# <19,29,33,34>
DEBUG_AD3 R264 1 2 0_0402_5% LPC_LAD3
DEBUG_AD2 R265 1 2 0_0402_5% LPC_LAD2
DEBUG_AD1 R266 1 2 0_0402_5% LPC_LAD1
DEBUG_AD0 R267 1 2 0_0402_5% LPC_LAD0
LPC_LAD[0..3] <19,29,33,34>
PCI_RST#_R R268 1 2 0_0402_5%
PCI_RST# <19,29>
+3V_WLAN
1 +1.5VS <11,19,25,29,31,34> PLT_RST# 1

JP9
1 1 2 2
1
3 3 4 4
Mini Card Slot3--WWAN 5

7
9
5
7
6
8
6
8
10
DEG_FRAME#
DEBUG_AD3 Q17A
R269
10K_0402_5%
9 10 DEBUG_AD2
<15> CLK_PCIE_MCARD# 11 12
2
11 12 DEBUG_AD1
<15> CLK_PCIE_MCARD 13 13 14 14 1 6 PLT_RST#_WLAN
+3V_WWAN 15 16 DEBUG_AD0
PCI_RST#_R 15 16
17 18
JP10 CONN@ 17 18 XMIT_OFF# DMN66D0LDW-7_SOT363-6
<19> CLK_PCI_DEBUG 19 20 XMIT_OFF# <21>
2
19 20 PLT_RST#_WLAN
<21,25,31> LAN_PCIE_WAKE# 1 2 1 2 21 22
1 2 21 22
3 3 4 4 <10> PCIE_PRX_DTX_N4 23 23 24 24
@ R513 0_0402_5% 5 6 25 26 1 2
5 6 UIM_PWR <10> PCIE_PRX_DTX_P4 25 26
7 8 27 28 C440 0.022U_0402_25V7K
HP reserve 12/02 7 8 UIM_DATA 27 28
9 10 29 30
9 10 UIM_CLK 29 30
11 11 12 12 <10> PCIE_PTX_C_DRX_N4 31 31 32 32
1
13 14 UIM_RST 33 34
13 14 <10> PCIE_PTX_C_DRX_P4 33 34
15 16 UIM_VPP 35 36 R272
15 16 +3V_WLAN 35 36 remove due to AMD platform no support WiMAX 12/02 CH751H-40PT_SOD323-2
T4 PAD 17 18 37 38
17 18 M_WXMIT_OFF# 37 38 100K_0402_5% D14
T5 PAD 19 20 39 40
19 20 PLT_RST# 39 40
21 22 41 42
2
21 22 41 42 WL_LED#_R Q16A HP 3/25
23 23 24 24 43 43 44 44
25 26 45 46 +5VS
25 26 SIO_GPIO23 <34> 45 46 WL_LED#_R
27 28 47 48 1 6 WL_LED# <31>
27 28 HP 3/31 47 48
29 29 30 30 49 49 50 50 R273
31 32 51 52
31 32 51 52 DMN66D0LDW-7_SOT363-6
33 34 2 1
2
33 34
35 35 36 36 USB20_N7 <21> 53 GND1 GND2 54
3
37 38 10K_0402_5%
37 38 USB20_P7 <21>
39 40 Q16B
39 40 FOXCONN AS0B226-S40N-7F 52P +5VS +3VS
+3V_WWAN 41 42 WW_LED# <31> DMN66D0LDW-7_SOT363-6
2 41 42 HP 3/25 2
43 43 44 44 CONN@ <21> WLAN_OFF 5
45 46
45 46
1
47 48
4
47 48 R276 R277 1
49 49 50 50 <15> CLK_PCIE_WLAN_REQ# 1 2 2 47K_0402_5%
3
T6 PAD 51 52 R561 0_0402_5% 10K_0402_5%
51 52
5
R278 1 2 47K_0402_5%
2
53 54 +3V_WLAN +1.5VS
2
GND1 GND2 HP 3/25 4 3
FOXCONN AS0B226-S40N-7F 52P
DMN66D0LDW-7_SOT363-6 Q43
1
C669
47P_0402_50V8J
0.01U_0402_16V7K
0.1U_0402_16V4Z
4.7U_0805_10V4Z
C670
47P_0402_50V8J
0.01U_0402_16V7K
4.7U_0805_10V4Z
Q17B
C441
C442
C443
C444
C445
C446
1 1 1 1 1 1 1 1
SI2305DS-T1-E3_SOT23-3
0.1U_0402_16V4Z
+3V_WLAN
2 2 2 2 2 2 2 2
power down WWAM circuit. HP 5/29
+3V_WWAN U16
3 +3VS +3V_WWAN WWAN@ 1 6 3
@ 39P_0402_50V8J CH1 CH4
@ 39P_0402_50V8J
@ 39P_0402_50V8J
2 5 +3V_WWAN
Vn Vp
2
C671
47P_0402_50V8J
C451
C452
C453
R571 1 1 1 1 3 4
CH2 CH3
470_0805_5%
2
@ S DIO(BR) NUP4301MR6T1 TSOP-6 +3V_WWAN

WWAN@
R529
1
2 2 2 2
10K_0402_5%
WWAN@ D17
1
D @ DAN217T146_SC59-3
1
MC1_DISABLE 2 Q114 JP12 3

R530 UIM_VPP UIM_PWR
G 2N7002_SOT23-3 4 1 1
M_WXMIT_OFF# UIM_DATA GND VCC UIM_RST
<20> WXMIT_OFF# 2 1 S WWAN@ 5 2 2
3
VPP RST UIM_CLK

6 I/O CLK 3 1
18P_0402_50V8J
7
0_0402_5% +3VS DET
WWAN@
4.7U_0805_10V4Z
0.1U_0402_16V4Z
C462
+3V_WWAN 2
C463
C464
HP, 6/11 1 1
+3VS B+ 8
GND
1
9
R288 GND
@ 47K_0402_5% 2 2
0.01U_0402_16V7K
0.1U_0402_16V4Z
4.7U_0805_10V4Z
2
C447
C448
C449
WWAN@ WWAN@ 1 1 1
2
WWAN@ R531 Q100 WWAN@

2
R570 330K_0402_5% SI7326DN-T1-GE3_PAK1212-8

10K_0402_5% CONN@ TAITW_PMPAT6-06GLBS7N14N0
2 2 2 UIM_PWR
1
WWAN@ 4 WWAN@WWAN@
1
Q101 WWAN@
1
2N7002_SOT23-3 D WWAN@ WWAN@

4 4
<33> MC1_DISABLE 1 2 2
3
2
1
R532 G +3V_WWAN
220K_0402_1% S
3
WWAN@

WLAN&WWAN Mini-Card
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-4961P 1.0
A B C D E
Cap SWITCH BOARD. +VREG3_51125 +3VS +VREG3_51125 +VREG3_51125 +3VS
INT_KBD CONN.
KSO[0..13]
<33> KSO[0..13]
for improve battery life KSI[0..7]
<33> KSI[0..7]
R289 5.1K_0402_5%
R290 5.1K_0402_5%
HP 2/11
@ CP2
1
D34 KSI_D_3 1 8
JP13 D35 2 KSI_D_3 KSO3 2 7
1 2 +VREG3_51125 2 KSI_D_0 KSI3 1 KSO8 3 6
1 2 KSI0 1 KSI_D_11 KSO4
3 4 3 4 5
3 4 CAP_RST_EC KSI_D_8
2 <33> CAP_RST_EC 5 6 3
2
5 6 WL/BT_LED# DAP202U_SOT323-3 100P_1206_8P4C_50V8K
<31> WL/BT_LED# 7 8
7 8 DAP202U_SOT323-3 D36
9 9 10 10
1
1 R448 2 0_0402_5% 11 12 CAP_CLK D37 2 KSI_D_4
<33> CAP_CLK 11 12
<33> CAP_DAT 1 R449 2 0_0402_5% 13 14 CAP_DAT R574 2 KSI_D_1 KSI4 1 @ CP4
R450 2 0_0402_5% 13 14 CAP_INT KSI1 1 KSI_D_12 KSI_D_0
<33> CAP_INT 1 15 16 47K_0402_5% 3 1 8
15 16 KSI_D_9 KSI_D_4
17 18 3 2 7
17 18
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
19 20 STB_LED# DAP202U_SOT323-3 KSI_D_2 3 6
<31,32> STB_LED#
2
ON /OFF# 19 20 ON /OFF# DAP202U_SOT323-3 D38 KSI_D_1
2 2 2 <21,25,32> ON/OFF# 21 21 22 22 4 5
1 10K_0402_5%
R291
LID_SW# 23 24 LID_SW# D39 2 KSI_D_5

23 24 LID_SW# <17,21,33>
@ C673
@ C674
@ C675
10/09 EMI 2 KSI_D_2 KSI5 1 100P_1206_8P4C_50V8K
ACES 85203-12021 12P P1.0 KSI2 1 3 KSI_D_13
1 1 1 CONN@ 3 KSI_D_10 @ CP6
HP, 7/3 DAP202U_SOT323-3 KSI_D_14 1 8
2
DAP202U_SOT323-3 D40 KSI_D_8 2 7

2 KSI_D_6 KSI_D_12 3 6
KSI6 1 KSI_D_10 4 5
3 KSI_D_14
100P_1206_8P4C_50V8K
DAP202U_SOT323-3
@ CP7
KSO11 1 8
JP14 KSO0 2 7
KSO11 1 2 KSO11 KSO2 3 6
KSO0 1 2 KSO0 KSO5
3 3 4 4 4 5
KSO2 5 6 KSO2
KSO5 5 6 KSO5 100P_1206_8P4C_50V8K
7 8
MDC 1.5 Conn. +3VS +3VS

KSI_D_14
KSI_D_8
KSI_D_12
9
11
13
7
9
11
13
8
10
12
14
10
12
14
KSI_D_14
KSI_D_8
KSI_D_12
KSI_D_10 15 16 KSI_D_10
JP15 KSI_D_0 15 16 KSI_D_0 @ CP1
17 17 18 18
C465
1000P_0402_50V7K
C466
0.1U_0402_16V4Z
C467
4.7U_0805_10V4Z
CONN@ ACES_88020-12101_12P KSI_D_4 19 20 KSI_D_4 KSI_D_11 1 8
KSI_D_2 19 20 KSI_D_2 KSI_D_9 2
1 1 2 2 1 1 1 21 21 22 22 7
HDA_SDOUT_MDC 3 3 KSI_D_1 KSI_D_1 KSO9
4 4
<21> HDA_SDOUT_MDC 23 24 3 6
KSI_D_3 23 24 KSI_D_3 KSO12
5 5
6 6
25 26 4 5
HDA_SYNC_MDC KSO3 25 26 KSO3
7 7
8 8
<21> HDA_SYNC_MDC 27 28
2 2 2 27 28
<21> HDA_SDIN1 1 2 HDA_SDIN1_MDC 9 9 10 10
KSO8 29 29 30 30 KSO8 100P_1206_8P4C_50V8K
R2921 33_0402_5%
2 11 11 R293 2 0_0402_5% KSO4 KSO4
12 12
<21> HDA_RST#_MDC 1 HDA_BITCLK_MDC <21> 31 32
R537 4.7K_0402_5% KSO7 31 32 KSO7 @ CP3
33 33 34 34
1 2 @ KSO6 35 36 KSO6 KSI_D_5 1 8
GND
GND
GND
GND
GND
GND
delete MODEM_DISABLE# 1/22 HP C468 KSO10 35 36 KSO10 KSI_D_6
37 38 2 7
@ 10P_0402_25V8K KSO1 37 38 KSO1 KSI7
39 40 3 6
KSI_D_5 39 40 KSI_D_5 KSI_D_13
41 42 4 5
13
14
15
16
17
18
KSI_D_6 41 42 KSI_D_6
43 44
KSI7 43 44 KSI7 100P_1206_8P4C_50V8K
45 45 46 46
KSI_D_13 47 48 KSI_D_13
KSI_D_11 47 48 KSI_D_11 @ CP5
49 50
KSI_D_9 49 50 KSI_D_9 KSO7
51 52 1 8
KSO9 51 52 KSO9 KSO6
53 54 2 7
KSO12 53 54 KSO12 KSO10
55 56 3 6
KSO13 55 56 KSO13 KSO1
57 58 4 5
57 58
59 59 60 60
100P_1206_8P4C_50V8K
61 63 @
GND1 GND3 KSO13
62 64 1 2
GND2 GND4 C703
CONN@ HIROSE FH12HP-30S-1SV 55 30P 100P_0402_50V8J
correct KB connector Matrix. compal 12/24
Power button +3VL

TrackPoint CONN.
1 100K_0402_5%
R294
JP33
+5VS 1 2
1 2 SP_DATA
3 4 SP_DATA <33>
3 4 +5VS
<33> SP_CLK 5 6
5 6
7 8
2
R295 0_0402_5% 7 8
9 10 1
ON /OFF# 9 10 C651
1 2 ON/OFFBTN_KBC# <33> 11 12
11 12
1 0.1U_0402_16V4Z
2
C473 ACES_87153-08011_8P
0.1U_0402_10V6K CONN@
2
Compal, 4/1
HP request 11/28
ON/OFFBTN# <21,25,32>

MDC/KBD/ON_OFF/LID
A B C D E
+3VS +3VALW
Finger printer TPM1.2 on board

+3VALW
C4 74
0.1U_0402_16V4Z
C4 75
0.1U_0402_16V4Z
C4 76
0.1U_0402_16V4Z
C4 77
0.1U_0402_16V4Z
1 1 1 1
Q 49 AP2301GN 1P_SOT23
JP20
+5VALW 2 2 2 2
S
U SB20_N1_PWR U SB20_N1_PWR
D
3 1 1 1 2 2
1 3 4 USB20_N13 1
<21> USB20_N13 3 4
C 478
C 479
5 6 USB20_P13
<21> USB20_P13 5 6
G
1 1 7 8
2
7 8
2
C ONN@
0.1U_0402_16V4Z
10U_0805_10V4Z
HP, 4/8 R2 96 ACES_85203-04021
24
19
10
5
10K_0402_5% 2 2 U18
VSB
VDD
VDD
VDD
LPC_LAD0 26
1
LPC_LAD1 LAD0
23 LAD1
R 297 LPC_LAD2 20
220K_0402_1% +5VALW +3VS LPC_LAD3 LAD2 TPM_GPIO +3VS
17 LAD3 GPIO 6 P AD T7
1 2 D27 LPC_LFRAME# 22 2 TPM_GPIO2 P AD T8
USB20_P13 P LT_RST# LFRAME# GPIO2
4 VIN IO1 2 16 LRESET#
Base I/O Address
1
R2 98 1 2 10K_0402_5% 28 0 = 02Eh
USB20_N13 S I RQ LPCPD#
3 IO2 GND 1 27 SERIRQ
1 =* 04Eh
<19> CLK_PCI_TPM 21 R2 99
CM1293A-02SR_SOT143-4 LCLK R3 01 4.7K_0402_5%
1 2 1 @ 2 S L B 9 6 3 5 T T 1. 2 0_0402_5%
2
+3VS @ C4 80 R3 00 10_0402_5% 15 8 1 2 1 2
CLKRUN# TEST1
1
D 10P_0402_50V8K R 302 @
TESTB1/BADD 9
2 Q 50 ESD 2/18 4.7K_0402_5%
<19,27> PCI_RST# <19,33,34> P M_CLKRUN#
1
G 2N7002_SOT23-3 7 PP
S
3
R 303 3
@ 4.7K_0402_5% TPM_XTALO NC
14 XTALO NC 12
1
2
TPM_XTALI NC
13 XTALI/32K IN
GND
GND
GND
GND
R 304
2 0_0402_5% SLB 9635 TT 1.2_TSSOP28 2
25
18
11
4
2
1 2 TPM_XTALI
C4 81 22P_0402_50V8J
Y5
1
2 1 R 305
NC IN 10M_0402_5%
3 NC OUT 4
2
32.768KHZ 1TJS125DJ4A420P
1 2 TPM_XTALO
C4 82 22P_0402_50V8J
Add SIRQ and connect to
BIOS ROM +3VL

2MB SPI ROM
pin5.
+3VL
LPC Debug Port
1
C4 83
1
0.1U_0402_16V4Z
2 20mils R 306
U19 @ & U1 100K_0402_5%
8 VCC VSS 4
3 connect to KBC pin108. HP 2/3 3
2
<33> SPI_WP# SPI_W P# 3 W
20mils 1 2 SPI_HOLD#_1 7 8051_RECOV ER# JP21
+3VL HOLD
R3 07 3.3K_0402_5% SST25VF016B-50_SO8 1
SPI_CS 0# Ground
<33> SPI_CS0# 1 S <19,22> C LK_PCI_DB 2 LPC_PCI_CLK
3 Ground
<33> SPI_CLK SPI_CLK 6 4
C <19,27,33,34> LPC_LFRAME# LPC_FRAME#
<19,33,34> S I RQ S I RQ 5
SPI_SI SPI_SO_R +V3S
<33> SPI_SI 5 D Q 2 1 2 SPI_SO <33> <11,19,25,27,31,34> PLT_RST# 6 LPC_RESET#
R 308 15_0402_5% <19,33> P C I_SERR# 7
WIESO_G6179-100000_8P +V3S
<19,27,33,34> LPC_LAD0 8 LPC_AD0
<19,27,33,34> LPC_LAD1 9 LPC_AD1
<19,27,33,34> LPC_LAD2 10 LPC_AD2
HP BIOS request (DB2 12/02) 11
<19,27,33,34> LPC_LAD3 LPC_AD3
51125_PWR 12 VCC_3VA
<33> 8051TX 13 PWR_LED#
+3VL
20mils 1 2 SPI_W P# 1 2 14
<33> 8051RX CAPS_LED#
R 309 10K_0402_5% R3 10 @ 0_0402_5% <33> 8051_RECOVER# 8051_RECOV ER# 15 NUM_LED#
<41> DEBUG_KBCRST 16 VCC1_PWRGD
SPI_CLK _JP 17
HP 2/11 SPI_CS0#_JP SPI_CLK
18 SPI_CS#
+3VL SPI_SI_JP 19
SPI_S O_JP SPI_SI
20 SPI_SO
SPI_HOLD#_0 1 2 SPI_HOLD#_1 SPI_HOLD#_0 21
R3 11 0_0402_5% SPI_HOLD#
<33> KBC_SPI_CS1#_R 22 Reserved
2
SPI_CLK _JP 1 2 SPI_CLK 23

R3 12 0_0402_5% R5 60 Reserved
24 Reserved
SPI_SI_JP 1 2 SPI_SI 100K_0402_5%
R3 13 0_0402_5%
SPI_CS0#_JP 1 2 SPI_CS 0# ACES_87216-2404_24P
1
R3 14 0_0402_5% CONN@
4 SPI_CS 0# 4
SPI_SO_R 1 2 SPI_S O_JP
R5 11 0_0402_5%
HP 3/25

TCG/BIOS ROM/PS2/SW LPC DEBUG
A B C D E
5 4 3 2 1
+5VALW U SB_VCCA
2
R 315
+5VALW 10K_0402_5%
U20
BT Connector
1
1 GND OUT 8 W=100mils J USB1
2 IN OUT 7 1 1
3 6 U SB20_N3_R 2
SLP_S5 IN OUT USB20_P 3_R 2 JP23
<25,31,32,36> SLP_S5 4 EN# OC# 5 3 3
150U_D_6.3VM
0.1U_0402_16V4Z
1000P_0402_50V7K
1 1 4 4 1 +3VAUX_BT
D C4 84 TPS2068IDGNG4-R_MSOP8 5 D
1 1 GND 2
+ 6 USB20_P11_R R3 16 1 2 0_0402_5%
GND 3 USB20_P11 <21>
4.7U_0805_10V4Z (2A,100mils ,Via NO.=4) 7 USB20_N11_R R3 17 1 2 0_0402_5%
2 GND 4 USB20_N11 <21>
C4 86
C4 87
C 485 8
2 2 2 GND 5 BT_LED <31> HP 2/12
C ONN@ SUYIN_020167MR004S511ZR_4P
ACES_87212-05G0_5P
C ONN@
@ R 500 0_0402_5%
U SB_VCCA U SB_VCCB 1 2
R 470 L46
0_0805_5% 1 2 +3VS +3VAUX_BT
1 2 U SB20_N3_R
1 2 <21> USB20_N3
+5VALW U SB_VCCB USB20_P 3_R Q51
<21> USB20_P3
4 4 3 3
S
3
D
1
swap JUSB3 & JUSB2 USB signal for USB debug port (USB port 0) HP 2/10 WCM2012F2S-900T04_0805
C 488
C 489
@ R3 18 1 2 AP2301GN 1P_SOT23
G
2
1
+5VALW 10K_0402_5% @ R 501 0_0402_5%
R 319 1 1
@ U21 10K_0402_5%
1
2 IN 7 1
2
OUT U SB20_N5_R 1 2 2
3 IN OUT 6 2 2
0.1U_0402_16V4Z
10U_0805_10V4Z
SLP_S5 4 EN# 5 USB20_P 5_R 3
OC# 3
150U_D_6.3VM
0.1U_0402_16V4Z
1000P_0402_50V7K
1 1 4 R3 20
@ C4 90 TPS2068IDGNG4-R_MSOP8 4
1 1 5 GND <21> BT_OFF 1 2
+ 6
C 4.7U_0805_10V4Z GND C
2
(2A,100mils ,Via NO.=4) 7 GND
220K_0402_1%
@ C 491 @ @ 8
2 2 2 GND
C4 93
C 492
@ R5 02 0_0402_5%
1 2
L47
1 1 2 2
<21> USB20_N5 U SB20_N5_R
<21> USB20_P5 USB20_P 5_R
4 4 3 3
D 29 WCM2012F2S-900T04_0805
USB20_P 5_R 1 6 U SB20_N5_R
I/O1 I/O4
1 2
+5VALW US B _VCCC 2 5 @ R5 03 0_0402_5%
REF1 REF2 U SB_VCCA
U SB20_N3_R 3 4 USB20_P 3_R
I/O2 I/O3
ACCELEROMETER
2
@ PJUSB208_SOT23-6
R 482
+5VALW 10K_0402_5%
02/18 ESD
U30
1

+3VS
2 IN OUT 7 1 1
3 6 U SB20_N0_R 2
SLP_S5 IN OUT USB20_P 0_R 2
4 EN# OC# 5 3 3
150U_D_6.3VM
0.1U_0402_16V4Z
1000P_0402_50V7K
1 1 4 4
C6 89 TPS2068IDGNG4-R_MSOP8 1 1 5
B + GND B
6 GND
0.1U_0402_16V4Z
10U_0805_6.3V6M
4.7U_0805_10V4Z (2A,100mils ,Via NO.=4) 7
2 GND
C 691
C 692
C 494
C 495
C 690 8
2 2 2 GND
1 1
2 2
U 22
LIS302DL
+3VS 1 VDD_IO
6 VDD GND 2
GND 4
<19> ACCEL_INT# 8 INT 1 GND 5
9 INT 2 GND 10
12 SDO
@ R5 04 0_0402_5% 13
<4,6,8,9,15,21> SMB_CK_DAT0 SDA / SDI / SDO
1 2 <4,6,8,9,15,21> SMB_CK_CLK0 14 SCL / SPC
RSVD 3 +3VS
L48 +3VS R 321 2 1 10K_0402_5% 7 11
CS RSVD
D28 1 1 2 2
<21> USB20_P0 USB20_P 0_R HP302DLTR8_LGA14_3X5
1 6 U SB20_N0_R Must be placed in the center of the system.
I/O1 I/O4 <21> USB20_N0
4 4 3 3 L
2 REF1 REF2 5 US B _VCCC
WCM2012F2S-900T04_0805 Change U12 part description from
USB20_P 0_R 3 4 U SB20_N0_R
I/O2 I/O3 02/18 ESD 1 2
LIS302DLTR LGA to HP302DLTR8 as HP
@ PJUSB208_SOT23-6 @ R5 05 0_0402_5% change list. 12/03
A A

USB & BT Connector & Acclerometer
5 4 3 2 1
5 4 3 2 1
Audio/Express Card/TP/LEDs Connector 0.1U_0402_16V4Z

C680
1 2
JP34 Serial Port CONN

DOCK_LINE_IN_L 1 2 DLINE_OUT_L
<32> DOCK_LINE_IN_L 1 2 DLINE_OUT_L <32> +5VS
<32> DOCK_LINE_IN_R DOCK_LINE_IN_R 3 4 DLINE_OUT_R DLINE_OUT_R <32>
LINE_IN_SENSE 3 4 LINE_OUT_SENSE
<32> LINE_IN_SENSE 5 5 6 6 LINE_OUT_SENSE <32>
7 8 JP35
7 8
9 9 10 10 1 1
HDA_BIT_CLK_CODEC 11 12 A_SD# +VREG3_51125 +3VALW +5VS +3VS +1.5VS DCD#1 2
<21> HDA_BIT_CLK_CODEC 11 12 A_SD# <33> <32,34> DCD#1 2
HDA_SDOUT_CODEC 13 14 EAPD DSR#1 3
D <21> HDA_SDOUT_CODEC 13 14 EAPD <33> <32,34> DSR#1 3 D
HDA_RST#_CODEC 15 16 HDA_SPKR RXD1 4
<21> HDA_RST#_CODEC 15 16 HDA_SPKR <21> <32,34> RXD1 4
HD A_SYNC_CODEC 17 18 HP 2/17 RTS#1 5
<21> HDA_SYNC_CODEC 17 18 <32,34> RTS#1 5
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
HDA_SDIN0 19 20 CLK_PCIE_EXP# TXD1 6
<21> HDA_SDIN0 19 20 CLK_PCIE_EXP# <15> <32,34> TXD1 6
+VREG3_51125 21 22 CLK_PCIE_EXP CLK_PCIE_EXP <15> CTS#1 7
21 22 <32,34> CTS#1 R I#1 7
+3VALW 23 24 1 1 1 1 1 <32,34> RI#1 8
HP 2/17 23 24 PCIE_PTX_C_DRX_N3 DTR#1 8
+5VS 25 25 26 26 PCIE_PTX_C_DRX_N3 <10> <32,34> DTR#1 9 9
C646
C647
C648
C649
C650
27 28 PCIE_PTX_C_DRX_P3 HP 4/7 SER_SHD 10 14
+3VS 27 28 PCIE_PTX_C_DRX_P3 <10> <32> SER_SHD 10 14
+1.5VS 29 29 30 30 <33> 14vs15_FF_DETECT 11 11 13 13
SLP_S3# 31 32 PCIE_PRX_DTX_N3 2 2 2 2 2 12
<21,33,36,39> SLP_S3# 31 32 PCIE_PRX_DTX_N3 <10> 12
<21,25,27> LAN_PCIE_WAKE# LAN_PCIE_WAKE# 33 34 PCIE_PRX_DTX_P3 PCIE_PRX_DTX_P3 <10>
PLT_RST# 33 34 change 0.1U to 1U , HP 3/23
<11,19,25,27,29,34> PLT_RST# 35 35 36 36
CPPE_NC# 37 38 USB20_N1 E-T_3800K-F12N-03R_12P
<15,20,21> CPPE_NC# 37 38 USB20_N1 <21>
AMBER_BATLED# 39 40 USB20_P1
<33> AMBER_BATLED# 39 40 USB20_P1 <21>
AQUAWHITE_BATLED# 41 42 CONN@
<33> AQUAWHITE_BATLED# SATA_LED# 41 42 TP_CLK
<20,32> SATA_LED#
<20> HDD_HALTLED
HDD_HALTLED#
43
45
43
45
44
46
44
46 TP_DATA
TP_CLK <33>
TP_DATA <33>
Card Reader 7 in 1 + 1 Port USB Connector
STB_LED# 47 48
<28,32> STB_LED# 47 48
WL/BT_LED# 49 50
<28> WL/BT_LED# 49 50
51 52 +5VALW
51 52 JP29
E-T_1001K-F50E-08E_50P-T 1
1 HP 6/8
CONN@ 2 2
3 USB20_N2
3 USB20_P2 USB20_N2 <21> CRD_LOCAL
4 USB20_P2 <21>
4 SLP_S5
5 5 SLP_S5 <25,30,32,36>
3
6 CRD_RST#
6
7 +3VS_CD
7 CRD_LOCAL
8 8
HP 6/8 DMN66D0LDW-7_SOT363-6
9 9 5 ADP_PRES <20,25,33,36,39,46>
+3VS 10 CLK_PCIE_CARD Q18B
10 CLK_PCIE_CARD# CLK_PCIE_CARD <15>
11 CLK_PCIE_CARD# <15>
4
C 11 C
12 12
13 PCIE_PTX_C_DRX_P1
13 PCIE_PTX_C_DRX_P1 <10>
1
14 PCIE_PTX_C_DRX_N1
14 PCIE_PTX_C_DRX_N1 <10>
R322 15
15 PCIE_PRX_DTX_P1
47K_0402_5% 16 16 PCIE_PRX_DTX_P1 <10>
19 17 PCIE_PRX_DTX_N1
19 17 PCIE_PRX_DTX_N1 <10>
2 20 20 18 18
+3VS
CONN@
WL/BT_LED# P-TWO_196087-18021-3_18P-T
3
47K change board to board contor to wire to board connector. Compal 12/12
Q52 correct the net name 1/15 Compal
DTA114YKAT146_SOT23-3 Q8A
2 10K BT_LED 2 DMN66D0LDW-7_SOT363-6
<27> WL_LED# <30> BT_LED
power-down of 1394/cardreader chip when no card/1394 insertedHP 3/24
1
+3VS_CD
+3VS
1
Q8B
S
WL_LED 5 DMN66D0LDW-7_SOT363-6 3 1
D
Q106
SI2301BDS_SOT23
4
1
4.7U_0805_25V6-K
CRD_RST# 1 2 PLT_RST#
G
2
R541 10K_0402_5%
6
1
Q18A
C684
2 DMN66D0LDW-7_SOT363-6 R542 15K_0402_5%
<27> WW_LED# 10K
BT_LED R323 1 2 100K_0402_5% 2 1 2
remove UWB LED# 10/31 2
+5VS
1
B
47K B
Q53 WL_LED R324 1 2 100K_0402_5% 1
3
DTA114YKAT146_SOT23-3 HP 2/3
C711
2
+3V_WWAN 2 0.022U_0402_16V7K
47K_0402_5% R558 R559
HP , 6/13 HP 6/8
+3VS_CD 47K_0402_5%
1
<15,21> CRD_REQ#
1
D
Q23 2
6
2N7002_SOT23-3 G 1
1
S @
3
@ R566 C718 Q109A
0_0402_5% 2 DMN66D0LDW-7_SOT363-6
2 0.1U_0402_16V4Z
1
3
R567
DMN66D0LDW-7_SOT363-6 Q109B
CRD_LOCAL 1 2 5
680K_0402_5%
4
2
2
R565 C717
15K_0402_5% 1U_0402_6.3V4Z
10/21 move 1394A to card reader USB board 1
1
A <34> SIO_GPIO43 A

CR&LEDS&PW&Audio&Exp Conn
5 4 3 2 1
change +5VS to +5VALW for RJ45 LED issue Compal 2/9
VA 10/17 HP +5VALW
DOCK CONN. 184PIN DOCKING CONNECT +5VALW
R4140 2 DOCK _ID 1 R3 40 2

<18,20> DOCK _ID
C 506
C 507
(1) PCI Express x1 channels 10K_0402_5% 10K_0402_5%
(2) PS/ 2 Interfaces
(2) USB 2.channels +5VS VA_ON#
1 1
(2) SATA Channels 2N7002_SOT23-3
VIN VA D 1
1
(2) Display Port Channels C5 05
(1) Se rial Port L41 R3 39 0.1U_0402_16V4Z
2 SLP_S5 <25,30,31,36>
(1) Pa rallel Port 2 2 Q 82
C5 08
C5 09
C5 10
C5 11
HCB2012KF-121T50_0805 G 1K_0402_5%
(1) Line In 2
0.1U_0603_50V4Z
0.1U_0603_50V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2 S
3
(1) Line Out
(1) RJ45 (10/100/1000) 1 1 1 1
2
(1 ) VGA
(1) 2 LAN indicator LED's
(1) Power Button 2 2 2 2
(1) I2C interface
J DO CKB
HP 12/03
HP 12/03 143 46
143 46
142 142 47 47
<18> DP B_HPD 141 141 48 48 DP C_ HPD <11>
J D OCKA 140 49 O N/OFFBTN#
VA 140 49 O N/OFFBTN# <21,25,28>
ADP_SIGNAL ADP_SIGNAL 139 50 VA_ON#
HDMICLK_UMA 139 50 DOCK _AUX+
190 P1 G1 189 138 138 51 51
HDMIDAT_UMA 137 52 DOCK _AUX-
137 52
136 136 53 53
1/15 HP 1/15 HP 135 54 HP 2/3 1/15 HP
135 54
188 188 1 1 134 134 55 55
MDO3+ 187 2 MDO1+ 133 56
<26> MDO3+ 187 2 MDO1+ <26> 133 56
MDO3- 186 3 MDO1- 132 57
<26> MDO3- 186 3 MDO1- <26> 132 57
185 4 <34> LPTSTB# LPTSTB# 131 58 D DC-DATA
185 4 131 58 D_DD CDATA <11,16>
MDO2+ 184 5 MDO0+ <34> LPTAFD# LPTA FD# 130 59 DDC_C LK
<26> MDO2+ 184 5 MDO0+ <26> 130 59 D_DDCCLK <11,16>
MDO2- 183 6 MDO0- <34> LPTERR# LPTERR# 129 60 D_V S Y NC <16>
<26> MDO2- 183 6 MDO0- <26> 129 60
182 7 <34> LPTACK# LP TACK# 128 61 D _ HS Y NC <16>
1/15 HP 182 7 +5VS LPTBUSY 128 61
<34> LPTBUSY 127 127 62 62 GND
<34> LPTPE LPTPE 126 63 DOCK _RED
DE TECT LPTSLCT 126 63
181 181 8 8 LANLINK_STATUS# <21,25,26> <34> LPTSLCT 125 125 64 64 GND
1/15 HP 180 9 L PD7 124 65 DOCK _GRN
180 9 LAN_ACT# <25,26> <34> L PD7 124 65
179 10 L PD6 123 66 DO CK_BLU
179 10 <34> L PD6 123 66
2
+5VS 178 11 +5VS L PD5 122 67 GND
178 11 <34> L PD5 122 67
177 12 R4 98 L PD4 121 68 D CD#1
HP 2/4 177 12 HP 2/4 <34> L PD4 121 68 D CD#1 <31,34>
176 13 4.7K_0402_5% L PD3 120 69 RI#1 RI #1 <31,34>
176 13 <34> L PD3 120 69
175 14 L PD2 119 70 D TR#1 D TR#1 <31,34>
175 14 <34> L PD2 119 70
174 15 L PD1 118 71 CTS#1
<34> L PD1 CTS#1 <31,34>
1
174 15 S E R_SHD L PD0 118 71 RTS#1
173 173 16 16 <31> S E R_SHD Q3A <34> L PD0 117 117 72 72 RTS#1 <31,34>
172 17 LPTSLCTIN# 116 73 DS R#1
172 17 <34> LPTSLCTIN# 116 73 DS R#1 <31,34>
6
171 18 DMN66D0LDW-7_SOT363-6 LPTINIT# 115 74 TXD1
171 18 <34> LPTINIT# 115 74 TXD1 <31,34>
170 19 STB_LED#_R 114 75 RXD1 RXD1 <31,34>
170 19 USB20_N6 <21> 114 75
169 169 20 20 USB20_P6 <21> <20,31> SATA_LED# 113 113 76 76
168 21 2 PRE P# DOCK _ID 112 77
168 21 PRE P# 112 77 1/15 HP
167 167 22 22 <21> PREP# 111 111 78 78
166 23 110 79
1
166 23 110 79
165 165 24 24 <20> SATA_STX_DRX_P2 109 109 80 80
164 25 108 81 KBD_DATA
164 25 <20> SATA_STX_DRX_N2 108 81 KBD_DATA <33>
163 26 107 82 KBD_CLK
163 26 107 82 KBD_CLK <33>
162 27 <20> SATA_SRX_DTX_P2 SATA_SRX_DTX_P2 106 83 PS 2_DATA
162 27 106 83 PS2_DATA <33>
161 28 <20> SATA_SRX_DTX_N2 SATA_SRX_DTX_N2 105 84 PS2_CLK
HP 2/18 161 28 HP 2/18 HP 2/18 105 84 PS2_CLK <33>
160 160 29 29 104 104 85 85 LINE_IN_SENSE <31>
159 30 HP 10/31 103 86 LINE_OUT_SENSE
159 30 <21> USB20_N8 103 86 LINE_OUT_SENSE <31>
DPB_TXP0 158 31 DPC_TXP0 102 87
<10> DPB_TXP0 158 31 DPC_TXP0 <10> <21> USB20_P8 102 87
DPB_TXN0 157 32 DPC_TXN0 101 88 DLI NE_IN_L
<10> DPB_TXN0 157 32 DPC_TXN0 <10> +5VALW 101 88 DO CK_LINE_IN_L <31>
156 33 100 89 DLINE _IN_R
156 33 <20> SATA_STX_DRX_P3 100 89 DOCK _LINE_IN_R <31>
DPB_TXP1 155 34 DPC_TXP1 99 90
<10> DPB_TXP1 155 34 DPC_TXP1 <10> <20> SATA_STX_DRX_N3 99 90
DPB_TXN1 154 35 DPC_TXN1 98 91 DLINE_OUT_L
<10> DPB_TXN1 154 35 DPC_TXN1 <10> 98 91 DLINE_OUT_L <31>
153 36 <20> SATA_SRX_DTX_P3 SATA_SRX_DTX_P3 97 92 DL INE_OUT_R
153 36 97 92 D LINE_OUT_R <31>
2
DPB_TXP2 152 37 DPC_TXP2 <20> SATA_SRX_DTX_N3 SATA_SRX_DTX_N3 96 93
<10> DPB_TXP2 152 37 DPC_TXP2 <10> 96 93
DPB_TXN2 151 38 DPC_TXN2 R5 38 95 94 DE TECT
<10> DPB_TXN2 151 38 DPC_TXN2 <10> HP 2/18 95 94
150 150 39 39 10K_0402_5%
DPB_TXP3 149 40 DPC_TXP3
<10> DPB_TXP3 149 40 DPC_TXP3 <10>
DPB_TXN3 148 41 DPC_TXN3
<10> DPB_TXN3 DPC_TXN3 <10>
1
148 41
147 147 42 42
146 43 DOCK _AUX+ STB_LED#_R 192 191
<11,18> HDMICLK_UMA 146 43 DOCK_AUX+ <11> G2 G1
145 44 DOCK _AUX- 194 193
<11,18> HDMIDAT_UMA 145 44 DOCK_AUX- <11> G4 G3
3
144 144 45 45 196 G6 G5 195
HP 2/3 Q3B 198 197
G8 G7
200 G10 G9 199
FOX_QL0094L-D26601-8H 5 STB_LED# <28,31>
FOX_QL0094L-D26601-8H
4
this circuit will be on dock staton, HP 12/02
U26
HP 2/4 U24 1 6 DOCK _ID

<16> V GA_GRN NO IN
+5VS C5 22
1 6 DOCK _ID
<16> VGA_RED NO IN
C 520 2 GND VCC 5 2 1
+5VS
2 5 2 1 0.1U_0402_16V4Z
GND VCC DOCK _GRN 3 NC COM 4 GRE EN_R <16>
0.1U_0402_16V4Z
DOCK _RED 3 4 RE D_R <16>
NC COM TS5A3157_SC70-6
TS5A3157_SC70-6
U 25
1 6 DOCK _ID
<16> VGA_BLU NO IN
+5VS C5 21
2 GND VCC 5 2 1
0.1U_0402_16V4Z
DO CK_BLU 3 4 B L UE_R <16>
NC COM
TS5A3157_SC70-6

DOCK CONN
Cus tom LA -4961P 1.0
+3VL
R P15 +3VL 8/25

1 8 KSI3 add one more 0.1U for SMSC design guideline 12/10
2 7 KSI2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
3 6 KSI1
C7 10
C5 23
C5 24
C5 25
C5 26
C5 27
4 5 KSI0 1 1 1 1 1 1 1 2 +3VS A _SD R5 75 1 2 0_0402_5% A_SD# <31>
0.1U_0402_16V4Z
@ R3 58 0_0402_5%
10K_0804_8P4R_5%
C 528
1
1
R P16 2 2 2 2 2 2 D Q115
1 8 KSI7 @ 2 SIO_GPIO41 <34>
2 7 KSI6 G
KSI5 2 2N7002_SOT23-3
3 6 S
3
4 5 KSI4
106
119
10K_0804_8P4R_5% C5 29 1 2 0.1U_0402_25V6
39
58
84
14
49
U 27
128 15 C5 30 1 2 4.7U_0805_6.3V6K
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
VCC2
<29> SPI_SI FLDATAOUT CAP
<20> KBC_SPI_SI 127 HSTDATAOUT/GPIO45
<29> SPI_CS0# 97 FLCS0# GPIO28 93
<20> KBC_SPI_CS0# 96 HSTCS0#/GPIO44 GPIO29 98
<29> SPI_SO 95 FLDATAIN GPIO30 99
94 100 R3 59 1 2 0_0402_5% +3VL
<20> KBC_SPI_SO HSTDATAIN/GPIO43 GPIO31 EAPD <31>
GPIO32 126 P C I_SERR# <19,29> HP 4/7
<28> KSO[0..13]
KS O0 21 124 K B C_PWR_ON
KSO0 OUT0/(SCI) K B C _PWR_ON <41>
KS O1 20 125 AQUAWHITE _BATLED# 14vs15_FF_DETECT 1 2
KSO1 OUT1/IRQ8# AQUAWHITE_BATLED# <31>
KS O2 19 R5 62 100K_0402_5%
KS O3 KSO2
18 KSO3 CFETA/OUT7/nSMI 123 FET_A <40>
KS O4 17 122 KB RST#
General Purpose I/O Interface

KSO4 OUT8/KBRST KB_RST# <21>
Keyboard/Mouse Interface
KS O5 16 121 KB _RST# 1 2
SMSC_1098-NU_TQFP-128P
KSO5 OUT9/PWM2 FAN_PWM <4>
KS O6 13 120 R3 60 10K_0402_5%
KSO6 OUT10/PWM0 BAT_PWM_OUT <39>
KS O7 12 118
KSO7 PWM_CHRGCTL CHGC TRL <39>
KS O8 10
KS O9 KSO8 THM_TRAVEL#
9 KSO9 GPIO01 107 THM_TRAVEL# <38>
KS O10 8 79
KSO10 GPIO02 ON/OFFBTN_KBC# <28>
KS O11 7 80 14vs15_FF_DETECT
+5VS KSO11 GPIO03 14vs15_FF_DETECT <31>
KS O12 6 81 FET_A 1 2
KSO12/GPIO00/KBRST GPIO04/KSO14 SLP_S3# <21,31,36,39>
KS O13 5 83 R4 43 10K_0402_5%
KSO13/GPIO18 GPIO05/KSO15 8051_RECOVER# <29>
FET_B 1 2
1 2 TP _CLK <28> K SI[0..7] GPIO07/PWM3 85 300_0402_5%1 2 R3 62 P M_RSMRST#
PM_RSMRST# <21,42>
R4 44 10K_0402_5%
R 361 10K_0402_5% KSI0 29 86 R3 64 1 2 10K_0402_5% +3VL LATCH 1 2
KSI1 KSI0 GPIO08/RXD R4 45 10K_0402_5%
28 KSI1 GPIO09/TXD 87 ADP_DET# <46>
KSI2 27 HP BIOS request (DB2 11/28) S B_PWRGD 1 2
KSI2
1 2 TP_DATA KSI3 26 KSI3 GPIO11/AB2A_DATA 88 AB 2A_DATA R3 66 1 2 0_0402_5%
CAP_DAT <28>
R3 67 4.7K_0402_5%
R 365 10K_0402_5% KSI4 25 89 AB2A _CLK R3 68 1 2 0_0402_5% P M_RSMRST# 1 2
KSI4 GPIO12/AB2A_CLK C AP_CLK <28>
KSI5 24 90 R3 69 1 2 0_0402_5% R3 70 10K_0402_5%
KSI5 GPIO13/AB2B_DATA CELLS <39>
KSI6 23 91 R3 71 1 2 0_0402_5% A _SD K B C_PWR_ON 1 2
R P17 KSI7 KSI6 GPIO14/AB2B_CLK ADP_DET# R3 72 10K_0402_5%
22 KSI7 GPIO15/FAN_TACH1 92
1 8 SP_CLK 101 change "BATCON" to ADP_DET# HP 12/12 SLP_S3# 1 2
GPIO16/FAN_TACH2 THM_MAIN# <38>
2 7 SP _DATA 102 R4 64 47K_0402_5%
GPIO17/A20M GATEA20 <21> HP, 4/14
3 6 PS2_CLK TP _CLK 35
<31> TP_CLK IMCLK
4 5 PS 2_DATA TP_DATA 36 103
<31> TP_DATA IMDAT GPIO20/PS2CLK K BD_CLK <32>
SP_CLK 61 105
<28> SP_CLK KCLK GPIO21/PS2DAT KBD_DATA <32>
10K_0804_8P4R_5% SP _DATA 62 4 R3 73 1 2 10K_0402_5%
<28> SP_DATA KDAT GPIO24/KSO16
PS2_CLK 66 74
<32> PS2_CLK EMCLK ADP_PRES[CKT#2]/GPIO27/WK_SE05 ADP_PRES <20,25,31,36,39,46>
PS 2_DATA 67
<32> PS2_DATA EMDAT
+3VL
111 AB 1A_DATA AB1A_DATA <38> R P18
AB1A_DATA AB1A _CLK 4.7K_0804_8P4R_5%
AB1A_CLK 112 AB1A_CLK <38>
Access Bus Interface AB1A _CLK 1 8
<19,29,34> P M_CLKRUN# 55 109 AB 1B_DATA AB 1A_DATA 2 7
CLKRUN# AB1B_DATA AB1B_DATA <38>
57 110 AB1B _CLK AB1B _CLK 3 6
<19,29,34> S I RQ SER_IRQ AB1B_CLK AB1B_CLK <38>
CLK_PCI_KBC 54 AB 1B_DATA
<19,22> CLK_PCI_KBC
RUNS CI _EC# 76 PCI_CLK Power Mgmt/SIRQ 73 R3 74 1 2 0_0402_5%
4 5
<21> RUNS CI _EC# EC_SCI# GPIO25 HP 2/3 CAP_INT <28>
108 R3 75 1 2 0_0402_5% R3 76 1 2@ 10_0402_5% C5 31 1 2 @ 10P_0402_25V8K
GPIO26/KSO17 SPI_WP# <29> +3VL
51 59 1 2
Miscellaneous
<19,27,29,34> LPC_LAD3 LAD[3] NC_CLOCKI CLK_14M_KBC <15>
50 75 32K_CLK R3 77 1 2 0_0402_5%
<19,27,29,34> LPC_LAD2 LAD[2] 32KHZ_OUT/GPIO22/WK_SE01 A DP_EN <39>
48 60 S B_PWRGD R3 78 0_0402_5%
<19,27,29,34> LPC_LAD1 LAD[1] RESET_OUT#/GPIO06 S B _PWRGD <6,21,45>
<19,27,29,34> LPC_LAD0 46 LAD[0] LPC PWRGD 78 S Y S _ PWRGD
S Y S _ PWRGD <44,45>
8051TX 1 2
77 R3 80 100K_0402_5%
52
Bus VCC1_RST#
38
V CC1_ PWRGD <39,41>
8051RX 1 2
<19,27,29,34> LPC_LFRAME# LFRAME# ADC_TO_PWM_OUT/GPIO19 OCP <46>
<20,34> NPCI_RST# 53 R3 81 100K_0402_5%
LRESET# TEST R3 82 1
from Power TEST PIN 69 2 10K_0402_5% V CC1_ PWRGD 1 2
R3 83 10K_0402_5%
KBD_CLK 1 2
CRY1 70 116 R4 65 100K_0402_5%
XTAL1 CFETB/GPIO10 FET_B <40>
CRY2 71 113 KBD_DATA 1 2
XTAL2 BAT_LED# AMBER_BATLED# <31>
115 8051TX R4 66 100K_0402_5%
PWR_LED#/8051TX 8051TX <29>
+R TCVCC 68 114 8051RX
VCC0 FDD_LED#/8051RX 8051RX <29>
C7 14
1 A DP _ID_ADC 1 2
<40> BAT_ALARM Alarm [CKT#2]/GPIO36
32.768KHZ 1TJS125DJ4A420P
<20> KBC_SPI_CLK 2 41 2200P_0402_50V7K

HSTCLK/GPIO41 AC[CKT#2]/GPIO23 AC_ADP_PRES <39>
<29> SPI_CLK 3 FLCLK ADC2/GPIO40 42 A DP _ ID_ADC <46>
30 65 R3 84 1 2 0_0402_5%
GPIO39 Q/GPIO33 L ATCH <40>
1
31 64
HP 12/5 <29> KBC_SPI_CS1#_R HSTCS1#/GPIO42 GPIO34 LID _SW# <17,21,28>
33P_0402_50V8J
33P_0402_50V8J
Y6 32 63 R3 85 1 2 0_0402_5% add filtering circuit for AD input. HP 5/29

OUT
IN
FLCS1# GPIO35 CAP_RST_EC <28>

C5 32
C5 33
<27> MC1_DISABLE 33 GPIO38 AVCC 40 +3VL

1 1 34 GPIO37
AGND
AVSS
300_0402_5%1 2 R 386 43
<39> PMC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
300_0402_5%1 ADC1/GPIO46
2 R 387
NC
NC
<46> OCP _ IN_ADC 44 ADC_TO_PWM_IN

2 2 KBC1098-NU_TQFP128_14X14
2
72
11
37
47
56
104
82
117
45
33pF only for 1070/1091

2 2
C 715 C 716
2200P_0402_50V7K 2200P_0402_50V7K
1 1
+R TCVCC
1
R5 64
0_0402_5%
C 534
1U_0603_10V4Z
C 535
0.1U_0402_16V4Z
1 1
add filtering circuit for AD input. HP 5/29 Security Classification Compal Secret Data Compal Electronics, Inc.
2 2 Issued Date 2008/09/15 Deciphered Date 2009/09/15 Title
KBC1091/1098
Dat e: T h u r s d a y , A ugus t 27, 2009 Sheet 33 of 54
5 4 3 2 1
+3VS
U28 R P19
RXD1 <31,32>
LPC_LAD0 9 D CD#1 1 8
8/25 <19,27,29,33> LPC_LAD0 LPC_LAD1 LAD0 R 516 1K_0402_5% RI#1
<19,27,29,33> LPC_LAD1 11 LAD1 2 7
LPC_LAD2 12 54 RXD1 1 2 CTS#1 3 6
<19,27,29,33> LPC_LAD2 LPC_LAD3 LAD2 RXD1 TXD1 DS R#1
13 55 4 5
SERIAL I/F
<19,27,29,33> LPC_LAD3 LAD3 TXD1 TXD1 <31,32>
56 DS R#1
D DSR1# DS R#1 <31,32> D
LPC_LFRAME# 14 1 RTS#1 4.7K_1206_8P4R_5%
<19,27,29,33> LPC_LFRAME# LFRAME# RTS1# RTS#1 <31,32>
L PC_LDRQ#0 15 2 CTS#1
<19> LP C_LDRQ#0 LDRQ# CTS1# CTS#1 <31,32>
2 1 3 D TR#1
<20,33> NPCI_RST# DTR#1 <31,32>
LPC I/F
R 389 2.2K_0402_5% DTR1# RI#1
16 PCI_RESET# RI1# 4 RI #1 <31,32>
1 2 SIO_PD# 17 5 D CD#1
+3VS R 517 LPCPD# DCD1# DCD#1 <31,32>
10K_0402_5%
P M_CLKRUN# 18
<19,29,33> P M_CLKRUN# CLK_PCI_SIO CLKRUN#
<19> CLK_PCI_SIO 19 PCI_CLK
S I RQ 20 35 LPTINIT#
<19,29,33> S I RQ SIO_PME# SER_IRQ INIT# LPTSLCTIN# LPTINIT# <32>
+3VS 1 2 6 IO_PME# SLCTIN# 36 LPTSLCTIN# <32>
+3VS R5 18 10K_0402_5% 37 L PD0
PD0 L PD0 <32>
1
@ Q116 D CLK_14M_SIO L PD1
<15> CLK_14M_SIO 8 CLK14 PD1 39 L PD1 <32>
2 CLOCK 40 L PD2
PD2 L PD2 <32>
G 41 L PD3
PD3 L PD3 <32>
S 2N7002_SOT23-3 SIO_GP IO41 21 42 L PD4
PARALLEL I/F
L PD4 <32>
3
<33> SIO_GPIO41 SIO_GP IO42 GPIO41 PD4 L PD5
22 GPIO42 PD5 43 L PD5 <32>
SIO_GP IO43 24 44 L PD6
<31> SIO_GPIO43 GPIO43 PD6 L PD6 <32>
SIO_GP IO44 25 45 L PD7
<11,19,25,27,29,31> PLT_RST# GPIO44 PD7 L PD7 <32>
GPIO
SIO_GP IO45 26 47 LPTSLCT
GPIO45 SLCT LPTSLCT <32>
SIO_GP IO46 27 48 LPTPE
GPIO46 PE LPTPE <32>
28 49 LPTBUSY
GPIO47 BUSY LPTBUSY <32>
SIO_GP IO10 29 50 LP TACK#
GPIO10 ACK# LPTACK# <32>
SIO_GP IO11 30 51 LPTERR#
R P24 SIO_GP IO12 GPIO11/SYSOPT ERROR# LPTA FD# LPTERR# <32>
31 GPIO12/IO_SMI# ALF# 52 LPTAFD# <32>
8 1 SIO_GP IO46 S IO_IRQ 32 53 LPTSTB#
GPIO13/IRQIN1 STROBE# LPTSTB# <32>
7 2 SIO_GP IO45 33
SIO_GP IO44 SIO_GP IO23 GPIO14/IRQIN2
6 3 <27> SIO_GPIO23 34 GPIO23
5 4 SIO_GP IO43
VTR 7 +3VS
10K_0804_8P4R_5% 10
VCC
R P25
57 EPAD POWER VCC 23
VCC 38
C 8 1 S IO_IRQ 46 C
VCC 1 1 1 1
7 2 SIO_GP IO12 C 706 C7 07 C7 08 C7 09
6 3 SIO_GP IO10 LPC47N217N-ABZJ _QFN56
5 4 4.7U_0805_10V4Z
Base I/O Address 2 2 2 2
10K_0804_8P4R_5% 0 = 02Eh
* 1 = 04Eh
0.1U_0402_16V4Z 0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
R5 19
1 2 SIO_GP IO23
10K_0402_5%
R5 20 CLK_PCI_SIO
1 2 SIO_GP IO41 Parallel Port +5VS
1
10K_0402_5% R3 94
2
@ 10_0402_5%
CH751H-40PT_SOD323-2
R5 21 TO IT8305
2
1 2 SIO_GP IO42 D 32
1
1
10K_0402_5% C5 39
@ 18P_0402_50V8J
2 +5VS_PRN
B R5 22 LPTERR# 1 R3 96 2 B
1 2 SIO_GP IO11 4.7K_0402_5%
10K_0402_5%
R P20
LPTPE 1 8
LPTBUSY 2 7
LP TACK# 3 6
LPTSLCT 4 5
2.2K_8P4R_0.05
R P21
L PD3 1 8
L PD2 2 7
L PD1 3 6
L PD0 4 5
2.2K_8P4R_0.05
R P22
L PD7 1 8
L PD6 2 7
L PD5 3 6
L PD4 4 5
2.2K_8P4R_0.05
R P23
LPTSLCTIN# 1 8
LPTA FD# 2 7
LPTINIT# 3 6
LPTSTB# 4 5
2.2K_8P4R_0.05
A A

Super I/O LPC47N217
Cus t om L A-4961P 1 .0
Dat e: T h u r s d a y , A ugus t 27, 2009 Sheet 34 of 54
5 4 3 2 1
+3VS
R397
1 2
1
1M_0402_5%
HP 4/6 R398
VL 680_0402_5%
+1.8VS 1 2
R399 31.6K_0402_1%
2
8
U29A
1 2 1 2 3
P
+5VS +
R400 88.7K_0603_1% R401 10K_0402_5% 1 1 2
O PWR_GD <36,43,44,45>
2VREF_51125 1 2 2VREF_393 2 -
SHORT PADS
G
R402 100K_0402_1% J1
LM393DG_SO8
4
1 2
R404 100K_0402_1% MDC STANDOFF
1
C541 H14 H15 H16 H17
1000P_0402_50V7K HOLEA HOLEA HOLEA HOLEA H18
Q15B HOLEA
3
2 DMN66D0LDW-7_SOT363-6
1
<36> SLP_S3 SLP_S3 5
4
1
R407 4700P_0402_16V7K
1
16.9K_0402_1% C542
2
2
HP 4/6
H1 H2 H3 H4 H5 H6 H7 H34
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
MINI CARD STANDOFF
H30 H31 H32 H33
HOLEA HOLEA HOLEA HOLEA H10 H11 H19 H20 H21
HOLEA HOLEA HOLEA HOLEA HOLEA
1
H26 H27 H28 H29
HOLEA HOLEA HOLEA HOLEA
1
CPU screw hole
14@ ZZZ1
FM1 FM2 FM3 FM4

1 1 1 1
PCB-MB
15.6@ ZZZ2
64@ ZZZ1
PCB-MB
PCB-MB
128@ ZZZ2
PCB-MB

POK CKT
A B C D E
+5VALW TO +5VS +3VALW TO +3VS

+3VALW +3VS
+5VALW +5VS
4.7U_0805_10V4Z
4.7U_0805_10V4Z 1 1 1
1 1 1 Q58 C545 C546
1 Q59 C548 C549 C547 1
8 D S 1
8 1 C550 7 2 0.1U_0603_25V7K
D S 0.1U_0603_25V7K D S 2 2 2
7 D S 2 6 D S 3
6 3 2 2 2 5 4
D S D G 1U_0402_6.3V4Z
5 4
D G 1U_0402_6.3V4Z SI4800BDY_SO8 RU NON 2 R415 1 B+
0.047U_0402_16V4Z
SI4800BDY_SO8 1 1 1 47K_0402_5%
1 1
1
C551 D Q60
C554 C555 RU NON 0.1U_0603_25V7K C553 2 SLP_S3
0.1U_0603_25V7K 4.7U_0805_10V4Z 2 2 C552 2 2N7002_SOT23-3
G
2 2 HP, 4/19 S
3
4.7U_0805_10V4Z
+1.8VS +3VS
D45
2 1
1SS355_SOD323-2
10/22 HP
+1.8V TO +1.8VS +1.2VALW TO +1.2V_HT
+1.8V +1.8VS
+1.2VALW +1.2V_HT
10U_0805_10V4Z 4.7U_0805_10V4Z
Q61 1 2 1 Q62 1 1 1
2 IRF8113PBF_SO8 C556 C557 IRF8113PBF_SO8 C559 C560 2
8 1 C558 8 1 C561
7 2 0.1U_0603_25V7K 7 2 0.1U_0603_25V7K
2 1 2 2 2 2
6 3 6 3
5 5
1U_0402_6.3V4Z 1U_0402_6.3V4Z
1 1 2 R416 1 B+
4
4
1 1 330K_0402_5%
C562 C563
3
0.1U_0603_25V7K C564 C565
1
2 2 1.8VS_ENABLE 1 R418 2 0.1U_0603_25V7K Q12B
B+
1
330K_0402_5% 2 2 DMN66D0LDW-7_SOT363-6
1
1 4.7U_0805_10V4Z R494 5 VLDT_EN#

1
C567 R419 D 470_0402_5% R417

4.7U_0805_10V4Z 2 SLP_S3 820K_0402_5%
4
750K_0402_5% G 1
2
2 S Q64 C566
2
0.01U_0402_25V7K 2N7002_SOT23-3
0.01U_0402_16V7K
2
6
2
Discharge circuit <20,25,31,33,39,46> ADP_PRES
1
Q12A
+5VS +1.8VS +1.2V_HT
2
3 3
R421 R422 R423
470_0805_5% 470_0805_5% 470_0805_5%
+3VALW VL VL
1
HP 5/29
Q14B
1
1
D DMN66D0LDW-7_SOT363-6 R442 R427 R428

SLP_S3 2 Q66
G 100K_0402_5% 100K_0402_5% 100K_0402_5%
S 2N7002_SOT23-3 SLP_S3 5 VLDT_EN#2
3
2
SLP_S5 SLP_S3
<25,30,31,32> SLP_S5 <35> SLP_S3
4
Q14A VLDT_EN#
Q13B
1
3
Q85 D DMN66D0LDW-7_SOT363-6
<21,42> SLP_S5# 2
G
+3VS 2N7002_SOT23-3 S 2 PWR_GD5
<21,31,33,39> SLP_S3# <35,43,44,45> PWR_GD
3
+1.5VS
4
2
Q13A
2
R429
470_0805_5% R536
@ 470_0805_5%
1
1
6
D @
SLP_S3 2 Q103
4 SLP_S3 2 G 4
S 2N7002_SOT23-3
3
1
Q15A
for +1.5VS discharge

DC/DC Circuits
A B C D E
5 4 3 2 1
D D
+5VALW PWR_GD
LM331
Thermal
Protector +CPU_CORE0 +1.2VALW
VCC VR_ON +0.9VP 2A
Page40 ( 35A) TPS51100
AC VIN LDO
Adapter ISL6265 +CPU_CORE_NB +1.2VALW (+0.9V)
in EN0 2VREF_51125
(+CPU_CORE0/ ( 4A)
Page44
Page38
+CPU_CORE_NB)
EN0
ADP_EN# SWITCH +3VALWP 3A Page45 +1.8VP
+1.5VSP 2A
TPS51125 G2992
DC/DC LDO
(3V/5V) PWR_GD (+1.5V)
Page44
B+ +5VALWP 4.5A
51125_PWR Page43
C C
B+
+1.2VALWP 8A +1.2V_HT
TPS51117 +1.1VSP 3A
(1.2V) RT9024
LDO
RPGOOD EN_PSV Page42 PWR_GD (+1.1V)
Page44
B+
+1.8VP 8A
TPS51117
BQ24740 (1.8V) +3VS
Charger +2.5VSP 0.2A
G2916
SLP_S5# EN_PSV Page42
Page39
LDO
+3VS (+2.5V)
Page44
B+
+NB_VDDCP 7A
TPS51117
BATSELB_A (1.0~1.1V)
Battery
Selector PWR_GD EN_PSV Page43
Circuit BATSELB_A#
Battery A Battery B
Page40
B 6 Cell 8 Cell B
SWITCH SWITCH SWITCH Battery Battery

Connector Connector
A Page38 B Page38
BATT
BATT_A
BATT_B
A A

POWER BLOCK DIAGRAM
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C ustom LA-4961P
D ate: Thursday, August 27, 2009 Sheet 37 of 54
5 4 3 2 1
5 4 3 2 1
ADP_SIGNAL
PJP1
4 V- ID 3
5 V-
6
VIN
GND_1 PL1
V+ 1
D 7 SMB3025500YA_2P D
GND_2 A DPIN 1 2
8 GND_3
100P_0402_50V8J
1000P_0402_50V7K
9 GND_4 V+ 2
1
PC3
1
PC1
PC4
FOX_JPD1131-DB371-7F 100P_0402_50V8J PR1
@15K_0402_5%
PD1 PC2
2
@PJSOT24C_SOT23 1000P_0402_50V7K
2
VMB_A BATT_A
PJP2 PL2
1 SMB3025500YA_2P
1
2 2 1 2
3 3
4 4
1
5 5 2 1
6 PR2 1M_0402_1%
6 PC5 PC6
7
2
7 1000P_0402_50V7K 0.01U_0402_50V4Z
8 8
SUYIN_200046MR008G102ZR
100_0402_5%
100P_0402_50V8J
100P_0402_50V8J
1
1
1K_0402_5%
100_0402_5%
C C
1
1
PR6
PR3
PC7
PR5
PC8
PC9
100P_0402_50V8J
2
2
+3VL VL PR88
2
2
69.8K_0402_1%
1 2
1
PR4
100K_0402_5%
PR89 AB1A_DATA <33>
PQ29 100K_0402_1%
2
E
MMBT3906_SOT23-3
<33> THM_MAIN#
2
B
2 AB1A_CLK <33>
D
1
C
PD15 PD16 PD17
1
2 BAV99W T1G_SC70-3 BAV99W T1G_SC70-3 BAV99W T1G_SC70-3

G
1
S
3
PQ30
SSM3K7002FU_SC70-3 PR91 PR90 VL
220K_0402_5% 150K_0402_1% +3VL
2
PH1 under CPU botten side :

2
CPU thermal protection at 90 +-3 degree C

PR92
294K_0402_1%
(Need to be checked)
<46> OCP_ADJ 1 2
B B
VMB_B BATT_B 2REF_51125
PCN1 PL3 VL
SMB3025500YA_2P
1 1 2 PR8
BATT+
@470K_0402_1%
1
2 PR7 1 2 PR10
SMD
1
2
3 1K_0402_5% PH1
SMC @100K_0402_5%
4 1 2 Close to CPU @100K_0603_1%_TSM1A104F4361RZ
B/I PC11 PC10
5
2
TS 1000P_0402_50V7K 0.01U_0402_50V4Z PR12 VL

EN0 <41>
2
6 @150K_0603_1% PU1
1
GND
1 2 1 IN+
100P_0402_50V8J
SUYIN_20163S-06G1-K 5
VCC+ D
1
100_0402_5%
100P_0402_50V8J
2 GND
2
1
100_0402_5%
4 2 PQ1
OUT
1
PR16
P R14
P C28
P R15
PC12 3 G @SSM3K7002FU_SC70-3
@51.1K_0402_1% IN-
P C27
PR11 PC29 @0.022U_0603_25V7K S
3
1K_0402_5% 100P_0402_50V8J 1 2 @LMV331IDCKRG4_SC70-5
2
2
2REF_51125 PR13
1
+3VL
@75K_0402_1%
1
1
PR17 PC13
PR9 @150K_0402_1% @1000P_0402_50V7K
2
210K_0402_1%
2
AB1B_DATA <33>
2
A AB1B_CLK <33> A
<33> THM_TRAVEL#
BAV99WT1G_SC70-3
PJSOT24CW_SOT323
BAV99WT1G_SC70-3
BAV99WT1G_SC70-3
1
1.0
+3VL PD19
DC-IN/ BATTERY CONN
2
1
P D26
P D18
P D20
P D25
PJSOT24CW _SOT323
5 4 3 2 1
5 4 3 2 1
B+
V IN P2 P4 P4
PQ101 PQ102 PQ103

AO4433L_SO8 AO4433L_SO8 PR102 PL101 P1403EVG_SO8
1 8 8 1 0.01_2512_1% HCB2012KF-121T50_0805 1 8
2 7 7 2 1 4 1 2 CHG_B+ 2 7
3 6 6 3 3 6
1
5 5 PC125 PC128 2 3 5
4.7U_0805_25V6M
4.7U_0805_25V6M
4.7U_0805_25V6M
0.1U_0402_25V6 0.1U_0402_25V6
4
4
1
1
1 2 ACDET
+3VL
PC102
PC103
PC104
D PC101 1 2 PR104 PC105 D
2
0.1U_0603_50V7K
0.1U_0603_25V7K PR103 1 2 1U_0603_6.3V6M
2
1
47K_0402_5% 56K_0402_1% 1 2
1 2 PR106
1
PR101 PR105 0_0402_5%
PC108
1
200K_0402_5% 15K_0402_5%
1
PR111 PC107 +3VL PC106
2
0.01U_0402_16V7K @0.1U_0603_25V7K
150K_0402_5% P2
CHG EN#
D
1
6 2
2 CHG_B+
1
PQ105A G PR110
DMN66D0LDW -7 2N SOT363-6 S PQ104 10_0805_5%
LPMD
ACN
CHGEN
ACP
LPREF
ACSET
ACDET
3
SSM3K7002FU_SC70-3 29 1 2
PR109 TP
2
5
VCC1_PWRGD <33,41> 0_0402_5% 1U_0805_25V6K
1 2 8 28 1 2 PQ106
<21,31,33,36> SLP_S3#
3 1
IADSLP PVCC PC109 PC110 AON7408L_DFN8-5

PQ105B 0.1U_0402_10V7K
DMN66D0LDW -7 2N SOT363-6 9 27 BST_CHG 1 2 1 2
AGND BTST PR121 4
VL BQ24740VREF PU101 0_0402_5%
5
ADP_EN <33>
PR138 1
PC111
2 10 VREF
BQ24740RHDR_QFN28_5X5
HIDRV 26 DH_CHG 1
PR128
2
PL102 PR112
BATT
1 2
4
100K_0402_5% 1U_0603_6.3V6M +3VL 0_0402_5% 10U_LF919AS-100M-P3_4.5A_20% 0.01_1206_1%
3
2
1
11 25 LX_CHG 1 2 1 2
VDAC PH
PR139
5
6
7
8
1 2
BATT P2 PR135 1M_0402_5% VA DJ RE GN
PR113 12 VADJ REGN 24 2 1
8
C 100K_0402_1% PD102 C
453K_0402_1%
4.7U_0805_25V6M
4.7U_0805_25V6M
4.7U_0805_25V6M
4.7U_0805_25V6M
@4.7U_0805_25V6M
1 2 3 LL4148 LL-34
P
+ DL_ CHG
1 <33> BAT_PW M_OUT 13 23
2
O EXTPWR LODRV
1
1 2 2 - 1 2 4
G
PC112
PC113
PC114
PC115
PC126
PR136 PU10A PR114
1
23.7K_0402_1%
100K_0402_1% LM393DG_SO8 422K_0402_1% 14 22 PQ107

4
2
ISYNSET PGND
1
PR115 AO4468L_SO8
DPMDET
1
IADAPT
1M_0402_1% PC118 1 2
SRSET
CELLS
3
2
1
1
PR140
PC116 1U_0603_10V6K PC117
SRN
SRP
BAT
1U_0603_6.3V6M PR116 0.1U_0402_10V7K
CELLS <33>
2
PR137 22.6K_0402_5%
2
2
24K_0603_1%
15
16
17
18
19
20
21
1 2 PR117
100K_0402_5%
BATT
IADAPT
PR118
1
P2
1 2
+3VL <46> IADAPT
1
255K_0402_1%
PC119
AC Detector
1
100P_0402_50V8J
2
PR119
200K_0402_1% PR120
High 13.277
SRSET <46>
4.7K_0402_5% Low 10.708
8
2
1
5 2 1 CHGCTRL <33>
P
+ PR122
O 7
1
1
6 ADP_PRES <20,25,31,33,36,46> 210K_0402_1% PC120 PC121
2
-
G
1
PU103B PR124 0.1U_0603_50V7K @0.1U_0603_25V7K
PR123
41.2K_0402_1% LM393DG_SO8 147K_0402_1%
4
B PC122 B
2
1U_0603_6.3V6M
2
2VREF_51125
+3VL +3VL
1 2 +3VL 1
PR125 PR143
604K_0402_1% PR133 11K_0402_5% PU104 VL
100K_0402_5% IADAPT 1 2 1 +IN
2
3
V IN P2 VL E
2
1
B
PR142 2 PQ108 5
V+
76.8K_0402_1%
@76.8K_0402_1%
22K_0402_5% MMBT3906_SOT23-3 2 V-
1
C
PC127
2
1
PR141
PR127
PR134 1U_0603_10V6K 4 PMC <33>

1
220K_0402_5% OUT
3 -IN
PC124
2
0.1U_0402_10V7K 1 2 ACDET
2
2
8
CHG EN# PR129 LMV321AS5X_G_SOT23-5
1
3 PR130 PD103 47K_0402_5%
P
+ D
1
1 1K_0402_5% 1SS355_SOD323-2 PR132

O AC_ADP_PRES <33>
1
2 CH GCTRL 1 2 2 1 2 300K_0402_5%
-
G
PU103A G 1 2
PR131
LM393DG_SO8 S PQ109
4
2
2
1
10K_0603_0.1% BSS138_SOT23-3 PR145
1
PR144 39.2K_0402_1%
2
PC123 49.9K_0402_1%
2VREF_51125 0.047U_0402_16V7K PR126
2
A A
Note: X7R type 470K_0402_5%
1
2
Charge Detector
High 17.614 Security Classification Compal Secret Data Compal Electronics, Inc.
Low 17.201 Issued Date 2008/09/15 Deciphered Date 2009/09/15 Title
Charger
5 4 3 2 1
5 4 3 2 1
1 2 Vin 51125_PWR
PR18
1M_0402_5% 2 1 1 2
2VREF_51125
VL +3VL PD22 PR34
BATT 1SS355_SOD323-2 0_0402_5%
1
1
BATT_A
1
PR93 PD2
1
10K_0402_5% PR20 CH715FPT_SC70

PC30 100K_0402_5% BATT_B 2
2
2
8
PR19 0.1U_0603_50V4Z 1
2
D 93.1K_0603_1% D
5 3
P
+
7
2
O
6 -
1
PU10B
1
1
LM393DG_SO8
PR21 4 PC15 PD8
20K_0402_1% 0.1U_0603_50V4Z RLZ27V
BAT_ALARM <33>
2
2
1
S
PR94 3 1 BATT_IN
D
2 CFET_B
<33> LATCH
8.06K_0402_1%
G PQ3
PQ31 BSS84LT1G_SOT23-3
G
S
2
2
SSM3K7002FU_SC70-3
BATT
C C
1
PR28
470K_0402_5%
1
D
BATT_IN2
1
PR29 G
2 470K_0402_5% S PQ7
3
PQ8 SSM3K7002FU_SC70-3
1
PMBT2222A_SOT23-3
3
1
PR30
1
<46> CFET_A 10K_0402_5% D
1
CFET_A 1 2 2
G PR31
2
PD5 PD6 S PQ9 4.7K_0402_5%
3
PR32 1SS355_SOD323-2 SX34H_SMA SSM3K7002FU_SC70-3
1
<33> FET_A 10K_0402_5% D
1 2
2
PQ10
BATT_A_P
1 2 2
G SSM3K7002FU_SC70-3
S
4
1
1
D
5 5
BATT_IN 2 PQ11 3 6 6 3 PR33
G SSM3K7002FU_SC70-3 2 7 7 2 470K_0402_5%
S 1 8 8 1
3
BATT BATT_A
2
PQ12 PQ13
P1403EVG_SO8 P1403EVG_SO8
B B
PQ15 PQ14
AO4433L_SO8 AO4433L_SO8 BATT_B
1
1 8 8 1
PMBT2222A_SOT23-3
2 7 7 2 PR35
470K_0402_5%
3 6 6 3 470K_0402_5%
PR36 5 5
2
470K_0402_5%
2
BATT_B_P
4
4
PR39
2
1
PQ17
2
1
1 2
PR41
3
1
PD7 4.7K_0402_5%
PR42 SX34H_SMA
10K_0402_5% 1 2
2
CFET_B PD9
2
1SS355_SOD323-2
1
D
1
<33> FET_B D
2
1 2 2 G
PR44 G S PQ20
3
10K_0402_5% S PQ19 SSM3K7002FU_SC70-3
3
SSM3K7002FU_SC70-3
1
D
BATT_IN2
1
D G
A BATT_IN A
2 S PQ21
3
G SSM3K7002FU_SC70-3
S PQ22
3
SSM3K7002FU_SC70-3

Battery selector
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-4961P
5 4 3 2 1
5 4 3 2 1
2VREF_51125
1
PC302
1U_0603_6.3V6M
2
D D
51125_PW R
PR301 PR302
13.7K_0402_1% 30.9K_0402_1%
+3VALWP 1 2 1 2 +5VALWP
1
PD306
1SS355_SOD323-2 PR303 PR304
B+ B++
20K_0402_1% 20K_0402_1%
B++
PL301 1 2 1 2
2
HCB2012KF-121T50_0805
1 2 +3VLP
ENTRIP2
ENTRIP1
0.1U_0603_50V7K
3900P_0402_50V7K
0.1U_0603_50V7K
3900P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PR305 PR306
95.3K_0402_1% 90.9K_0402_1%
1
1
1 2 1 2
PC317
PC301
PC303
PC318
PC304
PC305
PC306
2
2
5
5
1
PC307
ENTRIP2
VFB2
TONSEL
VFB1
ENTRIP1
VREF
PQ301 10U_0805_6.3V6M 25
AON7408L_DFN8-5 P PAD
2
4UG1_3V 7 VO2 VO1 24 4
PQ302
C 8 23 PR308 PC309 AON7408L_DFN8-5 C
VREG3 PGOOD 0_0402_5% 0.1U_0402_10V7K
PR307
PR309 1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2 PR310
1
2
3
3
2
1
0_0402_5% VBST2 VBST1 0_0402_5%
PC308 0_0402_5%
PL302 1 2 0.1U_0402_10V7K UG_3V 10 DRVH2 DRVH1 21 UG_5V 1 2 PL303
4.7UH_PCMC063T-4R7MN_5.5A_20% 4.7UH_PCMC063T-4R7MN_5.5A_20%
2 1 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP LL2 LL1
5
5
6
7
8
LG_3V 12 19 LG_5V
DRVL2 DRVL1
1
SKIPSEL
1
PR312
VREG5
VCLK
1 PR311 PR313 +3VL 4.7_1206_5% 1
GND
EN0
VIN
4.7_1206_5% @1M_0402_1%
+ 4 1 2 4 +
B++
2
PU301 PC311
2
13
14
15
16
17
18
1
PC310 PQ304 TPS51125RGER_QFN24_4X4 150U_B2_6.3VM
1
150U_B2_6.3VM 2 AON7406L_DFN8-5 +5VLP
2
1
PR314 PQ303
1
2
3
3
2
1
PC312 100K_0402_5% AO4712L_SO8 PC313
2
1000P_0603_50V7K 1000P_0603_50V7K
2
2
RPGOOD <42>
51125_PW R
1
PR315 2VREF_51125
620K_0402_5% PC315
2
PC314 22U_0805_6.3V6M +3VEXTLP
2
0.1U_0603_25V7K
B B
+5VLP
PU303
1
ENTRIP1
ENTRIP2
1 PC320
VIN
220K_0402_5%
1
1
PJP301 PC319 PR322 10U_0805_6.3V6M
5
2
1U_0603_10V6K VOUT 64.9K_0402_1%
+5VALW P 1 2 +5VALW (4.5A,180mils ,Via NO.= 9) 2 GND
PR325
PQ305
2
SSM3K7002FU_SC70-3 P2 4
PAD-OPEN 4x4m FB
3
2
D D EN
1
1
PJP303
VL PR319
2 1 2 2 PQ306 1 2 +3VALW (3A,120mils ,Via NO.= 6) DEBUG_KBCRST
+3VALW P
1
G @0_0402_5% G SSM3K7002FU_SC70-3 APL5317 PR323
S S 20K_0402_1%
PAD-OPEN 4x4m
3
3
1
PR320 +5VLP PR326
2
PJP302 255K_0402_1% 470K_0402_5%
1
PR318 2 1 PU302
+3VLP +VREG3_51125
2
100K_0402_5% PR316 1 PR324
100K_0402_5% PAD-OPEN 2x2m +IN 16.5K_0402_1%
PR328
2
B+
1
1 2 1 2 VL V+ 5
11.5K_0402_1%
0_0402_5% PJP305 PC321 2 PR327
2
V-
PR321
+3VEXTLP 2 1 +3VL
1
PR317 4 1 2 2 1
2
D OUT
1
330K_0402_5% PAD-OPEN 2x2m 1U_0603_10V6K 3
2
PR329 -IN 680K_0402_5% PD304
2 2 1
100K_0402_5% G KBC_PWR_ON <33> PJP304 1SS355_SOD323-2
S 2 1 LMV321AS5X_G_SOT23-5
+5VLP VL
2
D PR331
1
PQ307 1 2
2 SSM3K7002FU_SC70-3 PAD-OPEN 2x2m
A 100K_0402_5% A
G
1
S 2 1
3
DEBUG_KBCRST <29>
1
PR330 PQ308
60.4K_0402_5%SSM3K7002FU_SC70-3 PD303
PC322 1SS355_SOD323-2
2
0.1U_0402_25V6 2 1 Security Classification Compal Secret Data Compal Electronics, Inc.

2
VCC1_PWRGD <33,39>
PD305 2008/09/15 2009/09/15 Title
1SS355_SOD323-2
Issued Date Deciphered Date
EN0 <38> THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3.3VALWP/5VALWP
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C ustom LA-4961P 1.0
Enable +5VALWP when DC mode for S5 power consumption MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
5 4 3 2 1
PR401 PL401
2 1 1.2V_B+
<41> RPGOOD
HCB1608KF-121T30_0603
0_0402_5% PC401
D 1 2 B+ D
1
@1000P_0402_50V7K
0.1U_0603_50V7K
0.1U_0402_25V6
4.7U_0805_25V6M
4.7U_0805_25V6M
2
1
PC437
PC402
PC403
PC404
PR402 PC405
2
2.2_0402_5% 0.1U_0402_10V7K
5
6
7
8
BST_1.2V 1 2 1 2
D
D
D
D
15
14
1
PU401 PQ401
G
S
S
S
PR403 PR404 AO4466L_SO8
EN_PSV
TP
VBST
255K_0402_1% 0_0402_5% +1.2VALWP
4
3
2
1
1 2 2 13 UG_1.2V 1 2 UG1_1.2V PL402
TON DRVH 2.2UH_PCMC063T-2R2MN_8A_20%
+1.2VALW P 1 2 3 12 LX_1.2V 1 2
PR405 0_0402_5% VOUT LL
+5VALW 1 PR407 12.1K_0402_1%
+5VALW 2 4 V5FILT TRIP 11 1 2
5
6
7
8
1
PR406 PR408
+1.2VALW P 1 2 5 10 +5VALW PR409
316_0402_1% VFB V5DRV
1
6.49K_0402_1% 4.7_1206_5% 1
1
1
6 9 LG_1.2V
PGOOD DRVL
1
PGND
PC406 PC407 PR434 +
GND
2
1U_0603_10V6K 1 2 4.7U_0805_10V6K 4 @1K_0402_5%
2
2
PC410 PC408 PC409
2
1
@10P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 PC411 @4.7U_0805_6.3V6K 2 220U_D2_4VY_R25M
8
1
1000P_0603_50V7K
C PR410 PQ402 C
3
2
1
2
10K_0603_0.1% FDS6690AS_G_SO8
PR431
0_0402_5%
2
1 2 PM_RSMRST# <21,33>
PJP401
+1.2VALW P 1 2 +1.2VALW
PAD-OPEN 3x3m
(8A,320mils ,Via NO.= 16)
PR411 PL403
2 1 1.8V_B+
<21,36> SLP_S5# HCB1608KF-121T30_0603
0_0402_5% PC412 1 2 B+
1
@1000P_0402_50V7K
0.1U_0603_50V7K
0.1U_0402_25V6
4.7U_0805_25V6M
4.7U_0805_25V6M
2
1
PC413
PC414
PC415
PC416
PR412 PC417
2
2.2_0402_5% 0.1U_0402_10V7K
5
6
7
8
BST_1.8V 1 2 1 2
D
D
D
D
15
14
1
B PU402 PQ403 B
G
S
S
S
PR413 PR415 AO4466L_SO8
EN_PSV
TP
VBST
255K_0402_1% 0_0402_5% +1.8VP
4
3
2
1
1 2 2 13 UG_1.8V 1 2 UG1_1.8V PL404
+1.8VP 1 2 3 12 LX_1.8V 1 2
PR414 0_0402_5% VOUT LL
+5VALW 1 PR417 11.5K_0402_1%
2 4 V5FILT TRIP 11 1 2
5
6
7
8
1
PR416 PR418
+1.8VP 1 2 5 10 +5VALW PR419
316_0402_1% VFB V5DRV 4.7_1206_5%
14.3K_0402_1% 1
1
6 9 LG_1.8V
PGOOD DRVL
1
PGND
PC418 PC419 +
GND
2
1U_0603_10V6K 1 2 4.7U_0805_10V6K 4 PC421
2
PC420 @4.7U_0805_6.3V6K PC422
2
1
@10P_0402_50V8J TPS51117RGYR_QFN14_3.5x3.5 PC423 2 220U_D2_4VY_R25M
7
8
1
1000P_0603_50V7K
PR420 PQ404
3
2
1
2
10K_0603_0.1% FDS6690AS_G_SO8
2
PJP402
+1.8VP 1 2 +1.8V (8A,320mils ,Via NO.= 16)

A PAD-OPEN 4x4m A

1.2VALWP/1.8VP
5 4 3 2 1
5 4 3 2 1
VDDC_B+ PL405
1 2
<35,36,44,45> PWR_GD PR421 HCB1608KF-121T30_0603
150K_0402_5% PC424 1 2 B+
1
D 0.01U_0402_16V7K D
0.1U_0603_50V7K
0.1U_0402_25V6
4.7U_0805_25V6M
4.7U_0805_25V6M
2
1
PC425
PC426
PC427
PC428
PR422 PC429
2
2.2_0402_5% 0.1U_0402_10V7K
5
6
7
8
BST_VDDC1 2 1 2
D
D
D
D
15
14
1
PU403 PQ405
G
S
S
S
PR423 PR424 AO4466L_SO8
EN_PSV
TP
VBST
255K_0402_1% 0_0402_5% +NB_VDDCP
4
3
2
1
1 2 2 13 UG_V DDC 1 2 UG1 _VDDC PL406
+NB_VDDCP 1 2 3 12 LX_VDDC 1 2
PR425 0_0402_5% VOUT LL
PR427 12.4K_0402_1%
+5VALW 1 2 4 V5FILT TRIP 11 1 2
5
6
7
8
1
PR426 +5VALW PR429
316_0402_1% 5 VFB V5DRV 10
4.7_1206_5% 1
1
1
6 9 LG _VDDC
PGOOD DRVL
1
PGND
PC430 PC431 +
GND
2
1U_0603_10V6K 4.7U_0805_10V6K 4
2
2
PC433 PC434
2
1
TPS51117RGYR_QFN14_3.5x3.5 PQ406 PC435 4.7U_0805_6.3V6K 2 220U_D2_4VY_R25M
8
AO4712L_SO8 1000P_0603_50V7K
3
2
1
2
C C
PJP403
+NB_VDDCP 1 2 +NB_VDDC (7A,280mils ,Via NO.= 14)

PAD-OPEN 4x4m
PR428 PR433 PR432

10K_0402_1% 191K_0402_1% 16.2K_0402_1%
1 2 1 2 1 2
+NB_VDDCP DYN_PWR_EN <11>
1
PR430 2
23.7K_0402_1% DYN_PWR_EN NB_VDDC
PC436 PC432
2
1500P_0402_50V7K 4700P_0402_16V7K 0 1.1

2
B B
1 1.0
A A

NB_VDDC
5 4 3 2 1
5 4 3 2 1
+1.8VP
+5VALW PU602
1 VIN VCNTL 6 +5VALW
10U_0805_6.3V6M
@10U_0805_10V4Z
1
+1.8V 2 5
GND NC
PR607
1
3 VREF NC 7
1
16K_0402_5%
PC605
PC606
+5VALW
1
PC608 PR603 PC607
4 8
2
1U_0603_6.3V6M 200_0402_1% VOUT NC 1U_0603_10V6K D
D
2
PU601 9
2
TP
1
+1.2VALW 1 10
VDDQSNS VIN +5VALW G2992F1U_SO8
PR606
2 VLDOIN S5 9
10K_0402_5%
10U_0805_6.3V6M
@10U_0805_10V4Z
DMN66D0LDW-7 2N SOT363-6
0.1U_0402_10V7K
3 8
+1.5VSP
2
VTT GND
1
1
3
4 7 PC602 PR605 PR608
PGND S3
PC603
PC604
1U_0603_10V6K 0_0402_5% 1K_0402_1%
1
5 6 1 2
<35,36,43,45> PWR_GD
2
2
VTTSNS VTTREF PC612
5
PC611
11 10U_0805_6.3V6M
2
TP
PQ602B
4
6
TPS51100DGQR_MSOP10
+0.9VP
1
PR616 +1.2VALW 2
1
PC609 C PJP602
1K_0402_5%
1
10U_0805_6.3V6M 2 1 2 1 2 +1.5VS (2A,80mils ,Via NO.= 4)
+1.5VSP
2
1
B PQ602A
E PQ604 PC610 DMN66D0LDW -7 2N SOT363-6
PAD-OPEN 3x3m
2
MMBT3904W H_SOT323-3 @0.1U_0402_16V7K
+1.8V
PJP601
+0.9VP 1 2 +0.9V
1 2 +V_DDR_MCH_REF <8,9>
C PR610 C
PAD-OPEN 3x3m
1
0_0402_5%
(2A,80mils ,Via NO.= 4) PC623
2.2U_0603_6.3V6K
2
+1.2V_HT +3VS +2.5VSP
+5VALW
10U_0805_6.3V6M
10U_0805_6.3V6M
PU604
PC615 G916T1UF_SOT23-5
1
1U_0603_10V6K 1 5
IN OUT
5
1
PC613
PC614
PR612
2
0_0402_5% PU603 1 2 3 4 PR613

2
2
PW R_GD 1 PR611 SHDN# SET 1K_0402_1%
2 1 EN VCC 6
10K_0402_5% GND
1
1
2 5 4
2
GND DRI PC616 2 PC617
1
PC618 3 4 10U_0805_6.3V6M 10U_0805_6.3V6M

2
2
FB PGOOD
1
@0.1U_0402_16V7K PQ603
RT9024GE_SOT23-6 PC619 SI7230DN-T1-GE3_PAK1212-8 PR615
2
3
2
1
1000P_0402_50V7K 1K_0402_1%
PR618
1 2
+1.1VSP
2
2.2_0402_5%
1
B B
1
1 2
PC622 PR617 PC620 PC621
1000P_0402_50V7K @0_0402_5% 10U_0805_6.3V6M 10U_0805_6.3V6M
2
2 1+1.1VSP PJP604
2
PR609 2 1 +2.5VS (200mA,10mils ,Via NO.= 1)

+2.5VSP
1
3.92K_0402_1%
PR614 PAD-OPEN 2x2m
10K_0402_1%
SYS_PWRGD <33,45>
2
PJP603
+1.1VSP 1 2 +1.1VS (3A,120mils ,Via NO.= 6)

PAD-OPEN 3x3m
A A

0.9V/1.5VS/1.1VS/2.5VS
D ate: T h u r sd ay, A u g u st 2 7 , 2 0 0 9 Sheet 44 of 54
5 4 3 2 1
5 4 3 2 1
PL201
4.7UH_PCMC063T-4R7MN_5.5A_20%
+CPU_CORE_NB 2 1
1
10U_0805_6.3V6M
1
+
PC201
<6> VDD_NB_FB_H PC202 1 1 PQ202
220U_B_2.5VM_R35M 2 2 AON7408L_DFN8-5
2
2 3 5 3 5 CPU_B+
<6> VDD_NB_FB_L
3900P_0402_50V7K
PC242
PC203
0.1U_0603_50V7K
PQ201
4
AON7406L_DFN8-5
1
2
D D
1
0_0402_5%
0_0402_5%
PR201 PC204
2
PR202
PR203
0_0402_5% 4.7U_0805_25V6-K
PR204
UGATE_NB 1
22K_0402_1%
1PHASE_NB
LGATE_NB
1 2
1 2
PC205 PR205
1000P_0402_50V7K 2_0402_5%
1 2 PR217
+5VALW 4.7_1206_5%
1 2
1
B+
44.2K_0402_1% 1200P_0402_50V7K
PC206 PL202
33P_0402_50V8J
0.1U_0402_16V7K PC207 HCB2012KF-121T50_0805
CPU_B+
15K_0402_1%
0.1U_0402_16V7K PC227 2 1
BOOT_NB1 2
1
PC208
PC209
1000P_0603_50V7K PL205
2
1000P_0402_50V7K
+5VALW
PR206
HCB2012KF-121T50_0805
1
PR207 2 1
2_0402_5% 1
@47U_25V_M
CPU_B+ 1 2
3900P_0402_50V7K
PC220
+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0603_50V7K
PC221
5
6
7
8
PC223
1 2.2U_0603_6.3V6K
1
PC212
PC213
PC214
PC215
PC222
PC216
2
2
PR208
PC210 PR209 PQ204
0.1U_0603_25V7K 1_0603_5% AO4474L_SO8
2
2
1 2
+5VS 4
2
1 2
+3VS
UGATE_NB
PHASE_NB
C C
LGATE_NB
PR210
VSEN_NB
RTN_NB
0_0402_5%
1 2
BOOT_NB
3
2
1
PR211
@0_0402_5% 2.2_0603_5% 0.22U_0603_10V7K UGATE0_1 PL203
1 2 PR214 PC224 0.36UH_PCMC104T-R36MN1R17_30A_20%
1
10K_0402_1%
1 2 1 2 2 1
48
47
46
45
44
43
42
41
40
39
38
37
+CPU_CORE_0
16.5K_0402_1%
PR212 PU201
1
4.7_1206_5%
PR213
@10K_0402_5%
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
VIN
VCC
PR216
PR218
BOOT0
1000P_0603_50V7K
1 2
2
1 36 0_0603_5% PR219
OFS/VFIXEN BOOT_NB PR215 4.02k_0603_1%
1 2
2
<33,44> SYS_PWRGD 2 35 4 1 2
PGOOD BOOT0
PC225
3 34 UGATE0
<6,21,33> SB_PWRGD PWROK UGATE0
1 2
2
PR221 1 2 0_0402_5% SVD 4 33 PHASE0
<6> CPU_SVD
3
2
1
SVD PHASE0 PQ205 ISP 0 PC226
PR222 1 2 0_0402_5% SVC 5 32 TPCA8028-H_SOP-ADVANCE8-5 0.1U_0603_25V7K
<6> CPU_SVC SVC PGND0
6 31 LGATE0
<35,36,43,44> PWR_GD ENABLE LGATE0
PR223 PR224
1 2 1 2 7 30 CPU_B+
RBIAS PVCC
3900P_0402_50V7K
0.1U_0603_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
21.5K_0402_1% 95.3K_0402_1% 8 29 LGATE1
OCSET LGATE1
5
6
7
8
1
PC228
PC229
PC230
PC231
PC232
PC233
PR225 PC235 9 28 PQ207
VDIFF0 ISL6265AIRZ-T_QFN48_6X6 PGND1 AO4474L_SO8
1 2 1 2
2
10 27 PHASE1
255_0402_1% 4700P_0402_25V7K FB0 PHASE1 PR226
PR227 11 26 UGATE1 1 2 UGATE1_1 4
B COMP0 UGATE1 0_0603_5% B
1 2
12 25 BOOT1 1 2 1 2
1K_0402_1% VW0 BOOT1 PR228
COMP1
VDIFF1
VSEN0
VSEN1
RTN0
RTN1
2.2_0603_5% PC236
ISN0
ISN1
ISP0
VW1
ISP1
3
2
1
FB1
0.22U_0603_10V7K 0.36UH_PCMC104T-R36MN1R17_30A_20%
TP
PR229 PC237 2 1 +CPU_CORE_0

1 2 1 2 PL204
13
14
15
16
17
18
19
20
21
22
23
24
49
16.5K_0402_1%
1
1
4.7_1206_5%
54.9K_0402_1% 1200P_0402_50V7K PR232
VSEN0
PR230
PR231
+CPU_CORE_0
1 2 1 2
RTN0
RTN1
ISP 0
PC239
180P_0402_50V8J 6.81K_0402_1% +CPU_CORE_0
4
1 2
2
ISP 1 PR233
@1000P_0402_50V7K
1 2 4.02k_0603_1%
PC240 PC238 1 2
1000P_0402_50V7K 1000P_0603_50V7K
3
2
1
2
PQ206 1 2
PC244 TPCA8028-H_SOP-ADVANCE8-5
PC245
1 2 1000P_0402_50V7K PC241
@1000P_0402_50V7K
<6> CPU_VDD0_FB_H PR234 ISP 0.1U_0603_25V7K

1
1
0_0402_5%
1
2
2
PC247
1 2
<6> CPU_VDD0_FB_L PR237
1
0_0402_5%
2
A A
+1.8V 1 2
PR240
1K_0402_5%

CPU_CORE
5 4 3 2 1
5 4 3 2 1
BQ24740VREF
1
PR50
165K_0402_1%
PC21
2
0.22U_0603_10V7K
1 2
PU12 +5VS
0.01U_0402_16V7K
<39> IADAPT 1 2 1 +IN
D PR51 D
10K_0402_1% 5
V+
<40> CFET_A 1 2 2 V-
P C31
PR95
150K_0402_5% 4
OUT
3
2
-IN
2
G
PQ33
1
BSS138_SOT23-3
1 3 3 1 LMV321AS5X_G_SOT23-5
1
PR52
D
D
S
D
1
PQ32 2K_0402_5%
2 BSS138_SOT23-3 PR49
39> ADP_PRES
2
G OCP_ADJ <38> 100K_0402_1%
S PQ34
3
2
SSM3K7002FU_SC70-3
PD11
1SS355_SOD323-2
1 2 H_PROCHOT# <4,6>
1
ADP_SIGNAL PD21 PR57
1SS355_SOD323-2 0_0402_5%
D
1 2 3 1 2 1 D
1
3.9K_0402_5%
PR58 PQ24
1
100_0402_5% NDS0610_G_SOT23-3 1 2
P R59
3900P_0402_50V7K
G
G
2
SRSET <39> S
3
PQ25
1
2
P C23
C SSM3K7002FU_SC70-3
2
V IN PQ26 PR63
1 2 2
C PR60 B MMBT3904W H_SOT323-3 @0_0402_5% C
100K_0402_5% E 1 2
<33> OCP
3
1
1
PR62 PR75 PR64
8.06K_0402_1% 68K_0402_1% 100_0402_5% PR65
27.4K_0402_1%
2
2
OC P_A_IN
OCP_IN_ADC <33>
1
1
PR72
33K_0402_1% PC32
PD23 PD24 PR66 0.01U_0402_16V7K
2
3
E +3VL 1SS355_SOD323-2 RLZ4.7B_LL34 100K_0402_5%

2
B
2 2 1 PR68
2
ADP_ID_ADC <33> 200K_0402_5%
1
C
PQ35 1 2
1
MMBT3906_SOT23-3 PR61 PR79

8.66K_0402_1% 4.7K_0402_1% +3VL
VL
+3VL
2
1
1
PC26 PR74
PR71 10U_0805_10V6K 10K_0402_5%
2
100K_0402_5%
8
LM393DG_SO8
2
3
P
2
B 2VREF_51125 +3VL + B
1 2 O 1
2 -
G
1M_0402_5%
1
PR84 PU14A
4
1
1
PR69
PR67 130K_0402_1% PR70
45.3K_0402_1% 47K_0402_1% PR73
8
LM393DG_SO8 100K_0402_5%
2
5
P
2
2
+
O 7 ADP_DET# <33>
1
1 2 6 -
G
PR82
10K_0402_1% 10K_0402_5% PU14B
4
PR85
2
A A

ADP_OCP
5 4 3 2 1
5 4 3 2 1
Version change list (P.I.R. List) Power section Page 1 of 1
Item Date Phase Reason for change PG# Modify List
1 2008/12/11 DB1-->DB2 BATCON circuit is removed due to SMSc 1098 design. 40 Delete PD10, PR45 and PU9
2 2009/01/16 DB2-->SI1 Modify circuit for Debug board 40 Change PR34 from 100 ohm to 0 ohm
3 2009/01/16 DB2-->SI1 Improve DDR termination power rail efficiency 44 Change DDR termination solution from G2992 to TPS51100
4 2009/01/22 DB2-->SI1 Modify the charger funtion 39 Modify the watch-dog circuit
5 2009/02/03 DB2-->SI1 Modify the Vin/Charge detector 39 Fine tune the trigger point
D D
6 2009/02/03 DB2-->SI1 Modify the watch-dog sequence 39 Change PR133.1 and PQ108.3 to +3VL
7 2009/02/03 DB2-->SI1 Fine tune Power monitor setting 39 Change PR143 from 100 to 11K
Change PR145 from 33K to 39.2K
8 2009/02/10 DB2-->SI1 Additional +3VL for KBC ADC accuracy 41 Add external +3VL LDO
9 2009/02/18 DB2-->SI1 Add +V_DDR_MCH_REF net 44 Add +V_DDR_MCH_REF net
10 2009/02/19 DB2-->SI1 For EMI request 39 Add PC125 and PC128 as 0.1u
11 2009/02/19 DB2-->SI1 Adjust NB_VDDC between 0.95V and 1.1V 43 Change PR430 to 23.7K_0402_1% and PR433 to 191K_0402_1%
(instead of 1.0V and 1.1V).
12 2009/02/20 DB2-->SI1 For EMI request 41 3V/5V

PR311/PC312:4.7ohm/ 1000pF
PC317/PC301:0.1uF/ 3900pF
PR312/PC313:4.7ohm/ 1000pF
PC318/PC304:0.1uF/ 3900pF
45 CPU CORE
PR217/PC227:4.7ohm/ 1000pF
PC242/PC203:0.1uF/ 3900pF
PR216/PC225:4.7ohm/ 1000pF
PC216/PC222:0.1uF/ 3900pF
PR230/PC238:4.7ohm/ 1000pF
PC233/PC232:0.1uF/ 3900pF
14 2009/04/07 SI1-->SI2 For HP's request, 41 Add PD306 as 1SS355

add a diode which connects the B++ and 51125_PWR
15 2009/04/09 SI1-->SI2 To improve the power efficiency when S5 under DC mode, 41 Change PQ305 from 2N7002KDW-2N_SOT363 to SSM3K7002FU_SC70
Re-connect the EN signal (ENTRIP1/2) to 2 singal N-MOSFET Add PQ306 as SSM3K7002FU_SC70-3
C
16 2009/04/14 SI1-->SI2 Enable +5VALWP when DC mode 41 Add PR318 as 100K which is the pull high of PQ305.3 to VL C
Connect PQ305.3 to DEBUG_KBCRST
17 2009/04/16 SI1-->SI2 For EMI request 41 Change PD18 and PD19 from BAV99 to PJSOT24CW
Delete PD20
18 2009/04/24 SI1-->SI2 Fine tune NB_VDDC power on sequence 43 Change PR421 from 10K to 150K
Change PC424 from 1000P to 0.01u
19 2009/04/24 SI1-->SI2 Travel battery can not be detected issue 38 Change PR9 from 100K to 210K
20 2009/04/24 SI1-->SI2 For RF request 42 Add PC413,PC425 and PC437 as 0.1u

43 Add PR409,PR419 and PR429 as 4.7 ohm
Add PC411,PC423 and PC435 as 1000pF
21 2009/05/25 SI2-->PV For S5 power consumption, 41 Add PR319 as 0

reserve additional circuit to enable +5VALWP at battery mode PQ308 as SSM3K7220FU
PR329 as 100K
PR330 as 15K
PC322 as 0.01u
Resserve PR328
22 2009/05/25 SI2-->PV For AirLine adapter detection issue 39 Un-install PR127

Add PR141 as 78.6K between Vin and PU103.3
Change net name AC_AND_CHG to AC_ADP_PRES
23 2009/05/29 SI2-->PV For HP request 42 Add a serial resistor (0ohm install) between pin 6 of PU401
and signal PM_RSMRST#.
24 2009/05/29 SI2-->PV Because table of AC adapters has been expanded. 46 Change PR62 to 8.06K_1%
PR61 to 8.66K_1%
PR67 to 45.3K_1%
25 2009/05/30 SI2-->PV Fine tune OCP setting 46 Change PR49 to 100K
26 2009/06/05 SI2-->PV Enable +5VALW at S5 when battery mode 41 Uninstall PR319

B Add PR328 as 0 B
27 2009/06/06 SI2-->PV For EMI request (had been implemented at SI2) 42 Change PR402,PR412 from 0 to 2.2
Add PR409,PR419 as 4.7
PC411,PC423 as 1000p
PC413,PC437 as 0.1u_0603
PC402,PC414 as 0.1u_0402
43 Change PR422 from 0 to 2.2
Add PR429 as 4.7
PC435 as 1000p
PC425 as 0.1u_0603
PC426 as 0.1u_0402
28 2009/06/06 SI2-->PV Fine tune power sequence for NB_VDDC 43 Change PR421 from 10K to 150K
(had been impelemented at SI2) PC424 from 1000p to 0.01u
29 2009/06/06 SI2-->PV Ensure the THM_MAIN# level lower enough 38 Change PR9 from 100K to 210K
when main battery be inserted (had been impelemented at SI2)
30 2009/06/09 SI2-->PV For HP request 44 Change PQ604 from 2N7002 to MMBT3904

Add PR616 as 10K
31 2009/06/09 SI2-->PV For ESD request 38 Add PQ20, PQ25 and PQ26 as BAV99
32 2009/06/26 SI2-->PV For HP's request 41 Change PR330 from 15K to 20K
(MEMO)
33 2009/06/26 SI2-->PV For HP's request 44 Change PR616 from 10K to 1K

(MEMO)
34 2009/06/26 SI2-->PV Fine tune Vsense feedback to prevnet feedback saturation issue 45 Change PR218 and PR231 from 3.65K to 16.5K
(MEMO) PR223 from 100K to 21.5K
PR224 from 17.4K to 95.3K
PR206 from 14K to 15K
Add PR219 and PR233 as 4.02K
35 2009/07/04 SI2-->PV Fine tune enable signal level to make sure the switch 41 Change PR330 from 20K to 60.4K
(MEMO) can work normally PC322 from 0.01u to 0.1u
A A
36 2009/07/07 PV-->PV-R Reserve a dummy load to prevent the leakage issue in the 42 Reserve PR434 as 1K
future. That issue has happened on PUMA platform
37 2009/07/07 PV-->PV-R Add a pull down resistor to prevent the floating of PQ307 41 Add PR331 as 1K
38 2009/07/07 PV-->PV-R TI request to prevent LDO issue 41 Change PC302 from 0.22u to 1u
39 2009/07/15 PV-->PV-R TI request to prevent LDO issue 41 Change PC315 from 10u to 22u
(Capacitance on VREG5 should be 33u at least) PC26 from 1u to 10u

Changed-List History
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size D o cument Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA -4961P 1.0
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) for HW Circuit

Request
Req uest
Item Page#
Pa ge# T itle Date Owner
Own er Issue Description
D escription Solution
So lution Description Rev.
D 1 33 KBC 1098
1 098 11/28 BI OS HP BIOS team design change
11 /28 HP BIOS chan ge remove ADP_DET#
AD P_DET# signal connection from pin 80 of KBC 0.2 D
to pin 87 (GPIO9)
2 2 9 LPC Debug port 11/28
11 /28 HP BIOS
BI OS LPC debug card can't work change JP21.16
JP21 .16 conection from DEBUG_KBCRST to "51125_PWR" 0.2
3 29 VGA 11/28
11 /28 H P Design
De sign change for RS880M VGA I2C DDC delete
del ete R101, R102, Q18,Q19 0.2
4 30, 31 USB 12/1
12 /1 C ompal all USB board can't work change USB PWR switch enable signal from SLP_S5# to SLP_S5 0.2
5 4 Thermal
The rmal senseor 12/1
12 /1 C ompal System can't
c an't power on thermal sensor
sens or change from ADM1032 to EMC1402 0.2
6 29 LPC Debug port 12/2
12 /2 HP BIOS
BI OS LPC debug card can't work change
chan ge JP21.12 conection from "B+" to "51125_PWR" & change 0.2
JP21.16 conection from "DEBUG_KBCRST" to "VCC1_PWRGD"
"VCC1_PWRG D"
7 27 USB (WLAN conn) 12/2
12 /2 HP AMD platform
platfor m is not support WiMAX remove USB20_N9\P9
USB20 _N9\P9 from WLAN connector (JP9) 0.2
8 27 W WAN 12/2
12 /2 HP HP Comm team design change reserve R513
R5 13 for LAN_PCIE_WAKE# of JP10 pin1 0.2
9 32 VGA 12/2
12 /2 HP VGA can't
ca n't work issue change DOCK_ID signal pullup power rail to +5VS 0.2
C
10 11 NB 12/2
12 /2 HP HP design
d esign change change R61 from
fro m 10Kohm to 0 ohm 0.2 C
11 32 DOCK
DO CK 12/2
12 /2 HP HP design
d esign change remove
re move Q23, Q5, Q6, R457~R460,R483,C682,C683 0.2
12 18 DP 12/2
12 /2 HP HP design
d esign change remove
remo ve C253, R467. add R514, Q98 0.2
13 17 LCD 12/3
12 /3 C ompal Compal
Compa l ME design change change
chan ge the LCD connector type 0.2
14 32 DOCK
DO CK 12/3
12 /3 HP HP design
d esign change remove SER_SHD signal & pin76 pullup 10k ohm to +5VS 0.2
15 25 N IC 12/3
12 /3 HP V1.2_LAN
V1.2_ LAN leakage issue change
ch ange power rail friom +1.2V_HT to +1.2VALW 0.2
16 32 DOCK
DO CK 12/3
12 /3 HP all the FETs cicuit
c icuit will be located inside docking station All the CEC and CAD pins (143,46,142 and 47) will left as NC 0.2
17 34 Super IO 12/4
12 /4 C ompal Compal design change Change Super
Sup er IO IT8305E to LPC47N217 0.2
18 15 CLK
CL K gen 12/4
12 /4 C ompal Compal design change add CLK_14M_SIO for Super IO & delete CLK_48M_SIO 0.2
19 9 DDRII
DDR II 12/5
12 /5 C ompal layout placement issue cgange rsistor
rsisto r size from 8P4R to 0402 0.2
30 USB 12/5
12 /5 HP re-define
re- define the USB debug port (USB port 0) Swap JUSB1 & JUSB2's USB signal 0.2
B 20 B
21 25 N IC 12/5
12 /5 HP V1.2_LAN leakagel eakage issue & improve layout Swap power
p ower rail +1.2V_HT & V1.2_LAN 0.2
22 25 N IC 12/5
12 /5 HP HP recommand
recom mand that 8075 is not needed remove R246,R240,R241,R247,R244,R238,C421,U14
R246,R240 ,R241,R247,R244,R238,C421,U14 & USB signal 0.2
23 27 WWAM 12/5
12 /5 HP HP design
d esign change add WWAM
W WAM wakeup circuit 0.2
24 15 CLK
CL K gen 12/8
12 /8 HP Adding clk request
requ est signal for media/1394 daughter c hange CLK_PCIE_CARD#/CLK_PCIE_CARD from pin25,26 0.2
board for power saving benefit to pin 22,23
22 ,23 & rename pin24 to CRD_REQ# & connect to JP29 pin20
26 4 C PU 12/8
12 /8 HP AMD S1G3 request for +1.2V_HT power rail C1,C2,C7
C1 ,C2,C7 change from 4.7U to 10U 0.2
27 26 WWAM 12/9
12 /9 HP HP design
d esign change change R279 pin1 power rail from +3VALW to +3VS 0.2
28 4 F AN 12/10
12 /10 HP HP design change for RF add R534
R5 34 0.2
29 33 K BC 12 /10 C ompal design
12/10 de sign change to meet SMSC guideline add C710
C7 10 0.2
30 31 K BC 12/12
12 /12 HP HP design
d esign change change BATCON
BA TCON to ADP_DET# and connection Pin87 & pin92 0.2
A
31 18 Display Port 12/15
12 /15 HP add level
leve l shit control for DP add Q102,
Q1 02, R535 0.2 A
32 6 Leakage
Lea kage 12/18
12 /18 HP l eakage fro +1.8VS c hange power rail from +1.8VS to +1.8V 0.2
HW Changed-List History-1
5 4 3 2 1
5 4 3 2 1

Request
Req uest
Item Page#
D 1 28 KB connector 12/24
12 /24 C ompal Key Board matrix error
e rror Correct the right Key Board Matrix 0.3 D
2 26 L AN 12/31
12 /31 C ompal LAN cable can't dectect connection
con nection JRJ45 pin10 to GND 0.3
3 32 Do cking 1/15
1/ 15 HP Docking connector pin out
ou t error delete pin
p in 180 (PLT_RST#) & let it NC 0.3
4 32 Do cking 1/15
out error Swap pin assignment of pin2,3 & pin183,184 0.3
5 32 Do cking 1/15
ou t error Add connection
con nection for pin 51 to signal DOCK_AUX- 0.3
pin 52 to signal DOCK_AUX+, pin 138 (HDMICLK_UMA)
,pin 137 ( HDMIDAT_UMA)
H DMIDAT_UMA)
6 32 Do cking 1/15
ou t error let pin77 & pin 78 NC pin because of the dock side is GND 0.3
7 32 Do cking 1/15
1/ 15 HP can't programing serial port
po rt by BIOS SER_SHD signal (after Q96) connect to pin 10 of JP35 0.3
& let pin76 NC
C
8 25 N IC 1/15
1/ 15 HP can't boot in DC mode a dd Q2 to isolated when DC mode 0.3 C
9 31 WLAN_LED 1/15
1/ 15 C ompal WLAN_LED issue iss ue correct the net name to WL/BT_LED# 0.3
10 28 M DC 1/22
1/ 22 HP Modem disable GPIO is no needed delete U17 RR173, connect HAD_RST#_MDC to pin 11 0.3
of MDC via
v ia a serial resistor (4.7K)
11 2 1 PWR on CKT 2/3 C ompal system auto power on after un-plug
un- plug AC change R179 power rail from +3VALW to +3VL +3 VL 0.3
12 29, 33 K BC 2/3 HP for SPI lock feature & only apply to AMD platform
p latform change R375 to 0ohm & connect to U19 pin3 pi n3 0.3
13 3 2 Do cking 2/3 HP Display port working not right Swap pin 146 and pin 145 connection
con nection 0.3
14 3 2 Do cking 2/3 HP Display port working not right swap pin 52 and pin 51 connection
connec tion 0.3
15 3 1 card reader
rea der 2/3 HP to beefup with enough decoupling cap on MB change
chan ge C684 from 0.1U to 4.7U 0.3
16 3 2 Do cking 2/4 HP d ocking station design change change
chan ge pin11, pin178, oin179 from NC to +5VS 0.3
B
17 3 2 Do cking 2/4 HP docking station power LED abnormal
abnor mal a dd Q3 for invert STB_LED# signal behavior 0.3
B
18 2 0 2 3 SB 710 2/5 HP for improve battery life remove IDE PATA controller and flash controller
contro ller power rail 0.3
+ 3VS) & connect pin 1 of R170 to pin M5 of SB710
19 17 LCD Panel
Pane l 2/6 HP L CD Panel flashing issue r emove R106, D41 & add R540 0.3
17 card reader
rea der 2/6 HP for power-down of 1394/cardreader
1394/cardreader chip a dd Q104~Q107, R541~R543 0.3
20
when no card/1394 inserted
21 1 1 1 8 DP 2/6 HP design change
cha nge change
chang e R60 & R125 from 20k to 100K ohm 0.3
22 3 2 Do cking 2/9 C ompal RJ45 green LED doesn't light with cable while w hile change the R340 power rail from +5VS to +5VALW +5 VALW 0.3
system power
po wer off with AC in
23 30 USB 2/10
2/ 10 HP correct the USB debug port 0 location swap JUSB2 & JUSB3 signal signal 0.3
24 19 R TC 2/11
2/ 11 HP for RTC battery life issue change
cha nge D43 pin2 power rail from +3VL to +VREG3_51125 0.3
A
26 19 SB 710 2/12
2/ 12 HP port 9,10,11 are un-used and BIOS
BIO S can disable the change
cha nge the USB port from port 11 to port 12 0.3 A
one OHCI controller

5 4 3 2 1
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Request
Req uest
Item Page#
D
27 25 N IC 2/14
2/ 14 HP design change for 8059 (co-lay)
(co-l ay) a dd R544~R548 0.3 D
28 31 Audio
Au dio Express 2/17
2/ 17 HP to improve
i mprove battery life change both pin 21 of JP34 and pin 1 of C646 connection 0.3
to +VREG3_51125
+VREG3 _51125 (from +3VL
29 20 VRAM ID 2/17
2/ 17 C ompal add VRAM ID for side poert memory 2nd source add ad d R549, R550,R551,R176 0.3
30 32 Do cking 2/18
2/ 18 HP DP's 16
1 6 AC coupling remove to docking station deletet C659~C666, C512~C519 0.3
31 32 Do cking 2/18
2/ 18 HP SATA's 4 AC coupling remove to docking station deletet R342~R345
R342~R3 45 0.3
32 32 Do cking 2/19
2/ 19 C ompal due to DP current is 500mA change F2 from 3A to 0.5A 0.3
C C
B B
A A

5 4 3 2 1
5 4 3 2 1

Request
Req uest
Item Page#
D
1 2 5 N IC 3/23
3/ 23 HP power-down NIC instead of low-power mode a dd Q34, R554, C712, R555, Q107 & delete R186, R239 0.4 D
2 4 F an 3/23
3/ 23 C ompal Fan shake when temperature
temperatur e in 70 degree add Q108, C556 & C557 0.4
3 3 1 card reader
rea der 3/24
3/ 24 HP 1394 detection circuit design change
chan ge delete R533, R552,R543 & add R559, R558, Q108
Q1 08 0.4
4 2 9 S PI 3/25
3/ 25 HP SMsC recommand to add 100k ohm fro select pin a dd R560 0.4
5 27, 2 5 WLAN, N IC 3/25
3/ 25 HP power MOSFET can not be fully shutoff with w ith change R277 power rail from +3VS to +5VS
+5V S & change R277 0.4
+3V/+5V
+3V/+5 V level from 680 to 47k & R272 from 220K to 100K, R234 change
power rail to +5VALW & change to 10K
6 27 WL AN 3/25
3/ 25 HP delete CLK_PCIE_WLAN_REQ#
CLK_PCI E_WLAN_REQ# from JP9 pin 7 0.4
HP design change
chan ge
& connect CLK_PCIE_WLAN_REQ#
CLK_P CIE_WLAN_REQ# to WLAN_OFF
7 27 SB 710 3/25
3/ 25 HP H P design change for GPIO56 c onnection CRD_REQ#_R to GPIO56 0.4
C
8 4, 6 C PU 3/30
3/ 30 HP HP design change for CPU Thermal
Therm al change Q10 pin2 power rail from +1.8VS to +1.2V_HT
+1.2V_ HT 0.4 C
& connection thermal sensor pin4 (thermal#) to CPU dirtertly.

dir tertly.
9 27 W WAN 3/31
3/ 31 HP HP design change for WWAN dection pin c ontion JP10 pin26 to Super IO GPIO23 0.4
10 28 Point stick
s tick 4/1 C ompal Point
Poin t Stick pin out error Swap from pin1 to pin8 0.4
11 33 K BC 4/6 HP BOM change
ch ange change
chang e pull down resistor on FET_A R443 from 1.2K to 0.4
10K; Change pulldown resistor on SB_PWRGD R367 from
1.2K to 4.7K
12 35 PWR OK 4/6 HP BOM change
ch ange c hange PWR_GD resistor values - change R399 to 31.6K_1%, 0.4
change
change R400 to 88.7K_1%, change
cha nge
R407 to t o 16.9K_1%, change R401 to 10K_5%
13 6 C PU 4/6 HP BOM change
ch ange 0.4
B change R35 value to 560 ohm (instead of 300 ohm) B
14 28 L ID SWITCH 4/6 HP LID_SW#

LID_ SW# is triggering very intermittently and add
ad d Q110 & C713 0.4
cause lockup in POST B173
15 21 power button
but ton 4/7 HP Press
Pr ess twice power to power on in DC mode c hange R179 to 4.7K 0.4
1 6 31, 3 3 K BC 4/7 HP design change for detect 14" & 15.6" panel add GPIO03 (14vs15_FF_DETECT)
(14vs 15_FF_DETECT) on KBC 0.4
17 26 N IC 4/8 HP H P design change for LED, NIC is locate on the delete Q37 & Q38 0.4
rear,
r ear, not side of system. So, after docking, even
NIC leds on NB side is blinking, users will not see it,
1 8 17, 2 9 LCD
LC D & FP 4/8 HP to make sure can turn off the power MOS change the G gate of MOS to +5VS & +5VALW
+5VALW 0.4
19 26 N IC 4/9 HP HP design
desig n change to simplified circuit delete Q1B, R553
R 553 0.4
A
20 20 SB 710 4/9 HP HP design
d esign CPPE_NC# connection CPPE_NC#
CPPE_N C# connect to U10.C4 (GPIO55) 0.4 A
21 17 WebCan
WebC an 4/11
4/ 11 HP in order to support new
ne w Webcan delete Q24, C248, R113 & R446, R174.then connect
c onnect 0.4
CARMERA_OFF
CARMERA_O FF to MOS G gate.
5 4 3 2 1
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Request
Req uest
Item Page#
D
22 21 SB 710 4/13
4/ 13 HP add a 10K pull-down resistor to signal "SLP_S5#"
"SLP_S5 #" a dd R563 0.4 D
23 20 N IC 4/13
4/ 13 HP BOM change
cha nge change
cha nge C712 to 0.022uF (from 0.1uF) 0.4
24 33 K BC 4/14
4/ 14 HP add pull-down resistor to signal "SLP_S5#"
"SLP_S5 #" change R464 connection from +3VLto GND 0.4
25 32 do cking 4/17
4/ 17 HP design change
chang e connect
connec t pin 2 of Q3A to signal PREP#, dock pin 111 0.4
26 36 DC-DC
DC -DC 4/19
4/ 19 HP to fine turn power on sequence changee C553 from 0.01U to 0.047U
chang 0.4
C C
B B
A A

5 4 3 2 1
5 4 3 2 1

Request
Req uest
Item Page#
D
1 25 N IC 5/9 HP can't power on in AC mode due to PWR_GD be delete R555, R512. change R499 pin2 from runon to B+. 0.5 D
drive
dr ive to low change
ch ange Q79 power source from V1.2_LAN to +1.2VALW
2 27 W WAN 5/29
5/ 29 HP Change
Ch ange WWAN circuit to follow what HP comm delete R279, R528, Q99 & change Q100 pin5 pi n5 power 0.5
team, & power down WWAN card rail
rai l from +3VALW to +3VS
3 25 N IC 5/29
5/ 29 HP to support LAN/WLAN switch add FET
FE T Q111 0.5
4 33 K BC 5/29
5/ 29 HP add filtering
fi ltering circuit for AD input add C714, C715, C716,R564 0.5
5 20 SB 710 5/29
5/ 29 HP delete the SATA decoupling cap, Because
Be cause the caps delete C289~C292
C289~C2 92 0.5
are located in docking station side already
a lready
6 36 DC-DC
DC -DC 5/29
5/ 29 HP DC mode can't power on issue i ssue connect
conn ect R442.1 pin to +3VALW (instead of VL) 0.5
7 20 SB 710 5/29
5/ 29 HP for AMD vidoe driver reques connect
conn ect R175.2 to signal DOCK_ID (instead of GND) 0.5
C
, and make R175 to 100K C
8 31 card reader
rea der 6/4 HP reserve 0 ohm for CRD)REQ# a dd R565 0.5
9 13 sideport memory 6/5 A MD AMD SCL suggection:Connected a 100-? 100 -? 1% 0.5
un-install R68
resistor
resist or between MEM_CKP and MEM_CKN
(not installed by default).
def ault).
10 31 card reader
rea der 6/8 HP some
so me 1394 not detected add
ad d Q23, R566 0.5
11 25 N IC 6/8 C ompal in order to improve the placement
placeme nt combine Q111 & Q97 as dual FET Q19 0.5
12 31 card reader
rea der 6/9 HP the power down feature for BIOS (The idea id ea is add R565, R567, C717,C718 0.5
to have BIOS SIO GPIO control, if that GPIO is
high, the
th e circuit is enabled. If the GPIO is GPI or
B low, the power-down circuit then disabled.)
disa bled.) B
13 18 DP 6/11
6/ 11 A MD AMD require a blank time on HPD signal signa l when delete R124, R514 add Q113,R568,R569,C719
Q113,R568,R569,C7 19 0.5
docking station and NB both have DP. The change
basically will block DPB HPD for a 100ms 10 0ms becuase
pass
p ass through
14 27 W WAN 6/11
6/ 11 C ompal MC1_DISABL is open drain seeting need pull high, addR570,
ad dR570, R571, Q114 0.5
and +3V_WWAN need discharge circuit
circu it
15 8 D DR 6/11
6/ 11 C ompal E MI request 0.1UF cap for +1.8V add C720, C721 0.5
16 6 C PU 6/12
6/ 12 HP HP request add 1k resistor between Q10.2 and LDT_RST#.
LDT_RST#. a dd R572 0.5
17 17 webcam
web cam 6/13
6/ 13 C ompal EMI request add com-choke for webcam add L49 0.5
A
18 31 W WAN 6/13
6/ 13 HP WWAN LED abnormal when power po wer down chajnge Q53 pin2 power rail from +3VS to +3V_WWAN
+3V_WW AN 0.5 A

5 4 3 2 1
5 4 3 2 1

Request
Req uest
Item Page#
D
1 30 USB 6/20
6/ 20 C ompal change C485, C491,C690 footprint for 2nd sou
source
rce change footprint
foo tprint from C_D to C_D2E 0.6 D
2 21, 28 SMSC
SM SC CBB 7/4 HP for SMsC
SM sC CBB utilized the Lid#. move Q110 close to SB710 and pull high LID_SW#
LID _SW# 0.6
1 31 card reader
rea der 8/13
8/ 13 HP reduce power consumption remove C718 and change R558 to 47K ohm
card reader can't detect & reduce o hm 1.0
2 33 Aud io 8/24
8/ 24 HP there is the po-po sound when warm boot
bo ot add
ad d Q115, R575,Q116 1.0
C C
B B
A A

5 4 3 2 1

HP Probook 6545b (Compal LA-4961P)

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A B C D E

Security Classification Compal Secret Data Compal Electronics, Inc.

Compal Confidential TAG UMA

Hyper Transport Link Side-Port DDR2 SDRAM

Display Port Page 10, 11, 12, 13, 14 FingerPrinter VFM451

O MEANS ON X MEANS OFF

: means Digital Ground

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

Processor DDR2 Memory Interface

Security Classification Compal Secret Data Compal Electronics, Inc.

F8 VDDA1 KEY1 M11

Q11 10/29 HP CPU_VDD0_FB_H

LDT_RST# CPU_TEST21_SCANEN AB8 C3 @

C1 C5 CPU_TEST21_SCANEN R24 1 2 300_0402_5%

H_PWRGD_CPU CPU_TEST15_BP1 R30 2 1 @ 300_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

180PF Qt'y follow the distance between 2 2 2 2 2 2 2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

+1.8V +1.8V +0.9V +1.8V

Security Classification Compal Secret Data Compal Electronics, Inc.

PCIE I/F GFX

HYPER TRANSPORT CPU I/F

<4> H_CLKOP0 T22 HT_RXCLK0P HT_TXCLK0P H24 H_CLKIP0 <4>

Place within 1" RS880MN_FCBGA528 Place within 1"

Security Classification Compal Secret Data Compal Electronics, Inc.

<15> CLK_SBLINK_BCLK V4 GPPSB_REFCLKP(SB_REFCLKP)

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

CKE VDDQ4 MEM_CASb(NC) MEM_DQS1N(NC)

Security Classification Compal Secret Data Compal Electronics, Inc.

RX780: Enables the Test Debug Bus using PCIE bus

Security Classification Compal Secret Data Compal Electronics, Inc.

+1.2V_HT +VDDCLK_IO +3VS_CLK

0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

CLK_48M_USB_R R82 1 2 22_0402_5%

14.31818MHZ_20P_6X1430004201 2 1 12P_0402_50V8J @ C668

NB CLOCK INPUT TABLE Q6A

M74VHC1GT125DF2G SC70 1 1 <11,32> D_D DCDATA C RT_DDC_DATA <11,32>

layout note: D_HSYNC Place cloce to NB

Security Classification Compal Secret Data Compal Electronics, Inc.

LCD/PANEL BD. CONN.

4.7K_0402_5% 1 2 R 452 DDC2_ CLK

LCD POWER CIRCUIT

Security Classification Compal Secret Data Compal Electronics, Inc.

Security Classification Compal Secret Data Compal Electronics, Inc.

PCI EXPRESS INTERFACE

4 3 R451 0_0402_5% AD6 R1531 33_0402_5%

<6,11> LDT_STOP# LDT_STP# VBAT +RTCVCC

C679 +RTCVCC +VREG3_51125 BATT1.1 E-T_3801-E02N-01R_2P

2 Place near IBEX-M

Security Classification Compal Secret Data Compal Electronics, Inc.

10P_0402_50V8J 2 1 C283 SATA_X1

C285 1 2 0.01U_0402_25V7K SATA_STX_DRX_P0 AD9

VRAM ID, Compal 2/17

VRAM ID GPIO52 GPIO53

Hynix 64MB (main source) 0 0

Security Classification Compal Secret Data Compal Electronics, Inc.