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Different multilevel inverter topologies with reduced number of devices

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DOI: 10.1109/RAECS.2015.7453375

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 Proceedings of 2015 RAECS UIET Panjab University Chandigarh 21-22nd December 2015

Different Multilevel Inverter Topologies

with Reduced Number of Devices
Vanya Goel Jagdish Kumar Jaimala Gambhir
Department of Electrical Engg. Department of Electrical Engg. Department of Electrical Engg.
PEC University of Technology PEC University of Technology PEC University of Technology
Chandigarh, India Chandigarh, India Chandigarh, India

Abstract— Multilevel Inverters are nowadays becoming the sources can be used as the multiple input DC sources. This
state-of-the-art power electronic devices for high-power and paper reviews new topologies of multilevel inverters that have
power-quality seeking applications. While the classical topologies fewer semiconductor switches and gate driver circuits with
have proved to be a viable alternative, there has been an active higher number of steps in the output including the generation
interest in the evolution of newer topologies. Reduction in overall of 7 level multilevel inverter output waveform using 9
part count as compared to the conventional topologies has been switches, 7 switches with Symmetric and Asymmetric
an important objective in the recently introduced topologies. In topology, 6 switches with 4 and 3 DC sources and Reduced
this paper, some of the recently proposed multilevel inverter Device Count Multilevel Inverters (RDC-MLI) topologies.
topologies with reduced power switches are reviewed. Level
Shifted triangular multicarrier waves are compared with the
sinusoidal reference to generate sine PWM switching sequence. II. TOPOLOGIES
Based on a detailed comparison of the different topologies as
presented in this paper, appropriate multilevel solution can be A. Conventional Topology.
arrived at for a given application.
A stepped output voltage and current can be obtained in a
Keywords— Multilevel inverters; reduced device count; new cascaded MLI by cascading several H-bridge inverters [11-
topologies; level shifted triangular multicarrier waves. 16]. Much of the literature published in past few decades have
shown intense focus in studying the diode clamped, flying
capacitors and cascaded H-bridge topologies with regard to
I. INTRODUCTION their respective pros and cons [17-27]. The cascaded H-bridge
topology for 7 level is designed by cascading 3 H Bridges,
DC to AC power conversion is a key technology in the each H Bridge contains 1 dc voltage sources and 4 switches
modern set-of generation, transmission, distribution and together forming 3 dc voltage sources and 12 switches in total.
utilization of electric power. Multilevel inverters are The output voltage for m level multilevel inverter is given by
nowadays becoming one of the industrial solutions for DC eq. (1), where, n is the number of switches used in the
power source utilization (such as electricity obtained from configuration. Each H Bridge produces 3 levels, i.e., +Vdc, 0,-
batteries, solar panels or fuel cells) [1-2], high dynamic Vdc. By cascading these 3 bridges in such a way, it will
performance and power-quality demanding applications produce 7 level stepped staircase waveforms. The switches of
covering a power range from 1 to 30 MW [3–8]. They play a the same leg should not conduct at the same time so as to
crucial role in variable frequency drives, air conditioning, prevent short circuit across the voltage source. Fig. 1
uninterruptible power supplies, induction heating, high voltage represents the conventional cascaded 7 level H bridge inverter.
DC power transmission, active filters and flexible AC
transmission systems. Multilevel inverters can withstand for
2 ⁄2 (1)
several important applications like hybrid electric vehicles,
uninterruptible power supplies, reactive power compensation
and regenerative applications. With the advent of recent power
electronics devices, digital controllers and sensors, the role of
power inverters also envisaged and acknowledged in frontiers
such as futuristic smart grids and greater penetration and
integration of renewable energy sources based power
generation [9].
A multilevel inverter is basically a power electronic
interface that produces a desired output voltage by connecting
various DC sources and switches in the appropriate manner
[10]. The basic concept of an MLI to achieve higher power is
to use power semiconductor switches like IGBTs, MOSFETs,
etc. along with appropriate DC voltage sources to perform the
power conversion by synthesizing a staircase voltage
waveform. Capacitors, batteries, and renewable energy voltage Fig. 1. Conventional Cascaded 7 level MLI

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 Proceedings of 2015 RAECS UIET Panjab University Chandigarh 21-22nd December 2015

B. Seven level 9 Switch Topology. C. Seven level 7 Switch Topology.

This topology consists of 9 switches that are connected in In order to reduce the total harmonic distortion further, two
series and are capable of producing a stepped output [28]. more switches are eliminated and thus 7-switch topology is
Each voltage source is Vdc and thus we can get a maximum developed as shown in Fig. 4. Except the H-bridge, only one
voltage 3Vdc. A 7-level output voltage is obtained having switch is conducting for every instant and thus the operation
becomes very simple and with lesser switching losses. For
magnitudes Vdc, 2Vdc, 3Vdc in positive half cycle, zero level, - instance, we get output Vdc only when S3 is conducting. Since,
Vdc, -2Vdc, -3Vdc in negative half cycle. H-bridge is each voltage source magnitude is Vdc, hence, this is called
responsible for the positive and negative level voltages. Symmetrical configuration.
Switches S1 and S2 are used for positive level. S3 and S4 are
used for negative level. Fig. 2 represents the 7 level 9 switch
topology.

Fig. 4. Seven level 7-switch topology with Symmetrical Configuration.

With the help of 7 switches, by using different values of the

DC source i.e., Asymmetrical or hybrid configuration we can
synthesize the 7 level output voltage waveform. Cascaded
Fig. 2. Seven level using 9-switches topology hybridized structure of [29] with phase disposition pulse width
The following Table. I shows the switching sequence in modulation as the switching scheme is introduced in [30]. Fig.
which the devices should be switched in order to achieve the 5 consists of two voltage sources of magnitude E and 2E. By
desired 7 level output waveform as shown in Fig. 3. proper switching it is possible to generate voltage levels of 0,
E, 2E, 3E,-E,-2E and-3E.
TABLE I. SWITCHING STATES OF 9-SWITCH TOPOLOGY
S.NO S1 S2 S3 Output
Voltage

1 0 0 0 0
2 0 0 1 Vdc
3 0 1 0 2Vdc
4 1 0 0 3Vdc

Where, 0 means OFF; 1 means ON.

Fig. 5. Seven level 7-switches topology with Asymmetrical Configuration

D. Seven level 6 Switch Topology with 3 DC Sources.

This topology comprises of three voltage sources and six

switches thus, the circuit is simple to design and implement.
The switches S2 and S4 are used for polarity reversal hence
they are bidirectional in nature while switches S1, S5, S6, and
S3 are used for waveform generation hence, unidirectional in
Fig. 3. Seven level waveform nature as shown in Fig. 6. The circuit is used to produce seven

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 Proceedings of 2015 RAECS UIET Panjab University Chandigarh 21-22nd December 2015

level output voltage waveform by designing appropriate pulse

generation circuitry. It also have additional features like only
two switches conduct at a given interval of time as only two
switches are used for polarity reversal and rest of the four
switches are used for waveform generation.

Fig. 9. Alternate Phase Opposition Disposition PWM technique.

Fig. 6. Seven level 6-switch 3 DC Source Topology

The generalized equations for the number of devices and the

number of input dc sources for the above discussed topology is
given by eq. (2) and eq. (3) respectively: Fig. 10. Alternate Phase Opposition Disposition + Variable Frequency PWM
technique.
2 5 (2)
E. Reduced Device Count Multilevel Inverter (RDC-MLI)
Where, M= number of levels and S= number of switches.
Topologies.
2 1 (3) These topologies are proposed with an exclusive claim of
Where, V=number of dc voltage sources. reducing the number of controlled switching power
semiconductor devices for a given number of phase voltage
By using these two equations we can find the number of
levels are referred to as RDC-MLI topologies. In this paper
voltage levels, number of dc sources and switches for any
nine such topologies [35-40] are reviewed. Following are the
levels. The following Fig. 7, 8, 9, 10 show the level shifted
various reduced device count multilevel inverter topologies:
PWM modulation techniques [31-34].
1) Cascaded Half-Bridge based Multilevel DC Link
(MLDCL) Inverter.

Gui Jia Su [35] has presented a new multilevel inverter named

as “Cascaded Half-Bridge based Multilevel DC Link (MLDCL)
Inverter”. An MLDCL inverter with four DC levels is shown in
Fig.11. It comprises of cascaded half-bridge cells, with each
cell having its own DC source. Various valid switching
combinations that can be used to obtain the multilevel DC link
voltage vbus (t).

Fig. 7. Phase Disposition PWM technique.

Fig. 8. Phase Opposition Disposition PWM technique. Fig. 11. Cascaded Half-Bridge based Multilevel DC Link (MLDCL) Inverter.

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 Proceedings of 2015 RAECS UIET Panjab University Chandigarh 21-22nd December 2015

2) Switched Series/Parallel Sources (SSPS) based MLI. generation” parts. The level-generation part consists of input
DC sources and bidirectional-blocking-bidirectional-
Hinago and Koizumi [36] proposed a single-phase conducting switches. The switches in the polarity-generation
multilevel inverter consisting of an H-bridge and DC sources part are unidirectional-blocking-bidirectional-conducting and
which can be switched in series and in parallel. This topology have to withstand the maximum voltage generated by the level
with four input DC sources is shown in Fig.12, consisting of generation part as shown in Fig. 14.
two parts: level-generation part which consists of the switched
sources and synthesizes a bus voltage vbus (t) and the polarity-
generation part which synthesizes positive and negative cycles
of voltage vbus (t) to feed an AC load.

Fig.14. Multilevel Module (MLM) based MLI

Fig. 12. Switched Series/Parallel Sources (SSPS) based MLI
5). Reversing Voltage (RV) Topology.
3). Series Connected Switched Sources (SCSS) based
MLI. In [39] Najafi et al. have proposed Reversing Voltage MLI
This topology with sources connected in series through (RV-MLI) topology. A single-phase RV-MLI with four input
power switches is described in literature [37]. It consists of DC sources, Vdc,j {j = 1 to 4}, is shown in Fig.15. The level-
four input DC sources Vdc,j { j = 1 to 4}. The low potential generation part comprising of the input DC sources and
terminals of the sources are all connected through power switches Sj {j = 1 to 8}. The polarity-generation part consists
switches while being also connected to the higher potential of switches Qj {j = 1 to 8}, operating at the line frequency. To
terminal of the preceding source through power switches, as overcome the issue of voltage balancing separate DC sources
illustrated in Fig.13 with Sj { j = 1 to 8}. This interconnection are used.
is capable of synthesizing a multilevel rectified waveform
vbus (t).

Fig.15. Reversing Voltage (RV) Topology

Fig. 13. Series Connected Switched Sources (SCSS) based MLI
6). Two-Switch Enabled Level Generation (2SELG)
4). Multilevel Module (MLM) based MLI. based MLI.
Babaei [38] presented MLM based MLI. This topology This topology is presented by Babaei in [40]. It has separate
consists of separate “level-generation” and “polarity- level-generation and polarity-generation parts and requires a

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 Proceedings of 2015 RAECS UIET Panjab University Chandigarh 21-22nd December 2015

mix of unidirectional and bidirectional switches. The specialty TABLE.IV. ADVANTAGES AND LIMITATIONS OF REDUCED DEVICE
of this topology is that the level-generation part requires only COUNT MULTILEVEL INVERTER (RDC- MLI)
TOPOLOGIES.
two conducting switches to synthesize any valid voltage level,
irrespective of the number of input sources. Therefore, this Topology Advantages Disadvantages
topology is referred to as “two-switch enabled level generation
(2SELG) based MLI” as shown in Fig.16. MLDCL- MLI i) Highly modular and i) Requires isolated input
simple DC levels.
ii) Requires only ii) Trinary source
unidirectional switches configuration can’t be
employed.
SSPS-MLI i) Input DC sources can i) Highest voltage rated
be combined in both switches cannot be
series and parallel operated at fundamental
ii) Equal load sharing is switching freq.
possible amongst input
DC sources

SCSS-MLI i) Simple structure i)Symmetric source

ii) Highest voltage rated configuration is
switches can be operated mandatory
at fundamental switching
freq.
MLM-MLI i) Requires non-isolated i) Equal load sharing is
DC sources not possible
ii) Simple structure ii) Asymmetric source
configuration not possible
RV-MLI i) Requires non-isolated i) Equal load sharing is
DC sources not possible
Fig. 16. Two-Switch Enabled Level-Generation (2SELG) based MLI ii) Single DC link feeds ii) Asymmetric source
all the three phases configuration is not
possible
TABLE.II COMPONENT COMPARISON OF DIFFERENT TOPOLOGIES.
2SELG-MLI i) Requires non-isolated i) Equal load sharing is
Topology No. of No. of No. of No. of DC input DC levels not possible
capacitors diodes switches sources ii) Low conduction ii)Asymmetric sources
losses cannot be employed
Flying 14 - 10 -
Capacitor
Diode Clamped 6 >=8 10 - III. CONCLUSION

Multilevel inverters have matured from being an emerging

Cascaded 7 - - 12 3
level technology to a well-established and attractive solution for
7 level 9 switch - - 9 3
medium voltage high power applications. New multilevel
topologies have been reviewed, offering high output resolution
7 level 7 switch - - 7 3, 2 with a reduced number of power switches. With fewer
switches, controlling the overall circuit becomes less complex,
7 level 6 switch - - 6 4, 3 the size and installation area reduces. It can be seen that
minimum THD content is obtained from the 6-switch topology
with POD PWM technique. In case of Asymmetrical
configuration only 2 dc sources are required which can also be
TABLE.III PERCENTAGE THD COMPARISON OF DIFFERENT
TOPOLOGIES. realized through renewable energy resources like photovoltaic
system and its integration with electric drives. A review of
PWM Technique PD POD APOD nine Reduced Device Count multilevel inverter topologies is
also presented and a comparison has been made so as to
Cascaded 7level 24.26 23.13 22.46 facilitate a well-informed selection of topology for a given
application.
7 level 9 switch - 21.6 -
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