A proposed hardware fault simulation engine
Abstract
Fault simulation is an essential part of the design cycle and for large circuits it can be very time consuming. This paper examines the possibility of hardware acceleration of this process, especially that of sequential circuits. In order to achieve this, the architecture of a pipelined hardware simulation accelerator, the MANchester Simulation Engine (MANSE), is examined. Finally the modifications necessary to make MANSE capable of fault simulation are considered.
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- A proposed hardware fault simulation engine
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Published In
February 1991
577 pages
ISBN:0818621303
- Conference Chair:
- Tony Ambler,
- General Chair:
- Jochen Jess,
- Program Chair:
- Hugo De Man
Sponsors
- EDAC Association
- SIGDA: ACM Special Interest Group on Design Automation
Publisher
IEEE Computer Society Press
Washington, DC, United States
Publication History
Published: 25 February 1991
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