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A low-overhead multicast bufferless router with reconfigurable Banyan network

Published: 04 October 2018 Publication History

Abstract

In modern Multi-Processors System-on-Chip (MP-SoC), it is highly desirable to provide hardware support for efficient multicast traffic. Recently, bufferless router has become a promising solution for NoC due to its simplicity and low overhead. However, existing multicast bufferless routers utilize the serialized switch allocator to allocate both unicast and multicast packets based on the packet priority one by one, which makes the router have a long critical path and lowers the frequency of the router. In this paper, we propose a low-overhead multicast bufferless router with a reconfigurable Banyan network (called Banyan_PR, PR is short for packets replication). The Banyan switch of the router can be configured as four modes (straight, exchange, U-multicast and L-multicast) according to the type of the incoming packets. For the U-multicast and L-multicast configurations, the multicast packet can be replicated adaptively to reduce the multicast latency. Using a 4 x 4 Banyan network instead of the serialized switch allocator, the Banyan_PR router has shorter critical path length and less area overhead. Synthesis results under a 28nm technology show that the Banyan_PR router can achieve the frequency of 1GHz and save 65% less area and 89% less power consumption than the existing deflection-routing-based multicast bufferless router (called DRM_PR_all) with the serialized switch allocator. Simulation results illustrate that the Banyan_PR router achieves 25%, 28% and 19% less latency on average than that of the router without packets replication (called Banyan_noPR) and 39%, 42% and 35% less latency on average than that of the DRM_PR_all router under three synthetic traffic patterns respectively.

References

[1]
L. Benini and G. De Micheli, "Networks on chips: a new soc paradigm," IEEE Computer, vol.35, no.1, pp. 70--78, January 2002.
[2]
H. Wang, L-S. Peh and S. Malik, "Power-driven design of router microarchitectures in on-chip networks," in Proc. International Symposium on Microarchitecture (MICRO), pp. 105--116, 2003.
[3]
Y. Cai, K, Mai and O. Mutlu, "Comparative evaluation of FPGA and ASIC implementations of bufferless and buffered routing algorithms for on-chip networks," in Proc. 16th International Symposium on Quality Electronic Design (ISQED), pp. 475--484, 2015.
[4]
M. Hayenga, N. E. Jerger and M. Lipasti, "Scarab: a single cycle adaptive routing and bufferless network," in Proc. International Symposium on Microarchitecture (MICRO), pp. 244--254, 2009.
[5]
T. Moscibroda and O. Mutlu, "A case for bufferless routing in on-chip networks," in Proc. International Symposium on Computer Architecture (ISCA), pp. 196--207, 2009.
[6]
C. Fallin, C. Craik and O. Mutlu, "Chipper: a low-complexity bufferless deflection router," in Proc. International Symposium on High Performance Computer Architecture (HPCA), pp. 144--155, 2011.
[7]
C. Feng, Z. Lu, M. Zhang and J. Li, "A 1-cycle 2GHz bufferless router for network-on-chip," Journal of National University of Defense Technology, vol. 33, no. 6, pp. 42--47, 2011. (in Chinese)
[8]
C. Fallin, G. Nazario, X. Yu, K. Chang, R. Ausavarungnirun and O. Mutlu, "MinBD: Minimally-buffered deflection routing for energy-efficient interconnect," in Proc. Sixth IEEE/ACM International Symposium on Networks on Chip (NOCS), pp. 1--10, 2012.
[9]
Z. Lu, M. Zhong and A. Jantsch, "Evaluation of on-chip networks using deflection routing," in Proc. Great Lakes Symposium on VLSI (GLVLSI), pp. 363--368, 2006.
[10]
L. R. Goke and G. J. Lipovski, "Banyan networks for partitioning multiprocessor systems," in Proc. 1st Annual Symposium on Computer Architecture (ISCA), pp. 21--28, 1973.
[11]
N. E. Jerger, L-S. Peh and M. Lipasti, "Virtual circuit tree multicasting: a case for on-chip hardware multicast support," in Proc. International Symposium on Computer Architecture (ISCA), pp. 229--240, 2008.
[12]
Z. Lu, B. Yin and A. Jantsch, "Connection-oriented multicasting in wormhole-switched networks on chip," in Proc. Annual Symposium on Emerging VLSI Technologies and Architectures, pp. 205--210, 2006.
[13]
W. Hu, Z. Lu, A. Jantsch and H. Liu, "Power-efficient tree-based multicast support for networks-on-chip," in Proc. 16th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 363--368, 2011.
[14]
L. Wang, Y. Jin, H. Kim and E. J. Kim, "Recursive partitioning multicast: a bandwidth-efficient routing for networks-on-chip," in Proc. International Symposium on Networks-on-Chip (NOCS), pp. 64--73, 2009.
[15]
P. Abad, V. Puente and J. A. Gregorio, "Mrr: enabling fully adaptive multicast routing for cmp interconnection networks," in Proc. International Symposium on High Performance Computer Architecture (HPCA), pp. 355--366, 2009.
[16]
S. Rodrigo, J. Flich, J. Duato and M. Hummel, "Efficient unicast and multicast support for cmps," in Proc. International Symposium on Microarchitecture (MICRO), pp. 364--375, 2008.
[17]
C. Feng, Z. Lu, A. Jantsch, M. Zhang and X. Yang, "Support efficient and fault-tolerant multicast in bufferless network-on-chip," IEICE Transactions on Information and Systems, vol. 95, no. 4, pp. 1052--1061, 2012.
[18]
C. Yao, C. Feng, M. Zhang, W. Guo, S. Zhu and S. Wei, "Partitioning methods for multicast in bufferless 3D network on chip," Communications in Computer and Information Science, vol. 592, Springer, pp. 13--22, 2016.
[19]
X. Xiang, W. Shi, S. Ghose, L. Peng, O. Mutlu and N. Tzeng, "Carpool: a bufferless on-chip network supporting adaptive multicast and hotspot alleviation," in Proc. International Conference on Supercomputing (ICS), 2017.
[20]
P. K. McKinley, H. Xu, L. M. Ni and A. H. Esfahanian, "Unicast-based multicast communication in wormhole-routed networks," IEEE Transactions on Parallel and Distributed Systems, vol.5, no.12, pp. 1252--1265, 1994.
  1. A low-overhead multicast bufferless router with reconfigurable Banyan network

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    cover image ACM Conferences
    NOCS '18: Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip
    October 2018
    182 pages
    ISBN:9781538648933

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    Published: 04 October 2018

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    Author Tags

    1. Banyan network
    2. bufferless router
    3. low-overhead
    4. multicast
    5. network-on-chip

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