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Memory fault diagnosis by syndrome compression

Published: 13 March 2001 Publication History
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References

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M. Rich, "A method of flexible catch RAM display for memory testing", in Proc. Int. Test Conf. (ITC), 1986, p. 222.
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C.-F. Wu, C.-T. Huang, C.-W. Wang, K.-L. Cheng, and C.-W. Wu, "Error catch and analysis for semiconductor memories using March tests", in Proc. IEEE Int. Conf. Computer-Aided Design (ICCAD), San Jose, Nov. 2000, pp. 468-471.
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C.-F. Wu, C.-T. Huang, and C.-W. Wu, "RAMSES: a fast memory fault simulator", in Proc. IEEE Int. Symp. Defect and Fault Tolerance in VLSI Systems (DFT), Albuquerque, Nov. 1999, pp. 165-173.
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C.-W. Wang, C.-F. Wu, J.-F. Li, C.-W. Wu, T. Teng, K. Chiu, and H.-P. Lin, "A built-in self-test and self-diagnosis scheme for embedded SRAM", in Proc. Ninth IEEE Asian Test Symp. (ATS), Taipei, Dec. 2000, pp. 45-50.
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  • (2006)A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmapProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131498(53-58)Online publication date: 6-Mar-2006
  • (2006)VLSI Test Principles and ArchitecturesundefinedOnline publication date: 14-Aug-2006
  • (2004)A BIST-based Solution for the Diagnosis of Embedded Memories Adopting Image Processing TechniquesJournal of Electronic Testing: Theory and Applications10.1023/B:JETT.0000009315.57771.9420:1(79-87)Online publication date: 1-Feb-2004
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Published In

cover image ACM Conferences
DATE '01: Proceedings of the conference on Design, automation and test in Europe
March 2001
756 pages
ISBN:0769509932

Sponsors

  • EDAA: European Design Automation Association
  • IFIP WG 10.5: IFIP WG 10.5
  • ECSI
  • EDAC: Electronic Design Automation Consortium
  • SIGDA: ACM Special Interest Group on Design Automation
  • IEEE-CS\TTTC: Test Technology Technical Council
  • IEEE-CS\DATC: IEEE Computer Society
  • The Russian Academy of Sciences: The Russian Academy of Sciences

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IEEE Press

Publication History

Published: 13 March 2001

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  • The Russian Academy of Sciences

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Overall Acceptance Rate 518 of 1,794 submissions, 29%

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View all
  • (2006)A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmapProceedings of the conference on Design, automation and test in Europe: Proceedings10.5555/1131481.1131498(53-58)Online publication date: 6-Mar-2006
  • (2006)VLSI Test Principles and ArchitecturesundefinedOnline publication date: 14-Aug-2006
  • (2004)A BIST-based Solution for the Diagnosis of Embedded Memories Adopting Image Processing TechniquesJournal of Electronic Testing: Theory and Applications10.1023/B:JETT.0000009315.57771.9420:1(79-87)Online publication date: 1-Feb-2004
  • (2002)A Hierarchical Test Scheme for System-On-Chip DesignsProceedings of the conference on Design, automation and test in Europe10.5555/882452.874547Online publication date: 4-Mar-2002
  • (2002)A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAMJournal of Electronic Testing: Theory and Applications10.1023/A:102080522421918:6(637-647)Online publication date: 1-Dec-2002
  • (2002)Diagnostic Data Compression Techniques for Embedded Memories with Built-In Self-TestJournal of Electronic Testing: Theory and Applications10.1023/A:101655792747918:4-5(515-527)Online publication date: 1-Aug-2002
  • (2001)March-Based RAM Diagnosis Algorithms for Stuck-At and Coupling FaultsProceedings of the 2001 IEEE International Test Conference10.5555/839296.843728Online publication date: 30-Oct-2001

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