Article

Interactive presentation: An FPGA design flow for reconfigurable network-based multi-processor systems on chip

Authors:

Andreas Hansson,

Henk CorporaalAuthors Info & Claims

DATE '07: Proceedings of the conference on Design, automation and test in Europe

Pages 117 - 122

Published: 16 April 2007 Publication History

Abstract

Multi-Processor System on Chip (MPSoC) platforms are becoming increasingly more heterogeneous and are shifting towards a more communication-centric methodology. Networks on Chip (NoC) have emerged as the design paradigm for scalable on-chip communication architectures. As the system complexity grows, the problem emerges as how to design and instantiate such a NoC-based MPSoC platform in a systematic and automated way.

In this paper we present an integrated flow to automatically generate a highly configurable NoC-based MPSoC for FPGA instantiation. The system specification is done on a high level of abstraction, relieving the designer of error-prone and time consuming work. The flow uses the state-of-the-art Æthereal NoC, and Silicon Hive processing cores, both configurable at design- and run-time.

We use this flow to generate a range of sample designs whose functionality has been verified on a Celoxica RC300E development board. The board, equipped with a Xilinx Virtex II 6000, also offers a huge number of peripherals, and we show how their insertion is automated in the design for easy debugging and prototyping.

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Cited By

Micconi LMadsen JPop P(2018)System-level synthesis of multi-ASIP platforms using an uncertainty modelIntegration, the VLSI Journal10.1016/j.vlsi.2015.07.00651:C(118-138)Online publication date: 28-Dec-2018
https://dl.acm.org/doi/10.1016/j.vlsi.2015.07.006
Tatas KChrysostomou C(2017)Hardware implementation of dynamic fuzzy logic based routing in Network-on-ChipMicroprocessors & Microsystems10.1016/j.micpro.2017.05.00852:C(80-88)Online publication date: 1-Jul-2017
https://dl.acm.org/doi/10.1016/j.micpro.2017.05.008
Li XHammami OAtienza DXie YAyala JStevens K(2011)Multi-objective topology synthesis and FPGA prototyping framework of application specific network-on-chipProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973021(55-60)Online publication date: 2-May-2011
https://dl.acm.org/doi/10.1145/1973009.1973021
Show More Cited By

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Information & Contributors

Information

Published In

cover image ACM Conferences

DATE '07: Proceedings of the conference on Design, automation and test in Europe

April 2007

1741 pages

ISBN:9783981080124

General Chair:
Rudy Lauwereins
IMEC and KULeuven, Belgium
,
Program Chair:
Jan Madsen
DTU, Denmark

Sponsors

The EDA Consortium
EDAA: European Design Automation Association
ECSI
SIGDA: ACM Special Interest Group on Design Automation
The IEEE Computer Society TTTC
IEEE Council on Electronic Design Automation (CEDA)
The Russian Academy of Sciences: The Russian Academy of Sciences

Publisher

EDA Consortium

San Jose, CA, United States

Publication History

Published: 16 April 2007

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Article

Conference

DATE07

Sponsor:

EDAA
SIGDA
The Russian Academy of Sciences

DATE07: Design, Automation and Test in Europe

April 16 - 20, 2007

Nice, France

Acceptance Rates

Overall Acceptance Rate 518 of 1,794 submissions, 29%

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DATE '25

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Design, Automation and Test in Europe

March 31 - April 2, 2025

Lyon , France

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Citations

Cited By

Micconi LMadsen JPop P(2018)System-level synthesis of multi-ASIP platforms using an uncertainty modelIntegration, the VLSI Journal10.1016/j.vlsi.2015.07.00651:C(118-138)Online publication date: 28-Dec-2018
https://dl.acm.org/doi/10.1016/j.vlsi.2015.07.006
Tatas KChrysostomou C(2017)Hardware implementation of dynamic fuzzy logic based routing in Network-on-ChipMicroprocessors & Microsystems10.1016/j.micpro.2017.05.00852:C(80-88)Online publication date: 1-Jul-2017
https://dl.acm.org/doi/10.1016/j.micpro.2017.05.008
Li XHammami OAtienza DXie YAyala JStevens K(2011)Multi-objective topology synthesis and FPGA prototyping framework of application specific network-on-chipProceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI10.1145/1973009.1973021(55-60)Online publication date: 2-May-2011
https://dl.acm.org/doi/10.1145/1973009.1973021
Lee JShannon LCheung PWawrzynek J(2010)Predicting the performance of application-specific NoCs implemented on FPGAsProceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays10.1145/1723112.1723118(23-32)Online publication date: 21-Feb-2010
https://dl.acm.org/doi/10.1145/1723112.1723118
Whitty SSahlbach HErnst RPutzke-Röming WBenini LDe Micheli GAl-Hashimi BMueller W(2009)Mapping of a film grain removal algorithm to a heterogeneous reconfigurable architectureProceedings of the Conference on Design, Automation and Test in Europe10.5555/1874620.1874630(27-32)Online publication date: 20-Apr-2009
https://dl.acm.org/doi/10.5555/1874620.1874630
Lucas ASahlbach HWhitty SHeithecker SErnst R(2009)Application development with the FlexWAFE real-time stream processing architecture for FPGAsACM Transactions on Embedded Computing Systems10.1145/1596532.15965369:1(1-23)Online publication date: 29-Oct-2009
https://dl.acm.org/doi/10.1145/1596532.1596536
Cozzi DFarè CMeroni ARana VSantambrogio MSciuto DLombardi FBhanja SMassoud YBahar R(2009)Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devicesProceedings of the 19th ACM Great Lakes symposium on VLSI10.1145/1531542.1531638(421-424)Online publication date: 10-May-2009
https://dl.acm.org/doi/10.1145/1531542.1531638
Hansson AGoossens KBekooij MHuisken J(2009)CoMPSoCACM Transactions on Design Automation of Electronic Systems (TODAES)10.1145/1455229.145523114:1(1-24)Online publication date: 23-Jan-2009
https://dl.acm.org/doi/10.1145/1455229.1455231
Kumar AFernando SHa YMesman BCorporaal H(2008)Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGAACM Transactions on Design Automation of Electronic Systems (TODAES)10.1145/1367045.136704913:3(1-27)Online publication date: 25-Jul-2008
https://dl.acm.org/doi/10.1145/1367045.1367049
Hansson AGoossens K(2007)Trade-offs in the Configuration of a Network on Chip for Multiple Use-CasesProceedings of the First International Symposium on Networks-on-Chip10.1109/NOCS.2007.45(233-242)Online publication date: 7-May-2007
https://dl.acm.org/doi/10.1109/NOCS.2007.45

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