Article

Addressing the system-on-a-chip interconnect woes through communication-based design

Authors:

A. Sangiovanni-VencentelliAuthors Info & Claims

DAC '01: Proceedings of the 38th annual Design Automation Conference

Pages 667 - 672

https://doi.org/10.1145/378239.379045

Published: 22 June 2001 Publication History

Abstract

Communication-based design represents a formal method approach to of system-on-a-chip design that considers communication between components as important as the computations they perform. “Our network-on-chip&rdqo ; approach partitions the communication into layers to maximize reuse and provide a programmer with an abstraction of the underlying communication framework. This layered approach is cast in the structure advocated by the OSI Reference network model and is demonstrated with a reconfigurable DSP example. The Metropolis methodology of deriving layers through a sequence of successive adaptation steps between incompatible behaviors refinement of communication is illustrated through the Intercom a design example. In another approach, MESCAL provides a designer with tools for a correct-by-construction protocol stack.

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Addressing the system-on-a-chip interconnect woes through communication-based design

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cover image ACM Conferences

DAC '01: Proceedings of the 38th annual Design Automation Conference

June 2001

863 pages

ISBN:1581132972

DOI:10.1145/378239

Chairman:
Jan Rabaey
Univ. of California

Copyright © 2001 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 22 June 2001

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Cited By

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https://doi.org/10.1109/ITC-Asia62534.2024.10661350
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https://dl.acm.org/doi/10.1007/s11227-022-04590-5
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Pei SYuan JJi YShen T(2019)DATRA: A Power-Aware Dynamic Adaptive Threshold Routing Algorithm for Dragonfly Network-on-Chip Topology2019 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Big Data & Cloud Computing, Sustainable Computing & Communications, Social Computing & Networking (ISPA/BDCloud/SocialCom/SustainCom)10.1109/ISPA-BDCloud-SustainCom-SocialCom48970.2019.00052(300-307)Online publication date: Dec-2019
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