WO2024127468A1

WO2024127468A1 - Optical circuit and method for inspecting same

Info

Publication number: WO2024127468A1
Application number: PCT/JP2022/045693
Authority: WO
Inventors: 百合子川村; 雅之高橋; 雄一郎伊熊
Original assignee: 日本電信電話株式会社
Priority date: 2022-12-12
Filing date: 2022-12-12
Publication date: 2024-06-20

Abstract

Provided are an optical circuit in which the width of the tip of an SSC core can be inspected without the need for dicing, and a method for inspecting the optical circuit. The optical circuit according to the present disclosure includes an SSC provided at an emission end thereof, and an SSC inspection circuit (204a) that inspects the width of the tip of a core of the SSC, the SSC inspection circuit (204a) including: optical input circuits (301a-301d); a plurality of first SSCs (302a-302d) on which light emitted from the optical input circuits (301a-301d) is incident; a plurality of second SSCs (303a-303d), the same number of which are arranged so as to form pairs with the respective plurality of first SSCs (302a-302d), and which are arranged so that incidence end surfaces thereof faces emission end surfaces of the plurality of first SSCs (302a-302d); and optical inspection circuits (304a-304d) that measure the power of light emitted from the respective plurality of second SSCs (303a-303d), a pair formed by one of the plurality of first SSCs (302a-302d) and one of the plurality of second SSCs (303a-303d) being arranged on the same optical axis, and the second SSCs (303a-303d) in the pairs formed by the other first SSCs (302a-302d) and second SSCs (303a-303d) being arranged in positions offset in a core width direction from the optical axes of the first SSCs (302a-302d).

Description

Optical circuit and inspection method thereof

This disclosure relates to an optical circuit and an inspection method thereof, and more specifically to an optical circuit having a spot size converter at the output end and an inspection method for inspecting the width of the tip of the core of the spot size converter.

As optical communication systems advance, the various optical components that make up optical communication systems are now realized using integrated optical circuits, which has resulted in smaller communication systems, lower costs, and larger communication capacities. Traditionally, various materials have been used for such integrated optical circuits, but in recent years, silicon photonics optical circuits, which use silicon for the core of the waveguide, have attracted attention and are the subject of vigorous research and development.

Silicon photonics optical circuits have the advantage that they can achieve significant circuit miniaturization compared to conventional optical circuits. This is because silicon has a higher refractive index than materials used in conventional optical circuits, resulting in a high light confinement effect and the ability to form waveguides with a small bending radius. In addition, silicon photonics optical circuits also contribute to the miniaturization of various circuit elements that make up optical circuits, such as optical couplers, multiplexers, and filters, making them effective in miniaturizing the entire circuit.

On the other hand, silicon photonics optical circuits have the problem that large losses occur when they are connected to optical fibers because of the high light confinement effect within the waveguide. Generally, the light propagating through the core in the optical circuit has a very small spot size due to the high light confinement effect of the core. Therefore, losses occur at the connection between the core and the optical fiber due to the difference in spot size. As a technology to suppress such losses, various spot size converters (hereinafter referred to as SSCs) have been proposed. SSCs are elements that suppress coupling losses at the connection with the optical fiber by converting the spot size of the light propagating through the core.

Generally, at the connection between the core and the optical fiber, the cross section perpendicular to the optical axis of the core (hereafter, for simplicity, referred to as the core cross section) is reduced to reduce the light confinement effect, and low-loss optical coupling is achieved by expanding the mode field diameter. Therefore, SSCs are often configured so that the cross section of each core is reduced at the connection with the optical fiber. Other known methods include reducing the core cross section after branching into multiple waveguides, and reducing the core cross section while dividing the core in the propagation direction of the light propagating through the core.

1 is a diagram showing the structure of

tapered SSCs

100 and 110 according to the prior art, in which (a) shows a top view of SSC 100 having a linear structure, (b) shows a cross-sectional view along the Ib-Ib cross-sectional line, and (c) shows a top view of SSC 110 having an inclined structure. As shown in FIG. 1, SSC 100 includes a substrate 101, a clad 102 formed on the substrate 101, and a core 103 embedded in the clad 102 and through which light propagates. Core 103 has a tapered structure in which the core cross-section continuously shrinks as it approaches the output end (the end connected to the optical fiber) (here, core 103 is depicted as a rectangular channel waveguide as an example). This tapered structure expands the mode field diameter, and the light propagating in core 103 is converted to light having a large mode field diameter at the output end. As shown in FIG. 1(c), an SSC 110 including a core 113 arranged so that the optical axis is oblique to the output end face in order to suppress reflection of light at the output end is also known as one form of tapered SSC according to conventional technology.

The

conventional SSCs

100 and 110 having such a structure have the effect of reducing the coupling loss at the connection with the optical fiber by increasing the mode field diameter. However, it is known that the mode field diameter of the

conventional SSCs

100 and 110 changes sensitively with the size of the core cross section. Meanwhile, when manufacturing optical circuits, the dimensions of the

cores

103 and 113 of the

SSCs

100 and 110 may vary for each wafer manufactured. In particular, the variation in the width of the tip of the cores 103 and 113 (the length of the part indicated by w in FIG. 1) also affects the variation in the mode field diameter at the connection with the optical fiber, which in turn leads to variation in the coupling loss at the connection with the optical fiber.

In particular, in silicon photonics optical circuits that use silicon as the core, the width of the core at the tip of the SSC's emission end is very small, on the order of several hundred nm, making it difficult to keep the variation in coupling loss at the connection with the optical fiber within a certain range. For example, if it is desirable to keep the variation in coupling loss within 0.1 dB, extremely precise processing accuracy of several nm or less is required for the core processing accuracy in order to achieve this precision in the silicon photonics wafer manufacturing process. For this reason, the current manufacturing process for optical circuits that include SSCs requires a separate process of measuring the core cross section at the tip or the mode field diameter associated with it, and selecting good products for the manufactured SSCs.

Existing methods for measuring the mode field diameter for an SSC include, for example, a method in which light emitted from the output end face of an optical circuit via an SSC is made incident on an externally installed beam profiler and measured by the beam profiler. Another example is a method in which a loop mirror and an SSC connected to the loop mirror are separately installed on an optical circuit chip as an inspection circuit, and the mode field of the SSC is estimated based on the intensity of the light reflected by the loop mirror. However, in either method, it is necessary to once dice the optical circuit chip manufactured on a wafer into individual pieces. In silicon photonics circuits, where wafer-level inspection is mainstream, measuring the mode field diameter in this way is not preferable because it leads to a longer construction period.

As an existing countermeasure against such a problem, for example, an optical circuit structure for measuring the processing accuracy of SSC during manufacturing has been disclosed (see, for example, Patent Document 1). However, when using an optical circuit having such a structure, there is a problem that the measurement time is long because it is necessary to obtain the input wavelength characteristics of the reflected wave. Another example of a countermeasure is a structure in which an inspection SSC is provided opposite the target SSC and each is connected to a GC, thereby measuring the optical coupling loss of the opposing SSC without chipping the wafer. However, in order to measure the absolute value of the coupling loss in such a structure, it is necessary to accurately measure the loss of the optical input/output means. In general, when an optical input/output means such as a grating coupler is used to measure the loss of the optical input/output means, it is difficult to make the coupling loss uniform within the wafer surface. In addition, it is difficult to accurately extract the manufacturing error only with information on the coupling loss (loss amount) when the core cross section of the opposing SSC changes.

Japanese Patent No. 6796048

This disclosure has been made in consideration of the above problems, and its purpose is to provide an optical circuit and an inspection method thereof that have a structure that makes it possible to inspect variations in the width of the tip of an SSC during manufacturing, without the need for dicing, and only requires a power measurement that takes a short measurement time.

In response to the above-mentioned problems, the present disclosure provides an optical circuit including a spot size converter (SSC) installed at the output end, and an SSC inspection circuit installed on the same chip, in the same shot, or on the same wafer as the SSC and inspecting the width of the tip of the SSC core, the SSC inspection circuit being arranged in the same number as one or more optical input circuits, a plurality of first SSCs into which light output from the optical input circuits is incident, and the SSC inspection circuits are arranged so as to form pairs with each of the plurality of first SSCs, and each of the input end faces is in contact with each of the plurality of first SSCs. and one or more optical inspection circuits that measure the power of light emitted from each of the plurality of second SSCs, where one of the plurality of first SSCs and one pair of the plurality of second SSCs are on the same optical axis, and in the other pairs of the first SSC and the second SSC, the second SSC is arranged at a position offset from the optical axis of the first SSC in the core width direction, and the offset amount in each of the other pairs of the first SSC and the second SSC is different.

1A and 1B are diagrams showing schematic diagrams of

tapered SSCs

100 and 110 according to the prior art, in which (a) is a top view of an SSC 100 having a linear structure, (b) is a cross-sectional view along the Ib-Ib cross-sectional line, and (c) is a top view of an SSC 110 having an inclined structure. 2 is a top view conceptually illustrating the structure of an optical circuit 200 according to the present disclosure. 2 is a top view showing a structure of an SSC inspection circuit 204a installed in the optical circuit 200 according to the first embodiment of the present disclosure. FIG. 11 is a graph showing the relationship between the offset amount and the optical transmission loss between each of the first SSCs 302a-d and the opposing second SSCs 303a-d, obtained by the SSC inspection circuit 204a. 5 is a flow chart illustrating a method 500 for inspecting a width of a tip of a core of an SSC in an optical circuit 200 according to a first embodiment of the present disclosure. 11 is a top view showing the structure of an SSC inspection circuit 204b installed in an optical circuit 200 according to a second embodiment of the present disclosure. FIG. 11 is a top view showing the structure of an SSC inspection circuit 204c installed in an optical circuit 200 according to a third embodiment of the present disclosure. FIG.

Various embodiments of the present disclosure will be described in detail below with reference to the drawings. The same or similar reference symbols indicate the same or similar elements, and duplicate descriptions may be omitted. Materials and numerical values are for illustrative purposes and are not intended to limit the technical scope of the present disclosure. The following description is an example, and some configurations may be omitted or modified, or additional configurations may be added, as long as they do not deviate from the gist of an embodiment of the present disclosure.

Figure 2 is a top view conceptually illustrating the structure of an optical circuit 200 according to the present disclosure. The optical circuit according to the present disclosure is an optical circuit that uses an SSC at the connection point with an optical fiber, and includes a device section 202 formed on a substrate 201 and functions as an optical circuit, SSCs 203a, b that convert the mode field diameter of the light emitted from the device section 202, and an SSC inspection circuit 204 for inspecting the width of the tips of the SSCs 203a, b during manufacture. Note that for simplicity, the cladding is omitted in the optical circuit 200 in Figure 2, but in reality, the top surface of the substrate 201 will be covered with the cladding.

The device section 202 is a section that essentially functions as an optical circuit, and has a structure in which circuit elements such as an optical modulator, a photodetector, an optical coupler, a multiplexer, and a filter are installed, and these circuit elements are connected by a waveguide. In addition, although

SSCs

203a and 203b are depicted as two bodies in FIG. 2, this is for illustrative purposes only, and the number installed is not limited to this.

The SSC inspection circuit 204 is a separate inspection circuit installed on the same chip as the device section 202 in order to evaluate the width of the core tips of the SSCs 203a and b. The SSC inspection circuit 204 includes multiple pairs (two or more pairs) of SSCs whose core tips (the ends having the tapered structure) face each other. In one pair, the opposing SSCs are arranged on the same optical axis, and in the other pairs, one SSC is arranged at a position shifted (offset) in parallel from the optical axis of the other SSC in the width direction of the core (the y direction in FIG. 3 described later).

In addition, the cores of each SSC in the SSC inspection circuit 204 are formed simultaneously with the cores of

SSCs

203a and 203b. As mentioned above, variation in the width of the tip of the SSC core during the manufacture of the optical circuit can occur from chip to chip, but it is known that such variation hardly occurs between multiple SSCs formed on the same chip. Therefore, the evaluation results of the width of the tip of the SSC core placed in the SSC inspection circuit 204 are also reflected in the cores of

SSCs

203a and 203b connected to the device section.

Note that depending on the precision of the manufacturing process and the shape of the SSCs formed (for example, when all SSCs formed on the same wafer have the same shape), there may be little variation in the width of the tip of the SSC core during the above-mentioned manufacturing process, even within the same shot/wafer. In such cases, the SSC inspection circuit 204 may be configured so that one SSC inspection circuit is provided for each wafer or shot.

Various embodiments of the present disclosure are described in detail below with reference to the drawings.

First Embodiment
3 is a top view showing the structure of the SSC inspection circuit 204a installed in the optical circuit 200 according to the first embodiment of the present disclosure. As shown in FIG. 3, the SSC inspection circuit 204a includes optical input circuits 301a-d, a plurality of first SSCs 302a-d to which light emitted from the optical input circuits 301a-d is incident, second SSCs 303a-d arranged such that each of the incident end faces faces the corresponding output end face of the first SSCs 302a-d and the same number of second SSCs 303a-d are arranged to form pairs with each of the first SSCs 302a-d, and optical inspection circuits 304a-d that perform power measurement of light emitted from each of the second SSCs 203a-d.

The optical input circuits 301a-d, the first SSC 302a-d, the second SSC 303a-d, and the optical inspection circuits 304a-d are arranged on the same plane (the xy plane in FIG. 3). Note that in FIG. 2, the first SSC 302a-d and the second SSC 303a-d are depicted as being arranged in fours, but this is for illustrative purposes only, and it is sufficient that the first SSC 302a-d and the second SSC 303a-d are arranged in multiples, and that the arrangement numbers are the same (to form pairs).

As shown in Figure 3, the exit end faces of the first SSCs 302a-d and the entrance end faces of the second SSCs 303a-d are arranged so that their tips (the ends having the tapered structure) face each other. In one pair of these (the first SSC 302a and the second SSC 303a in Figure 2), each is arranged on the same optical axis (depicted by the dashed line in Figure 3). On the other hand, in the other pairs (the first SSC 302b and the second SSC 303b, the first SSC 302c and the second SSC 303c, and the first SSC 302d and the second SSC 303d), each of the second SSCs 303b-d is arranged so that the optical axis of each of the first SSCs 302b-d and the optical axis of the second SSC 303b-d are shifted in parallel (offset) in the y direction by a preset amount. If the offset amounts (hereinafter referred to as offset amounts) between the first SSC 302b and the second SSC 303b, between the first SSC 302c and the second SSC 303c, and between the first SSC 302d and the second SSC 203d are Δb, Δc, and Δd, respectively, it is preferable that Δc and Δd increase linearly in sequence so that Δc = 2Δb and Δd = 3Δb. This is to accurately obtain the relationship between the offset amount and the transmission loss in FIG. 4, which will be described later.

In the SSC inspection circuit 204a having such a structure, the optical transmission loss between each of the first SSCs 302a-d and the opposing second SSCs 303a-d changes depending on the offset amount.

FIG. 4 is a graph showing the relationship between the offset amount obtained by the SSC inspection circuit 204a and the light transmission loss between each of the first SSCs 302a-d and the opposing second SSCs 303a-d. As shown in FIG. 4, it can be seen that in the SSC inspection circuit 204a, the light transmission loss increases as the offset amount increases. Note that FIG. 4 also shows the transmission loss when the width of the core tips of the first SSCs 302a-d and second SSCs 303a-d is changed between 110-150 nm. As shown in FIG. 4, it can be seen that the transmission loss increases as the width of the core tips of the first SSCs 302a-d and second SSCs 303a-d increases.

As mentioned above, it has been found that there is almost no variation in the width of the tips of the cores of multiple SSCs formed on the same chip. In other words, the variation in the width of the tips of the cores of the first SSC 302a-d and the second SSC 303a-d, as well as the SSCs 203a and b connected to the device section 202, is about the same.

FIG. 5 is a flowchart showing a method 500 for inspecting the width of the core tips of the SSCs in the optical circuit 200 according to the first embodiment of the present disclosure. As shown in FIG. 5, the method 500 for inspecting the width of the core tips of the SSCs in the optical circuit 200 includes: injecting light into the first SSCs 302a-d via the optical input circuits 301a-d (S501); measuring the power of the light emitted from the second SSCs 303a-d by the optical inspection circuits 304a-d (S502); determining the relationship between the offset amount and the transmission loss obtained by measuring the power of the measured light (S503); and estimating the width of the core tips of the SSCs 203a, b installed at the output end based on the determined relationship between the offset amount and the transmission loss (S504).

In this way, using the SSC inspection circuit 204a, it is possible to determine whether the width is within the desired range from the relationship between the offset amount and the transmission loss obtained by the method 500. For example, if the relationship between the offset amount and the transmission loss obtained by the SSC inspection circuit 204a is located between the 140 nm line and the 150 nm line in FIG. 4, the width of the tip of the core of the SSC 203a, b formed on the same wafer as the SSC inspection circuit 204a can be estimated to be approximately 140-150 nm.

The optical input circuits 301a-d may be end-connected optical input circuits, or surface-connected grating couplers or waveguide flip-up mirrors. The optical inspection circuits 304a-d may be photodetectors arranged inside the chip, or may be configured to extract light outside the chip and measure it with an external detector (such as a power meter), or may be configured to be connected to a reflective optical circuit. The reflective circuit may use, for example, a loop-back mirror, a structure that uses reflection at the end of a waveguide, or a structure that uses a Bragg grating. When such a reflective optical circuit is used, the transmission loss of the opposing SSC can be measured by inserting a circulator before the optical input circuit and measuring the reflected light intensity.

By using the SSC inspection circuit 204a according to the first embodiment of the present disclosure, it is possible to inspect the width of the core tips of the

SSCs

203a and 203b connected to the device section 202 without the need for dicing. This has the effect of reducing the time required to select good products compared to conventional technology.

Second Embodiment
6 is a top view showing the structure of an SSC inspection circuit 204b installed in an optical circuit 200 according to a second embodiment of the present disclosure. As shown in FIG. 6, in the SSC inspection circuit 204b according to this embodiment, the optical input circuits 301a-b in the first embodiment are replaced with one optical input circuit 601, and light emitted from the optical input circuit 501 is split by splitters 602a-c and input to first SSCs 302a-d.

Even with this configuration, as in the first embodiment, it is possible to obtain the relationship between the offset amount and the transmission loss, and it is possible to inspect the width of the tips of the cores of SSC203a and b from the relationship between the offset amount and the transmission loss.

The SSC inspection circuit 204b according to this embodiment is effective when the optical input circuit 501 has a large manufacturing error, such as a grating coupler. Since the light input from one optical input circuit 601 is split and the transmission loss between the first SSC 302a-d and the second SSC 303a-d is measured, the transmission loss can be accurately measured even if there is a manufacturing error in the optical input circuit 601.

Third Embodiment
7 is a top view showing the structure of an SSC inspection circuit 204c installed in an optical circuit 200 according to a third embodiment of the present disclosure. As shown in FIG. 7, in the SSC inspection circuit 204c according to this embodiment, the optical inspection circuits 304a-b in the first embodiment are replaced with one optical inspection circuit 701, and the light emitted from the second SSCs 303a-d is multiplexed by multiplexers 702a-c and input to the optical inspection circuit 701.

The SSC inspection circuit 204c according to this embodiment is effective, for example, when a photodetector fabricated on silicon photonics is used as the optical inspection circuit 701. Each photodetector requires an electrode pad on the chip surface where a pin or the like can contact in order to extract the photocurrent. Therefore, when a sufficient area for pads cannot be secured, a low-footprint circuit configuration can be realized by applying the SSC inspection circuit 204c.

Furthermore, the SSC inspection circuit 204c is effective when there is a large manufacturing error in the optical inspection circuit 701 or the reflective optical circuit applied thereto. Since the same optical inspection circuit 701 measures the transmission loss between the first SSC 302a-d and the second SSC 303a-d, the transmission loss can be accurately measured even if there is a manufacturing error in the optical inspection circuit 701.

As described above, the optical circuit disclosed herein does not require dicing and makes it possible to inspect the width of the tip of the core of an SSC formed on the same wafer. An optical circuit having such characteristics is expected to be applied to optical communication systems, particularly optical communication systems that include optical spot size converters in the optical transmitters of optical communication systems.

Claims

An optical circuit comprising: a spot size converter (SSC) installed at an output end; and an SSC inspection circuit installed on the same chip, in the same shot, or on the same wafer as the SSC, for inspecting a width of a tip of a core of the SSC,
The SSC inspection circuit includes:
one or more optical input circuits;
a plurality of first SSCs to which the light emitted from the optical input circuit is incident;
a plurality of second SSCs arranged in the same number as the plurality of first SSCs so as to form pairs with each of the plurality of first SSCs, and arranged such that an entrance end surface of each of the second SSCs faces an exit end surface of each of the plurality of first SSCs;
one or more optical test circuits that measure the power of light emitted from each of the plurality of second SSCs;
Equipped with
A pair of one of the plurality of first SSCs and one of the plurality of second SSCs is arranged at a position on the same optical axis, and at least one pair of at least one remaining of the plurality of first SSCs and at least one remaining of the plurality of second SSCs is arranged at a position where the optical axis of the second SSC is offset from the optical axis of the first SSC in the width direction of the core,
the at least one pair of at least one remaining one of the first SSCs and at least one remaining one of the second SSCs are arranged with a respective offset amount;
Optical circuit.
The optical circuit of claim 1, wherein the offset amount increases linearly and sequentially.
The optical circuit according to claim 1, further comprising at least one splitter that splits the light emitted from the optical input circuit.
The optical circuit of claim 1, further comprising at least one multiplexer that multiplexes the light emitted from each of the second SSCs.
The optical circuit of claim 1, wherein the optical input circuit is a surface-connected optical input circuit.
The optical circuit of claim 1, wherein the optical inspection circuit is a photodetector.
7. A method for inspecting a width of a tip of a core of an SSC disposed at the output end in an optical circuit according to claim 1, comprising the steps of:
injecting light into the plurality of first SSCs via the one or more optical input circuits;
measuring, by the one or more optical test circuits, the power of light emitted from the second SSCs;
determining a relationship between the offset and a transmission loss obtained by the measured optical power;
estimating a width of a tip of a core of the SSC to be installed at the output end based on the determined relationship;
An inspection method comprising: