WO2023213394A1

WO2023213394A1 - Multi-layer printed circuit board and method for its production

Info

Publication number: WO2023213394A1
Application number: PCT/EP2022/062058
Authority: WO
Inventors: Andreas Munding; Lasse Petteri PALM
Original assignee: Huawei Digital Power Technologies Co., Ltd.
Priority date: 2022-05-04
Filing date: 2022-05-04
Publication date: 2023-11-09

Abstract

The disclosure relates to a multi-layer Printed Circuit Board, PCB (100) and a method for its production. The multi-layer PCB comprises a first PCB layer (110) of a plurality of PCB layers (110, 120, 130) stacked upon each other. Each PCB layer comprises: at least one conductive layer (111a, 111b); a mold body (150) embedded in the first PCB layer; an electrical component (140) embedded in the mold body; a metal contact layer (141a, 141 b) for electrically contacting the electrical component, the metal contact layer extending beyond a projected surface of the electrical component, the mold body forming with the electrical component and the metal contact layer a first component module package (180); and at least one conductively plated through-hole (170) penetrating the plurality of PCB layers and at least part of the metal contact layer to provide an electrical connection terminal for electrically connecting (171) to the metal contact layer.

Description

MULTI-LAYER PRINTED CIRCUIT BOARD AND METHOD FOR ITS PRODUCTION

TECHNICAL FIELD

The disclosure relates to the field of chip embedding technology for manufacturing power electronic packages and assemblies. In particular, the disclosure relates to a multi-layer printed circuit board (PCB) and a method for its production. Specifically, a method and structure to connect embedded module vertically inside the PCB is disclosed.

BACKGROUND

In today’s Chip Embedding technology, interconnections of active or passive components embedded inside a PCB board (printed circuit board) or laminate module package are formed by galvanically filled micro vias. The micro vias are usually formed by laser drilling through the dielectric laminate layer above active chip pads or above terminals of packaged electronic components after they have been covered by a thin layer of laminate material.

This has several disadvantages: Two modules that are stacked or that are placed in the same layer can’t be connected directly and due to this the connection length is longer than the shortest path between the two modules. Side by side components have to be connected first to the next level outer layer above the components before a horizontal connection can be made. This inherently adds impedance to sensitive switching cell designs. Stacked components above each other have to be first connected to layer above and the actual connection can be performed only outside of the die area. The usual micro vias are small, typically a high number of vias are required in power applications, they can only span a limited laminate thickness of about 60 to 100 pm, and they can only be expanded by successively adding more layers, thus stacking the micro vias one above the other. Larger micro vias are much more expensive to manufacture. This adds process complexity and cost. Embedding by using a micro via process typically limits the Cu thickness to about 30 to 50 pm per layer due to the constraints of HDI (high density interconnect) PCB processing.

A further disadvantage of above contact methods is that they will not create the shortest path between the component terminals. This adds up additional parasitic resistivity and parasitic inductivity which inhibits performance and limits power density and efficiency, in particular, when using wide bandgap semiconductors in applications with high switching frequencies. SUMMARY

This disclosure provides a solution for a multi-layer printed circuit board and production of such multi-layer PCB without the above-described disadvantages.

In particular, this disclosure presents a solution for a multi-layer PCB that has reduced parasitic resistivity and reduced parasitic inductivity, thereby showing improved performance, power density and efficiency, in particular when using wide bandgap semiconductors in applications with high switching frequencies.

The foregoing and other objects and other objectives are achieved by the features of the independent claims. Further implementation forms are apparent from the dependent claims, the description and the figures.

The solution presented in this disclosure achieves these objects at a feasible cost by using a PTH (plated through-hole) drilling process to connect the embedded component to the inner layer in a new innovative and advanced way as described below in detail with respect to the Figures. The PTH can be drilled though the PCB panel in such a way that one PTH contacts both the component terminal (pad, metallization or lead) and the inner copper layer of the PCB. After metallizing the through-hole, the component terminals can be electrically connected directly to the routing in the same layer.

The main advantage of connecting the components in this way is that now the electrical path does not alternate between layers and thus can be made in a direct way which can truly be the shortest path between two components. Another advantage is that this method does not require any high precision high density technology on the PCB manufacturer side. If pre-packaged components are used for embedding, the method can be implemented in a robust and cost-efficient way using standard PCB manufacturing equipment.

The presented innovation overcomes the limitations of micro via based galvanic contacts. It allows shortest path connections of components embedded inside a PCB or laminate module package either in a side-by-side arrangement or in a vertical (3-dimensional) arrangement. It allows to use thick dielectric layers without the restrictions of micro vias. Lay-up and lamination of multiple layers can be performed simultaneously. Higher isolation voltages can be achieved. The contacts and interconnects to the embedded devices are formed using a PTH (plated through-hole) process at the end of the lamination process. The number of the vias can be reduced due to the higher current capability of a single via. This also allows to reduce the cost. No special requirements like e. g. high precision die attach or HDI manufacturing capabilities for PCB manufacturers are necessary.

The advantages of the solution described in this disclosure are the following: Short and direct electrical contact; Connection with only one large area PTH (plated through-hole); Reduced parasitic due to shorter connection path without loops (U or S shaped traces); Low cost due to simpler process flow; No pvia process or HDI (high density interconnect) PCB process required; It can be combined with low cost industrial PCB process; It allows Cu thickness even up to 150pm; Embedding can be done by several PCB suppliers.

The solution described herein is thus a key to low inductance packaged switching cells using PCB embedded component technology. It is also an enabler of 3D integration in laminate embedding technology.

The disclosure focuses on a process flow and the resulting electrical contact structure between embedded component terminals and inner PCB metal layer, whereas the electrical contact consists of a plated through-hole via (PTH) and the inner layer can be in-plane with the terminals of the embedded component. In particular, the disclosure is concentrating on the packages components, not on the bare dies. The component can be inside a molded package, e.g., a leadframe based package or a fan-out wafer level package (FOWLP), etc., or a laminate based package, e.g., die on a laminate interposer, Chip embedding (CE) package where the die is embedded inside a PCB material.

The embedded component has electrical terminals, which can essentially be the leads of a packaged component, exposed bond wires or ribbons, or other metallized chip or package areas that extend beyond the projected area of the chip. The metallization should be compatible with standard PTH chemistry.

The electrical terminals are usually exposed, but they can also be buried within the package. In the latter case they will be exposed by the PTH via drilling process. This has the advantage that the terminals and the dies are protected against contamination, oxidation or corrosion by the package material.

In orderto describe the disclosure in detail, the following terms, abbreviations and notations will be used:

PCB printed circuit board HDI high density interconnect

PTH plated through-hole

FOWLP fan-out wafer level package

In this disclosure, chip embedding technologies are described. There are several different types of embedding processes available: In atypical chip embedding process, the electronic components (chips, capacitors, resistors, etc.) are either placed inside an opening in a PCB core layer or soldered on a two or multilayer PCB board. The actual embedding inside the final PCB board can be performed by laminating FR4 prepregs or other polymer sheets above and below the core layer that holds the components to be embedded. The electrical connection between the embedded components and the PCB metal layers can be formed by soldering the component terminals to the inner laminate layers and subsequently laminating the PCB layers together. In more advanced embedding technologies, the components can be electrically connected by galvanically filled micro vias which is more robust, since there is no remelting of solder inside the package or board, which has to be considered when mounting the other components to the outer layers of the PCB. The micro vias are usually formed after lamination by laser drilling from the top surface through the thin laminate layer to the active chip pads or to the terminals of an embedded component package.

This disclosure presents a novel component embedding process that is based on using a PTH (plated through-hole) drilling process to connect the embedded component to the inner layer in a new, innovative and advanced way. The PTH can be drilled though the PCB panel in such a way that one PTH contacts both the component terminal, i.e., contact pad, pin, metallization trace or lead, and the inner copper layer of the PCB. By metallizing the through-hole, the component terminals can be electrically connected directly to the routing in the same layer.

Through-hole technology refers to the mounting scheme used for electronic components that involves the use of leads on the components that are inserted into holes drilled in printed circuit boards (PCB) and soldered to pads on the opposite side either by manual assembly (hand placement) or by the use of automated insertion mount machines. In through-hole technology, the components are mounted on the PCB board by inserting their leads through the respective hole. These holes are called through holes since they are drilled from the top to the bottom of the board. When using Plated Through Holes, the inner wall of the holes is covered with a thin layer of Copper, which makes the entire inner hole area conductive. This conductivity benefit establishes an electrical connection between components and Copper tracks. It also enhances mechanical stability and reduces the overall resistance to support smooth current flow. The average Cu plating thickness is minimum 20pm. As electronic components become more integrated and complex, double-sided and multi-layered PCBs were developed along with plated through holes, so that components may connect to the desired layers, whenever required.

According to a first aspect, the disclosure relates to a multi-layer Printed Circuit Board, comprising: a first Printed Circuit Board layer of a plurality of Printed Circuit Board layers stacked upon each other, each Printed Circuit Board layer comprising at least one conductive layer; a mold body embedded in the first Printed Circuit Board layer, the mold body having an upper main face and a lower main face opposing the upper main face; an electrical component embedded in the mold body; a metal contact layer for electrically contacting the electrical component, the metal contact layer extending beyond a projected surface of the electrical component, the mold body with the electrical component and the metal contact layer forming a first component module package; and at least one conductively plated through-hole penetrating the plurality of Printed Circuit Board layers and at least part of the metal contact layer, the at least one conductively plated through-hole being configured to provide an electrical connection terminal for electrically connecting to the metal contact layer. The electrical component can be, for example, a semiconductor or other components, e.g., silicon capacitors, encapsulated inductors, shunt resistors, current sensors, etc. The first component module package can be, for example, a first semiconductor module package and the second component module package can be, for example, a second semiconductor module package, e.g., as described below with respect to the Figures.

The metal contact layer extends beyond the projected surface of the electrical component such that the mold body can be vertically perforated without destroying the electrical component inside the mold body.

Such multi-layer PCB overcomes the above-described disadvantages of microvia galvanic contact methods. The multi-layer PCB particularly provides the following advantages: Short and direct electrical contact; connection with only one large area PTH (plated through-hole); reduced parasitic due to shorter connection path without loops (U or S shaped traces); low cost due to simpler process flow; no pvia process/HDI (high density interconnect) PCB process required; production of the multi-layer PCB can be combined with low cost industrial PCB process; Cu thickness even up to 150pm can be achieved; Embedding can be done by several PCB suppliers.

A further advantage of such multi-layer PCB is that now the electrical path does not alternate between layers and thus can be made in a direct way which can truly be the shortest path between two components.

In an exemplary implementation of the multi-layer Printed Circuit Board, the metal contact layer may be arranged at one or both of the two main faces of the mold body or at any of the side faces of the mold body.

In an exemplary implementation of the multi-layer Printed Circuit Board, the at least one conductively plated through-hole is configured to electrically connect the metal contact layer to the at least one conductive layer of at least one of the plurality of Printed Circuit Board layers.

This provides the advantage that the electrical component can be efficiently electrically connected by the metal contact layer and the through-hole to a variety of PCB layers, e.g., to other components embedded in other PCB layers.

In an exemplary implementation of the multi-layer Printed Circuit Board, the at least one conductively plated through-hole is configured to electrically connect the metal contact layer to another metal contact layer of a second component module package.

This provides the advantage that two component module packages on different or the same PCB layers can be efficiently connected via the plated through-hole.

In an exemplary implementation of the multi-layer Printed Circuit Board, the at least one conductively plated through-hole forms a shortest-path electrical connection of the first component module package to a closest conductive layer outside the first component module package.

Such shortest-path electrical connection provides the advantage of reduced parasitic resistivity and reduced parasitic inductivity resulting in improved performance and improved power density and efficiency, in particular when using wide bandgap semiconductors in applications with high switching frequencies. In an exemplary implementation of the multi-layer Printed Circuit Board, the at least one conductively plated through-hole forms a direct electrical connection path for connecting the first component module package without a detour via other conductive layers of the plurality of Printed Circuit Board layers.

The same advantages as described above for the shortest-path electrical connection can be achieved, i.e., reduced parasitic resistivity and reduced parasitic inductivity, improved performance and improved power density and efficiency.

In an exemplary implementation of the multi-layer Printed Circuit Board, the metal contact layer of the first component module package is in plane with the at least one conductive layer of the first Printed Circuit Board layer.

This provides the advantage that by the metal contact layer of the first component module package being in plane with the conductive layer of the first PCB layer, a shortest-path electrical connection can be realized having the above-described advantages.

In an exemplary implementation of the multi-layer Printed Circuit Board, the at least one conductively plated through-hole forms a horizontal electrical connection path between the metal contact layer of the first component module package and the at least one conductive layer of the first Printed Circuit Board layer.

This provides the advantage that the horizontal electrical connection path can realize a shortest-path electrical connection between the component module package and the conductive layer of the first PCB layer which provides the above-described advantages of reduced parasitic resistivity and reduced parasitic inductivity, improved performance and improved power density and efficiency.

In an exemplary implementation of the multi-layer Printed Circuit Board, the metal contact layer is extending outside an area of the mold body at the lower main face to form the first component module package as a leaded package or is extending within the area of the mold body at the lower main face to form the first component module package as a leadless package.

This provides the advantage that the solution described in this disclosure can be applied for both, leaded packages as well as leadless packages as well as combinations of leaded packages and leadless packages. In an exemplary implementation of the multi-layer Printed Circuit Board, the first component module package is placed face-up or face-down in the first Printed Circuit Board layer.

This provides the advantage of high design flexibility. Each component module package can be individually placed either face-up or face-down.

In an exemplary implementation of the multi-layer Printed Circuit Board, the second component module package is placed face-up or face-down in the first Printed Circuit Board layer or in any other Printed Circuit Board layer of the plurality of Printed Circuit Board layers.

In this context, a face-up placement means that the upper main face of the mold body is facing the top side of the respective Printed Circuit Board layer and the lower main face of the mold body is facing or is arranged at the bottom side of the of the respective Printed Circuit Board layer. A face-down placement is opposite to a face-up placement, i.e., a facedown placement means that the upper main face of the mold body is facing the bottom side of the respective Printed Circuit Board layer and the lower main face of the mold body is facing or is arranged at the top side of the of the respective Printed Circuit Board layer.

This provides the advantage of high design flexibility. Both component module packages can be individually placed either face-up or face-down. For example, the first component module package can be placed face-up while the second component module package is placed face-down or vice-versa.

The conductively plated through-hole can be conductively plated by Copper using electroless and electrochemical plating processes, for example. In one example, the plating at the sidewalls may have a thickness of about 20 to 30 pm. The plated through-hole can also be filled, e.g., completely filled with copper or conductive paste, by using via filling processes. Note that Cu filling is possible in case of smaller via diameters. A diameter of the conductively plated through-hole can be about 150 pm as one example. However, the through-hole structure can have a diameter of up to 500 pm or even up to 1 mm, for example.

In an exemplary implementation of the multi-layer Printed Circuit Board, the multi-layer Printed Circuit Board comprises: a laminate layer embedding the mold body and the metal contact layer within the first Printed Circuit Board layer. This provides the advantage that the laminate layer can be used for embedding and protecting the component module packages.

The laminate layer may be formed from a prepreg layer by applying a lamination process.

In an exemplary implementation of the multi-layer Printed Circuit Board, the at least one conductively plated through-hole penetrates the prepreg layer, the at least one plated through-hole touching the mold body and the at least part of the metal contact layer.

This provides the advantage that the plated through-hole can be drilled without high precision into the prepreg layer for providing a robust electrical connection with the metal contact layer. Compared to typical chip embedding processes, no high precision such as for laser drilling of chip contacts is required.

In an exemplary implementation of the multi-layer Printed Circuit Board, the first component module package and/or the second component module package comprise a power semiconductor package.

This provides the advantage that the multi-layer Printed Circuit Board can efficiently implement a semiconductor power product comprising of one or more component module packages.

In an exemplary implementation of the multi-layer Printed Circuit Board, the first component module package and the second component module package can be configured to form a half bridge configuration. It understands that a lot of other configurations of the two power dies can be implemented as well.

This provides the advantage that the multi-layer PCB can be efficiently applied in automotive power conversion systems and in other applications, e.g., for motor power control, etc. The half bridge configuration is a reoccurring key topology element in power electronics conversion circuits.

In an exemplary implementation of the multi-layer Printed Circuit Board, the metal contact layer is arranged to protrude from the electrical component. For example, the metal contact layer may be arranged at an upper main face, a lower main face or a side face of the electrical component to protrude from that face. This provides the advantage that by such metal contact layer, the electrical component can be efficiently electrically contacted. Besides, thermal dissipation of the electrical component can be improved.

The multi-layer Printed Circuit Board can be a printed wiring board on its own, with other components mounted to it by SMD, THT or press-fit technology. The multi-layer PCB may also be a package on another PCB, for example any of the following packages: DFN (Dual Flat No Lead), DSC (Dual Small Outline), SON (Small Outline No lead), SOP (Small Outline Package), LGA (Land Grid Array), WLCSP (wafer-level chip-scale package), ECP (embedded component packaging), CE (Chip Embedding), etc.

The DFN/QFN is a leadless surface mount plastic package in which leads located at the bottom of the package instead of the conventional formed peripherally. Thus, a very compact size of the package.

Small Outline No Lead (SON) packages provide a small form factor at 0.4 and 0.5mm pitch. These are normally smaller pincount devices in a robust, plastic package compatible with all end equipment including automotive. Quad lead version is referred to as QFN.

Land Grid Array (LGA) is a laminate substrate-based package that uses metal pads for external electrical connection instead of solder balls (as in the ball grid array). These metal pads, which are called 'lands', are arranged in a grid or array at the bottom of the package body. The grid arrangement of the lands of the LGA package allows it to have a high land count, making it a popular packaging option for devices with high I/O requirements.

According to a second aspect, the disclosure relates to a method for producing a multi-layer Printed Circuit Board, the method comprising: laying-up a plurality of Printed Circuit Board layers upon each other together with respective lamination layers between any two of the Printed Circuit Board layers, each Printed Circuit Board layer comprising at least one conductive layer, wherein a mold body is embedded in a first Printed Circuit Board layer of the plurality of Printed Circuit Board layers, the mold body having an upper main face and a lower main face opposing the upper main face, wherein an electrical component is embedded in the mold body; and a metal contact layer for electrically contacting the electrical component is extending beyond a projected surface of the electrical component, the mold body with the electrical component and the metal contact layer forming a first component module package; laminating the plurality of Printed Circuit Board layers together with the respective lamination layers to form a multi-layer Printed Circuit Board; drilling at least one hole into the multi-layer Printed Circuit Board, the at least one hole penetrating the plurality of Printed Circuit Board layers and at least part of the metal contact layer; conductively plating the at least one hole to form at least one conductively plated through- hole to provide an electrical connection terminal for electrically connecting to the metal contact layer.

Such method provides the advantage that by connecting the components in the abovedescribed way, the electrical path does not alternate between layers and thus can be made in a direct way which can be the shortest path between two components. Another advantage is that this method does not require any high precision high density technology on the PCB supplier side. If pre-packaged components are used for embedding, the method can be implemented in a robust and cost-efficient way using standard PCB manufacturing equipment.

In an exemplary implementation of the method, the method comprises: electrically connecting the metal contact layer to the at least one conductive layer of at least one of the plurality of Printed Circuit Board layers by the at least one conductively plated through-hole.

This provides the advantage that the electrical component can be efficiently electrically connected by the metal contact layer and the through-hole to a variety of PCB layers, e.g., to other electrical components embedded in other PCB layers.

In an exemplary implementation of the method, the method comprises: electrically connecting the metal contact layer to another metal contact layer of a second component module package (380) by the at least one conductively plated through-hole.

This provides the advantage that one or two component module packages on different or the same PCB layers can be efficiently connected via the plated through-hole to other component module packages or SMA (surface mount assembly) components or embedded components.

In an exemplary implementation of the method, the metal contact layer is embedded within the mold body and exposed by the drilling of the at least one hole.

This provides the advantage that the mold body can be directly opened by means of standard drilling or milling methods resulting in a robust connection of the metal contact layer and hence the electrical component to other conductive layers or other electrical components in the same or other PCB layers of the multi-layer PCB, resulting in high design flexibility.

According to a third aspect, the disclosure relates to a computer program product including computer executable code or computer executable instructions that, when executed, causes at least one computer to execute the method according to the second aspect described above.

The computer program product may run on a controller or a processor for controlling the above-described power conversion arrangement.

According to a fourth aspect, the disclosure relates to a computer-readable medium, storing instructions that, when executed by a computer, cause the computer to execute the method according to the second aspect described above. Such a computer readable medium may be a non-transient readable storage medium. The instructions stored on the computer- readable medium may be executed by a controller or a processor.

BRIEF DESCRIPTION OF THE DRAWINGS

Further embodiments of the disclosure will be described with respect to the following figures, in which:

Figure 1 shows a schematic cross section of a multi-layer Printed Circuit Board 100 according to a first embodiment;

Figure 2a shows a section of the cross section of the multi-layer Printed Circuit Board 100 shown in Figure 1 ;

Figure 2b shows a through-view of the multi-layer Printed Circuit Board 100 shown in Figure 1 from top side;

Figure 3 shows a schematic cross section of a multi-layer Printed Circuit Board 300 according to a second embodiment;

Figure 4 shows a schematic cross section of a multi-layer Printed Circuit Board 400 according to a third embodiment; Figure 5 shows a basic process flow for manufacturing a multi-layer Printed Circuit Board according to the first embodiment with schematic cross sections on the left-hand side and through view from top on the right-hand side;

Figure 6 shows a basic process flow for manufacturing a multi-layer Printed Circuit Board according to the second embodiment with schematic cross sections on the left-hand side and through view from top on the right-hand side; and

Figure 7 shows a schematic diagram illustrating a method 700 for producing a multi-layer Printed Circuit Board according to the disclosure.

DETAILED DESCRIPTION OF EMBODIMENTS

In the following detailed description, reference is made to the accompanying drawings, which form a part thereof, and in which is shown by way of illustration specific aspects in which the disclosure may be practiced. It is understood that other aspects may be utilized and structural or logical changes may be made without departing from the scope of the disclosure. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the disclosure is defined by the appended claims.

It is understood that comments made in connection with a described method may also hold true for a corresponding device or system configured to perform the method and vice versa. For example, if a specific method step is described, a corresponding device may include a unit to perform the described method step, even if such unit is not explicitly described or illustrated in the figures. Further, it is understood that the features of the various exemplary aspects described herein may be combined with each other, unless specifically noted otherwise.

Figure 1 shows a schematic cross section of a multi-layer Printed Circuit Board 100 according to a first embodiment.

The multi-layer PCB 100 comprises a first Printed Circuit Board layer 110 of a plurality of Printed Circuit Board layers 110, 120, 130 stacked upon each other. Figure 1 shows an example for a multi-layer PCB 100 comprising an exemplary number of three PCB layers 110, 120, 130. It understands that this is only an exemplary configuration, any other number of PCB layers can be implemented as well. Each Printed Circuit Board layer 110, 120, 130 comprises at least one conductive layer 111a, 111 b. It understands that there can also be less layers and the connection can be between the component and any layers. In the simplest form, there can be only the layer 110 (with or even without the conductive layer 111a and 111 b) and on top of the additional Cu layer on top of layers 112b and 112a. The connection between the component metallization 141 b can also be to the other metal layer than 111a. Basically, the component can be connected with though hole to any layer on the PCB.

The multi-layer PCB 100 comprises a mold body 150 embedded in the first Printed Circuit Board layer 110, the mold body 150 having an upper main face 151 and a lower main face 152 opposing the upper main face 151 as illustrated in Figure 1.

The multi-layer PCB 100 comprises: a semiconductor component 140, e.g., power chip such as MOSFET or IGBT, embedded in the mold body 150; a metal contact layer 141a, 141 b for electrically contacting the semiconductor component 140. The metal contact layer 141a, 141 b is arranged to protrude from the mold body 150. In particular, the metal contact layer 141a, 141 b can be arranged at one or both of the two main faces 151 , 152 or in between the two main faces 151 , 152 of the mold body 150. The mold body 150 with the semiconductor component 140 and the metal contact layer 141a, 141 b is forming a first semiconductor module package 180.

The multi-layer PCB 100 comprises a conductively plated through-hole 170 penetrating the plurality of Printed Circuit Board layers 110, 120, 130 and at least part of the metal contact layer 141a, 141 b. The conductively plated through-hole 170 is configured to provide an electrical connection terminal for electrically connecting 171 to the metal contact layer 141a, 141 b as depicted in Figure 1.

The conductively plated through-hole 170 may be configured to electrically connect the metal contact layer 141a, 141 b to the at least one conductive layer 111a, 111 b of at least one of the plurality of Printed Circuit Board layers 110, 120, 130.

In the example of Figure 1 , the conductively plated through-hole 170 (on right-hand side of Figure 1) connects the metal contact layer 141a to conductive layer 111a (on right-hand side of Figure 1) of the same PCB layer 110. Besides, the conductively plated through-hole 170 (on left-hand side of Figure 1) connects the metal contact layer 141 b to conductive layer 111a (on left-hand side of Figure 1) of the same PCB layer 110. The conductively plated through-hole 170 may be configured to electrically connect the metal contact layer 141a, 141 b to another metal contact layer 341a, 341 b of a second semiconductor module package 380, as shown in Figure 3 illustrating the second embodiment of a multi-layer PCB.

As mentioned above, there can also be less layers and the connection can be between the component and any layers. In the simplest form, there can be only the layer 110 (with or even without the conductive layer 111a and 111 b). The connection between the component metallization 141 b can also be to another metal layer than layer 111a. Basically, the component can be connected by the though-hole 170 to any layer on the PCB.

The conductively plated through-hole 170 is configured to form a shortest-path electrical connection of the first semiconductor module package 180 to a closest conductive layer 111a outside the first semiconductor module package 180. In Figure 1 , the electrical connection is represented as a straight line that passes the conductively plated through- hole 170 (e.g., on a horizontal circle not shown in Figure 1) on the shortest path which corresponds to a horizontal line in the cross section illustrated in Figure 1 .

The conductively plated through-hole 170 thus forms a direct electrical connection path for connecting the first semiconductor module package 180 without a detour via other conductive layers of the plurality of Printed Circuit Board layers 110, 120, 130.

The metal contact layer 141a, 141 b of the first semiconductor module package 180 can be in plane with the at least one conductive layer 111a of the first Printed Circuit Board layer 110 in order to provide the shortest-path electrical connection 171.

The conductively plated through-hole 170 may form a horizontal electrical connection path between the metal contact layer 141a, 141 b of the first semiconductor module package 180 and the at least one conductive layer 111a of the first Printed Circuit Board layer 110. As described above, this horizontal electrical connection path corresponds to the shortest electrical connection path

The metal contact layer 141a, 141 b may extend outside an area of the mold body 150 at the lower main face 152 to form the first semiconductor module package 180 as a leaded package as shown in Figure 1. Alternatively, the metal contact layer 141a, 141 b may extend within the area of the mold body 150 at the lower main face 152 to form the first semiconductor module package 180 as a leadless package, e.g., as described below with respect to Figure 4 for the third embodiment.

Alternatively, the first semiconductor module package 180 may be formed with embedded leads, i.e., a package with un-exposed leads to be exposed by the drilling/machining process step.

Alternatively, the first semiconductor module package 180 may be formed with leads arranged between upper and lower main face of the mold body, i.e., a package with sideways protruding leads.

Alternatively, the first semiconductor module package 180 may be formed with any other passive components with suitable metallization that can be drilled through.

The first semiconductor module package 180 may be placed face-up (as shown in Figure 1) or face-down (as shown for example in Figures 3 and 4) in the first Printed Circuit Board layer 110.

The second semiconductor module package 380 can be placed face-up or face-down in the first Printed Circuit Board layer 110 or in any other Printed Circuit Board layer 120, 130 (e.g., as shown in Figures 3 and 4) of the plurality of Printed Circuit Board layers 110, 120, 130.

The conductively plated through-hole 170 can be conductively plated by using electroless and/or electrochemical plating processes, for example. The plating at the sidewalls may have a thickness of about 20 to 30 pm. A diameter of the conductively plated through-hole 170 can be about 150 pm as one example. However, the through-hole structure 170 can have a diameter of up to 500 pm or even up to 1 mm.

The multi-layer Printed Circuit Board 100 may comprise a laminate layer 160 as shown in Figure 1 embedding the mold body 150 and the metal contact layer 141a, 141 b within the first Printed Circuit Board layer 110.

The laminate layer 160 may be formed from a prepreg layer by applying a lamination process. Alternatively, the laminate layer 160 may be formed from a resin layer or a resin filled cavity. Alternatively, the laminate layer 160 may be formed from prepregs and Cu foils. In case of an embedded component the center layer where the component is embedded can be a PCB core (cured prepreg) with a cavity for the component, for example.

The conductively plated through-hole 170 can penetrate the prepreg layer 160 as shown in Figure 1 . The plated through-hole 170 can touch the mold body 150 and make a permanent metallic connection to at least part of the metal contact layer 141a, 141 b as shown in Figure 1.

The first semiconductor module package 180 and/or the second semiconductor module package 380 (as shown in Figures 3 or 4) may comprise a power semiconductor package.

The first semiconductor module package 180 can be configured to form with a second semiconductor module package 380 (not shown in Figure 1) a half bridge configuration, e.g., as shown in Figures 3 and 4. It understands that a lot of other configurations of the two power dies can be implemented as well. This provides the advantage that the multi-layer PCB can be efficiently applied in automotive power conversion systems and in other applications, e.g., for motor power control, etc. The half bridge configuration is a reoccurring key topology element in power electronics conversion circuits.

The semiconductor component 140 shown in Figure 1 can have an upper main face 141 and a lower main face 142 opposing the upper main face 141 , e.g., as shown in Figure 2a. The metal contact layer 141a, 141 b may comprise a first portion 141 b (e.g., a Source contact of a MOS device) arranged at the upper main face 141 of the semiconductor component 140 and a second portion 141a (e.g., a Drain contact of a MOS device) arranged at the lower main face 142 of the semiconductor component 140.

As mentioned above, the component can also be GaN, SiC, etc. and instead of a vertical current flow it can have a lateral current flow. The package type indicated in the figure (clip connection to the source and wire bond to the gate) is only an example. It understands that also other types of packages can be used as well.

Figure 2a shows a section of the cross section of the multi-layer Printed Circuit Board 100 shown in Figure 1. The multi-layer Printed Circuit Board 100 is the same device as shown in Figure 1. It can be seen from Figure 2a, that an electrical connection is provided by the plated through-hole 170 from the first portion 141 b of the metal contact layer 141a, 141 b (e.g., Source contact of a MOS device) arranged at the upper main face 141 of the semiconductor component 140 to a conductive layer 111a in the same PCB layer 110 of the multi-layer PCB board.

Additionally, an electrical connection can be provided by the plated through-hole 170 from the first portion 141 b of metal contact layer 141a, 141 b to conductive traces 101a, 101 b at the bottom side and top side of the multi-layer PCB board.

Figure 2b shows a through-view of the multi-layer Printed Circuit Board 100 shown in Figure 1 from top side. The multi-layer Printed Circuit Board 100 is the same device as shown in Figures 1 and 2a.

In the view from top side, the plated through-holes 170 are illustrated as rings. In this Figure 2b, an exemplary number of six plated through-holes 170 are implemented in the multi-layer PCB 100, three on the left-hand side of Figure 2b and three other one on the right-hand side of Figure 2b. The three left-hand side plated through-holes 170 electrically connect the metal contact layers 141 b with the conductive traces 101 b at the top left side of the multilayer PCB board 100. The three right-hand side plated through-holes 170 electrically connect the metal contact layers 141a with the conductive traces 101 b at the top right side of the multi-layer PCB board 100.

Figure 3 shows a schematic cross section of a multi-layer Printed Circuit Board 300 according to a second embodiment.

This multi-layer Printed Circuit Board 300 corresponds to a second embodiment. While in the first embodiment shown in Figure 1 , the components are embedded in the same PCB layer of the multi-layer PCB 100, in the second embodiment shown in Figure 3, the components are embedded in different PCB layers of the multi-layer PCB 300.

The structure of the multi-layer PCB board 300 is similar to the multi-layer PCB board 100 shown in Figures 1 , 2a and 2b. However, the multi-layer PCB board 300 includes two semiconductor components 140 and 340 and an electrical connection 171 between both semiconductor components 140, 340.

It understands that there can also be less layers and the connection can be between the component and any layers. In the simplest form, there can be only the layer 110 (with or even without the conductive layer 111a and 111 b). The connection between the component metallization 141b can also be to another metal layer than layer 111a. Basically, the component can be connected by the though-hole 170 to any layer on the PCB.

Instead of the module contact layer 341a or 341 b the component can be connected to any metal layer in PCB layer 110 or 120 (or to the layers 101a or 101b).

In particular, the multi-layer PCB 300 comprises a first Printed Circuit Board layer 110 of a plurality of Printed Circuit Board layers 110, 120 stacked upon each other. Figure 3 shows an example for a multi-layer PCB 100 comprising an exemplary number of two PCB layers 110, 120. It understands that this is only an exemplary configuration, any other number of PCB layers can be implemented as well. In particular, all normal or usual multilayer PCB structures can be used. Each Printed Circuit Board layer 110, 120 comprises at least one conductive layer 111a, 111 b.

The multi-layer PCB 300 comprises a first mold body 150 embedded in the first Printed Circuit Board layer 110, the first mold body 150 having an upper main face 151 and a lower main face 152 opposing the upper main face 151 as illustrated in Figure 3.

The multi-layer PCB 300 comprises a second mold body 350 embedded in the second Printed Circuit Board layer 120, the second mold body 350 having an upper main face and a lower main face opposing the upper main face as illustrated in Figure 3.

The multi-layer PCB 300 comprises: a first semiconductor component 140 (shown on the left-hand side of Figure 3), e.g., power chip such as MOSFET or IGBT, embedded in the first mold body 150; a first metal contact layer 141a, 141 b for electrically contacting the first semiconductor component 140. It understands that a GaN power chip or a SiC power chip can be used as well. The first metal contact layer 141a, 141 b is arranged at one or both of the two main faces 151 , 152 of the first mold body 150. The first mold body 150 with the first semiconductor component 140 and the first metal contact layer 141a, 141b is forming a first semiconductor module package 180.

The multi-layer PCB 300 comprises: a second semiconductor component 340 (shown on the right-hand side of Figure 3), e.g., power chip such as MOSFET or IGBT, embedded in the second mold body 350; a second metal contact layer 341a, 341b for electrically contacting the second semiconductor component 340. The second metal contact layer 341a, 341 b is arranged at one or both of the two main faces of the second mold body 350. The second mold body 350 with the second semiconductor component 340 and the second metal contact layer 341a, 341 b is forming a second semiconductor module package 380.

The multi-layer PCB 300 comprises a conductively plated through-hole 170 penetrating the plurality of Printed Circuit Board layers 110, 120 and at least part of the first and second metal contact layer 141 b, 341 b. The conductively plated through-hole 170 is configured to provide an electrical connection terminal for electrically connecting 171 to the metal contact layers 141 b, 341 b as depicted in Figure 3. By this electrical connection 171 , the terminals of both semiconductor components 140, 340 can be interconnected. In particular, a shortest path electrical connection can be provided by the plated through-hole 170.

As described above, the conductively plated through-hole 170 may be configured to electrically connect the first metal contact layer 141a, 141 b to the second metal contact layer 341a, 341b of the second semiconductor module package 380.

The conductively plated through-hole 170 thus forms a direct electrical connection path for connecting the first semiconductor module package 180 without a detour via other conductive layers of the plurality of Printed Circuit Board layers 110, 120 to the second semiconductor module package 380.

The first metal contact layer 141a, 141 b may extend outside an area of the first mold body 150 at the lower main face 152 to form the first semiconductor module package 180 as a leaded package as shown in Figure 3.

Alternatively, the first metal contact layer 141a, 141 b may extend within the area of the first mold body 150 at the lower main face 152 to form the first semiconductor module package 180 as a leadless package, e.g., as shown in Figure 4 for the third embodiment.

The same holds for the second metal contact layer 341a, 341 b, the second mold body 350 and the second semiconductor module package 380.

The first semiconductor module package 180 and also the second semiconductor package 380 may be placed face-up (e.g., as shown in Figure 1) or face-down (as shown for example in Figures 3 and 4) in the respective Printed Circuit Board layer 110, 120.

The second semiconductor module package 380 can be placed face-up or face-down in the first Printed Circuit Board layer 110 (not shown in Figure 3) or in any other Printed Circuit Board layer (e.g., as shown in Figures 3 and 4 for the second PCB layer 120) of the plurality of Printed Circuit Board layers 110, 120, 130.

The properties of the conductively plated through-hole 170 may correspond to the plated through-hole 170 described above with respect to Figure 1.

The multi-layer Printed Circuit Board 300 may comprise a first laminate layer 160 embedding the first mold body 150 and the first metal contact layer 141a, 141 b within the first Printed Circuit Board layer 110.

The multi-layer Printed Circuit Board 300 may comprise a second laminate layer 360 embedding the second mold body 350 and the second metal contact layer 341 a, 341 b within the second Printed Circuit Board layer 120.

The first and second laminate layers 160, 360 may be formed from a prepreg layer by applying a lamination process.

The conductively plated through-hole 170 can penetrate the first and the second prepreg layer 160, 360 as shown in Figure 3. The plated through-hole 170 can touch the respective prepreg layer 160, 360 and make a permanent metallic connection to at least part of the first metal contact layer 141a, 141 b and at least part of the second metal contact layer 341 a, 341 b as shown in Figure 3.

The first semiconductor module package 180 and/or the second semiconductor module package 380 may comprise a power semiconductor package.

The first semiconductor module package 180 can be configured to form a half bridge configuration with the second semiconductor module package 380. As already mentioned above, a lot of other configurations of the two module packages can be implemented as well. This provides the advantage that the multi-layer PCB can be efficiently applied in automotive power conversion systems and in other applications, e.g., for motor power control, etc. The half bridge configuration is a reoccurring key topology element in power electronics conversion circuits.

Figure 4 shows a schematic cross section of a multi-layer Printed Circuit Board 400 according to a third embodiment. This multi-layer Printed Circuit Board 400 corresponds to a third embodiment. While in the second embodiment shown in Figure 3, the semiconductor module packages 180, 380 are leaded packages, in the third embodiment shown in Figure 4, the semiconductor module packages 180, 380 are leadless packages.

It understands that in another embodiment, one semiconductor package, e.g., the first one 180 can be a leaded package and the other semiconductor package, e.g., the second one 380 can be a leadless package.

The structure of the multi-layer PCB board 400 is similar to the multi-layer PCB board 300 shown in Figure 3. However, the semiconductor module packages 280, 480 are leadless packages. Hence, the first metal contact layer is referred to as 241a, 241 b in order to indicate the difference to the first metal contact layer 141a, 141 b of the leaded package 180 shown in Figure 3 and the second metal contact layer is referred to as 441a, 441 b in order to indicate the difference to the second metal contact layer 341a, 341b of the leaded package 180 shown in Figure 3. Besides, the first leadless semiconductor module package is referred to as 280 and the second leadless semiconductor module package is referred to as 480 to differentiate from the second embodiment shown in Figure 3.

As shown in the third embodiment illustrated in Figure 4, the first metal contact layer 241a, 241 b extends within the area of the first mold body 150 at the lower main face 152 to form the first semiconductor module package 180 as a leadless package.

The package can, for example, be a conventional molded leadframe package or a CE (Chip Embedding) package where the component is embedded inside a PCB material or another component.

Similarly, the second metal contact layer 441a, 441 b extends within the area of the second mold body 350 at the lower main face to form the second semiconductor module package 480 as a leadless package.

The first semiconductor module package 280 may be placed face-up (as shown in Figure 1) or face-down (as shown for example in Figures 3 and 4) in the first Printed Circuit Board layer 110.

The second semiconductor module package 480 can be placed face-up or face-down in the first Printed Circuit Board layer 110 or in any other Printed Circuit Board layer 120, 130 (e.g., as shown in Figures 3 and 4) of the plurality of Printed Circuit Board layers 110, 120, 130.

The conductively plated through-hole 170 can penetrate the first and the second prepreg layer 160, 360 as shown in Figure 4. The plated through-hole 170 can intersect with the first and second mold body 150, 350 and make a permanent metallic connection to at least part of the first metal contact layer 241 a, 241 b and at least part of the second metal contact layer 441a, 441 b as shown in Figure 4. I.e., the conductively plated through-hole 170 may be cut through the first mold body 150 and the second mold body 350.

The plated through-hole 170 can also extend through the package such that the whole via is inside the mold body area, provided it does not intersect with the die or other functional part which might be destroyed by the through-hole 170.

Figure 5 shows a basic process flow for manufacturing a multi-layer Printed Circuit Board according to the first embodiment with schematic cross sections on the left-hand side and through view from top on the right-hand side. It understands that also other kinds of existing embedding processes can be used as well.

In a first process step 501 , core layers 110, 120 with or without embedded components and laminate layers 112b, 122b, 132a are stacked up, aligned (Fig. 5a) and laminated together in a second process step 502 (Fig. 5b). Then, in a third process step 503, on predefined positions, the through-holes 170a are drilled by means of mechanical drilling or milling or another appropriate material removal process (Fig. 5c).

The positions of the through-holes 170a, the positions of the component terminals, and the positions or the electrical traces within the corresponding PCB layer(s) are chosen by design in a way that creates overlap in one point (the connection point) and that exposes the metals during the via drilling process.

Finally, in a fourth process step 504, the through-holes 170a are galvanically metallized using standard PTH technology (Fig. 5d). By metallizing the vias, plated through-holes 170 are created which electrically connect the exposed metal traces and leads.

Figure 6 shows a basic process flow for manufacturing a multi-layer Printed Circuit Board according to the second embodiment, e.g., the multi-layer PCB 300 shown in Figure 3, with schematic cross sections on the left-hand side and through view from top on the right-hand side.

Similar to the process shown in Figure 5, core layers (PCB layers) 110, 120 with or without embedded components and laminate layers 112b, 122b, 132a are stacked up and aligned in a first processing step 601 (Fig. 6a) and laminated together in a second processing step 602 (Fig. 6b). Then, on predefined positions, the through-holes 170a are drilled by means of mechanical drilling or milling or another appropriate material removal process in a third processing step 603 (Fig. 6c).

The positions of the through-holes 170a, the positions of the component terminals, and the positions or the electrical traces within the corresponding PCB layer(s) are chosen by design in a way that creates overlap in one point (the connection point) and that exposes the metals during the via drilling process 603.

Finally, the through-holes 170a are galvanically metallized using standard PTH technology (Fig. 6d) in a fourth processing step 604. By metallizing the vias, plated through-holes 170 are created which electrically connect the leads of both semiconductor components through the two core layers 110, 120 with or without embedded components.

Figure 7 shows a schematic diagram illustrating a method 700 for producing a multi-layer Printed Circuit Board according to the disclosure. The multi-layer PCB can be any one of the first, second or third embodiment described above with respect to Figures 1 to 4.

The method 700 comprises laying-up 701 a plurality of Printed Circuit Board layers upon each other together with respective lamination layers between any two of the Printed Circuit Board layers, each Printed Circuit Board layer comprising at least one conductive layer, e.g., as described above with respect to Figures 1 to 6, wherein a mold body is embedded in a first Printed Circuit Board layer of the plurality of Printed Circuit Board layers, the mold body having an upper main face and a lower main face opposing the upper main face, wherein a semiconductor component is embedded in the mold body; and a metal contact layer for electrically contacting the semiconductor component is arranged at one or both of the two main faces of the mold body, the mold body with the semiconductor component and the metal contact layer forming a first semiconductor module package, e.g., as described above with respect to Figures 1 to 6. The method 700 comprises laminating 702 the plurality of Printed Circuit Board layers together with the respective lamination layers to form a multi-layer Printed Circuit Board, e.g., as described above with respect to Figures 1 to 6.

The method 700 comprises drilling 703 at least one hole into the multi-layer Printed Circuit Board, the at least one hole penetrating the plurality of Printed Circuit Board layers and at least part of the metal contact layer, e.g., as described above with respect to Figures 1 to 6.

The method 700 comprises conductively plating 704 the at least one hole to form at least one conductively plated through-hole to provide an electrical connection terminal for electrically connecting to the metal contact layer, e.g., as described above with respect to Figures 1 to 6.

The method 700 may comprise: electrically connecting the metal contact layer to the at least one conductive layer of at least one of the plurality of Printed Circuit Board layers by the conductively plated through-hole, e.g., as described above with respect to Figures 1 to 6.

The method 700 may comprise: electrically connecting the metal contact layer to another metal contact layer of a second semiconductor module package by the conductively plated through-hole, e.g., as described above with respect to Figures 1 to 6.

The metal contact layer may be embedded within the mold body and exposed by the drilling of the at least one hole, e.g., as described above with respect to Figures 1 to 6.

While a particular feature or aspect of the disclosure may have been disclosed with respect to only one of several implementations, such feature or aspect may be combined with one or more other features or aspects of the other implementations as may be desired and advantageous for any given or particular application. Furthermore, to the extent that the terms "include", "have", "with", or other variants thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term "comprise". Also, the terms "exemplary", "for example" and "e.g." are merely meant as an example, rather than the best or optimal. The terms “coupled” and “connected”, along with derivatives may have been used. It should be understood that these terms may have been used to indicate that two elements cooperate or interact with each other regardless whether they are in direct physical or electrical contact, or they are not in direct contact with each other. Although specific aspects have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific aspects shown and described without departing from the scope of the disclosure. This application is intended to cover any adaptations or variations of the specific aspects discussed herein.

Although the elements in the following claims are recited in a particular sequence with corresponding labeling, unless the claim recitations otherwise imply a particular sequence for implementing some or all of those elements, those elements are not necessarily intended to be limited to being implemented in that particular sequence.

Many alternatives, modifications, and variations will be apparent to those skilled in the art in light of the above teachings. Of course, those skilled in the art readily recognize that there are numerous applications of the disclosure beyond those described herein. While the disclosure has been described with reference to one or more particular embodiments, those skilled in the art recognize that many changes may be made thereto without departing from the scope of the disclosure. It is therefore to be understood that within the scope of the appended claims and their equivalents, the disclosure may be practiced otherwise than as specifically described herein.

Claims

1. A multi-layer Printed Circuit Board (100), comprising: a first Printed Circuit Board layer (110) of a plurality of Printed Circuit Board layers (110, 120, 130) stacked upon each other, each Printed Circuit Board layer (110, 120, 130) comprising at least one conductive layer (111a, 111 b); a mold body (150) embedded in the first Printed Circuit Board layer (110), the mold body (150) having an upper main face (151) and a lower main face (152) opposing the upper main face (151); an electrical component (140) embedded in the mold body (150); a metal contact layer (141a, 141 b) for electrically contacting the electrical component (140), the metal contact layer (141a, 141 b) extending beyond a projected surface of the electrical component (140), the mold body (150) with the electrical component (140) and the metal contact layer (141a, 141 b) forming a first component module package (180); and at least one conductively plated through-hole (170) penetrating the plurality of Printed Circuit Board layers (110, 120, 130) and at least part of the metal contact layer (141a, 141 b), the at least one conductively plated through-hole (170) being configured to provide an electrical connection terminal for electrically connecting (171) to the metal contact layer (141a, 141 b).

2. The multi-layer Printed Circuit Board (100) of claim 1 , wherein the at least one conductively plated through-hole (170) is configured to electrically connect the metal contact layer (141a, 141 b) to the at least one conductive layer (111a, 111 b) of at least one of the plurality of Printed Circuit Board layers (110, 120, 130).

3. The multi-layer Printed Circuit Board (100) of claim 1 or 2, wherein the at least one conductively plated through-hole (170) is configured to electrically connect the metal contact layer (141a, 141 b) to another metal contact layer (341a, 341 b) of a second component module package (380).

4. The multi-layer Printed Circuit Board (100) of any of the preceding claims, wherein the at least one conductively plated through-hole (170) forms a shortest- path electrical connection of the first component module package (180) to a closest conductive layer (111a) outside the first component module package (180).

5. The multi-layer Printed Circuit Board (100) of any of the preceding claims, wherein the at least one conductively plated through-hole (170) forms a direct electrical connection path for connecting the first component module package (180) without a detour via other conductive layers of the plurality of Printed Circuit Board layers (110, 120, 130).

6. The multi-layer Printed Circuit Board (100) of any of the preceding claims, wherein the metal contact layer (141a, 141 b) of the first component module package (180) is in plane with the at least one conductive layer (111a) of the first Printed Circuit Board layer (110).

7. The multi-layer Printed Circuit Board (100) of claim 6, wherein the at least one conductively plated through-hole (170) forms a horizontal electrical connection path between the metal contact layer (141a, 141 b) of the first component module package (180) and the at least one conductive layer (111a) of the first Printed Circuit Board layer (110).

8. The multi-layer Printed Circuit Board (100) of any of the preceding claims, wherein the metal contact layer (141a, 141 b) is extending outside an area of the mold body (150) at the lower main face (152) to form the first component module package (180) as a leaded package or is extending within the area of the mold body (150) at the lower main face (152) to form the first component module package (180) as a leadless package.

9. The multi-layer Printed Circuit Board (100) of any of the preceding claims, wherein the first component module package (180) is placed face-up or face-down in the first Printed Circuit Board layer (110).

10. The multi-layer Printed Circuit Board (100) of claim 3, wherein the second component module package (380) is placed face-up or facedown in the first Printed Circuit Board layer (110) or in any other Printed Circuit Board layer (120, 130) of the plurality of Printed Circuit Board layers (110, 120, 130).

11 . The multi-layer Printed Circuit Board (100) of any of the preceding claims, comprising: a laminate layer (160) embedding the mold body (150) and the metal contact layer (141a, 141 b) within the first Printed Circuit Board layer (110).

12. The multi-layer Printed Circuit Board (100) of claim 11 , wherein the at least one conductively plated through-hole (170) penetrates the prepreg layer (160), the at least one plated through-hole (170) touching the mold body (150) and the at least part of the metal contact layer (141a, 141 b).

13. The multi-layer Printed Circuit Board (100) of claim 3 or 10, wherein the first component module package (180) and/or the second component module package (380) comprise a power semiconductor package.

14. The multi-layer Printed Circuit Board (100) of any of claims 3, 10 or 13, wherein the first component module package (180) and the second component module package (380) are configured to form a half bridge configuration.

15. The multi-layer Printed Circuit Board (100) of any of the preceding claims, wherein the metal contact layer (141a, 141 b) is arranged to protrude from the electrical component (140).

16. A method (700) for producing a multi-layer Printed Circuit Board, the method comprising: laying-up (701) a plurality of Printed Circuit Board layers upon each other together with respective lamination layers between any two of the Printed Circuit Board layers, each Printed Circuit Board layer comprising at least one conductive layer, wherein a mold body is embedded in a first Printed Circuit Board layer of the plurality of Printed Circuit Board layers, the mold body having an upper main face and a lower main face opposing the upper main face, wherein an electrical component is embedded in the mold body; and a metal contact layer for electrically contacting the electrical component (140) is extending beyond a projected surface of the electrical component (140), the mold body with the electrical component and the metal contact layer forming a first component module package; laminating (702) the plurality of Printed Circuit Board layers together with the respective lamination layers to form a multi-layer Printed Circuit Board; drilling (703) at least one hole into the multi-layer Printed Circuit Board, the at least one hole penetrating the plurality of Printed Circuit Board layers and at least part of the metal contact layer; conductively plating (704) the at least one hole to form at least one conductively plated through-hole to provide an electrical connection terminal for electrically connecting to the metal contact layer.

17. The method (700) of claim 16, comprising: electrically connecting the metal contact layer to the at least one conductive layer of at least one of the plurality of Printed Circuit Board layers by the at least one conductively plated through-hole.

18. The method (700) of claim 16 or 17, comprising: electrically connecting the metal contact layer to another metal contact layer of a second component module package by the at least one conductively plated through-hole.

19. The method (700) of any of claims 16 to 18, wherein the metal contact layer is embedded within the mold body and exposed by the drilling of the at least one hole.