Nothing Special   »   [go: up one dir, main page]

WO2022216265A1 - Method for improvement of slew rate in analog driver circuits - Google Patents

Method for improvement of slew rate in analog driver circuits Download PDF

Info

Publication number
WO2022216265A1
WO2022216265A1 PCT/TR2022/050312 TR2022050312W WO2022216265A1 WO 2022216265 A1 WO2022216265 A1 WO 2022216265A1 TR 2022050312 W TR2022050312 W TR 2022050312W WO 2022216265 A1 WO2022216265 A1 WO 2022216265A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
output
electronic amplifier
current
change
Prior art date
Application number
PCT/TR2022/050312
Other languages
French (fr)
Inventor
Burak KELLECİ
Ercihan İNCETÜRKMEN
Original Assignee
Aselsan Elektroni̇k Sanayi̇ Ve Ti̇c.A.Ş.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aselsan Elektroni̇k Sanayi̇ Ve Ti̇c.A.Ş. filed Critical Aselsan Elektroni̇k Sanayi̇ Ve Ti̇c.A.Ş.
Publication of WO2022216265A1 publication Critical patent/WO2022216265A1/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • H03F1/0266Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A by using a signal derived from the input signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45076Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183Long tailed pairs
    • H03F3/45192Folded cascode stages
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45028Indexing scheme relating to differential amplifiers the differential amplifier amplifying transistors are folded cascode coupled transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45182Indexing scheme relating to differential amplifiers the differential amplifier contains one or more cascode current mirrors in the load
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45208Indexing scheme relating to differential amplifiers the dif amp being of the long tail pair type, one current source being coupled to the common emitter of the amplifying transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45224One output of the differential amplifier being taken into consideration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45248Indexing scheme relating to differential amplifiers the dif amp being designed for improving the slew rate
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45271Indexing scheme relating to differential amplifiers the output current being reduced by a transistor which being controlled by the input signal to sink current
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45272Indexing scheme relating to differential amplifiers the output current being increased by a transistor which being controlled by the input signal to source current

Definitions

  • the invention relates to a method for driving of high capacitance load in analog driver circuits using low power consumption.
  • Invention particularly relates to a method for driving of high capacitance loads by consuming low power by changing currents of current sources which determines currents of output transistors of amplifier in operation instantly according to the change of input signals.
  • the output stages of amplifiers consume high current in order to drive high capacitance loads quickly.
  • high speed driving either the current of the circuit is increased or extra current is supplied to or taken from the output by a parallel circuit.
  • the invention has been developed with inspiration from existing situation and aims to eliminate the above-mentioned disadvantages.
  • Purpose of the invention is to drive high capacitance loads with low current consumption by momentarily changing the output current.
  • Another purpose of the invention is to prevent addition of extra parasitic capacitance at output by not directly intervening output node.
  • Another purpose of the invention is to eliminate need for extra structure by intervening currents of current sources available in the circuit.
  • Figure 1 is a circuit diagram of amplifier of the related art.
  • Figure 2 is a circuit diagram of amplifier of the invention.
  • Capacitor -2 Output Capacitor
  • V bni Voltage value that determines the gate voltages of Transistor-8 (M8) and Transistor-9 (M9)
  • V bn2 Voltage value that determines the current value of transistors when there is no signal at amplifier input
  • V pi Voltage value that determines the gate voltage of Transistor-3 (M3)
  • V p 2 Voltage value that determines the gate voltages of Transistor-6 (M6) and Transistor-7 (M7)
  • Amplifier circuit shown in Figure 1 amplifies differential values of signals applied to input signal-1 (V inp ) and input signal-2 (V inm ), and applies to its output. If input signal -1 (V inp ) is at a more positive voltage level than input signal-2 (V inm ), most of transistor-3 (M3) current is flown through transistor-1. In this case, since transistor-11 (M11 ) current is fixed current, the current of transistor-9 (M9) decreases. As the current of transistor-2 (M2) decreases, most of the current of transistor-10 (M10) flows through transistor-8 (M8).
  • transistor-8 (M8) Since the current of transistor-8 (M8) is transferred to the output node by active current mirror formed by transistor-4 - transistor-7 (M4-M7), current flowing to output increases and the voltage of the output node increases. If the input signal-1 (Vinp) has a more negative voltage level than the input signal-2 (Vinm), the current of transistor-8 (M8) decreases, so the current applied to output node by current mirror of transistor-4- transistor-7 (M4-M7) decreases. As the current flowing through transistor-1 (M1) decreases, the current of transistor-11 (M11) flows through transistor-9 (M9) and decreases output node voltage. Since transistor-10 (M10) and transistor-11 (M11) are current sources, their current is independent of signal level and changes. In this case, output current used for increasing or decreasing the output voltage decreases and periods of increasing and decreasing of output signal get longer.
  • Method of the invention fundamentally comprises following process steps
  • transistor-11 (M11) increases, the current taken by transistor-11 (M11) from the output node increases. Since the current drawn from the output load increases, the voltage of the output node reaches to desired value quickly.
  • the gate of transistor-10(M10) is connected via resistance-1(R1) to V bn2 potential and the gate of transistor-11 (M11) is connected via resistance-2 (R2) V bn2 potential.
  • Capacitor-1 (C1) and resistor (R1) function as high pass filter and apply signal change at the output of electronic amplifier-1 (1) to gate of transistor-10 (M10).
  • Voltage value of the gate of Transistor- 10 (M 10) returns to value of V bn2 according to R1C1 time constant. Since R1C1 time constant is selected less than one read period, the gate voltage value of transistor-10 (M10) becomes V bn2 when reading the output voltage value.
  • capacitor-2 (C2) and resistance-2 (R2) work as filter of high filtering.
  • Signal change at output of electronic amplifier-2 (2) is applied to the gate of transistor-11 (M11) and the gate voltage of transistor-11 (M11) changes momentarily.
  • the gate voltage of Transistor-11 (M11) returns to the value of V bn2 according to R2C2 time constant. Since R2C2 time constant is selected less than one read period, the gate voltage value of transistor-11 (M11) becomes V bn2 when reading the output voltage value,

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

Invention relates to a method that enables driving of high capacitance loads with low power consumption by means of momentarily changing currents of current sources that determines currents of output transistors of the amplifier according to the change direction of input signals.

Description

Method for improvement of Slew Rate in Analog Driver Circuits
The Field of the Invention
The invention relates to a method for driving of high capacitance load in analog driver circuits using low power consumption.
Invention particularly relates to a method for driving of high capacitance loads by consuming low power by changing currents of current sources which determines currents of output transistors of amplifier in operation instantly according to the change of input signals.
Background of the Invention
The output stages of amplifiers consume high current in order to drive high capacitance loads quickly. When high speed driving is required, either the current of the circuit is increased or extra current is supplied to or taken from the output by a parallel circuit.
If the current of circuit is increased to drive high capacitance loads at high speed, the power consumption of the circuit is increased. In addition, if a circuit is used to supply extra current to output, undesired parasitic capacitance increase occurs at the output node.
The closest prior art is believed to include commonly assigned U.S. Patent No. 5070307 entitled “Differential Amplifier with Enhanced Slew Rate” which relates to differential amplifiers having improved slew rate. The application discloses output current is increased to charge output capacitance quickly if high output is required. If low output is required, the controllable current source drains output current to discharge output capacitance quickly. The application numbered US5070307 is convenient for fully differential signal case. In addition, application numbered US5070307 uses 2 differential amplifiers for push-pull structure. Since our application uses 2 pieces of single stage amplifiers, it has less complicated structure. The adjustment in embodiment disclosed under our application is only made during input signal changes. Whereas adjustment is continuously made in application numbered US5070307.
As a result, due to above described disadvantages and inadequacy of existing solutions it has been necessary to make development in the related technical field. Purpose of the Invention
The invention has been developed with inspiration from existing situation and aims to eliminate the above-mentioned disadvantages.
Purpose of the invention is to drive high capacitance loads with low current consumption by momentarily changing the output current.
Another purpose of the invention is to prevent addition of extra parasitic capacitance at output by not directly intervening output node.
Another purpose of the invention is to eliminate need for extra structure by intervening currents of current sources available in the circuit. The structural and characteristics features of the invention and all advantages will be understood better in detailed descriptions with the figures given below and with reference to these figures, and therefore, the assessment should be made taking into account the figures and detailed explanations.
Description of Figures Figure 1 is a circuit diagram of amplifier of the related art.
Figure 2 is a circuit diagram of amplifier of the invention.
Description of Part References
1 . Electronic amplifier-1
2. Electronic amplifier-2 M1 , M2,.. ,M11.Transistor-1 , Transistor-2,..., Transistor- 11
R1 Resistor-1 R2. Resistor-2 C1. Capacitor -1
C2. Capacitor -2 Cout Output Capacitor
Vinp Input signal-1 .Vinm Input signal-2
Vbni : Voltage value that determines the gate voltages of Transistor-8 (M8) and Transistor-9 (M9)
Vbn2: Voltage value that determines the current value of transistors when there is no signal at amplifier input
V pi : Voltage value that determines the gate voltage of Transistor-3 (M3)
V p2 ; Voltage value that determines the gate voltages of Transistor-6 (M6) and Transistor-7 (M7)
Vout: Output signal
Detailed Description of the Invention
In this detailed description, the preferred embodiments of the invention have been described in a manner not forming any restrictive effect and only for purpose of better understanding of the matter.
Amplifier circuit shown in Figure 1 amplifies differential values of signals applied to input signal-1 (Vinp) and input signal-2 (Vinm), and applies to its output. If input signal -1 (Vinp) is at a more positive voltage level than input signal-2 (Vinm), most of transistor-3 (M3) current is flown through transistor-1. In this case, since transistor-11 (M11 ) current is fixed current, the current of transistor-9 (M9) decreases. As the current of transistor-2 (M2) decreases, most of the current of transistor-10 (M10) flows through transistor-8 (M8). Since the current of transistor-8 (M8) is transferred to the output node by active current mirror formed by transistor-4 - transistor-7 (M4-M7), current flowing to output increases and the voltage of the output node increases. If the input signal-1 (Vinp) has a more negative voltage level than the input signal-2 (Vinm), the current of transistor-8 (M8) decreases, so the current applied to output node by current mirror of transistor-4- transistor-7 (M4-M7) decreases. As the current flowing through transistor-1 (M1) decreases, the current of transistor-11 (M11) flows through transistor-9 (M9) and decreases output node voltage. Since transistor-10 (M10) and transistor-11 (M11) are current sources, their current is independent of signal level and changes. In this case, output current used for increasing or decreasing the output voltage decreases and periods of increasing and decreasing of output signal get longer.
In the method of the invention shown in Figure 2, currents of transistor-10 (M10) and transistor-11 (M11) are changed for short time according to the change direction of the input signal. Since input signal-(2) (Vinm) is also used for feedback, the change of input is detected by using of input signal-1 (Vinp) in order not to change feedback characteristics of the circuit. Electronic amplifier-1 (1) and electronic amplifier-2 (2) amplify input signal so that their outputs are changed between ground and supply level.
Method of the invention fundamentally comprises following process steps;
Detecting circuit input change by use of input signal-1 ( Vinp) ,
• Amplification of input signal-1 ( Vinp) by electronic amplifiers and switching output values between ground and supply levels, o In the case where input signal-1 ( Vinp) increases,
Increase of output level to supply potential by electronic amplifier-
1 (1),
Applying change in output value of electronic amplifier-1 to transistor-10(M10) via capacitor-1 (C1) connected to electronic amplifier-1 (1),
Increasing the current of transistor-10 (M10) subject to change and increasing current flowing to the output via transistor-4 transistor-7 (M4-M7) current mirror,
Decrease of output level of electronic amplifier-2(2) from supply potential to ground potential, Applying change in output value of electronic amplifier-2 (2) to transistor- 11(M11) via capacitor-2 (C2) connected to electronic amplifier-2 (2),
Thus, as the current of transistor-11 (M11) decreases, the current taken by transistor-11 (M11) from the output node decreases. Since current flowing to the output load increases, the voltage of the output node reaches to desired value quickly. o In the case where input signal-1 (Vinp) decreases,
Decrease of output level of electronic amplifier-1 (1) from supply potential to ground potential,
Applying change in output value of electronic amplifier-1 to transistor-10(M10) via capacitor-1 (C1) connected to electronic amplifier-1 (1),
Decreasing the current of transistor-10 (M10) subject to change and decreasing current flowing to the output node via transistor-4 transistor-7 (M4-M7) current mirror,
Decrease of the output level of electronic amplifier-2(2) from ground potential to supply potential,
Applying change in output value of electronic amplifier-2 (2) to transistor- 11(M11) via capacitor-2 (C2) connected to electronic amplifier-2 (2),
Thus, as the current of transistor-11 (M11) increases, the current taken by transistor-11 (M11) from the output node increases. Since the current drawn from the output load increases, the voltage of the output node reaches to desired value quickly.
In order for currents of transistor-10 (M10) and transistor-11 (M11) to be determined by Vbn2 in the absence of signal change, the gate of transistor-10(M10) is connected via resistance-1(R1) to Vbn2 potential and the gate of transistor-11 (M11) is connected via resistance-2 (R2) Vbn2 potential. Capacitor-1 (C1) and resistor (R1) function as high pass filter and apply signal change at the output of electronic amplifier-1 (1) to gate of transistor-10 (M10). Voltage value of the gate of Transistor- 10 (M 10) returns to value of Vbn2 according to R1C1 time constant. Since R1C1 time constant is selected less than one read period, the gate voltage value of transistor-10 (M10) becomes Vbn2 when reading the output voltage value.
Similarly, capacitor-2 (C2) and resistance-2 (R2) work as filter of high filtering. Signal change at output of electronic amplifier-2 (2) is applied to the gate of transistor-11 (M11) and the gate voltage of transistor-11 (M11) changes momentarily. The gate voltage of Transistor-11 (M11) returns to the value of Vbn2 according to R2C2 time constant. Since R2C2 time constant is selected less than one read period, the gate voltage value of transistor-11 (M11) becomes Vbn2 when reading the output voltage value,

Claims

1. A method for improving slew rate in analog drive circuits characterized by comprising process steps of
• Detecting circuit input change by use of input signal-1 (Vinp), o In the case where input signal-1 (Vinp) increases,
Increase of the output level to supply potential by electronic amplifier-1 (1),
Applying change in output value of electronic amplifier-1 to transistor-10 (M10) via capacitor-1 (C1) connected to electronic amplifier-1 (1),
Decrease of the output level of electronic amplifier-2(2) from supply potential to ground potential,
Applying change in the output value of electronic amplifier-2 (2) to transistor-11 (M11) via capacitor-2 (C2) connected to electronic amplifier-2 (2),
Increasing current of transistor-10 (M10) subject to change and increasing current flowing to output upon decrease in current of transistor- 11 (M11), o In the case where input signal-1 (¾ ¥j decreases,
Decrease of the output level of electronic amplifier-1 (1) from supply potential to ground potential,
Applying change in output value of electronic amplifier-1 to transistor-10 (M10) via capacitor-1 (C1) connected to electronic amplifier-1 (1),
Decrease of output level of electronic amplifier-2 (2) from ground potential to supply potential, Applying change in output value of electronic amplifier-2 (2) to transistor- 11(M11) via capacitor-2 (C2) connected to electronic amplifier-2 (2),
Decreasing current of transistor-10 (M10) subject to change and decreasing current flowing to output upon decrease in current of transistor- 11 (M11),
PCT/TR2022/050312 2021-04-09 2022-04-08 Method for improvement of slew rate in analog driver circuits WO2022216265A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TR2021/006330 2021-04-09
TR202106330 2021-04-09

Publications (1)

Publication Number Publication Date
WO2022216265A1 true WO2022216265A1 (en) 2022-10-13

Family

ID=82320032

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/TR2022/050312 WO2022216265A1 (en) 2021-04-09 2022-04-08 Method for improvement of slew rate in analog driver circuits

Country Status (1)

Country Link
WO (1) WO2022216265A1 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6359512B1 (en) * 2001-01-18 2002-03-19 Texas Instruments Incorporated Slew rate boost circuitry and method
US20030090321A1 (en) * 2001-11-15 2003-05-15 Charles Parkhurst Bipolar class AB folded cascode operational amplifier for high-speed applications
US20170086269A1 (en) * 2015-09-22 2017-03-23 Nxp B.V. Amplifier for a constant-current led driver circuit and constant-current led driver ic device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6359512B1 (en) * 2001-01-18 2002-03-19 Texas Instruments Incorporated Slew rate boost circuitry and method
US20030090321A1 (en) * 2001-11-15 2003-05-15 Charles Parkhurst Bipolar class AB folded cascode operational amplifier for high-speed applications
US20170086269A1 (en) * 2015-09-22 2017-03-23 Nxp B.V. Amplifier for a constant-current led driver circuit and constant-current led driver ic device

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ANONYMOUS: "Capacitive coupling - Wikipedia", 26 December 2020 (2020-12-26), pages 1 - 3, XP055956575, Retrieved from the Internet <URL:https://en.wikipedia.org/w/index.php?title=Capacitive_coupling&oldid=996445075> [retrieved on 20220831] *
ZHAO XIAO ET AL: "Transconductance and slew rate improvement technique for current recycling folded cascode amplifier", AEU - INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, ELSEVIER, AMSTERDAM, NL, vol. 70, no. 3, 23 December 2015 (2015-12-23), pages 326 - 330, XP029388411, ISSN: 1434-8411, DOI: 10.1016/J.AEUE.2015.12.015 *

Similar Documents

Publication Publication Date Title
US7342450B2 (en) Slew rate enhancement circuitry for folded cascode amplifier
US7652538B2 (en) Circuits and methods for improving slew rate of differential amplifiers
EP2466745A1 (en) Amplifier common-mode control methods
WO2022179195A1 (en) Bias circuit and amplifier
JP2006094533A (en) Differential amplifier circuit in the form of cascode with class ab control terminal
JPH0927722A (en) Variable gain amplification device
CN1985226A (en) Voltage regulator with adaptive frequency compensation
TW201006121A (en) Driving circuit for enhancing response speed and related method
US20120086509A1 (en) Amplifier Input Stage and Slew Boost Circuit
CN111414039B (en) Linear voltage regulator circuit adopting on-chip compensation technology
JP4188931B2 (en) Operational amplifier and offset voltage canceling method for operational amplifier
US20110273230A1 (en) Class ab output stage
US8890612B2 (en) Dynamically biased output structure
US7643573B2 (en) Power management in a data acquisition system
WO2022216265A1 (en) Method for improvement of slew rate in analog driver circuits
JP3478752B2 (en) Operational amplifier
WO2011084399A1 (en) Fast class ab output stage
CN102045029A (en) Operation amplifying circuit
EP1547241B1 (en) Dc-compensation loop for variable gain amplifier
CN113452332B (en) Differential Amplifier
JP2000323940A (en) Whole differential amplifier
US4342003A (en) Operational amplifier with increased settling speed
CN113014209B (en) Floating bias dynamic amplifying circuit based on stable bandwidth circuit
US20050270102A1 (en) Power amplifying apparatus
CN111510090A (en) Operational amplifier with high voltage slew rate and wide output range

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22735241

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 22735241

Country of ref document: EP

Kind code of ref document: A1