WO2022174627A1 - Method for manufacturing circuit board solder pad - Google Patents
Method for manufacturing circuit board solder pad Download PDFInfo
- Publication number
- WO2022174627A1 WO2022174627A1 PCT/CN2021/130128 CN2021130128W WO2022174627A1 WO 2022174627 A1 WO2022174627 A1 WO 2022174627A1 CN 2021130128 W CN2021130128 W CN 2021130128W WO 2022174627 A1 WO2022174627 A1 WO 2022174627A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- pad
- grinding
- circuit board
- solder pad
- manufacturing
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 28
- 229910000679 solder Inorganic materials 0.000 title claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 238000000227 grinding Methods 0.000 claims abstract description 33
- 238000007747 plating Methods 0.000 claims abstract description 7
- 238000007781 pre-processing Methods 0.000 claims abstract description 4
- 239000000919 ceramic Substances 0.000 claims description 9
- 238000003825 pressing Methods 0.000 claims description 9
- 239000003822 epoxy resin Substances 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- 238000013461 design Methods 0.000 abstract description 3
- 238000004806 packaging method and process Methods 0.000 abstract description 3
- 238000009413 insulation Methods 0.000 abstract description 2
- 238000010030 laminating Methods 0.000 abstract 2
- 238000011161 development Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000002313 adhesive film Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002203 pretreatment Methods 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/288—Removal of non-metallic coatings, e.g. for repairing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/282—Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the invention relates to the technical field of pad fabrication, in particular to a method for fabricating a circuit board pad.
- solder Mask Defined BGA Pads can also be called On Pad in order to make it easier to understand. Because the structure of this window opening method is that the solder mask ink is covered on the pad chassis, and the pad size is determined by opening the window of the solder mask ink, so the pad chassis needs to be larger than the pad window during production, which is not suitable for high density and fine pitch. Pad production;
- Non-Solder Mask Defined BGA Pads can also be called Open Pad in order to make it easier to understand.
- the structure of this windowing method is that the solder mask ink does not cover the pad chassis, and the pad size is directly determined by the pad chassis. However, due to mechanical stress and thermal stress, the pads of this windowing method are easy to fall off the circuit board.
- a method for making a circuit board pad comprising
- the pad is plated, and the thickness of the pad is increased by the method of selective plating;
- the insulating layer is at least one of a solder resist ink layer or an epoxy resin layer.
- the grinding is at least one of ceramic grinding or abrasive belt grinding.
- the uniformity of the ceramic grinding can reach ⁇ 3um.
- film stripping treatment is performed after the pad is plated.
- the above-mentioned method for making circuit board pads effectively improves the machinability of high-density, fine-pitch pad design by grinding the window opening method that exposes the pads, and at the same time effectively prevents the pads from falling off and improves the product flatness. Package reliability.
- FIG. 1 is a flowchart of a method for manufacturing a circuit board pad according to an embodiment of the present invention
- FIG. 2 is a schematic structural diagram of a flat-cut pad of a method for manufacturing a circuit board pad according to an embodiment of the present invention
- FIG. 3 is a schematic structural diagram of pad plating of a method for manufacturing a circuit board pad according to an embodiment of the present invention
- FIG. 4 is a schematic structural diagram of pressing and curing of the method for manufacturing a circuit board pad in FIG. 1 according to an embodiment of the present invention
- FIG. 5 is a schematic view of a grinding structure of a method for manufacturing a circuit board pad according to an embodiment of the present invention.
- a method for making a circuit board pad including
- the pad 100 is plated, and the thickness of the pad 100 is increased by means of selective plating;
- the insulating layer 200 is at least one of a solder resist ink layer or an epoxy resin layer.
- the grinding is at least one of ceramic grinding or abrasive belt grinding.
- the uniformity of the ceramic grinding can reach ⁇ 3um.
- film stripping treatment is performed after the pad 100 is plated.
- the pad 100 is plated, and the thickness of the pad is increased by means of selective plating;
- the size of the pad opening in this application is also determined by the size of the pad, but the window opening method is changed from solder mask ink exposure-development to grinding, which can be called Cut Pad.
- the insulating layer 200 is also not limited to the solder resist ink, as long as the insulating medium can meet the requirements of filling and insulation and meet the industry standards and manufacturing requirements, the solder resist ink can be replaced.
- the pad 100 is plated to make the pad 100 reach a preset thickness
- the dry film is removed; then chemical cleaning and micro-etching are carried out.
- the main function is to clean the surface of the circuit board and enhance the bonding force;
- the traditional solder mask is coated by printing to cover the surface of the board.
- dry film ink or insulating adhesive film can be used directly by vacuum lamination to achieve uniform coverage, and the uniformity is significantly higher than that of traditional printing and coating.
- the traditional solder mask window is made by exposure-development, so photosensitive solder mask ink must be used, and the pad exposed by grinding does not need the exposure and development process.
- the method for making the circuit board pads effectively improves the machinability of the design of high-density, fine-pitch pads, and at the same time effectively prevents the pads from falling off and improves the flatness of the product. Improve product packaging reliability.
- the grinding is at least one of ceramic grinding or abrasive belt grinding.
- ceramic grinding is used, and the uniformity of high-end ceramic grinding can reach ⁇ 3um, which effectively ensures the window opening effect of the pad 100 .
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
Claims (5)
- 一种用于制作线路板焊盘的方法,其特征在于:包括A method for making a circuit board pad, characterized in that: comprising:S1、焊盘加镀,通过选镀的方式增加焊盘厚度;S1, the pad is plated, and the thickness of the pad is increased by the method of selective plating;S2、前处理;S2, pre-processing;S3、压合、固化,将绝缘层进行真空压合、固化;S3, pressing and curing, vacuum pressing and curing the insulating layer;S4、研磨,通过研磨使焊盘露出。S4, grinding, and exposing the pad by grinding.
- 根据权利要求1所述的一种用于制作线路板焊盘的方法,其特征在于:所述绝缘层为阻焊油墨层或环氧树脂层中的至少一种。The method for manufacturing a circuit board pad according to claim 1, wherein the insulating layer is at least one of a solder resist ink layer or an epoxy resin layer.
- 根据权利要求1所述的一种用于制作线路板焊盘的方法,其特征在于:所述研磨为陶瓷研磨或砂带研磨中的至少一种。A method for manufacturing a circuit board pad according to claim 1, wherein the grinding is at least one of ceramic grinding or abrasive belt grinding.
- 根据权利要求3所述的一种用于制作线路板焊盘的方法,其特征在于:所述陶瓷研磨的均匀性可以达到±3um。A method for manufacturing a circuit board pad according to claim 3, wherein the uniformity of the ceramic grinding can reach ±3um.
- 根据权利要求1所述的一种用于制作线路板焊盘的方法,其特征在于:所述焊盘加镀之后进行退膜处理。The method for manufacturing a circuit board pad according to claim 1, wherein the pad is plated and then subjected to film stripping treatment.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110196009.4 | 2021-02-22 | ||
CN202110196009.4A CN113038731A (en) | 2021-02-22 | 2021-02-22 | Method for manufacturing circuit board bonding pad |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2022174627A1 true WO2022174627A1 (en) | 2022-08-25 |
Family
ID=76460819
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2021/130128 WO2022174627A1 (en) | 2021-02-22 | 2021-11-11 | Method for manufacturing circuit board solder pad |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN113038731A (en) |
WO (1) | WO2022174627A1 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113038731A (en) * | 2021-02-22 | 2021-06-25 | 惠州市金百泽电路科技有限公司 | Method for manufacturing circuit board bonding pad |
CN113613405A (en) * | 2021-08-11 | 2021-11-05 | 广东通元精密电路有限公司 | Manufacturing method and application of high-flatness PCB |
CN113966101B (en) * | 2021-12-21 | 2022-03-18 | 广东科翔电子科技股份有限公司 | Small pad windowing manufacturing method of high-precision Mini-LED PCB |
CN117956697A (en) * | 2024-02-19 | 2024-04-30 | 江西景旺精密电路有限公司 | High-ink-reflectivity anti-welding process and Mini LED backlight plate |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0923054A (en) * | 1995-07-07 | 1997-01-21 | Ibiden Co Ltd | Manufacture of printed wiring board |
US20020023895A1 (en) * | 2000-08-31 | 2002-02-28 | Fujitsu Limited | Multilayer circuit board and method of manufacturing the same |
KR20090130475A (en) * | 2008-06-16 | 2009-12-24 | 아페리오(주) | Manufacturing method for flip-chip printed circuit board |
US20150034365A1 (en) * | 2013-08-01 | 2015-02-05 | Ibiden Co., Ltd. | Method for manufacturing wiring board and wiring board |
CN109314089A (en) * | 2016-05-20 | 2019-02-05 | 大口电材株式会社 | Multiple row type semiconductor device Wiring member and its manufacturing method |
CN109890146A (en) * | 2019-02-14 | 2019-06-14 | 广州京写电路板有限公司 | A kind of production method that printed circuit board is used in small component attachment |
CN110366323A (en) * | 2019-07-03 | 2019-10-22 | 深圳明阳电路科技股份有限公司 | A kind of production method of wiring board soldermask layer |
CN110536564A (en) * | 2019-08-30 | 2019-12-03 | 宁波华远电子科技有限公司 | A kind of production method of the circuit board of boss as pad |
CN113038731A (en) * | 2021-02-22 | 2021-06-25 | 惠州市金百泽电路科技有限公司 | Method for manufacturing circuit board bonding pad |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101711096A (en) * | 2009-11-05 | 2010-05-19 | 惠州中京电子科技股份有限公司 | Micro hole manufacturing process of multilayer HDI circuit board |
-
2021
- 2021-02-22 CN CN202110196009.4A patent/CN113038731A/en active Pending
- 2021-11-11 WO PCT/CN2021/130128 patent/WO2022174627A1/en active Application Filing
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0923054A (en) * | 1995-07-07 | 1997-01-21 | Ibiden Co Ltd | Manufacture of printed wiring board |
US20020023895A1 (en) * | 2000-08-31 | 2002-02-28 | Fujitsu Limited | Multilayer circuit board and method of manufacturing the same |
KR20090130475A (en) * | 2008-06-16 | 2009-12-24 | 아페리오(주) | Manufacturing method for flip-chip printed circuit board |
US20150034365A1 (en) * | 2013-08-01 | 2015-02-05 | Ibiden Co., Ltd. | Method for manufacturing wiring board and wiring board |
CN109314089A (en) * | 2016-05-20 | 2019-02-05 | 大口电材株式会社 | Multiple row type semiconductor device Wiring member and its manufacturing method |
CN109890146A (en) * | 2019-02-14 | 2019-06-14 | 广州京写电路板有限公司 | A kind of production method that printed circuit board is used in small component attachment |
CN110366323A (en) * | 2019-07-03 | 2019-10-22 | 深圳明阳电路科技股份有限公司 | A kind of production method of wiring board soldermask layer |
CN110536564A (en) * | 2019-08-30 | 2019-12-03 | 宁波华远电子科技有限公司 | A kind of production method of the circuit board of boss as pad |
CN113038731A (en) * | 2021-02-22 | 2021-06-25 | 惠州市金百泽电路科技有限公司 | Method for manufacturing circuit board bonding pad |
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CN113038731A (en) | 2021-06-25 |
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