WO2021052143A1

WO2021052143A1 - Substrate for soldering electronic component, manufacturing method therefor, and semiconductor device

Info

Publication number: WO2021052143A1
Application number: PCT/CN2020/112199
Authority: WO
Inventors: 段银祥; 张世忠; 李乾
Original assignee: 深圳市中光工业技术研究院
Priority date: 2019-09-18
Filing date: 2020-08-28
Publication date: 2021-03-25
Also published as: CN112530878A

Abstract

The present application provides a substrate for soldering an electronic component. The substrate comprises a substrate board and a position-limiting frame made from a solder resist material. The substrate board comprises an installation surface, and the position-limiting frame is fixed to the installation surface and encloses and forms a position-limiting region on the installation surface. The position-limiting region is used to position the electronic component on the installation surface to assist with the soldering of the electronic component to the substrate board. The present application further provides a semiconductor device comprising an electronic component and the substrate, wherein the electronic component is positioned in the position-limiting region and is soldered and fixed to the installation surface of the substrate. The substrate of the present application uses the position-limiting frame provided on the installation surface to suppress an uncontrollable flow of a solder material during a soldering process, so as to accurately limit a position of an electronic component, and enable the electronic component to be soldered in the position-limiting region enclosed by the position-limiting frame, thereby effectively preventing position shifting of the electronic component, and improving the product yield. The present application further provides a substrate manufacturing method.

Description

Substrate for welding electronic components, preparation method thereof, and semiconductor device

Technical field

The present invention relates to the field of electronic technology, in particular to a substrate for welding electronic components, a preparation method thereof, and a semiconductor device.

Background technique

In the current field of semiconductor module packaging technology, a reflow soldering process is generally used to realize the connection between the chip and the liner or substrate. During the reflow soldering process, the solder on the surface of the substrate is in a molten state at a high temperature. The molten solder is easy to flow on the surface of the substrate, and the abnormal flow of the solder often causes the soldering of the chip to shift to a predetermined position. When the position of the chip is shifted, the subsequent wire bonding on the chip surface and the welding position of the semiconductor module will be affected, which seriously reduces the yield of the product.

Summary of the invention

The purpose of this application is to provide a substrate for welding electronic components, used for welding and positioning the electronic components, and preventing the electronic components from shifting in position during the welding process.

The base described in the present application includes a substrate and a limit frame made of solder resist material. The substrate includes a mounting surface, and the limit frame is fixed on the mounting surface and encloses a limit on the mounting surface. The limit area is used to position the electronic component on the mounting surface to assist the welding of the electronic component and the substrate, so that the electronic component is accurately welded in the limit area , No position shift will occur.

Wherein, the limit frame is provided with at least one notch, and the at least one notch communicates with the limit area to allow excess solder in the limit area to flow out.

Wherein, the limit frame includes a plurality of limit parts, and the plurality of limit parts are arranged on the mounting surface at intervals to enclose the limit area, so that excess solder in the limit area It flows out from between every two of the limit parts.

Wherein, the mounting surface of the base and the limit frame are connected by a connecting layer to increase the bonding force of the limit frame and the substrate.

Wherein, the mounting surface is provided with a first protective layer, the first protective layer includes a first sub-protection layer located in the limit area, and the surface of the first sub-protection layer facing away from the mounting surface is used When welding the electronic components, the first sub-protection layer is used to protect the substrate located in the limit area and prevent the substrate from being oxidized.

Wherein, the first protective layer further includes a second sub-protection layer located outside the limit area, and the second sub-protection layer is used to protect the substrate located outside the limit area and prevent the substrate from being oxidized. .

Wherein, the solder resist material can withstand a temperature above 210° C. to prevent the limit frame from being deformed during the welding process.

Wherein, the thickness of the limit frame is greater than 0.005 mm to ensure the positioning effect of the limit frame on the electronic components.

The present application also provides a semiconductor device, which includes an electronic component and any of the above-mentioned substrates, and the electronic component is positioned in the limit area and welded and fixed on the mounting surface of the substrate.

Wherein, the semiconductor device further includes a heat sink, and the heat sink is installed on the surface of the substrate away from the electronic components to realize rapid heat dissipation of the electronic components.

This application also provides a method for preparing a substrate, which is used to prepare any of the above-mentioned substrates, and the method includes:

Provide a substrate and solder resist material, wherein the substrate includes a mounting surface;

A limit frame is formed on the mounting surface by the solder resist material, wherein the limit frame encloses a limit area on the mounting surface.

Wherein, forming a limit frame on the mounting surface by the solder resist material includes:

Placing the solder mask material on the mounting surface;

High-temperature sintering is performed on the substrate on which the solder resist material is placed on the mounting surface, so that the part of the solder resist material close to the mounting surface reacts with the substrate to form a connection layer, and the other parts of the solder resist material Form a limit frame.

Providing a mask, wherein the mask is provided with a plurality of openings arranged at intervals;

Spraying solder resist material on the mounting surface through the mask;

Baking and sintering the substrate coated with the solder resist material on the mounting surface, so that the solder resist material on the mounting surface forms a limit frame.

A steel net is provided, wherein a plurality of openings arranged at intervals are opened on the steel net;

Printing the solder mask material on the mounting surface through the steel mesh;

Baking the substrate on which the solder resist material is printed on the mounting surface, so that the solder resist material on the mounting surface forms a limit frame.

Wherein, after the limit frame is formed on the mounting surface by the solder resist material, the method includes: forming a first protective layer on the mounting surface.

Wherein, before the limit frame is formed on the mounting surface by the solder resist material, the method includes: forming a first protective layer on the mounting surface.

In the substrate and semiconductor device described in the present application, the mounting surface of the substrate is provided with a limit frame made of solder resist material, and the limit frame encloses a limit area on the mounting surface, which is used for welding electronics. Before the components, the electronic components are installed in the limit area and positioned by the limit frame. When the electronic components are soldered, the limit frame effectively suppresses the solder reflow process Uncontrollable flow occurs during the process, so that the electronic components can be accurately positioned and welded in the limit area, avoiding positional deviation, and improving the product yield.

The method for preparing the base of the present application uses solder resist material to form a limit frame on the mounting surface of the substrate, and the limit frame encloses a limit on the mounting surface that matches the shape of the electronic component to be installed When soldering electronic components on the substrate, the limit frame prevents the uncontrollable flow of solder on the mounting surface, so that the electronic components are accurately soldered in the limit area, The welding accuracy of the electronic components is improved.

Description of the drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work.

Fig. 1 is a schematic diagram of the structure of the first embodiment of the substrate of the present invention.

Fig. 2 is a schematic structural diagram of a second embodiment of the substrate of the present invention.

Fig. 3 is a schematic structural diagram of one implementation of a third embodiment of the substrate of the present invention.

Fig. 4 is a schematic structural diagram of another implementation of the third embodiment of the substrate according to the present invention.

Fig. 5 is a schematic structural view of a fourth embodiment of the substrate according to the present invention.

FIG. 6 is a schematic cross-sectional structure diagram of a fifth embodiment of the substrate of the present invention.

Fig. 7 is a schematic structural view of a sixth embodiment of the substrate according to the present invention.

FIG. 8 is a schematic diagram of the structure along the A-A section of an embodiment of the substrate shown in FIG. 7.

FIG. 9 is a schematic view of another embodiment of the substrate shown in FIG. 7 along the A-A section structure.

Fig. 10 is a schematic flow chart of the method for preparing the substrate of the present invention.

FIG. 11 is a schematic diagram of the mask structure in the method for preparing the substrate of the present invention.

Fig. 12 is a schematic diagram of the steel mesh structure in the method for preparing the substrate according to the present invention.

Fig. 13 is a synthetic route diagram of a polyimide glue prepolymer in the preparation method of the substrate of the present invention.

detailed description

The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

This application provides a substrate for welding electronic components, the electronic components including but not limited to light-emitting chips, semiconductor power chips or connecting devices. Please refer to FIG. 1, the base 10 includes a substrate 11 and a limit frame 12 made of solder resist material. The substrate 11 includes a mounting surface 111, the limit frame 12 is fixed on the mounting surface 111, and a limit area 1111 is enclosed on the mounting surface 111, and the limit area 1111 is used for positioning the electronic components on the mounting surface 111 to assist The electronic components are welded to the substrate 11. Among them, the substrate 11 is a copper substrate made of metallic copper.

The base 10 shown in this application is provided with a limit frame 12 on the mounting surface 111 of the substrate 11. The limit frame 12 encloses a limit area 1111 on the mounting surface 111. Before the electronic components are soldered, the electronic components Installed in the limit area 1111 and positioned by the limit frame 12, it can effectively suppress the uncontrollable flow of solder on the entire mounting surface 111 during the reflow process during soldering, and can ensure that the electronic components can be accurately Welded on the base, no position shift occurs.

In this embodiment, the limit frame 12 includes a limit surface 121 facing the limit area 1111, and the limit surface 121 abuts the electronic component to limit the electronic component in the limit area 1111. Wherein, the limit frame 12 is made of solder resist material, and the limit frame 12 has a quadrilateral structure. Specifically, the limiting frame 12 is rectangular, and the limiting frame 12 is tightly coupled to the mounting surface 111 in a “back” shape to ensure that the limiting frame 12 will not easily fall off the mounting surface 111. It should be understood that the solder mask material refers to a material that cannot be wetted by liquid solder (generally liquid solder), that is, the wetting angle of the liquid solder on the solder mask material is above 90 degrees. Among them, the solder resist materials are organic materials such as polytetrafluoroethylene, polyimide, and polyphenylene sulfide. Further, the thickness of the limit frame 12 is greater than 0.005 mm to ensure that the limit surface 121 effectively resists the electronic components, and the electronic components are confined in the limit area 1111. Preferably, the thickness of the limit frame 12 is between 0.01 mm and 0.1 mm.

1, the mounting surface 111 further includes a non-limiting area 1112 on the side of the limiting frame 12 away from the limiting area 1111, and the limiting frame 12 completely isolates the limiting area 1111 and the non-limiting area 1112. Specifically, the limit area 1111 is a closed area, and the size of the limit area 1111 is the same as the size of the electronic component, so that the electronic component is accurately positioned and welded in the limit area 1111, and no position occurs. Offset. It should be noted that since the reflow soldering process is generally used to solder electronic components, the limit frame 12 is to realize the limit function of the electronic components, and the solder mask material must not only be resistant to the corrosion of the solder, but also prevent the solder from being inside. It is also necessary to withstand high temperatures above 210°C to prevent the limit frame 12 from being melted and deformed during the reflow soldering process. Preferably, the solder mask material should be able to withstand a temperature higher than the peak temperature of the reflow soldering process, and can withstand a high temperature above 275°C, so as to ensure the limit effect of the limit frame 12 on the electronic components.

Referring to FIG. 2, in the second embodiment of the substrate 10 of the present application, the difference from the above-mentioned embodiment is that at least one notch 122 is provided on the limit frame 12, and at least one notch 122 and the limit area 1111 is connected to connect the restricted area 1111 and the non-restricted area 1112. In this embodiment, a gap 122 is formed on the limit frame 12, and the gap 122 is opened on the frame of the "back"-shaped limit frame 12, so that the excess solder in the limit area 1111 flows to the non-limit area 1112. On the one hand, it prevents excess solder from contaminating the electronic components and affecting the performance of the electronic components. On the other hand, it prevents the uneven distribution of solder in the limit area 1111, causing the electronic components to be installed in the limit area 1111. There is a height difference in different positions, which affects subsequent use. It should be noted that in other implementations of this embodiment, the notch 122 may also be opened at the corner position of the "back"-shaped limit frame 12, which is not specifically limited in this embodiment.

Referring to FIG. 3, in the third embodiment of the substrate 10 of the present application, the difference from the above two embodiments is that the limit frame 12 includes a plurality of limit portions 123, and the plurality of limit portions 123 are spaced apart from each other. It is arranged on the mounting surface 111 to enclose a limit area 1111. Specifically, the limiting frame 12 includes four limiting portions 123. Similarly, it can be understood that the limit frame 12 is provided with four notches 122, and each notch 122 connects two limit parts 123. In this embodiment, the four limiting portions 123 are all of an L-shaped structure, and the limiting portions 123 of the four L-shaped structures are respectively located on the four corners of the "back"-shaped structure, or it can be said that the four notches 122 are respectively It is opened on the four frames of the "back"-shaped limit frame 12 so that the excess solder in the limit area 1111 can flow out of the limit area 1111 from the four notches 122, so as to increase the amount of excess solder flowing out of the limit area 1111. effectiveness.

As shown in FIG. 4, in the second implementation manner of this embodiment, the difference from the first implementation manner described above is that the four limiting portions 123 are all "one"-shaped structures, and four "ones" The limit parts 123 of the font structure are respectively located on the four frames of the "回" font structure. Similarly, it can be understood that the four notches 122 are provided on the four corners of the “back”-shaped limit frame 12, which can also improve the efficiency of the excess solder flowing out of the limit area 1111.

It should be noted that the specific shape, structure and position of the four limiting portions 123 are not specifically limited in this embodiment, that is, the specific positions of the four notches 122 on the limiting frame 12 are not specifically limited.

Referring to FIG. 5, in the fourth embodiment of the substrate 10 of the present application, the difference from the above three embodiments is that the limit frame 12 includes eight limit portions 123, that is, the limit frame 12 is provided with There are eight gaps 122. Specifically, every two notches 122 are opened on a frame of the “back”-shaped limit frame 12 at intervals, which further accelerates the efficiency of the excess solder flowing out in the limit area 1111.

It should be noted that in other embodiments of the substrate described in this application, the limit frame can also be a trapezoid or parallelogram, and the specific structure of the limit frame can be adapted according to actual needs. change. Of course, two gaps, three gaps, and other numbers of gaps can also be provided on the limit frame, as long as it can ensure that the solder in the limit area 1111 can flow out, which is not specifically limited in this application.

Referring to FIG. 6, in the fifth embodiment of the base 10 shown in the present application, the difference from the above four embodiments is that the base 10 further includes a connection layer 13, which is connected to the substrate 11 and the limit frame Between 12. Specifically, the connecting layer 13 is a bonding layer to reduce the interface energy between the limit frame 12 and the substrate 11 and increase the bonding force between the limit frame 12 and the substrate 11. Among them, the solder resist material is a material that can chemically bond with metal copper, such as metal materials such as iron and aluminum, or inorganic non-metal materials such as metal oxides, silicon, and carbon. It should be noted that there are also multiple implementations of the limiting frame 12 in this embodiment. Since the multiple implementations of the limiting frame 12 are the same as those in the foregoing embodiments, they will not be described here.

Referring to FIGS. 7 and 8, in the sixth embodiment of the substrate 10 according to the present application, the difference from the above-mentioned fifth embodiment is that a first protective layer 14 is provided on the mounting surface 111, and the first protective layer The layer 14 includes a first sub-protection layer located in the limiting area 1111, and the surface of the first sub-protection layer facing away from the mounting surface 111 is used for soldering the electronic components. Specifically, the wetting angle of the solder on the first protective layer 14 is less than 90 degrees, so that the solder can spread on the surface of the first protective layer 14 to facilitate soldering of the electronic components. In this embodiment, the first protection layer 14 further includes a second sub-protection layer located outside the confinement area, and the connection layer 13 is connected between the second sub-protection layer and the first sub-protection layer, and is connected to the second sub-protection layer. The second sub-protection layer and the first sub-protection layer together protect the mounting surface 111 and prevent the mounting surface 111 from being oxidized. It is understandable that, in other embodiments, when the solder resist material is an organic material such as polytetrafluoroethylene, polyimide, polyphenylene sulfide, etc., the second sub-protection layer and the first sub-protection layer The protective layer may completely cover the mounting surface 111 to protect the substrate 11 made of metal copper and prevent the mounting surface 111 from being oxidized, as shown in FIG. 9.

Further, the substrate 11 further includes a bottom surface 112 opposite to the mounting surface 111, and a second protective layer 15 is provided on the bottom surface 112. The second protective layer 15 completely covers the bottom surface 112 to prevent the bottom surface 112 from being oxidized. In this embodiment, the second protective layer 15 and the first protective layer 14 are both electroplated layers made of nickel or nickel gold.

It should be noted that there are also multiple implementations of the limiting frame 12 in this embodiment. Since the multiple implementations of the limiting frame 12 are the same as those of the above-mentioned first embodiment, they will not be described here. Describe more.

The present application also provides a semiconductor device. The semiconductor device includes an electronic component and any one of the above-mentioned substrates 10, and the electronic component is positioned and welded in the limit area 1111. Wherein, the substrate 10 is a copper substrate made of metallic copper. The metallic copper has good thermal conductivity and can quickly conduct heat generated by the electronic components to the outside, so as to realize rapid heat dissipation of the electronic components.

Further, the semiconductor device further includes a heat sink, and the heat sink is mounted on a side of the substrate 11 away from the electronic components. Specifically, the heat sink is mounted on the bottom surface 112 of the substrate 10 facing away from the mounting surface 111, the substrate 11 transfers the heat generated by the electronic components to the heat sink, and the heat sink transfers the heat to the outside.

In the substrate and the semiconductor device described in the present application, the solder resist material is used to surround the mounting surface of the substrate to form a limit area, which prevents the uncontrollable flow of solder on the mounting surface, and solves the problem of electronic components during the soldering process. The technical problem of position shift caused by the uncontrolled flow of solder improves the product yield.

Please refer to FIG. 10, this application also provides a method for preparing a substrate, including:

S1, a substrate 11 and solder resist materials are provided, wherein the substrate 11 includes a mounting surface 111. Specifically, the substrate 11 is a copper substrate made of metal copper, the solder resist material is four aluminum oxide sheets, and the copper substrate and the four aluminum oxide sheets are cleaned for use.

S2, forming a limit frame 12 on the mounting surface 111 by using the solder resist material. Specifically, including:

S201: Place the four aluminum oxide sheets on the mounting surface 111, wherein the four aluminum oxide sheets enclose an area of the same size of electronic components on the mounting surface 111.

S202: Perform high-temperature sintering of the substrate 11 on which the four alumina sheets are placed on the mounting surface 111, so that the part of the four alumina sheets close to the mounting surface 111 reacts with the substrate 11 to form a connection layer 13. The other parts of the four alumina sheets form the limit frame 12. Specifically, step S202 includes:

In S2021, the substrate 11 with the four alumina sheets placed on the mounting surface 111 is placed in a tubular high-temperature furnace, and the inside of the tubular high-temperature furnace is evacuated, and then filled with an inert gas (such as helium or helium). Argon, etc.), repeat several times until the oxygen in the tube-type high-temperature furnace is exhausted.

S2022: Fill the tube-type high-temperature furnace with pure oxygen, control the oxygen atom content to account for about 0.8% to 2.0% of the gas banknotes in the entire tube-type high-temperature furnace, perform high-temperature sintering at 1060℃～1065℃, copper substrate and four pieces A connecting layer 13 is formed at the interface of the alumina sheet, the other parts of the four alumina sheets form a limit frame 12, and the connecting layer 13 connects the substrate 11 and the limit frame 12. It should be noted that in this step, in an atmosphere with a high temperature and a certain oxygen content, the surface of the copper substrate is oxidized to form a thin layer of Cu ₂ _{O. Cu-Cu 2} O appears when the sintering temperature is higher than the eutectic point. Cu ₂ O and Al ₂ O ₃ ceramics have a good chemical affinity, which reduces the interface energy. The eutectic liquid phase Cu-Cu ₂ O can well infiltrate the copper substrate and the aluminum oxide sheet. At the same time, Cu ₂ O and Al ₂ O ₃ chemically react to form _{a connection layer 13 made of CuAlO 2} to tightly combine the aluminum oxide sheet with the copper substrate.

In S2023, the substrate 11 forming the limit frame 12 is physically or chemically polished to remove oxides or stains on the surface of the substrate 11, and the substrate 11 is electrolessly plated or electroplated with nickel or gold to form the first protective layer 14 and the second protective layer. Layer 15.

Please refer to FIG. 10 and FIG. 11, this application also provides a second method for preparing a substrate, and the method includes:

S1, a substrate 11 and solder resist materials are provided, wherein the substrate 11 includes a mounting surface 111. Specifically, the substrate 11 is a copper substrate made of metallic copper, and the solder resist material is a polytetrafluoroethylene coating material.

S2, forming a limit frame 12 on the mounting surface 111 by using the solder resist material, wherein the limit frame 12 encloses a limit area 1111 on the mounting surface 111. Specifically, including:

S201, providing a patterned mask 20. Please refer to 10, the pattern of the mask 20 has four openings 21, and the shape of the four openings 21 is L-shaped. The four openings 21 are surrounded by the mask 20 to form a preset limit area. The size depends on the size of the electronic components.

S202, spraying the solder resist material on the mounting surface 111 through the mask 20. Specifically, a mask 20 is used to cover the mounting surface 111, the solder resist material is deposited on the mounting surface 111 through the four openings 21, wherein the deposition thickness of the solder resist material on the mounting surface 111 is 0.005 to 0.5 mm between.

S203, baking and sintering the substrate 11 sprayed with the solder resist material on the mounting surface 111, so that the solder resist material on the mounting surface 11 forms a limit frame 12. Specifically, this step includes: putting the substrate 11 sprayed with the solder resist material on the mounting surface 111 into an oven at 80°C, and after the moisture evaporates, it is sent to a high-temperature furnace for sintering at 380°C to 410°C, and sintering Time and temperature control depends on the situation.

S204, electroless plating or electroplating of nickel or gold is performed on the substrate 11 to form the first protective layer 14 and the second protective layer 15.

In the method for preparing a substrate in this embodiment, before step S1, the method includes:

Step S0, preparing a polytetrafluoroethylene coating material. Specifically, the polymerization kettle is cleaned and added with a quantitative amount of non-ionized water, and dispersants (such as ammonium perfluorooctanoate, etc.), stabilizers (such as paraffin, silicone oil, etc.), and pH regulators (such as ammonium phosphate, disodium hydrogen phosphate, etc.) are added. Put on the lid of the kettle, start stirring for evacuation treatment, raise the temperature in the kettle to a certain temperature after the oxygen content is qualified, add monomers to the kettle until the pressure in the kettle rises to a certain pressure, and add a formula amount of initiator from the metering pump (e.g. After adding ammonium persulfate, potassium persulfate, etc.), clean the pipeline with a certain amount of ion-free water to ensure that all the initiator solution is added to the kettle. When the pressure in the kettle drops by 0.1 MPa, the reaction starts, and monomers are added to stabilize the pressure at a certain value. During the reaction, the automatic cooling system is activated according to the reaction situation. The reaction pressure is controlled within a certain range, and the reaction temperature is controlled within the set temperature range. When the reaction volume of tetrafluoroethylene monomer reaches the specified value, the stirring is stopped. The monomers are recovered and evacuated, the temperature is lowered, and the kettle cover is opened to discharge the materials, and the materials are sent to the post-processing for vacuum concentration or sedimentation concentration to prepare a polytetrafluoroethylene emulsion with a solid content of 60%.

This application also provides a third method for preparing a substrate, the method includes:

S1, a substrate 11 and solder resist materials are provided, wherein the substrate 11 includes a mounting surface 111. Specifically, the substrate 11 is a copper substrate made of metallic copper, and the solder resist material is polyimide glue.

S201, please refer to FIG. 12, a steel net 30 is provided, wherein a plurality of openings 31 arranged at intervals are opened on the steel net 30. Please refer to 12, the pattern of the steel mesh 30 has eight openings 31, of which the shape of the four openings 31 is L-shaped, the shape of the four openings 31 is a straight shape, and the L-shaped and straight-shaped openings 31 are alternately arranged at intervals , The eight openings 31 are enclosed on the steel mesh 30 to form a preset limit area, and the size of the preset limit area is determined according to the size of the electronic component.

S202, printing the solder resist material on the mounting surface 111 through the steel mesh 30. Specifically, the polyimide glue is printed on the mounting surface 111 by means of stencil printing.

S203, baking the substrate 11 on which the solder resist material is printed on the mounting surface 111, so that the solder resist material on the mounting surface 111 forms a limit frame 12. Specifically, this step includes: removing the steel mesh 30, pre-drying the substrate 11 with polyimide glue printed on the mounting surface 111 at 150°C, and then putting it in an oven for polymerization at a high temperature of 320°C to make the polyamide The imine glue forms the limit frame 12.

The preparation method of the substrate in this embodiment further includes:

In step S3, a first protective layer 14 is formed on the mounting surface 111. Specifically, the first protective layer 14 made of nickel or gold is formed on the mounting surface 111 by electroless plating or electroplating, and at the same time, the second protective layer 15 is formed on the bottom surface 12 of the substrate 11. It should be noted that in other implementations of this embodiment, the formation of the first protective layer 14 on the mounting surface 111 may be performed before step S2.

Before step S1, the method for preparing the substrate in this embodiment further includes:

Step S0, synthesize polyimide glue. Specifically, as shown in Figure 13, using 4-phenylethynyl phthalic anhydride (PEPA) as the end-capping agent, the sulfone-containing dianhydride monomer 3,3,4,4-diphenylsulfone tetracarboxylic acid was synthesized by a high-temperature one-step method. A series of polyimides of acid dianhydride (DSDA), m-phenylenediamine (m-PDA) and fluorine-containing diamine 1,4-bis(2-trifluoromethyl-4-aminophenoxy)benzene (6FAPB) Amine prepolymer. By changing the ratio of the mixed diamine to control the molecular backbone structure, the calculated molecular weight of the prepolymer is 1500-5000. Dissolve the prepolymer in DMF solvent to prepare a viscous glue.

The above-disclosed are only the preferred embodiments of the present invention. Of course, the scope of rights of the present invention cannot be limited by this. Those of ordinary skill in the art can understand all or part of the procedures for implementing the above-mentioned embodiments and make them in accordance with the claims of the present invention. The equivalent change of is still within the scope of the invention.

Claims

A base for welding electronic components, which is characterized by comprising a substrate and a limit frame made of solder resist material, the substrate includes a mounting surface, the limit frame is fixed on the mounting surface, and A limit zone is enclosed on the mounting surface, and the limit zone is used for positioning the electronic component on the mounting surface to assist the soldering of the electronic component with the substrate.
5. The substrate according to claim 1, wherein at least one gap is formed on the limit frame, and the at least one gap is connected with the limit area.
The substrate according to claim 1, wherein the limit frame includes a plurality of limit portions, and the plurality of limit portions are arranged on the mounting surface at intervals to enclose the limit area.
5. The substrate according to any one of claims 1 to 3, wherein the limit frame is quadrilateral.
The substrate according to claim 1, wherein the mounting surface of the substrate and the limit frame are connected by a connecting layer.
The substrate according to any one of claims 1, wherein a first protective layer is provided on the mounting surface, and the first protective layer includes a first sub-protective layer located in the limit area, so The surface of the first sub-protection layer facing away from the mounting surface is used for welding the electronic components.
7. The substrate according to claim 6, wherein the first protective layer further comprises a second sub-protection layer located outside the limit area, and the second sub-protection layer is used to protect Substrate outside the zone.
A semiconductor device, characterized by comprising electronic components and the substrate according to any one of claims 1 to 7, and the electronic components are positioned in the limit area and welded and fixed to the substrate. Surface.
8. The semiconductor device according to claim 8, wherein the semiconductor device further comprises a heat sink, and the heat sink is mounted on a surface of the substrate away from the electronic components.
A method for preparing a substrate for welding electronic components, which is used for preparing the substrate according to any one of claims 1 to 7, wherein the method comprises:

Provide a substrate and solder resist material, wherein the substrate includes a mounting surface;

A limit frame is formed on the mounting surface by the solder resist material, wherein the limit frame encloses a limit area on the mounting surface.
9. The method for preparing a substrate according to claim 10, wherein said forming a limit frame on said mounting surface by said solder resist material comprises:

Placing the solder mask material on the mounting surface;

The substrate on which the solder resist material is placed on the mounting surface is sintered at a high temperature, so that the part of the solder resist material in contact with the mounting surface reacts with the substrate to form a connection layer. Part of the limit frame is formed.
9. The method for preparing a substrate according to claim 10, wherein said forming a limit frame on said mounting surface by said solder resist material comprises:

Providing a mask, wherein the mask is provided with a plurality of openings arranged at intervals;

Spraying the solder resist material on the mounting surface through the mask;

Baking and sintering the substrate coated with the solder resist material on the mounting surface, so that the solder resist material on the mounting surface forms a limit frame.
10. The method for preparing a substrate according to claim 10, wherein said forming a limit frame on said mounting surface by said solder resist material comprises:

A steel net is provided, wherein a plurality of openings arranged at intervals are opened on the steel net;

Printing the solder mask material on the mounting surface through the steel mesh;

Baking the substrate on which the solder resist material is printed on the mounting surface, so that the solder resist material on the mounting surface forms a limit frame.