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WO2020244105A1 - 栅压调节电路、栅压调节方法及应用其的传感器 - Google Patents

栅压调节电路、栅压调节方法及应用其的传感器 Download PDF

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Publication number
WO2020244105A1
WO2020244105A1 PCT/CN2019/110221 CN2019110221W WO2020244105A1 WO 2020244105 A1 WO2020244105 A1 WO 2020244105A1 CN 2019110221 W CN2019110221 W CN 2019110221W WO 2020244105 A1 WO2020244105 A1 WO 2020244105A1
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Prior art keywords
signal
module
storage unit
voltage
unit
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PCT/CN2019/110221
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English (en)
French (fr)
Inventor
雷述宇
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宁波飞芯电子科技有限公司
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Priority to US17/616,320 priority Critical patent/US11750947B2/en
Publication of WO2020244105A1 publication Critical patent/WO2020244105A1/zh

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details
    • H04N23/54—Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/709—Circuitry for control of the power supply
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G01J1/46—Electric circuits using a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/772—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising A/D, V/T, V/F, I/T or I/F converters
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G01J2001/4446—Type of detector
    • G01J2001/446—Photodiode
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/771—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising storage means other than floating diffusion

Definitions

  • This application relates to the technical field of electronic circuits, and in particular to a gate voltage adjustment circuit, a gate voltage adjustment method and a sensor using the same.
  • FIG 1 is a schematic diagram of the pixel structure of a photoelectric sensor.
  • the photodiode PD generates photo-generated charges under light conditions, and the photo-generated charges are transferred under the control of the transmission gate TX, for example, can be transferred to the floating diffusion node FD shown in Figure 1.
  • TX transmission gate
  • the magnitude of the voltage applied by TX (referred to as the gate voltage) has an important influence on the charge transfer performance.
  • Figure 2a and Figure 2b are schematic diagrams of the potential distribution of PD, TX gate area and FD when TX is off and on, respectively.
  • the potential of the area under the gate is the lowest of the three, preventing electrons from PD to FD
  • TX is turned on, the potential of the area under the gate is between PD and FD, and the photo-generated charge is transferred from PD to FD through the area under the TX gate.
  • the voltage difference between the TX gate area and PD is small, which affects the charge transfer efficiency; but when the gate voltage is high, the charge stored in the TX gate area is more, but because the TX gate area is The pressure difference between the FDs at this time is small, which leads to a decrease in the charge transferred to the FD during the turn-off process, so that part of the charge is injected into the PD, which affects the imaging accuracy of the sensor.
  • embodiments of the present application provide a gate voltage adjustment circuit, a gate voltage adjustment method, and a sensor using the same, so as to reduce charge injection and at the same time improve charge transfer efficiency.
  • a gate voltage adjustment circuit in the first aspect of the embodiments of the present application, includes a storage module, a comparison module, and a voltage adjustment module.
  • the input terminal of the storage module is connected with the first terminal of the signal storage unit, the output terminal is connected with the input terminal of the comparison module, the output terminal of the comparison module is connected with the input terminal of the voltage regulation module, and the output terminal of the voltage regulation module is connected with the transmission gate;
  • the storage module is configured to store the electrical signal output by the signal storage unit;
  • the comparison module is configured to compare at least two electrical signals output by the signal storage unit corresponding to different gate voltages to obtain a comparison result;
  • the voltage adjustment module is configured to follow the comparison result
  • the preset rule adjusts the output voltage to change the gate voltage of the transmission gate.
  • the storage module includes at least two storage units, the input end of each storage unit is connected to the input end of the storage module, and the output end is connected to at least one input end of the comparison module, and the at least two storage units are
  • the unit includes: a first storage unit, connected to the input end of the storage module through a first switch, and connected to an input end of the comparison module through an eighth switch; a second storage unit, connected to the input end of the storage module through a second switch, It is connected to the other input terminal of the comparison module through the ninth switch.
  • the voltage adjustment module includes: a counting unit, the input end of the counting unit is connected to the input end of the voltage adjustment module, and is configured to perform cumulative counting according to the comparison result; the digital-to-analog conversion unit, one end of which is connected to the counting unit The output end is connected, and the other end is connected to the output end of the voltage adjustment module, and is configured to convert and output a corresponding voltage according to a preset corresponding relationship according to the accumulated count value.
  • the gate voltage adjustment circuit further includes an electrical signal acquisition unit, one end of the electrical signal acquisition unit is connected to the first end of the signal storage unit, and the other end is connected to the input end of the storage module, configured to collect The electrical signal of the signal storage unit is output to the storage module.
  • the gate voltage adjustment circuit further includes a control unit.
  • One end of the control unit is connected to the output end of the voltage adjustment module, and the other end is connected to the transmission gate, and is configured to output the voltage adjustment module based on a preset condition. The voltage is applied to the transmission gate.
  • the gate voltage adjustment circuit further includes an electrical signal processing unit, one end of the electrical signal processing unit is connected to the first end of the signal storage unit, and the other end is connected to the input end of the storage module, and is configured to The current signal is converted into a voltage signal, or the voltage signal is converted into a current signal.
  • the gate voltage adjustment circuit further includes a signal supply unit, which is connected to the first end of the signal conversion unit through a third switch, and is configured to input the signal to be converted to the signal conversion unit.
  • the gate voltage adjustment circuit further includes a reset module, and the reset module includes at least one of the following reset units:
  • the first reset unit is connected to the first end of the signal conversion unit through the fourth switch and is configured as a reset signal conversion unit;
  • the second reset unit is connected to the first end of the signal storage unit through the fifth switch and is configured as a reset signal storage
  • the third reset unit is connected to the first storage unit through the sixth switch, and is connected to the second storage unit through the seventh switch, configured to reset at least two storage units.
  • a gate voltage adjustment method is provided, which is applied to any gate voltage adjustment circuit as in the first aspect, and the method includes:
  • the output voltage of the voltage adjustment module is adjusted according to the preset rule based on the comparison result, and the output voltage of the adjusted voltage adjustment module is used as the gate voltage of the next cycle.
  • adjusting the output voltage of the voltage adjustment module according to a preset rule based on the comparison result specifically includes:
  • the voltage regulation module increases the output voltage; otherwise, decreases the output voltage
  • the voltage regulation module increases the output voltage; otherwise, decreases the output voltage.
  • the grid voltage adjustment method further includes:
  • Determining whether the comparison result meets the preset condition to determine the optimal gate voltage includes: determining whether the comparison result has changed, and if so, the output voltage of the voltage regulation module corresponding to the period is the optimal gate voltage.
  • comparing the electrical signals corresponding to the signal storage unit after applying different gate voltages stored in the storage module, and obtaining the comparison result specifically includes:
  • the method further includes: closing the second switch to store the current electrical signal of the signal storage unit in the second storage unit;
  • the method further includes: closing the first switch to store the current electrical signal of the signal storage unit in the first storage unit.
  • the method before closing the second switch to store the current electrical signal of the signal storage unit in the second storage unit, the method further includes: closing the seventh switch, and resetting the second storage unit through the third reset unit ;
  • the method further includes: closing the sixth switch, and resetting the first storage unit through the third reset unit.
  • the voltage adjustment module adjusts its output voltage according to a preset rule, which specifically includes:
  • the digital-to-analog conversion unit converts the cumulative counting result into a corresponding voltage according to a preset correspondence relationship, which is used as the output voltage of the voltage adjustment module.
  • the method before the output voltage of the voltage regulation module is applied to the transmission gate, the method further includes:
  • the third switch is closed, and a preset amount of signal is input to the signal conversion unit through the signal supply unit.
  • a sensor including at least one pixel connected to any gate voltage adjustment circuit as in the first aspect.
  • This application compares the electrical signals of the signal storage unit under different gate voltages to characterize the comprehensive effects of different gate voltages on the efficiency of charge injection and charge transfer. According to the comparison results, the gate voltage is adjusted so that there is little or no charge injection. Within the range of high transfer efficiency, the gate voltage of the transmission gate of other pixels in the sensor can be further controlled based on the value range of the gate voltage.
  • Figure 1 is a schematic diagram of the pixel structure of a photoelectric sensor
  • Figure 2a is a schematic diagram of the potential distribution of PD, TX gate area and FD when TX is off;
  • Figure 2b is a schematic diagram of the potential distribution of PD, TX gate area and FD when TX is turned on;
  • FIG. 3 is a schematic diagram of an optional gate voltage adjustment circuit according to an embodiment of the application.
  • FIG. 4 is a schematic diagram of an optional gate voltage adjustment circuit according to an embodiment of the application.
  • FIG. 5 is a schematic diagram of an optional gate voltage adjustment circuit according to an embodiment of the application.
  • FIG. 6 is a schematic diagram of an optional gate voltage adjustment circuit according to an embodiment of the application.
  • FIG. 7 is a timing diagram of an optional gate voltage adjustment method according to an embodiment of the application.
  • the key to image sensor imaging is the photoelectric conversion of photodiodes and the transfer of photogenerated charges.
  • FIG. 3 is the result of the inventor's further research on the influence of the above two aspects, showing the variation of the voltage V FD of the floating diffusion node FD (ie, the signal storage unit) with the gate voltage V TX of the transmission gate TX, the smaller the voltage of the FD is It means that the more electrons transferred to the FD, the V TX corresponding to the lowest value of V FD is the optimal value obtained after balancing the two influencing factors of charge transfer efficiency and charge injection.
  • V TX As shown in Figure 3, with the increase of V TX , the FD voltage first decreases and then increases, and there is a lowest point V B.
  • V TX the voltage difference between the area under the TX gate and PD is small, and the charge transfer efficiency is low.
  • the number of electrons transferred to FD is small, and the FD voltage is higher at this time; as the gate voltage V TX increases, the charge transfer efficiency increases, the number of electrons transferred to FD in the same time increases, and the voltage decreases.
  • V TX V B
  • V FD obtains the minimum value; as the gate voltage V TX further increases, the remaining under the gate As the number of electrons increases, charge injection back into the PD begins, the total number of electrons transferred to the FD decreases, and V FD begins to increase.
  • the inventors designed a technical solution to reduce the charge injection while ensuring a higher charge transfer efficiency through the detection and comparison of V FD under different gate voltages.
  • the embodiments of the present application provide a gate voltage adjusting circuit, a gate voltage adjusting method, and a sensor applying the same.
  • the gate voltage adjusting circuit, the gate voltage adjusting method, and the sensor applying the same are based on the same inventive concept, because the principle of solving the problem is similar Therefore, the implementation of the gate voltage adjustment circuit, the gate voltage adjustment method and the sensor using the same can be referred to each other, and the repetition will not be repeated.
  • FIG. 4 is a schematic diagram of a gate voltage adjustment circuit provided by an embodiment of the application, which includes a storage module, a comparison module, and a voltage adjustment module.
  • the input terminal of the storage module is connected with the first terminal of the signal storage unit, and the output terminal is connected with the input terminal of the comparison module;
  • the output terminal of the comparison module is connected with the input terminal of the voltage regulation module, and the output terminal of the voltage regulation module is connected with the transmission gate;
  • the storage module is configured to store the electrical signal output by the signal storage unit; the comparison module is configured to compare at least two electrical signals output by the signal storage unit corresponding to different grid voltages to obtain a comparison result; the voltage adjustment module is configured to follow the comparison result
  • the preset rule adjusts the output voltage to change the gate voltage of the transmission gate.
  • the foregoing electrical signal includes at least one of a voltage signal and a current signal; the signal conversion unit is configured to convert any signal related to the prior art such as a magnetic signal, a pressure signal, or an optical signal into an electrical signal. There are no restrictions.
  • the charge generated by the signal conversion unit under different gate voltages can be stored by the storage module and transferred by the signal conversion unit
  • the voltage signal corresponding to the signal storage unit is compared with at least two voltage signals through the comparison module, and the comparison result is used to adjust the gate voltage applied to the transmission gate to reduce the voltage of the signal storage unit signal.
  • the lower the voltage of the signal storage unit the greater the amount of charge transferred to it in this period.
  • the corresponding gate voltage is the optimal value obtained after balancing the two influencing factors of charge transfer efficiency and charge injection. Thus, it is realized that the charge injection is reduced and the charge transfer efficiency is higher.
  • the gate voltage corresponding to the maximum current signal is the optimal value obtained after balancing the two influencing factors of charge transfer efficiency and charge injection.
  • the comparison module involved in the embodiments of the present application may be a comparator with forward and reverse input terminals, configured to input and compare electrical signals stored in the at least two storage units, and the voltage adjustment module is configured to be based on comparison As a result, the voltage is adjusted according to the preset rule, and the adjusted voltage is used as the gate voltage of the transmission gate TX in the next cycle.
  • the foregoing preset rules include: when the electrical signal output by the signal storage unit is a voltage signal, when the current electrical signal value of the signal storage unit is less than the electrical signal value of the previous cycle, the voltage regulation module increases the output voltage; otherwise, decreases the output voltage .
  • the voltage regulation module increases the output voltage; otherwise, decreases the output voltage.
  • the storage module includes at least two storage units, the input end of each storage unit is connected to the input end of the storage module, and the output end is connected to at least one of the comparison modules.
  • the input is connected.
  • the storage module includes two storage units, a first storage unit and a second storage unit.
  • the first switch is connected to the input terminal of the storage module, and the eighth switch is connected to an input terminal of the comparison module, the input terminal can be recorded as the first input terminal;
  • the second storage unit is connected to the input terminal of the storage module through the second switch, and is connected to the other input terminal of the comparison module through the ninth switch.
  • the input terminal can be recorded as the second input terminal.
  • the first storage unit and the second storage unit obtain and store the electrical signals output by the signal storage unit by closing the first switch S1 and the second switch S2, respectively.
  • the eighth switch S8 and the ninth switch S9 are respectively inputted to the above-mentioned comparison module for comparison.
  • the aforementioned first storage unit and the second storage unit may be capacitors when configured to store voltage, and may be inductance when configured to store current.
  • the above two storage units respectively store the electrical signals of the signal storage units under different TX gate voltages in the comparison state.
  • the electrical signals of the signal storage units under different TX gate voltages can complete the charge from the signal conversion unit to the signal storage for adjacent periods.
  • the electric signal S i and a memory cell output signal S i + 1 wherein the electric signal S i represents the i-th transfer signal charge storage unit, i + 1 S i + 1 represents the charge transfer times
  • the electrical signal of the signal storage unit After completion of the comparison, the storage unit stores the electric signal S i, the obtained electric signal S i + 1 for the next cycle and the signal S i + 2 are compared.
  • the storage module may include three or more storage units. For example, when it includes three storage units, two of the storage units are connected to the same input terminal of the comparison module, for example, the first storage unit and the third storage unit are connected to The first input terminal of the comparison module and the second storage unit are connected to the second input terminal of the comparison module.
  • the first storage unit and the third storage unit alternately store the same electrical signal as the second storage unit. For example, when the first storage unit and the second storage unit store the same signal storage unit electrical signal, this cycle will The third storage unit and the second storage unit are turned on with the comparison module for comparison of electrical signals in the current period, and the electrical signal stored in the first storage unit is used to phase the updated electrical signal of the second storage unit in the next period. Compare. This realizes that the newly input electrical signal is always output to the second input terminal of the comparison module, and the electrical signal of the previous cycle is output to the first input terminal of the comparison module, so as to facilitate the voltage adjustment direction according to the comparison result. consistency.
  • the embodiment of the present application further includes a third reset unit on the basis of the foregoing embodiment.
  • the third reset unit is connected to the first end of the first storage unit through the sixth switch, and is connected to the second storage unit through the seventh switch.
  • the first end of the unit is connected and configured to reset at least two storage units.
  • first storage unit and second storage unit need to be reset before performing the next storage to avoid interference of the current storage to the next storage voltage.
  • the working process of the first storage unit and the second storage unit is understood by exemplifying the description below. Close the seventh switch to reset the second storage unit and open it after reset; close the second switch to store the current signal storage unit to the second storage unit, and open it after the storage is completed; close the eighth switch and the ninth switch Compare the voltage values of the two storage units, and open after comparison; close the sixth switch to reset the first storage unit, and open after reset; close the first switch to store the current FD voltage to the first storage unit , Used to compare with the FD voltage stored to the second energy storage unit in the next cycle.
  • the above-mentioned voltage adjustment module includes: a counting unit, the input end of the counting unit is connected to the input end of the voltage adjustment module, and is configured to perform cumulative counting according to the comparison result;
  • the digital-to-analog conversion unit has one end connected to the output end of the counting unit and the other end connected to the output end of the voltage adjustment module, and is configured to convert and output a corresponding voltage based on the accumulated count value according to a preset correspondence relationship.
  • the above counting unit performs cumulative counting according to the comparison result.
  • the specific process may be: when the comparison result is 1, the cumulative count of the counting unit is increased by 1, and when the comparison result is 0, the cumulative count of the counting unit is decreased by 1.
  • the above-mentioned preset correspondence relationship includes: the voltage output by the digital-to-analog conversion module is proportional to the cumulative count value, that is, it increases as the cumulative count value increases, and decreases as the cumulative count value decreases.
  • the change values of the two can correspond one to one.
  • the gate voltage adjustment circuit further includes an electrical signal acquisition unit, one end of the electrical signal acquisition unit is connected to the first end of the signal storage unit, and the other end is connected to the storage module.
  • the input terminal is connected and configured to collect the electrical signal of the signal storage unit and output to the storage module.
  • the electrical signal acquisition unit can also keep the signal storage unit and the storage module isolated to prevent the subsequent units from interfering with the signal storage unit.
  • the electrical signal acquisition unit can be a buffer or a source follower.
  • the first input terminal of the buffer is connected to the first terminal of the signal storage unit, the second input terminal is connected to the output terminal, and the common terminal of the output terminal and the second input terminal of the buffer is connected to the input terminal of the storage module Connected.
  • the gate voltage adjustment circuit further includes a control unit, one end of the control unit is connected to the output end of the voltage adjustment module, and the other end is connected to the transmission gate, configured to control whether Load the voltage output by the voltage regulation module onto the transmission gate.
  • the voltage adjustment module can load the voltage output by the voltage adjustment module to the transmission gate TX according to a preset timing after the signal conversion unit completes the charge injection, and the time of each loading is long enough so that the charge transferred to the signal storage unit is no longer Change, or preferably a fixed value t.
  • the gate voltage adjustment circuit further includes an electrical signal processing unit.
  • One end of the electrical signal processing unit is connected to the first end of the signal storage unit, and the other end is connected to the storage module.
  • the input terminals are connected and configured to convert a current signal into a voltage signal, or convert a voltage signal into a current signal.
  • the gate voltage adjustment circuit further includes a second reset unit, which is connected to the first end of the signal storage unit through a fifth switch and is configured as a reset signal storage unit.
  • the signal storage unit is reset before the transmission gate is turned on to accurately characterize the charge transferred to the signal storage unit in each cycle, and avoid residual charges from causing interference to the electrical signal in the signal storage unit in the next cycle.
  • the gate voltage adjustment circuit further includes a signal providing unit, which is connected to the first end of the signal conversion unit through a third switch, and is configured to provide a preset signal to the signal conversion unit.
  • the number of signals is used to convert into electrical signals.
  • the signal supply unit is added, and the same signal is input to the signal conversion unit in each cycle to generate the same amount of charge
  • the signal supply unit can be any one of a power source, a light source, a pressure source and a magnetic source.
  • the above-mentioned signal conversion unit is a photoelectric conversion unit
  • the above-mentioned embodiments of the present application can be implemented in a dark field.
  • the gate voltage adjustment circuit further includes a first reset unit, which is connected to the first end of the signal conversion unit through a fourth switch and is configured as a reset signal conversion unit.
  • a first reset unit which is connected to the first end of the signal conversion unit through a fourth switch and is configured as a reset signal conversion unit.
  • one or more of the first reset unit, the second reset unit, and the third reset unit may be time-sharing sharing the same reset unit, and the reset unit may be a power supply.
  • the electrical signal acquisition unit in this embodiment includes a buffer B1, one end of the FD is connected to the first input end of the buffer B1, and the second input end of the buffer B1 is connected to The output terminal is connected, and the output terminal is connected to the storage module.
  • the comparison module can adopt a comparator U1.
  • the storage module includes a first storage unit and a second storage unit.
  • the first storage unit is a capacitor C1.
  • the first end of the capacitor C1 passes through the first switch S1 and the output terminal of the electrical signal acquisition unit, and a comparator U1. Is connected to the positive input terminal, and the second terminal is grounded;
  • the second storage unit is a capacitor C2, the first terminal of the capacitor C2 is connected to the output terminal of the electrical signal acquisition unit through the second switch, and the reverse input terminal of the comparator U1 Connected, its second end is grounded.
  • a third reset unit configured to reset the storage device.
  • the first storage unit is connected to the third reset unit through the sixth switch S6; the second storage unit C2 is connected to the third reset unit through the seventh switch S7.
  • the first storage unit is connected to the positive input terminal of the comparator
  • the second storage unit is connected to the negative input terminal of the comparator
  • the output terminal of the comparator, the counting unit, the digital-to-analog conversion unit, and the control unit are connected in sequence.
  • the output voltage of the digital-to-analog conversion unit is loaded on the transmission gate TX under the action of the control unit.
  • the first terminal of the signal storage unit is connected to the second reset unit through the fifth switch S5, and the second terminal is grounded.
  • the first terminal of the signal conversion unit is connected to the signal supply unit through the third switch on the one hand, and is also connected to the first reset unit through the fourth switch, and the second terminal of the signal conversion unit is grounded.
  • the embodiment of the present application also discloses a method for adjusting the gate voltage based on any of the above-mentioned gate voltage adjusting circuits, including:
  • the comparison module compares the electrical signals corresponding to the signal storage unit after applying different gate voltages stored in the storage module, and obtains the comparison result;
  • the output voltage of the voltage adjustment module is adjusted according to a preset rule, and the output voltage of the voltage adjustment module is used as the gate voltage of the next cycle.
  • the above according to the preset rules include:
  • the voltage regulation module increases the output voltage; otherwise, decreases the output voltage
  • the voltage regulation module increases the output voltage; otherwise, decreases the output voltage.
  • the grid voltage adjustment method further includes:
  • Judging whether the comparison result meets the preset condition to determine the optimal gate voltage specifically includes: determining whether the comparison result has changed, and if so, the output voltage of the voltage regulation module corresponding to the period is the optimal gate voltage.
  • the above-mentioned satisfying preset conditions include: when the output result of the comparison module changes, for example, when the comparison result changes from 1 to 0, or from 0 to 1, the output voltage of the voltage regulation module corresponding to the period is the best Grid voltage.
  • the value range of the gate voltage can be within ⁇ 15% of the optimum gate voltage, and optionally, it can also be within ⁇ 10 of the optimum gate voltage. % Or ⁇ 5%, where the optimal grid voltage value is preferred.
  • the gate voltage adjustment method provided by the embodiment of the present application, on the basis of the above-mentioned embodiment, compares the electrical signals corresponding to the signal storage unit after applying different gate voltages stored in the memory module through the comparison module and obtains the comparison result, which specifically includes: closing the eighth A switch and a ninth switch, input the current electrical signal stored in the first storage unit and the second storage unit to the comparison module for comparison, and turn off the eighth switch and the ninth switch after obtaining the comparison result;
  • the method further includes: closing the second switch to store the current electrical signal of the signal storage unit in the second storage unit;
  • the method further includes: closing the first switch to store the current electrical signal of the signal storage unit in the first storage unit.
  • the sixth switch and the seventh switch are respectively closed, and the third reset is performed.
  • the unit resets the first storage unit and the second storage unit.
  • the above-mentioned comparison result input to the voltage adjustment module is cumulatively counted by the counting unit, and the cumulative counting result is converted into the corresponding value by the digital-analog conversion unit according to the preset correspondence relationship.
  • the voltage as the output voltage of the voltage regulation module.
  • the output voltage of the above-mentioned voltage adjustment module is applied to the transmission gate based on a preset timing under the control of the control unit to serve as the gate voltage.
  • the signal output by the signal storage unit is converted and output by the electrical signal processing unit.
  • the signal storage unit before the transmission gate is turned on, the signal storage unit is reset by the second reset unit by closing the fifth switch; and the signal storage unit is reset by the signal supply unit to the signal conversion unit Input a preset amount of signal.
  • the method before the input of a preset amount of signal to the signal conversion unit through the signal providing unit, the method further includes: closing the fourth switch, and resetting the signal conversion unit through the first reset unit.
  • the grid voltage is adjusted by the following method, which specifically includes:
  • the transmission gate TX is turned on based on the input voltage and maintained for a preset time t and then turned off;
  • S104 Perform voltage adjustment according to a preset rule based on the comparison result for the gate voltage applied by the transmission gate TX in the next cycle;
  • the grid voltage corresponding to the previous cycle is the optimal grid voltage.
  • the transmission gate TX before the transmission gate TX is turned on, it also includes inputting a fixed amount of signal into the signal conversion unit; before the transmission gate TX is turned on, it also includes resetting the signal storage unit; before inputting a fixed amount of signal into the signal conversion unit Including resetting the signal conversion unit.
  • the embodiment of the present application takes the signal conversion unit as a photodiode as an example based on the gate voltage adjustment circuit shown in FIG. 6, and exemplarily provides a gate voltage adjustment method according to the time sequence shown in FIG. 7. Specifically, it can be divided into an initial phase and a periodic cycle phase.
  • the initial phase is used for the electrical signal storage of the first storage unit.
  • Figure 7 shows the adjustment sequence of a cycle T in the periodic cycle phase:
  • S203 Close S3, and inject a fixed amount of charge into the photodiode PD through the signal providing unit;
  • S212 Repeat S206 to S211 until the comparison result of the comparator is reversed. At this time, the output voltage of the periodic voltage adjustment module is the optimal gate voltage.
  • the embodiment of the present application also discloses a sensor, in which at least one pixel is connected to the above-mentioned gate voltage adjustment circuit.
  • the gate voltage of the transmission gate of at least one pixel in the sensor is obtained based on the above-mentioned gate voltage adjustment method.

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Abstract

本申请公开了一种栅压调节电路、栅压调节方法及应用其的传感器，该栅压调节电路包括：存储模块、比较模块和电压调节模块，存储模块的输入端与信号存储单元的第一端相连，输出端与比较模块的输入端相连，比较模块的输出端与电压调节模块的输入端相连，电压调节模块输出端与传输栅相连。该栅压调节电路通过存储模块存储信号存储单元输出的电信号，比较模块对信号存储单元输出的至少两个对应不同栅压的电信号进行比较以获得比较结果，电压调节模块基于比较结果按照预设规则调节输出电压，进而可获得较佳的栅压取值范围，在保证较高的电荷转移效率的同时还能减少电荷注入。

Description

栅压调节电路、栅压调节方法及应用其的传感器
相关申请的交叉引用
本申请要求于2019年06月04日提交中国专利局的申请号为CN201910478943.8、名称为“栅压调节电路、栅压调节方法及应用其的传感器”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子电路技术领域，尤其涉及一种栅压调节电路、栅压调节方法及应用其的传感器。
背景技术
传感器被广泛应用于消费、医疗以及航空航天等领域，并随着科技的进步，应用范围不断扩大，在新兴的人工智能、激光雷达和智能手机等领域占据了极为重要的地位。同时，这些新的应用领域也对传感器的成像精度提出了更高的要求。
以图像传感器为例，图像传感器成像的关键在于光电二极管的光电转化和光生电荷的转移。如图1是光电传感器像素结构示意图，图中光电二极管PD在光照条件下产生光生电荷，光生电荷在传输栅TX的控制下进行转移，例如可转移至图1所示的悬浮扩散节点FD中，再通过后级处理单元进行成像。TX所加电压(简称栅压)的大小对电荷的转移性能具有重要影响。图2a和图2b分别为TX关断和导通状态下PD、TX栅下区域和FD的电势分布示意图，TX关断时其栅下区域电势为三者中最低，阻止了电子从PD向FD的转移；TX导通时其栅下区域电势介于PD和FD之间，光生电荷从PD经TX栅下区域转移至FD中。当栅压较小时，TX栅下区域与PD间的压差较小，影响电荷转移效率；但当栅压较高时，TX栅下区域所存留的电荷较多，但由于TX栅下区域与FD之间此时的压差较小，导致关断过程中转移至FD中的电荷减少，使得部分电荷注入到PD中，进而影响传感器的成像精度。
因此，亟待设计一种栅压调节电路、栅压调节方法及应用其的传感器，用于减少电荷注入且具有较高的电荷转移效率。
发明内容
为了克服现有技术存在的问题，本申请实施例提供了一种栅压调节电路、栅压调节方法及应用其的传感器，用以减少电荷注入且同时提高电荷转移效率。
本申请实施方式的第一方面中，提供了一种栅压调节电路，该电路包括存储模块、比较模块和电压调节模块。
存储模块的输入端与信号存储单元的第一端相连，输出端与比较模块的输入端相连， 比较模块的输出端与电压调节模块的输入端相连，电压调节模块输出端与传输栅相连；其中，存储模块配置为存储信号存储单元输出的电信号；比较模块配置为对信号存储单元输出的至少两个对应不同栅压的电信号进行比较以获得比较结果；电压调节模块配置为基于比较结果按照预设规则调节输出电压，以改变传输栅的栅压。
在本申请的一个实施例中，存储模块包括至少两个存储单元，每个存储单元的输入端与存储模块的输入端相连，输出端与比较模块的至少一个输入端相连，该至少两个存储单元包括：第一存储单元，通过第一开关与存储模块的输入端相连，通过第八开关与比较模块的一个输入端相连；第二存储单元，通过第二开关与存储模块的输入端相连，通过第九开关与比较模块的另一个输入端相连。
在本申请的一个实施例中，电压调节模块包括：计数单元，计数单元的输入端与电压调节模块的输入端相连，配置为依据比较结果进行累积计数；数模转化单元，一端与计数单元的输出端相连，另一端与电压调节模块的输出端相连，配置为依据累积计数值按照预设的对应关系转化并输出相应的电压。
在本申请的一个实施例中，该栅压调节电路还包括电信号采集单元，电信号采集单元的一端与信号存储单元的第一端相连，另一端与存储模块的输入端相连，配置为采集信号存储单元的电信号并输出至存储模块。
在本申请的一个实施例中，该栅压调节电路还包括控制单元，控制单元的一端与电压调节模块的输出端相连，另一端与传输栅相连，配置为基于预设条件将电压调节模块输出的电压加载至传输栅上。
在本申请的一个实施例中，该栅压调节电路还包括电信号处理单元，电信号处理单元的一端与信号存储单元的第一端相连，另一端与存储模块的输入端相连，配置为将电流信号转换为电压信号，或者将电压信号转换为电流信号。
在本申请的一个实施例中，该栅压调节电路还包括信号提供单元，通过第三开关与信号转化单元的第一端相连，配置为向信号转化单元输入待转化的信号。
在本申请的一个实施例中，该栅压调节电路还包括复位模块，复位模块包括以下至少一个复位单元：
第一复位单元，通过第四开关与信号转化单元的第一端相连，配置为复位信号转化单元；第二复位单元，通过第五开关与信号存储单元的第一端相连，配置为复位信号存储单元；第三复位单元，通过第六开关与第一存储单元连接，通过第七开关与第二存储单元连接，配置为复位至少两个存储单元。
本申请实施方式的第一方面中，提供了一种栅压调节方法，应用于如第一方面任一栅压调节电路中，该方法包括：
比较存储模块中存储的施加不同栅压后信号存储单元对应的电信号，并获得比较结果；
基于比较结果按照预设规则调节电压调节模块的输出电压，调节后的电压调节模块的输出电压用作下一周期的栅压。
在本申请的一个实施例中，基于比较结果按照预设规则调节电压调节模块的输出电压，具体包括：
若信号存储单元输出的电信号为电压信号，则信号存储单元当前电信号值小于上一周期电信号值时，电压调节模块增大输出电压；否则，减小输出电压；
若信号存储单元输出的电信号为电流信号，则信号存储单元当前电信号值大于上一周期的电信号值时，电压调节模块增大输出电压；否则，减小输出电压。
在本申请的一个实施例中，该栅压调节方法还包括：
判断比较结果是否满足预设条件以确定最佳栅压；
基于最佳栅压确定栅压的取值范围；其中，
判断比较结果是否满足预设条件以确定最佳栅压，具体包括：判断比较结果是否发生变化，若是，则该周期所对应的电压调节模块的输出电压为最佳栅压。
在本申请的一个实施例中，比较存储模块中存储的施加不同栅压后信号存储单元对应的电信号，并获得比较结果，具体包括：
闭合第八开关和第九开关，将第一存储单元和第二存储单元存储的当前电信号输入比较模块进行比较，并在获得比较结果后断开第八开关和第九开关；
第八开关和第九开关闭合前，还包括：闭合第二开关将信号存储单元的当前电信号存储至第二存储单元中；
断开第八开关和第九开关之后，还包括：闭合第一开关将信号存储单元的当前电信号存储至第一存储单元中。
在本申请的一个实施例中，闭合第二开关将信号存储单元的当前电信号存储至第二存储单元中之前，还包括：闭合第七开关，通过第三复位单元对第二存储单元进行复位；
闭合第一开关将信号存储单元的当前电信号存储至第一存储单元中之前，还包括：闭合第六开关，通过第三复位单元对第一存储单元进行复位。
在本申请的一个实施例中，电压调节模块按照预设规则调节其输出电压，具体包括：
通过计数单元对输入的比较结果进行累积计数；
通过数模转化单元将累积计数结果按照预设的对应关系转化为相应的电压，作为电压调节模块的输出电压。
在本申请的一个实施例中，电压调节模块的输出电压加载至传输栅之前，还包括：
闭合第五开关，通过第二复位单元对信号存储单元进行复位；
闭合第四开关，通过第一复位单元对信号转化单元进行复位；
闭合第三开关，通过信号提供单元向信号转化单元输入预设量的信号。
在本申请实施方式的第三方面中，提供了一种传感器，包括至少一个像素与如第一方面任一栅压调节电路相连。
本申请通过对不同栅压下信号存储单元电信号的比较，来表征不同栅压对电荷注入和电荷转移效率的综合影响，依据比较结果将栅压调控在电荷注入少、甚至无电荷注入且电荷转移效率高的范围内，并可进一步基于该栅压的取值范围来控制传感器中的其他像素的传输栅的栅压。
附图说明
图1为光电传感器像素结构示意图；
图2a为TX关断状态下PD、TX栅下区域和FD的电势分布示意图；
图2b为TX导通状态下PD、TX栅下区域和FD的电势分布示意图；
图3为本申请实施例的一种可选的栅压调节电路示意图；
图4为本申请实施例的一种可选的栅压调节电路示意图；
图5为本申请实施例的一种可选的栅压调节电路示意图；
图6为本申请实施例的一种可选的栅压调节电路示意图；
图7为本申请实施例的一种可选的栅压调节方法时序图。
具体实施方式
下面将参考若干示例性实施方式来描述本申请的原理和精神。应当理解，给出这些实施方式仅仅是为了使本领域技术人员能够更好地理解进而实现本申请，而并非以任何方式限制本申请的范围。相反，提供这些实施方式是为了使本申请更加透彻和完整，并且能够将本申请的范围完整地传达给本领域的技术人员。
应当理解的是，当单元/模块间被描述为“连接”时，其可以直接连接到另一单元/模块，或者可以存在中间单元/模块。与此相对，当单元/模块间被称为“直接相连”时，则不存在中间单元/模块。
需要说明的是，本申请说明书和权利要求书及上述附图中的术语“第一”和“第二”等用于区别类似的对象，而不必描述特定的顺序或先后次序。应当理解这样使用的数据在适当情况下可以互换，以便这里描述的本申请的实施例能够以除了在这里图示或描述的那些以外的顺序实施。
图像传感器成像的关键在于光电二极管的光电转化和光生电荷的转移。
发明人发现，传输栅的栅压对光生电荷转移的影响主要基于两个方面，传输栅接通时电荷的转移效率和传输栅关断时留存在传输栅下的电荷向光电二极管PD(即信号转化单 元)中的回注。
图3为发明人对上述两个方面的影响进一步研究的结果，示出了悬浮扩散节点FD(即信号存储单元)的电压V FD随传输栅TX栅压V TX的变化，FD的电压越小代表转移至FD的电子数越多，V FD的最低值所对应的V TX即为平衡电荷转移效率和电荷注入两个影响因素后所获得的最优值。
如图3所示，随V TX的增大，FD电压先减小后增大，存在最低点V B。V TX较小时，TX栅下区域与PD间的压差较小，电荷转移效率低，在固定时间t内，转移至FD的电子数较少，此时FD电压较高；随着栅压V TX的增加，电荷转移效率增加，相同时间内转移至FD的电子数增多，电压降低，当V TX＝V B时V FD获得最小值；随着栅压V TX的进一步增加，栅下留存的电子数量增加，开始出现电荷注入回PD中，总的转移至FD的电子数减少，V FD开始增加。
基于以上研究及分析，发明人设计了一种通过不同栅压下V FD的检测比较实现在保证较高的电荷转移效率的同时减少电荷注入的技术方案。
本申请实施例提供了一种栅压调节电路、栅压调节方法及应用其的传感器，其中，栅压调节电路、栅压调节方法及应用其的传感器基于同一发明构思，由于解决问题的原理相似，因此栅压调节电路、栅压调节方法及应用其的传感器的实施可以相互参见，重复之处不再赘述。
图4所示为本申请实施例提供的一种栅压调节电路的示意图，包括存储模块、比较模块和电压调节模块。存储模块的输入端与信号存储单元的第一端相连，输出端与比较模块的输入端相连；比较模块的输出端与电压调节模块的输入端相连，电压调节模块输出端与传输栅相连；其中，
存储模块配置为存储信号存储单元输出的电信号；比较模块配置为对信号存储单元输出的至少两个对应不同栅压的电信号进行比较以获得比较结果；电压调节模块配置为基于该比较结果按照预设规则调节输出电压，以改变传输栅的栅压。
需要说明的是，上述电信号包括电压信号和电流信号中的至少一种；信号转化单元配置为将磁信号、压力信号或者光信号等现有技术涉及的任意一种信号转化为电信号，此处不做限定。以信号存储单元输出的电信号为电压信号，信号转化单元配置为进行光电转化为例，采用本申请上述实施例，可以通过存储模块存储不同栅压下信号转化单元生成的电荷由信号转化单元转移至信号存储单元后，该信号存储单元所对应的电压信号，并通过比较模块对至少两个该电压信号进行比较，比较结果用于调节加载至传输栅的栅压，以降低信号存储单元的电压信号。相同传输栅开启时间下，信号存储单元电压的越低代表了本周期转移至其中的电荷数量越多。当信号存储单元的电压降至最低时所对应的栅压即为平衡 电荷转移效率和电荷注入两个影响因素后所获得的最优值。从而实现了即减少了电荷注入又具有较高的电荷转移效率。
同理，当信号存储单元输出的电信号为电流信号时，该电流信号越大代表转移至信号存储单元中电荷的数量越多。所以电流信号最大时所对应的栅压即为平衡电荷转移效率和电荷注入两个影响因素后所获得的最优值。
本申请实施例所涉及的比较模块，可以为比较器，设有正向和反向输入端，配置为输入上述至少两个存储单元所存储的电信号并进行比较，电压调节模块配置为基于比较结果按照预设规则进行电压调节，调节后的电压用作下一周期传输栅TX的栅压。
上述预设规则包括：信号存储单元输出的电信号为电压信号时，该信号存储单元当前电信号值小于上一周期的电信号值时，电压调节模块增大输出电压；否则，减小输出电压。
信号存储单元输出的电信号为电流信号时，该信号存储单元当前电信号值大于上一周期的电信号值时，电压调节模块增大输出电压；否则，减小输出电压。
一种可能的实现方式中，在本申请上述实施例的基础上，存储模块包括至少两个存储单元，每个存储单元的输入端与存储模块的输入端相连，输出端与比较模块的至少一个输入端相连。举例来讲，存储模块包括两个存储单元，分别为第一存储单元和第二存储单元。
通过第一开关与存储模块的输入端相连，通过第八开关与比较模块的一个输入端相连，可将该输入端记为第一输入端；
第二存储单元，通过第二开关与存储模块的输入端相连，通过第九开关与比较模块的另一个输入端相连，可将该输入端记为第二输入端。
第一存储单元和第二存储单元分别通过闭合第一开关S1和第二开关S2获得并存储上述信号存储单元输出的电信号。并且，分别通过闭合第八开关S8和第九开关S9输入上述比较模块进行比较。上述第一存储单元和第二存储单元配置为存储电压时可为电容，配置为存储电流时可为电感。
上述两个存储单元，在比较状态时分别存储不同TX栅压下的信号存储单元的电信号，不同TX栅压下的信号存储单元电信号可以为相邻周期完成电荷由信号转化单元向信号存储单元的转移后，信号存储单元输出的电信号S i和S i+1，其中S i代表第i次电荷转移后信号存储单元的电信号，S i+1代表第i+1次电荷转移后信号存储单元的电信号。而在完成比较后，存储电信号S i的存储单元，获得的电信号S i+1用于和下一周期信号S i+2进行比较。
存储模块可包括三个及以上存储单元，举例来讲，当包括三个存储单元时，其中有两个存储单元连接与比较模块的同一输入端，例如第一存储单元和第三存储单元连接于比较模块的第一输入端，第二存储单元连接于比较模块的第二输入端。其中第一存储单元和第三存储单元交替存入与第二存储单元中相同的电信号，例如，当第一存储单元与第二存储 单元存入相同的信号存储单元电信号时，本周期将第三存储单元与第二存储单元与比较模块导通，用于本周期电信号比较，而存入第一存储单元的电信号，用于下一周期与第二存储单元更新后的电信号相比较。由此便实现了始终将新输入的电信号输出至比较模块的第二输入端，而将上一周期的电信号输出至比较模块的第一输入端，从而便于依据比较结果进行电压调节方向的一致性。
如图6所示，本申请实施例在上述实施例基础上还包括第三复位单元，第三复位单元通过第六开关与第一存储单元的第一端连接，通过第七开关与第二存储单元的第一端连接，配置为复位至少两个存储单元。
应当理解的是，上述第一存储单元和第二存储单元在进行下一次存储前需要先进行复位，以避免本次存储对下一次存储电压的干扰。
以下通过示例性地描述对第一存储单元和第二存储单元的工作过程进行理解。闭合第七开关对第二存储单元进行复位，并在复位后断开；闭合第二开关存储当前信号存储单元至第二存储单元，并在完成存储后断开；闭合第八开关和第九开关对两个存储单元的电压值进行比较，并在比较后断开；闭合第六开关对第一存储单元进行复位，并在复位后断开；闭合第一开关存储当前FD电压至第一存储单元，用于与下一周期存储至第二储能单一的FD电压进行比较。
在本申请的一个实施例中，如图5和图6所示，上述电压调节模块包括：计数单元，计数单元的输入端与电压调节模块的输入端相连，配置为依据比较结果进行累积计数；数模转化单元，一端与计数单元的输出端相连，另一端与电压调节模块的输出端相连，配置为基于累积计数值按照预设的对应关系转化并输出相应的电压。
例如，上述计数单元依据比较结果进行累积计数，具体过程可以为：当比较结果为1时，计数单元的累积计数加1，当比较结果为0时，计数单元的累积计数减1。
一个具体的实施方式中，上述预设的对应关系包括：数模转化模块输出的电压正比于累积计数值，即随累积计数值的增加而增加，随累积计数值的减小而减小。进一步地，二者的变化值可以一一对应。示例性地，上述累积计数值每变化1，数模转化模块转化并输出的电压变化0.1V。即当上述累积计数值为1时，数模转化模块转化并输出1.1V电压；当累积计数值为2时，数模转化模块转化并输出1.1V电压，依次类推。
本申请的一个实施例中，在上述实施例的基础上，该栅压调节电路还包括电信号采集单元，电信号采集单元的一端与信号存储单元的第一端相连，另一端与存储模块的输入端相连，配置为采集信号存储单元的电信号并输出至存储模块。同时该电信号采集单元还可保持信号存储单元与存储模块的隔离，以防止后级单元对信号存储单元产生干扰。电信号采集单元可为缓冲器或者源跟随器等。以缓冲器为例，缓冲器的第一输入端与信号存储单 元的第一端相连，第二输入端与输出端相连，缓冲器的输出端与第二输入端的公共端与存储模块的输入端相连。
本申请的一个实施例中，在上述实施例的基础上，该栅压调节电路还包括控制单元，控制单元的一端与电压调节模块的输出端相连，另一端与传输栅相连，配置为控制是否将电压调节模块输出的电压加载至传输栅上。该电压调节模块可在信号转化单元完成电荷的注入后依据预设时序将电压调节模块输出的电压加载至传输栅TX上，每次加载的时间足够长使转移至信号存储单元中的电荷不再发生变化，或者优选为一固定值t。
本申请的一个实施例中，在上述实施例的基础上，该栅压调节电路还包括电信号处理单元，电信号处理单元的一端与信号存储单元的第一端相连，另一端与存储模块的输入端相连，配置为将电流信号转换为电压信号，或者将电压信号转换为电流信号。
本申请的一个实施例中，在上述实施例的基础上，该栅压调节电路还包括第二复位单元，通过第五开关与信号存储单元的第一端相连，配置为复位信号存储单元。每个周期中，信号存储单元在传输栅导通前先进行复位，以精确表征每个周期转移至信号存储单元的电荷，避免残留电荷对下一周期信号存储单元中电信号造成干扰。
本申请的一个实施例中，在上述实施例的基础上，该栅压调节电路还包括信号提供单元，通过第三开关与信号转化单元的第一端相连，配置为向信号转化单元提供预设数量的信号用于转化为电信号。为了避免信号转化单元中每次存储的电荷量不统一对信号存储单元本周期电信号的影响，增设了该信号提供单元，每个周期中向信号转化单元输入相同的信号以产生相同数量的电荷，该信号提供单元可为一电源、光源、压力源和磁力源中的任意一种。当上述信号转化单元为光电转化单元时，为了进一步排除背景光所产生的光生电荷对调节过程的影响，本申请上述实施例可在暗场下进行实施。
本申请的一个实施例中，在上述实施例的基础上，该栅压调节电路还包括第一复位单元，通过第四开关与信号转化单元的第一端相连，配置为复位信号转化单元。为了避免信号转化单元中上一周期的残留电荷导致电荷积累，造成每个周期中信号转化单元中电荷量不统一，本实施例增设了第一复位单元，在每次信号提供单元接通前先对信号转化单元进行复位。
其中，上述的第一复位单元、第二复位单元和第三复位单元中的一个或多个可以为分时共用同一个复位单元，上述复位单元可以为电源。
本申请的一个实施例中，如图6所示，本实施例中电信号采集单元包括缓冲器B1，FD的一端与缓冲器B1的第一输入端相连，缓冲器B1的第二输入端与输出端相连，且输出端与存储模块相连。
本实施例中比较模块可采用比较器U1。
本实施例中存储模块包括第一存储单元和第二存储单元，第一存储单元为电容C1，电容C1的第一端分别经第一开关S1与电信号采集单元的输出端，以及比较器U1的正向输入端相连，其第二端接地；第二存储单元为电容C2，电容C2的第一端分别经第二开关与电信号采集单元的输出端，以及比较器U1的反向输入端相连，其第二端接地。
为了能够存储下一个输入的数据，还设有第三复位单元配置为复位存储装置。第一存储单元通过第六开关S6与第三复位单元连接；第二存储单元C2通过第七开关S7与第三复位单元连接。
上述第一存储单元与比较器的正向输入端相连，第二存储单元与比较器的负向输入端相连，该比较器的输出端、计数单元、数模转化单元和控制单元依次相连，该数模转化单元的输出电压在控制单元的作用下加载至传输栅TX上。
信号存储单元的第一端通过第五开关S5与第二复位单元相连，其第二端接地。信号转化单元的第一端一方面通过第三开关与信号提供单元相连，同时还通过第四开关与第一复位单元相连，该信号转化单元的第二端接地。
本申请实施例还公开了一种基于上述任一栅压调节电路进行栅压调节的方法，包括：
通过比较模块比较存储模块存储的施加不同栅压后信号存储单元对应的电信号，并获得比较结果；
基于比较结果按照预设规则调节电压调节模块的输出电压，电压调节模块的输出电压用作下一周期的栅压。上述按照预设规则包括：
信号存储单元输出的电信号为电压信号时，信号存储单元当前输出电信号值小于上一周期输出电信号值时，电压调节模块增大输出电压；否则，减小输出电压；
信号存储单元输出的电信号为电流信号时，该信号存储单元当前电信号值大于上一周期的电信号值时，电压调节模块增大输出电压；否则，减小输出电压。
本申请的一个实施例中，在上述实施例基础上，该栅压调节方法还包括：
判断比较结果是否满足预设条件以确定最佳栅压；
基于最佳栅压确定栅压的取值范围；其中
判断比较结果是否满足预设条件以确定最佳栅压具体包括：判断比较结果是否发生变化，若是，则该周期所对应的电压调节模块的输出电压为最佳栅压。
上述满足预设条件包括：当比较模块的输出结果发生变化时，例如比较结果由1变为0时，或者由0变为1时，该周期所对应的电压调节模块的输出电压即为最佳栅压。基于该最佳栅压确定传输栅的栅压取值范围，例如栅压的取值范围可在最佳栅压的±15％范围内，可选地，也可在最佳栅压的±10％或±5％范围内，其中优选为最佳栅压值。
本申请实施例提供的栅压调节方法，在上述实施例的基础上，通过比较模块比较存储 模块存储的施加不同栅压后信号存储单元对应的电信号并获得比较结果，具体包括：闭合第八开关和第九开关，将第一存储单元和第二存储单元存储的当前电信号输入比较模块进行比较，并在获得比较结果后断开第八开关和第九开关；
第八开关和第九开关闭合前，还包括：闭合第二开关将信号存储单元的当前电信号存储至第二存储单元中；
断开第八开关和第九开关之后，还包括：闭合第一开关将信号存储单元的当前电信号存储至第一存储单元中。
由此便实现了始终将新存入的电信号输出至比较模块的第二输入端，而将上一周期的电信号输出至比较模块的第一输入端，从而便于依据比较结果进行电压调节方向的一致性。
本申请的一个实施例中，在上述实施例的基础上，在向上述第一存储单元和第二存储单元存储下一个电信号之前，分别通过闭合第六开关和第七开关，通过第三复位单元对第一存储单元和第二存储单元进行复位。
本申请的一个实施例中，在上述实施例的基础上，上述输入至电压调节模块的比较结果通过计数单元进行累积计数，累积计数结果由数模转化单元，按照预设的对应关系转化为相应的电压作为电压调节模块的输出电压。
本申请的一个实施例中，在上述实施例的基础上，上述电压调节模块的输出电压在控制单元的控制下基于预设时序加载至传输栅上，以用作栅压。
本申请的一个实施例中，在上述实施例的基础上，通过电信号处理单元将信号存储单元输出的信号进行转换后输出。
本申请的一个实施例中，在上述实施例的基础上，在传输栅接通前，通过闭合第五开关，通过第二复位单元对信号存储单元进行复位；并通过信号提供单元向信号转化单元输入预设量的信号。
本申请的一个实施例中，在上述通过信号提供单元向信号转化单元输入预设量的信号之前，还包括：闭合第四开关，通过第一复位单元对信号转化单元进行复位。
本申请的一个实施例中，通过下述方法进行栅压的调节，具体包括：
S101：传输栅TX基于输入的电压导通并维持预设时间t后关闭；
S102：将当前信号存储单元电信号存储至复位后的第二存储单元中；
S103：第二存储单元中的当前信号存储单元电信号与存储至第一存储单元中的上一周期信号存储单元电信号进行比较；
S104：基于比较结果按照预设规则进行电压调节，用于下一周期传输栅TX所加载的栅压；
S105：将第一存储单元进行复位后存储当前信号存储单元电信号；
重复上述S101至S105，直至比较模块的比较结果发生反转，此时上一周期所对应的栅压即为最佳栅压。
上述步骤序号并不对该方法的执行顺序做限定。
其中，在传输栅TX导通前还包括向信号转化单元中输入固定量的信号；在传输栅TX导通前还包括对信号存储单元进行复位；向信号转化单元中输入固定量的信号前还包括对信号转化单元进行复位。
本申请实施例以信号转化单元为光电二极管为例基于图6所示栅压调节电路，按照图7所示的时序示例性地给出了栅压调节方法。具体可分为起始阶段和周期循环阶段，起始阶段用于第一存储单元的电信号存储，图7中给出了周期循环阶段中一个周期T的调节时序：
S201：闭合S4，对光电二极管PD进行复位后断开；
S202：闭合S5，对悬浮扩散节点FD进行复位后断开；
S203：闭合S3，通过信号提供单元向光电二极管PD中注入固定量的电荷；
S204：传输栅TX栅压V 0，闭合预设时间t，光电二极管PD中的电荷经传输栅TX的栅下区域向悬浮扩散节点FD中转移；
S205：传输栅TX断开后，闭合第一开关S1，电信号采集单元将采集到的FD当前电压输入至第一存储单元中，断开第一开关S1；
S206：重复上述步骤S201至S203，改变传输栅TX栅压后闭合预设时间t，光电二极管PD中的电荷经传输栅TX的栅下区域向悬浮扩散节点FD中转移；
S207：传输栅TX断开后，闭合第二开关S2，电信号采集单元将采集到的FD当前电压输入至第二存储单元C2后，断开第二开关S2；
S208：闭合第八开关和第九开关，第一存储单元C1和第二存储单元C2存储的电压分别输入比较器的正向和反向输入端进行比较，比较结果经过电压调节模块转化为相应的电压；
S209：闭合第七开关S7，通过第三复位单元对第二存储单元C2进行复位；
S210：闭合第六开关S6，通过第三复位单元对第一存储单元进行复位；
S211：闭合第一开关S1，电信号采集单元将采集到的FD当前电压输入至第一存储单元中，断开第二开关S1；
S212：重复执行S206至S211，直至比较器的比较结果发生反转，此时该周期电压调节模块的输出电压为最佳栅压。
本申请实施例还公开了一种传感器，传感器中的至少一个像素与上述栅压调节电路相连。传感器中至少一个像素的传输栅的栅压基于上述栅压调节方法获得。

Claims (16)

  1. 一种栅压调节电路，其特征在于，包括：存储模块、比较模块和电压调节模块；
    所述存储模块的输入端与信号存储单元的第一端相连，输出端与所述比较模块的输入端相连，所述比较模块的输出端与所述电压调节模块的输入端相连，所述电压调节模块输出端与传输栅相连；其中，
    所述存储模块配置为存储所述信号存储单元输出的电信号；比较模块配置为对所述信号存储单元输出的至少两个对应不同栅压的电信号进行比较以获得比较结果；所述电压调节模块配置为基于所述比较结果按照预设规则调节输出电压，以改变所述传输栅的栅压。
  2. 根据权利要求1所述的电路，其特征在于，所述存储模块包括至少两个存储单元，每个所述存储单元的输入端与所述存储模块的输入端相连，输出端与所述比较模块的至少一个输入端相连，所述至少两个存储单元包括：
    第一存储单元，通过第一开关与所述存储模块的输入端相连，通过第八开关与所述比较模块的一个输入端相连；
    第二存储单元，通过第二开关与所述存储模块的输入端相连，通过第九开关与所述比较模块的另一个输入端相连。
  3. 根据权利要求1或2所述的电路，其特征在于，所述电压调节模块包括：
    计数单元，所述计数单元的输入端与所述电压调节模块的输入端相连，配置为依据比较结果进行累积计数；
    数模转化单元，一端与所述计数单元的输出端相连，另一端与所述电压调节模块的输出端相连，配置为依据所述累积计数值按照预设的对应关系转化并输出相应的电压。
  4. 根据权利要求1至3任一所述的电路，其特征在于，还包括电信号采集单元，所述电信号采集单元的一端与所述信号存储单元的第一端相连，另一端与所述存储模块的输入端相连，配置为采集所述信号存储单元的电信号并输出至所述存储模块。
  5. 根据权利要求1至3任一所述的电路，其特征在于，还包括控制单元，所述控制单元的一端与所述电压调节模块的输出端相连，另一端与所述传输栅相连，配置为基于预设条件将所述电压调节模块输出的电压加载至所述传输栅上。
  6. 根据权利要求1至3任一所述的电路，其特征在于，还包括电信号处理单元，所述电信号处理单元的一端与所述信号存储单元的第一端相连，另一端与所述存储模块的输入端相连，配置为将电流信号转换为电压信号，或者将电压信号转换为电流信 号。
  7. 根据权利要求1至6任一所述的电路，其特征在于，还包括信号提供单元，通过第三开关与信号转化单元的第一端相连，配置为向所述信号转化单元输入待转化的信号。
  8. 根据权利要求7所述的电路，其特征在于，还包括复位模块，所述复位模块包括以下至少一个复位单元：
    第一复位单元，通过第四开关与所述信号转化单元的第一端相连，配置为复位所述信号转化单元；
    第二复位单元，通过第五开关与所述信号存储单元的第一端相连，配置为复位所述信号存储单元；
    第三复位单元，通过第六开关与所述第一存储单元连接，通过第七开关与所述第二存储单元连接，配置为复位所述至少两个存储单元。
  9. 一种栅压调节方法，其特征在于，应用于如权利要求1至8任一所述的栅压调节电路中，包括：
    比较所述存储模块中存储的施加不同栅压后所述信号存储单元对应的电信号，并获得比较结果；
    基于所述比较结果按照所述预设规则调节所述电压调节模块的输出电压，所述调节后的电压调节模块的输出电压用作下一周期的栅压。
  10. 根据权利要求9所述的方法，其特征在于，所述基于比较结果按照所述预设规则调节所述电压调节模块的输出电压，具体包括：
    若所述信号存储单元输出的电信号为电压信号，则所述信号存储单元当前电信号值小于上一周期电信号值时，所述电压调节模块增大输出电压；否则，减小输出电压；
    若所述信号存储单元输出的电信号为电流信号，则所述信号存储单元当前电信号值大于上一周期的电信号值时，电压调节模块增大输出电压；否则，减小输出电压。
  11. 根据权利要求9所述的方法，其特征在于，还包括：
    判断所述比较结果是否满足预设条件以确定最佳栅压；
    基于所述最佳栅压确定所述栅压的取值范围；其中，
    所述判断所述比较结果是否满足预设条件以确定最佳栅压，具体包括：判断所述比较结果是否发生变化，若是，则该周期所对应的所述电压调节模块的输出电压为最佳栅压。
  12. 根据权利要求9至11任一所述的方法，其特征在于，所述比较所述存储模块中存储的施加不同栅压后所述信号存储单元对应的电信号，并获得比较结果，具体包 括：
    闭合所述第八开关和第九开关，将所述第一存储单元和第二存储单元存储的当前电信号输入所述比较模块进行比较，并在获得比较结果后断开所述第八开关和第九开关；
    所述第八开关和第九开关闭合前，还包括：
    闭合所述第二开关将所述信号存储单元的当前电信号存储至所述第二存储单元中；
    所述断开所述第八开关和第九开关之后，还包括：
    闭合所述第一开关将所述信号存储单元的当前电信号存储至所述第一存储单元中。
  13. 根据权利要求12所述的方法，其特征在于，所述闭合所述第二开关将所述信号存储单元的当前电信号存储至所述第二存储单元中之前，还包括：
    闭合第七开关，通过所述第三复位单元对所述第二存储单元进行复位；
    所述闭合所述第一开关将所述信号存储单元的当前电信号存储至所述第一存储单元中之前，还包括：
    闭合第六开关，通过所述第三复位单元对所述第一存储单元进行复位。
  14. 根据权利要求9至13任一所述的方法，其特征在于，所述电压调节模块按照所述预设规则调节其输出电压，具体包括：
    通过计数单元对输入的比较结果进行累积计数；
    通过所述数模转化单元将所述累积计数结果按照预设的对应关系转化为相应的电压，作为所述电压调节模块的输出电压。
  15. 根据权利要求14所述的方法，其特征在于，所述电压调节模块的输出电压加载至所述传输栅之前，还包括：
    闭合第五开关，通过所述第二复位单元对所述信号存储单元进行复位；
    闭合第四开关，通过所述第一复位单元对所述信号转化单元进行复位；
    闭合第三开关，通过所述信号提供单元向所述信号转化单元输入预设量的信号。
  16. 一种传感器，其特征在于，所述传感器中的至少一个像素与如权利要求1至8任一所述的栅压调节电路相连。
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