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WO2020062195A1 - 一种焊盘、电子器件及其连接结构、阻焊层的制作方法 - Google Patents

一种焊盘、电子器件及其连接结构、阻焊层的制作方法 Download PDF

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Publication number
WO2020062195A1
WO2020062195A1 PCT/CN2018/108903 CN2018108903W WO2020062195A1 WO 2020062195 A1 WO2020062195 A1 WO 2020062195A1 CN 2018108903 W CN2018108903 W CN 2018108903W WO 2020062195 A1 WO2020062195 A1 WO 2020062195A1
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WO
WIPO (PCT)
Prior art keywords
pad body
hole
resist layer
solder resist
pad
Prior art date
Application number
PCT/CN2018/108903
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English (en)
French (fr)
Inventor
杨帆
史洪宾
龙浩晖
王晓岩
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN201880098120.6A priority Critical patent/CN112771663A/zh
Priority to PCT/CN2018/108903 priority patent/WO2020062195A1/zh
Publication of WO2020062195A1 publication Critical patent/WO2020062195A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Definitions

  • the present application relates to the technical field of electronic component connection, and in particular, to a pad, an electronic device, a connection structure of an electronic device, and a manufacturing method of forming a solder resist layer on the pad of an electronic device.
  • solder joints The electrical signals and mechanical interconnection between the surface-mounted chip and the circuit substrate are generally realized by solder joints.
  • the structure of the solder joint is composed of the PCB and the exposed metal pad of the chip substrate and the solder between the two.
  • SMD Solder-Mask Defined
  • NSMD Non-Solder-Mask Defined
  • Figure 1 and Figure 2 show a structure of the SMD pad.
  • This design can cover the copper area of pad 01 under green oil 02. It is enlarged, and the top of the edge of pad 01 is protected by green oil 02.
  • the connection between pad 01 and circuit substrate 04 is relatively stable, and it has a strong ability to resist pad crazing.
  • traditional SMD pads The opening of the through hole 021 corresponding to the pad of the edge green oil 02 is a right-angle design, so that the connection 031 between the joint 03 and the green oil 02 is not smooth, and the connection 031 between the joint 03 and the green oil 02 is not smooth.
  • Figure 3 shows a structure of the NSMD pad.
  • the green oil 02 does not cover the pad 01
  • the solder joint 03 wraps the pad
  • the solder joint 03 has a smooth outline and is not prone to stress concentration.
  • the internal fracture ability of solder joint 03 is strong, but the pad area of the NSMD pad is small and there is no green oil 02 protection around it. Therefore, it is easy to break between pad 01 and the circuit board 04 below it, and it is resistant to pad pit cracking. The ability is poor.
  • the pad, the electronic device, the connection structure of the electronic device, and the manufacturing method for forming a solder resist layer on the pad of the electronic device provided by the embodiments of the present application solve the problem that the SMD pad structure of the prior art is easily broken.
  • the present application provides a pad including a pad body and a solder resist layer covering the pad body.
  • Through-holes for soldering are formed along a thickness direction of the solder resist layer.
  • the area of the hole is smaller than the area of the pad body, and the area of the through hole gradually increases in a direction away from the pad body.
  • the solder resist layer since the area of the through hole of the solder resist layer is smaller than the area of the pad body, a part of the pad body is covered by the solder resist layer, so that the connection between the pad body and the substrate is relatively stable.
  • the pads are not easily detached from the substrate.
  • the area of the through hole gradually increases in a direction away from the pad body, therefore, when soldering, the solder joint can smoothly transition at the through hole of the solder resist layer, it is difficult to form sharp corners, and cracks are not easy to be here.
  • the initiation of the process improves the solder joint's ability to resist thermal fatigue and brittle fracture.
  • a hole wall of the through hole is an inclined surface.
  • the bevel structure is easy to machine.
  • an inclination angle of a hole wall of the through hole is 20 ° ⁇ 60 °.
  • the hole wall of the through hole is a concave arc surface. Therefore, the gap between the solder joint and the through hole wall of the solder resist layer can be made larger, and the solder joint and the solder resist layer can be further prevented from contacting each other.
  • the solder resist layer is made of a liquid photo solder resist.
  • a chamfer is formed at an opening of the through hole.
  • the opening of the through hole can be made smoother, thereby further avoiding stress concentration at the opening of the through hole.
  • the present application also provides an electronic device including a connection surface for connecting with other electronic devices.
  • the connection surface is provided with at least one pad body.
  • the connection surface is covered with a solder resist layer.
  • a through hole for soldering is formed at a position of the solder resist layer corresponding to the pad body.
  • the area of the through hole is smaller than the area of the pad body, and the area of the through hole is in a direction away from the pad body. Gradually increase.
  • the through-hole area of the solder resist layer is smaller than the area of the pad body, a part of the pad body is covered by the solder resist layer, so that the connection between the pad body and the substrate is relatively stable.
  • the pad body does not easily fall off the substrate.
  • the area of the through hole gradually increases in a direction away from the pad body, therefore, when soldering, the solder joint can smoothly transition at the through hole of the solder resist layer, it is difficult to form sharp corners, and avoid solder resist Stress concentration occurs at the connection between the layer and the solder joint, and cracks are not easy to initiate here, thereby improving the solder joint's ability to resist thermal fatigue and brittle fracture. As a result, the connection between the electronic device and other electronic devices is more stable.
  • a hole wall of the through hole is an inclined surface.
  • an inclination angle of a hole wall of the through hole is 20 ° ⁇ 60 °.
  • the electronic device is a chip or a circuit substrate.
  • connection structure for an electronic device including:
  • a chip the connecting surface of the chip is provided with at least one first pad body, the connecting surface of the chip is covered with a first solder resist layer, and the first solder resist layer is formed corresponding to the position of the first pad body There is a first through hole for soldering, the area of the first through hole is smaller than the area of the first pad body, and the area of the first through hole gradually increases in a direction away from the first pad body. Big.
  • connection surface of the circuit substrate is provided with at least one second pad body, the connection surface of the circuit substrate is covered with a second solder resist layer, and the second solder resist layer corresponds to the second pad body
  • a second through-hole for soldering is formed at a position of the second through-hole, the area of the second through-hole is smaller than the area of the second pad body, and the area of the second through-hole is along a distance away from the second pad body. The direction gradually increases;
  • the first pad body of the chip and the second pad body of the substrate are welded by a solder joint, a first end of the solder joint is located in the first through hole, and a second end of the solder joint is located In the second through hole, there is a gap between the first end of the solder joint and the hole wall of the first through hole, and the second end of the solder joint and the hole wall of the second through hole There is a gap between them.
  • connection structure of the electronic device provided in the embodiment of the present application, the area of the first through hole gradually increases in a direction away from the first pad body, and the area of the second through hole moves away from the second pad body.
  • the direction of the pad is gradually increased. Therefore, a part of the pad body is covered by the solder resist layer, so that the connection between the pad body and the substrate is more stable, and the pad is not easy to fall off the substrate.
  • the solder joint can smoothly transition at the through hole of the solder resist layer, and it is difficult to form sharp corners, avoiding The stress concentration at the connection between the solder resist and the solder joint is generated, and cracks are not easy to initiate here, thereby improving the solder joint's ability to resist thermal fatigue and brittle fracture.
  • the connection between the chip and the circuit substrate is more stable.
  • the present application also provides a method for manufacturing a solder resist layer on a pad of an electronic device.
  • the electronic device includes a connection surface, and the connection surface is provided with at least one pad body.
  • the method includes the following: step:
  • solder resist layer Forming a solder resist layer on a connection surface of the electronic device, the solder resist layer being formed of a photo-induced solder resist material;
  • the solder resist layer covered in the middle area of the pad body is completely removed, and the solder resist layer covered in the edge area of the pad body is partially removed, so that the solder resist layer covered in the edge area of the pad body is surrounded.
  • the area of the hole gradually increases in a direction away from the pad body.
  • the shape of the solder resist layer is controlled through exposure and development processes, so that the area of the through hole surrounded by the solder resist layer is far from the area.
  • the direction of the pad body is gradually increased, and the method has simple process and convenient implementation.
  • the direction of the disk body gradually increases, which can be achieved by the following steps: In the exposure process, the light intensity of the solder resist layer covering the edge area of the pad body is gradually weakened in a direction parallel to the connection surface and away from the center of the pad body. .
  • the direction of the disk body is gradually increased, and can also be achieved by the following steps: in the exposure process, the irradiation direction of the light irradiating the solder resist layer covering the edge area of the pad body is inclined toward the direction near the center of the pad body.
  • the following steps may be implemented: a light source in an exposure process A convex lens is disposed between the pad and the pad, so that the irradiation direction of the light irradiating the solder resist layer covering the edge area of the pad body is inclined toward the direction near the center of the pad body.
  • the direction of the disk body is gradually increased, and can also be achieved by the following steps: before the exposure process, a light shielding layer is covered on the solder resist layer, the light shielding layer is formed with a through hole corresponding to the middle region of the pad body, and the light shielding The light transmittance of the portion of the layer covering the edge region of the pad body gradually decreases in a direction parallel to the connection surface and away from the center of the pad body.
  • FIG. 1 is a schematic structural diagram of an SMD pad
  • FIG. 2 is a schematic structural diagram of an SMD pad and a solder joint
  • FIG. 3 is a schematic structural diagram of an NSMD pad and a solder joint
  • FIG. 4 is a schematic structural diagram of a pad according to an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a pad and a solder joint according to an embodiment of the present application.
  • FIG. 6 is another schematic structural diagram of a pad according to an embodiment of the present application.
  • FIG. 7 is an overall schematic view of another structure of a pad and a solder joint according to an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of a chamfer at an opening of a through hole of a solder resist layer of a pad according to an embodiment of the present application;
  • FIG. 9 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of a connection structure of an electronic device according to an embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of another connection manner of a connection structure of an electronic device according to an embodiment of the present application.
  • FIG. 12 is a comparison chart of the results of a drop simulation experiment
  • FIG. 13 is a comparison chart of the results of the thermal shock simulation experiment.
  • FIG. 14 is a schematic diagram of covering a solder mask layer on a solder mask layer in a method of manufacturing a solder mask layer according to an embodiment of the present application;
  • solder resist layer 15 is a schematic diagram of the solder resist layer in the middle of the pad is etched away through an exposure and development process in the method for manufacturing a solder resist layer according to an embodiment of the present application;
  • FIG. 16 is a schematic diagram of using a convex lens to focus a light source in a method for manufacturing a solder resist layer according to an embodiment of the present application.
  • an embodiment of the present application provides a pad, which includes a pad body 1 and a solder resist layer 2 covering the pad body 1, and is formed along a thickness direction of the solder resist layer 2.
  • the area of the through hole 21 is smaller than the area of the pad body 1, and the area of the through hole 21 gradually increases in a direction away from the pad body 1.
  • the solder joint 3 can be smoothed at the through hole 21 of the solder resist layer 2. It is difficult to form sharp corners during the transition, avoiding stress concentration at the joint between the solder resist layer 2 and the solder joint 3, and cracks are not easy to initiate here, thereby improving the solder joint 3's ability to resist thermal fatigue and brittle fracture.
  • the solder joint 3 can be avoided as far as possible from the through hole 21 hole wall 211 of the solder resist layer 2 during welding.
  • the solder joint 3 can be controlled in the following manner. Coverage area: For example, it can be achieved by adjusting the amount of solder paste, the weight of the device, and the area of the pad. Among them, the larger the amount of solder paste, the larger the coverage area of solder joint 3, the smaller the amount of solder paste, the smaller the coverage area of solder joint 3; the greater the weight of the device (such as chip, PCB board, etc.), the solder joint 3 is The larger the deformation amount after extrusion, the larger the coverage area.
  • the solder resist layer 2 may be a liquid photo solder resist (commonly known as green oil).
  • the green oil is a protective layer, which is coated on the circuit board and the substrate without soldering, or used as a solder resist. The purpose is to protect the formed line pattern for a long time.
  • the hole wall 211 of the through hole 21 may be an inclined surface, as shown in FIG. 4. In the direction of the disk body 1, the hole wall 211 of the through hole 21 gradually slopes away from the axis of the through hole 21, and the inclined structure is easy to process.
  • the through hole 21 may be a conical hole or a pyramidal hole.
  • the hole wall 211 of the through hole 21 may also be a concave arc surface structure. The concave arc surface structure can make the gap between the solder joint 3 and the through-hole 21 hole wall 211 of the solder resist layer 2 larger, further ensuring that the solder joint 3 does not contact the solder resist layer 2.
  • a chamfer 212 may be made at the upper end opening of the through hole 21, and the chamfer 212 may be a bevel or a circle shown in FIG. 8. Therefore, the opening of the through-hole 21 can be made smoother, thereby further avoiding stress concentration at the opening of the through-hole 21.
  • the inclination angle ⁇ of the hole wall 211 of the through hole 21 may be 20 ° to 60 °. If the value of the inclination angle ⁇ is too large, the solder resist layer 2 is too close to the solder joint 3, and it is difficult to control the size of the solder joint 3 during welding. If the value of the inclination angle ⁇ is too small, the solder resist layer 2 covers the pad. The thickness of a part of the body 1 is thin, and the fixing effect on the pad body 1 is poor.
  • the solder resist layer 2 can avoid the solder joint 3 and the solder resist layer 2 can cover a part of the thickness of the pad body 1. It is thicker to form a better fixation to the pad body 1.
  • the present application further provides an electronic device including a connection surface 4 for connecting with other electronic devices.
  • the connection surface 4 is provided with at least one pad body 1.
  • the connection surface 4 is covered with a solder resist layer 2, and a through hole 21 for soldering is formed at a position of the solder resist layer 2 corresponding to the pad body 1.
  • the area of the through hole 21 is smaller than that of the pad body 1.
  • the area of the through hole 21 gradually increases in a direction away from the pad body 1.
  • the solder resist layer 2 since the area of the through hole 21 of the solder resist layer 2 is smaller than the area of the pad body 1, a part of the pad body 1 is covered by the solder resist layer 2, so that the pad body 1 and the substrate The connection between them is relatively stable, and the pad body 1 is not easily detached from the substrate. And because the area of the through hole 21 gradually increases in a direction away from the pad body 1, when soldering, the solder joint 3 can smoothly transition at the through hole 21 of the solder resist layer 2, and it is difficult to form sharp corners.
  • the above electronic device may be a chip, a printed circuit board (PCB), or other electronic devices that can be soldered through a pad, which is not limited herein.
  • PCB printed circuit board
  • the present application also provides a connection structure of an electronic device, including:
  • Chip 100 the connecting surface of the chip 100 is provided with at least one first pad body 1a, the connecting surface of the chip 100 is covered with a first solder resist layer 2a, and the first solder resist layer 2a corresponds to the first A first through hole 21a for soldering is formed at a position of the pad body 1a.
  • the area of the first through hole 21a is smaller than the area of the first pad body 1a, and the area of the first through hole 21a is far from The direction of the first pad body 1a gradually increases.
  • the circuit substrate 200, the connection surface of the circuit substrate 200 is provided with at least one second pad body 1b, the connection surface of the circuit substrate 200 is covered with a second solder resist layer 2b, and the second solder resist layer 2b corresponds to A second through hole 21b for soldering is formed at a position of the second pad body 1b.
  • the area of the second through hole 21b is smaller than the area of the second pad body 1b. The area gradually increases in a direction away from the second pad body 1b;
  • the first pad body 1a of the chip 100 and the second pad body 1b of the substrate are welded through a solder joint 3, and the first end 31 of the solder joint is located in the first through hole 21a.
  • the second end 32 of the spot is located in the second through hole 21b, there is a gap between the first end 31 of the solder joint and the hole wall of the first through hole 21a, and the second end of the solder joint There is a gap between 32 and the hole wall of the second through hole 21b.
  • connection structure of the electronic device provided in the embodiment of the present application, since the area of the first through hole 21a gradually increases in a direction away from the first pad body 1a, and the area of the second through hole 21b moves away from the second The direction of the pad body 1b is gradually increased. Therefore, a part of the pad body is covered by the solder resist layer, so that the connection between the pad body and the substrate is more stable, and the pad is not easily detached from the substrate.
  • the solder joint can smoothly transition at the through hole of the solder resist layer, and it is difficult to form sharp corners, avoiding The stress concentration at the connection between the solder resist and the solder joint is generated, and cracks are not easy to initiate here, thereby improving the solder joint's ability to resist thermal fatigue and brittle fracture. Therefore, the connection between the chip 100 and the circuit substrate 200 is more stable.
  • one of the pad structure on the chip 100 side and the pad structure on the circuit substrate 200 side may also use the NSMD pad structure.
  • the pad structure on the chip 100 side adopts the application of this application.
  • the pad structure on the circuit substrate 200 side uses the NSMD pad structure.
  • the second solder resist layer 2b is not in contact with the second pad body 1b.
  • the pads on the chip use the traditional SMD shown in Figure 1.
  • Pad structure, the pad on the circuit substrate uses the NSMD pad structure shown in Figure 3;
  • Solution 2 The pad on the chip uses the traditional SMD pad structure shown in Figure 1, and the pad on the circuit substrate also uses the diagram The traditional SMD pad structure shown in Figure 1;
  • solution three (as shown in Figure 11): the pad on the chip uses the SMD pad structure shown in Figure 4 of this application, and the pad on the circuit substrate uses the NSMD pad structure; solution four (as shown in FIG.
  • FIG. 10 the pads on the chip use the SMD pad structure shown in FIG. 4 of this application, and the pads on the circuit substrate also use the SMD solder shown in FIG. Plate structure.
  • Figure 12 shows a comparison of the results of the drop simulation experiments of the above four schemes. It can be seen from Figure 12 that compared to the traditional solder joint structure, schemes 3 and 4 adopt the structure of the SMD pad of this application, so It can reduce the drop stress level of the solder joint by more than 15.4%.
  • Figure 13 shows the comparison of the results of the thermal shock simulation experiments of the above four schemes.
  • the present application also provides a manufacturing method for forming a solder resist layer on a pad of an electronic device.
  • the electronic device includes a connection surface 4, and the connection surface 4 is provided with at least one
  • the above method includes the following steps:
  • solder resist layer 2 Forming a solder resist layer 2 on the connection surface 4 of the electronic device, the solder resist layer 2 being formed of a photo-induced solder resist material;
  • solder resist layer 2 covered by the middle area of the pad body 1 is removed by exposure and development processes, and the solder resist layer 2 covered by the edge area of the pad body 1 is partially removed to make the solder resist layer covered by the edge area of the pad body 1
  • the area of the through hole 21 enclosed by 2 gradually increases in a direction away from the pad body 1.
  • a light shielding layer 6 is first covered on the solder resist layer 2.
  • the light shielding layer 6 is formed with a light transmitting hole 61 corresponding to the middle region of the pad body 1.
  • light is irradiated into the solder resist layer 2 through the light-transmissive hole 61, so that part of the solder resist layer 2 is removed, and the metal layer under the solder resist layer 2 is exposed.
  • the manufacturing method for forming the solder resist layer 2 on the pad of an electronic device controls the shape of the solder resist layer 2 through exposure and development processes, so that the area of the through hole 21 surrounded by the solder resist layer 2 Gradually increasing in a direction away from the pad body 1, the method has simple process and convenient implementation.
  • the weaker part of the light ray remains less after the irradiation of the stronger part, and the weaker part of the light ray remains more after the irradiation of the weaker part, so that the area of the through hole 21 can be far away from the pad body.
  • the direction of 1 gradually increases. Specifically, the brightness of the light source corresponding to the solder resist layer 2 covering the edge region of the pad body 1 may be adjusted to gradually decrease in a direction away from the pad body 1.
  • the irradiation direction of the light irradiating the solder resist layer 2 covering the edge region of the pad body 1 may be tilted toward the direction near the center of the pad body 1. Therefore, by tilting the irradiation light, the inner wall of the through hole 21 of the solder resist layer 2 is inclined, so that the area of the through hole 21 is gradually increased in a direction away from the pad body 1.
  • the solder resist layer 2 covering the edge region of the pad body 1 may be tilted.
  • the corresponding light source is tilted.
  • a convex lens 5 can also be provided between the light source and the pad body 1, so that the convex lens 5 condenses the light from the light source toward the center of the pad body 1, so that the direction of light irradiation is close to the pad body 1.
  • the direction of the center is inclined.
  • the light transmittance of a part of the light shielding layer covering the edge region of the pad body 1 may also be made. It gradually decreases in a direction parallel to the connection surface and away from the center of the pad body 1. As a result, the part of the light covering the edge region of the pad body 1 through the light shielding layer will gradually weaken along the direction parallel to the connection surface and away from the center of the pad body 1, so that the area of the through hole 21 will be farther away. The direction of the pad body 1 gradually increases.

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Abstract

本申请实施例提供焊盘、电子器件及其连接结构、阻焊层的制作方法，涉及电子元件连接技术领域，该焊盘包括焊盘本体以及覆盖于所述焊盘本体上方的阻焊层，沿所述阻焊层的厚度方向形成有用于焊接的通孔，所述通孔的面积小于所述焊盘本体的面积，且所述通孔的面积沿远离所述焊盘本体的方向逐渐增大。

Description

一种焊盘、电子器件及其连接结构、阻焊层的制作方法 技术领域
本申请涉及电子元件连接技术领域，尤其涉及一种焊盘、电子器件，电子器件的连接结构及在电子器件的焊盘上形成阻焊层的制作方法。
背景技术
表面贴装的芯片与电路基板之间的电信号和机械互连一般通过焊点实现。焊点的结构由PCB与芯片基板裸露在外面的金属焊盘和两者之间的焊料共同组成。焊盘通常有两种设计方法，即阻焊层限定(Solder-Mask Defined，SMD)焊盘设计与非阻焊层限定(Non-Solder-Mask Defined，NSMD)焊盘设计。
图1和图2所示为SMD焊盘的一种结构，焊盘01的上方有一层绿油02将焊盘01的边缘覆盖，此种设计可以将绿油02下方焊盘01的铺铜面积加大，且焊盘01的边缘的上方有绿油02保护，焊盘01与电路基板04之间的连接较稳固，有较强的抵抗焊盘坑裂的能力，但是，传统的SMD焊盘边缘绿油02对应焊盘的通孔021的孔口为直角设计，使此处的焊点03和绿油02之间的连接处031过渡不平滑，焊点03与绿油02的连接处031易产生应力集中，导致焊点03早期因受热疲劳应力或机械冲击应力而失效。图3所示为NSMD焊盘的一种结构，对于NSMD焊盘设计，绿油02未把焊盘01覆盖，焊点03将焊盘包裹，焊点03轮廓圆滑，不易有应力集中，因此抗焊点03内部断裂的能力较强，但是，NSMD焊盘的焊盘面积较小且周围没有绿油02保护，因此焊盘01与其下方的电路基板04之间易发生断裂，抗焊盘坑裂的能力较差。
发明内容
本申请的实施例提供的焊盘、电子器件，电子器件的连接结构及在电子器件的焊盘上形成阻焊层的制作方法，解决了现有技术的SMD焊盘结构易断裂的问题。
为达到上述目的，本申请的实施例采用如下技术方案：
第一方面，本申请提供一种焊盘，包括焊盘本体以及覆盖于所述焊盘本体上方的阻焊层，沿所述阻焊层的厚度方向形成有用于焊接的通孔，所述通孔的面积小于所述焊盘本体的面积，且所述通孔的面积沿远离所述焊盘本体的方向逐渐增大。
本申请实施例提供的焊盘，由于阻焊层的通孔面积小于焊盘本体的面积，因此，焊盘本体的一部分被阻焊层覆盖，使得焊盘本体与基板之间的连接较稳固，焊盘不易从基板脱落。并且由于通孔的面积沿远离所述焊盘本体的方向逐渐增大，由此，当进行焊接时，焊点在阻焊层的通孔处能够平滑过渡，不易形成尖角，裂纹不易在此处萌生，从而提升了焊点抗热疲劳和抗脆性断裂的能力。
在可能的实现方式中，所述通孔的孔壁为斜面。斜面结构易于加工。
在可能的实现方式中，所述通孔的孔壁的倾斜角度为20°～60°。由此，既可以使阻焊层避让开焊点，又可以使阻焊层覆盖焊盘本体的部分厚度较厚，以对焊盘形成较好的固定。
在可能的实现方式中，所述通孔的孔壁为下凹的弧面。由此，可使焊点与阻焊层 的通孔孔壁之间的间隙更大，进一步保证焊点与阻焊层不接触。
在可能的实现方式中，阻焊层由液态光致阻焊剂制成。
在可能的实现方式中，通孔的孔口处形成有倒角。由此，可使通孔的孔口更加平滑，从而进一步避免在通孔的孔口处形成应力集中。
第二方面，本申请还提供了一种电子器件，包括用于和其他电子器件连接的连接面，所述连接面设有至少一个焊盘本体，所述连接面覆盖有阻焊层，所述阻焊层对应所述焊盘本体的位置形成有用于焊接的通孔，所述通孔的面积小于所述焊盘本体的面积，且所述通孔的面积沿远离所述焊盘本体的方向逐渐增大。
本申请实施例提供的电子器件，由于阻焊层的通孔面积小于焊盘本体的面积，因此，焊盘本体的一部分被阻焊层覆盖，使得焊盘本体与基板之间的连接较稳固，焊盘本体不易从基板脱落。并且由于通孔的面积沿远离所述焊盘本体的方向逐渐增大，由此，当进行焊接时，焊点在阻焊层的通孔处能够平滑过渡，不易形成尖角，避免了阻焊层与焊点之间的连接处产生应力集中，裂纹不易在此处萌生，从而提升了焊点抗热疲劳和抗脆性断裂的能力。从而使得该电子器件与其他电子器件的连接更稳固。
在第二方面可能的实现方式中，所述通孔的孔壁为斜面。
在第二方面可能的实现方式中，所述通孔的孔壁的倾斜角度为20°～60°。
在第二方面可能的实现方式中，所述电子器件为芯片或电路基板。
第三方面，本申请还提供了一种电子器件的连接结构，包括：
芯片，所述芯片的连接面设有至少一个第一焊盘本体，所述芯片的连接面覆盖有第一阻焊层，所述第一阻焊层对应所述第一焊盘本体的位置形成有用于焊接的第一通孔，所述第一通孔的面积小于所述第一焊盘本体的面积，且所述第一通孔的面积沿远离所述第一焊盘本体的方向逐渐增大。
电路基板，所述电路基板的连接面设有至少一个第二焊盘本体，所述电路基板的连接面覆盖有第二阻焊层，所述第二阻焊层对应所述第二焊盘本体的位置形成有用于焊接的第二通孔，所述第二通孔的面积小于所述第二焊盘本体的面积，且所述第二通孔的面积沿远离所述第二焊盘本体的方向逐渐增大；
所述芯片的第一焊盘本体与所述基板的第二焊盘本体通过焊点焊接，所述焊点的第一端位于所述第一通孔内，所述焊点的第二端位于所述第二通孔内，所述焊点的第一端与所述第一通孔的孔壁之间具有间隙，且所述焊点的第二端与所述第二通孔的孔壁之间具有间隙。
本申请实施例提供的电子器件的连接结构，由于第一通孔的面积沿远离所述第一焊盘本体的方向逐渐增大，且第二通孔的面积沿远离所述第二焊盘本体的方向逐渐增大，因此，焊盘本体的一部分被阻焊层覆盖，使得焊盘本体与基板之间的连接较稳固，焊盘不易从基板脱落。并且由于通孔的面积沿远离焊盘本体的方向逐渐增大，由此，当进行焊接时，当进行焊接时，焊点在阻焊层的通孔处能够平滑过渡，不易形成尖角，避免了阻焊层与焊点之间的连接处产生应力集中，裂纹不易在此处萌生，从而提升了焊点抗热疲劳和抗脆性断裂的能力。从而使得该芯片与电路基板的连接更稳固。
第四方面，本申请还提供了一种在电子器件的焊盘上形成阻焊层的制作方法，所述电子器件包括连接面，所述连接面设有至少一个焊盘本体，该方法包括以下步骤：
在电子器件的连接面形成阻焊层，所述阻焊层由光致阻焊材料形成；
通过曝光和显影工艺将焊盘本体中部区域覆盖的阻焊层全部去除，将焊盘本体边缘区域覆盖的阻焊层的局部去除，以使焊盘本体边缘区域覆盖的阻焊层围成的通孔的面积沿远离所述焊盘本体的方向逐渐增大。
本申请实施例提供的在电子器件的焊盘上形成阻焊层的制作方法，通过曝光和显影工艺来控制阻焊层的形状，从而使得阻焊层围成的通孔的面积沿远离所述焊盘本体的方向逐渐增大，该方法工艺简单、实现方便。
在第四方面可能的实现方式中，为了将焊盘本体边缘区域覆盖的阻焊层的局部去除，以使焊盘本体边缘区域覆盖的阻焊层围成的通孔的面积沿远离所述焊盘本体的方向逐渐增大，可以通过以下步骤实现：在曝光工艺中，使照射覆盖在焊盘本体边缘区域的阻焊层的光线强度沿平行于连接面且远离焊盘本体中心的方向逐渐减弱。
在第四方面可能的实现方式中，为了将焊盘本体边缘区域覆盖的阻焊层的局部去除，以使焊盘本体边缘区域覆盖的阻焊层围成的通孔的面积沿远离所述焊盘本体的方向逐渐增大，还可以通过以下步骤实现：在曝光工艺中，使照射覆盖在焊盘本体边缘区域的阻焊层的光线的照射方向向靠近焊盘本体中心的方向倾斜。
在第四方面可能的实现方式中，为了使照射覆盖在焊盘本体边缘区域的阻焊层的光线的照射方向向靠近焊盘本体中心的方向倾斜，可以通过以下步骤实现：在曝光工艺的光源和所述焊盘之间设置凸透镜，使照射覆盖在焊盘本体边缘区域的阻焊层的光线的照射方向向靠近焊盘本体中心的方向倾斜。
在第四方面可能的实现方式中，为了将焊盘本体边缘区域覆盖的阻焊层的局部去除，以使焊盘本体边缘区域覆盖的阻焊层围成的通孔的面积沿远离所述焊盘本体的方向逐渐增大，还可以通过以下步骤实现：在曝光工艺前，在阻焊层上覆盖遮光层，所述遮光层对应所述焊盘本体的中部区域形成有通孔，所述遮光层覆盖于所述焊盘本体的边缘区域的部分的透光度沿平行于连接面且远离焊盘本体中心的方向逐渐减小。
附图说明
图1为一种SMD焊盘的结构示意图；
图2为一种SMD焊盘和焊点的结构示意图；
图3为一种NSMD焊盘和焊点的结构示意图；
图4为本申请实施例焊盘的结构示意图；
图5为本申请实施例焊盘和焊点的结构示意图；
图6为本申请实施例焊盘的另一种结构示意图；
图7为本申请实施例焊盘的另一种结构和焊点的整体示意图；
图8为本申请实施例焊盘的阻焊层的通孔的孔口处设置倒角的结构示意图；
图9为本申请实施例电子器件的结构示意图；
图10为本申请实施例电子器件的连接结构的结构示意图；
图11为本申请实施例电子器件的连接结构的另一种连接方式的结构示意图；
图12为跌落仿真实验的结果对比图；
图13为温冲仿真实验的结果对比图；
图14为本申请实施例阻焊层的制作方法中在阻焊层上覆盖遮光层的示意图；
图15为本申请实施例阻焊层的制作方法中通过曝光显影工艺刻蚀掉焊盘中部的阻焊层后的示意图；
图16为本申请实施例阻焊层的制作方法中采用凸透镜将光源汇聚的示意图。
具体实施方式
如图4所示，本申请实施例提供了一种焊盘，包括焊盘本体1以及覆盖于所述焊盘本体1上方的阻焊层2，沿所述阻焊层2的厚度方向形成有用于焊接的通孔21，所述通孔21的面积小于所述焊盘本体1的面积，且所述通孔21的面积沿远离所述焊盘本体1的方向逐渐增大。
本申请实施例提供的焊盘，由于阻焊层2的通孔21面积小于焊盘本体1的面积，因此，焊盘本体1的一部分被阻焊层2覆盖，使得焊盘本体1与基板之间的连接较稳固，焊盘不易从基板脱落。并且由于通孔21的面积沿远离所述焊盘本体1的方向逐渐增大，由此，当进行焊接时，如图5所示，焊点3在阻焊层2的通孔21处能够平滑过渡，不易形成尖角，避免了阻焊层2与焊点3之间的连接处产生应力集中，裂纹不易在此处萌生，从而提升了焊点3抗热疲劳和抗脆性断裂的能力。
为了避免焊点3与阻焊层2连接后形成尖角，可在焊接时将焊点3尽量避开阻焊层2的通孔21孔壁211，具体地，可以通过以下方式控制焊点3的覆盖面积：例如可以通过调整锡膏用量、器件重量、焊盘面积等来实现。其中，锡膏用量越多则焊点3的覆盖面积越大，锡膏用量越少则焊点3的覆盖面积越小；器件(如芯片、PCB板等)重量越大，则焊点3被挤压后的形变量越大，覆盖面积就越大，器件重量越小则焊点3被挤压后的形变量越小，覆盖面积就越小；焊盘面积越大则可制作的焊点3面积越大，焊盘面积越小则可制作的焊点3面积越小。由此，可根据焊盘的面积控制焊点3的大小，使焊点3避让开阻焊层2。
具体地，阻焊层2可以是液态光致阻焊剂(俗称绿油)，绿油是一种保护层，涂覆在电路板上不需焊接的线路和基材上，或用作阻焊剂。目的是长期保护所形成的线路图形。
为了实现通孔21的面积沿远离所述焊盘本体1的方向逐渐增大，可以有多种实现方式，例如，通孔21的孔壁211可以为斜面，如图4所示，沿远离焊盘本体1的方向，通孔21的孔壁211逐渐向远离通孔21轴线的方向倾斜，斜面结构易于加工。具体地，通孔21可以为圆锥形孔或棱锥形孔。在另一种可能的实现方式中，如图6、图7所示，通孔21的孔壁211还可以为下凹的弧面结构。下凹的弧面结构可使焊点3与阻焊层2的通孔21孔壁211之间的间隙更大，进一步保证焊点3与阻焊层2不接触。
为了使通孔21的孔口更加平滑，如图8所示，可在通孔21的上端孔口处制作倒角212，该倒角212可以是斜角也可以是图8中所示的圆角，由此，可使通孔21的孔口更加平滑，从而进一步避免在通孔21的孔口处形成应力集中。
如图4所示，通孔21的孔壁211的倾斜角度α可以为20°～60°。若倾斜角度α的取值过大，则阻焊层2太靠近焊点3，在焊接时不易控制焊点3的大小，若倾斜角度α的取值过小，则阻焊层2覆盖焊盘本体1的部分厚度较薄，对焊盘本体1的固定效果较差。因此，将通孔21的孔壁211的倾斜角度α设置为20°～60°，既可以使阻焊层2避让开焊点3，又可以使阻焊层2覆盖焊盘本体1的部分厚度较厚，以对焊盘 本体1形成较好的固定。
另一方面，如图9所示，本申请还提供了一种电子器件，该电子器件包括用于和其他电子器件连接的连接面4，所述连接面4设有至少一个焊盘本体1，所述连接面4覆盖有阻焊层2，所述阻焊层2对应所述焊盘本体1的位置形成有用于焊接的通孔21，所述通孔21的面积小于所述焊盘本体1的面积，且所述通孔21的面积沿远离所述焊盘本体1的方向逐渐增大。
本申请实施例提供的电子器件，由于阻焊层2的通孔21面积小于焊盘本体1的面积，因此，焊盘本体1的一部分被阻焊层2覆盖，使得焊盘本体1与基板之间的连接较稳固，焊盘本体1不易从基板脱落。并且由于通孔21的面积沿远离所述焊盘本体1的方向逐渐增大，由此，当进行焊接时，焊点3在阻焊层2的通孔21处能够平滑过渡，不易形成尖角，避免了阻焊层2与焊点3之间的连接处产生应力集中，裂纹不易在此处萌生，从而提升了焊点3抗热疲劳和抗脆性断裂的能力。从而使得该电子器件与其他电子器件的连接更稳固。
上述电子器件可以为芯片、印制电路板(Printed Circuit Board，PCB)或其他可以通过焊盘焊接的电子器件，在此不做限定。
另一方面，如图10所示，本申请还提供了一种电子器件的连接结构，包括：
芯片100，所述芯片100的连接面设有至少一个第一焊盘本体1a，所述芯片100的连接面覆盖有第一阻焊层2a，所述第一阻焊层2a对应所述第一焊盘本体1a的位置形成有用于焊接的第一通孔21a，所述第一通孔21a的面积小于所述第一焊盘本体1a的面积，且所述第一通孔21a的面积沿远离所述第一焊盘本体1a的方向逐渐增大。
电路基板200，所述电路基板200的连接面设有至少一个第二焊盘本体1b，所述电路基板200的连接面覆盖有第二阻焊层2b，所述第二阻焊层2b对应所述第二焊盘本体1b的位置形成有用于焊接的第二通孔21b，所述第二通孔21b的面积小于所述第二焊盘本体1b的面积，且所述第二通孔21b的面积沿远离所述第二焊盘本体1b的方向逐渐增大；
所述芯片100的第一焊盘本体1a与所述基板的第二焊盘本体1b通过焊点3焊接，所述焊点的第一端31位于所述第一通孔21a内，所述焊点的第二端32位于所述第二通孔21b内，所述焊点的第一端31与所述第一通孔21a的孔壁之间具有间隙，且所述焊点的第二端32与所述第二通孔21b的孔壁之间具有间隙。
本申请实施例提供的电子器件的连接结构，由于第一通孔21a的面积沿远离所述第一焊盘本体1a的方向逐渐增大，且第二通孔21b的面积沿远离所述第二焊盘本体1b的方向逐渐增大，因此，焊盘本体的一部分被阻焊层覆盖，使得焊盘本体与基板之间的连接较稳固，焊盘不易从基板脱落。并且由于通孔的面积沿远离焊盘本体的方向逐渐增大，由此，当进行焊接时，当进行焊接时，焊点在阻焊层的通孔处能够平滑过渡，不易形成尖角，避免了阻焊层与焊点之间的连接处产生应力集中，裂纹不易在此处萌生，从而提升了焊点抗热疲劳和抗脆性断裂的能力。从而使得该芯片100与电路基板200的连接更稳固。
需要说明的是，芯片100侧的焊盘结构和电路基板200侧的焊盘结构中的其中一个也可采用NSMD焊盘结构，如图11所示，芯片100侧的焊盘结构采用本申请的SMD 焊盘结构，电路基板200侧的焊盘结构采用NSMD焊盘结构，此时，第二阻焊层2b与第二焊盘本体1b不接触。
为了进一步说明上述焊盘结构对电子器件焊接稳定性的影响，可将以下四种焊接方案分别进行跌落和温冲仿真实验，其中，方案一：芯片上的焊盘采用图1所示的传统SMD焊盘结构，电路基板上的焊盘采用图3所示的NSMD焊盘结构；方案二：芯片上的焊盘采用图1所示的传统SMD焊盘结构，电路基板上的焊盘也采用图1所示的传统SMD焊盘结构；方案三(如图11所示)：芯片上的焊盘采用本申请图4所示的SMD焊盘结构，电路基板上的焊盘采用图3所示的NSMD焊盘结构；方案四(如图10所示)：芯片上的焊盘采用本申请图4所示的SMD焊盘结构，电路基板上的焊盘也采用本申请图4所示的SMD焊盘结构。图12所示为以上四种方案的跌落仿真实验的结果对比图，由图12可以看出，相对于传统的焊点结构，方案三和方案四由于采用本申请的SMD焊盘的结构，因此可使焊点跌落应力水平下降15.4％以上，图13所示为以上四种方案的温冲仿真实验的结果对比图，由图13可以看出，相对于传统的焊点结构，方案三和方案四由于采用本申请的SMD焊盘的结构，温冲塑性应变水平下降31.6％以上，对焊点的跌落和热疲劳可靠性具有明显的改善效果。
另一方面，本申请还提供了一种在电子器件的焊盘上形成阻焊层的制作方法，如图9所示，所述电子器件包括连接面4，所述连接面4设有至少一个焊盘本体1，上述方法包括以下步骤：
在电子器件的连接面4形成阻焊层2，所述阻焊层2由光致阻焊材料形成；
通过曝光和显影工艺将焊盘本体1中部区域覆盖的阻焊层2全部去除，将焊盘本体1边缘区域覆盖的阻焊层2部分去除，以使焊盘本体1边缘区域覆盖的阻焊层2围成的通孔21的面积沿远离所述焊盘本体1的方向逐渐增大。
曝光显影工艺中，在曝光前，如图14所示，先在阻焊层2上覆盖遮光层6，该遮光层6对应所述焊盘本体1的中部区域形成有透光孔61，在曝光显影过程中，如图15所示，光线通过透光孔61照射进阻焊层2，使该部分阻焊层2被去除，使阻焊层2下方的金属层显露出。
本申请实施例提供的在电子器件的焊盘上形成阻焊层2的制作方法，通过曝光和显影工艺来控制阻焊层2的形状，从而使得阻焊层2围成的通孔21的面积沿远离所述焊盘本体1的方向逐渐增大，该方法工艺简单、实现方便。
为了将焊盘本体1边缘区域覆盖的阻焊层2的局部去除，在一种可能的实现方式中，可在曝光工艺中，使照射覆盖在焊盘本体1边缘区域的阻焊层2的光线强度沿平行于连接面且远离焊盘本体1中心的方向逐渐减弱。由此，光线越强的部分照射后阻焊层2剩余的越少，光线越弱的部分照射后阻焊层2剩余的越多，从而可使通孔21的面积沿远离所述焊盘本体1的方向逐渐增大。具体地，可将覆盖在焊盘本体1边缘区域的阻焊层2对应的光源的亮度调整为沿远离所述焊盘本体1的方向逐渐减弱。
在另一种可能的实现方式中，还可在曝光工艺中，使照射覆盖在焊盘本体1边缘区域的阻焊层2的光线的照射方向向靠近焊盘本体1中心的方向倾斜。由此，通过使照射光线倾斜，从而使得阻焊层2的通孔21的内壁倾斜，以实现通孔21的面积沿远离所述焊盘本体1的方向逐渐增大。
具体地，为了使照射覆盖在焊盘本体1边缘区域的阻焊层2的光线的照射方向向靠近焊盘本体1中心的方向倾斜，可以将覆盖在焊盘本体1边缘区域的阻焊层2对应的光源倾斜设置。如图16所示，还可在光源和焊盘本体1之间设置凸透镜5，使凸透镜5将光源的光线向焊盘本体1中心的方向汇聚，从而使得光线的照射方向向靠近焊盘本体1中心的方向倾斜。
在另一种可能的实现方式中，为了将焊盘本体1边缘区域覆盖的阻焊层2的局部去除，还可使遮光层覆盖于所述焊盘本体1的边缘区域的部分的透光度沿平行于连接面且远离焊盘本体1中心的方向逐渐减小。由此，通过遮光层覆盖于所述焊盘本体1的边缘区域的部分的光线也会相应沿平行于连接面且远离焊盘本体1中心的方向逐渐减弱，从而使得通孔21的面积沿远离所述焊盘本体1的方向逐渐增大。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (14)

  1. 一种焊盘，其特征在于，包括焊盘本体以及覆盖于所述焊盘本体上方的阻焊层，沿所述阻焊层的厚度方向形成有用于焊接的通孔，所述通孔的面积小于所述焊盘本体的面积，且所述通孔的面积沿远离所述焊盘本体的方向逐渐增大。
  2. 根据权利要求1所述的焊盘，其特征在于，所述通孔的孔壁为斜面。
  3. 根据权利要求2所述的焊盘，其特征在于，所述通孔的孔壁的倾斜角度为20°～60°。
  4. 根据权利要求1所述的焊盘，其特征在于，所述通孔的孔壁为下凹的弧面。
  5. 一种电子器件，其特征在于，包括用于和其他电子器件连接的连接面，所述连接面设有至少一个焊盘本体，所述连接面覆盖有阻焊层，所述阻焊层对应所述焊盘本体的位置形成有用于焊接的通孔，所述通孔的面积小于所述焊盘本体的面积，且所述通孔的面积沿远离所述焊盘本体的方向逐渐增大。
  6. 根据权利要求5所述的电子器件，其特征在于，所述通孔的孔壁为斜面。
  7. 根据权利要求6所述的电子器件，其特征在于，所述通孔的孔壁的倾斜角度为20°～60°。
  8. 根据权利要求5～7中任一项所述的电子器件，其特征在于，所述电子器件为芯片或电路基板。
  9. 一种电子器件的连接结构，其特征在于，包括：
    芯片，所述芯片的连接面设有至少一个第一焊盘本体，所述芯片的连接面覆盖有第一阻焊层，所述第一阻焊层对应所述第一焊盘本体的位置形成有用于焊接的第一通孔，所述第一通孔的面积小于所述第一焊盘本体的面积，且所述第一通孔的面积沿远离所述第一焊盘本体的方向逐渐增大；
    电路基板，所述电路基板的连接面设有至少一个第二焊盘本体，所述电路基板的连接面覆盖有第二阻焊层，所述第二阻焊层对应所述第二焊盘本体的位置形成有用于焊接的第二通孔，所述第二通孔的面积小于所述第二焊盘本体的面积，且所述第二通孔的面积沿远离所述第二焊盘本体的方向逐渐增大；
    所述芯片的第一焊盘本体与所述基板的第二焊盘本体通过焊点焊接，所述焊点的第一端位于所述第一通孔内，所述焊点的第二端位于所述第二通孔内，所述焊点的第一端与所述第一通孔的孔壁之间具有间隙，且所述焊点的第二端与所述第二通孔的孔壁之间具有间隙。
  10. 一种在电子器件的焊盘上形成阻焊层的制作方法，所述电子器件包括连接面，所述连接面设有至少一个焊盘本体，其特征在于，包括以下步骤：
    在电子器件的连接面形成阻焊层，所述阻焊层由光致阻焊材料形成；
    通过曝光和显影工艺将焊盘本体中部区域覆盖的阻焊层全部去除，将焊盘本体边缘区域覆盖的阻焊层的局部去除，以使焊盘本体边缘区域覆盖的阻焊层围成的通孔的面积沿远离所述焊盘本体的方向逐渐增大。
  11. 根据权利要求10所述的在电子器件的焊盘上形成阻焊层的制作方法，其特征在于，将焊盘本体边缘区域覆盖的阻焊层的局部去除，以使焊盘本体边缘区域覆盖的阻焊层围成的通孔的面积沿远离所述焊盘本体的方向逐渐增大，包括：
    在曝光工艺中，使照射覆盖在焊盘本体边缘区域的阻焊层的光线强度沿平行于连接面且远离焊盘本体中心的方向逐渐减弱。
  12. 根据权利要求10所述的在电子器件的焊盘上形成阻焊层的制作方法，其特征在于，将焊盘本体边缘区域覆盖的阻焊层的局部去除，以使焊盘本体边缘区域覆盖的阻焊层围成的通孔的面积沿远离所述焊盘本体的方向逐渐增大，包括：
    在曝光工艺中，使照射覆盖在焊盘本体边缘区域的阻焊层的光线的照射方向向靠近焊盘本体中心的方向倾斜。
  13. 根据权利要求12所述的在电子器件的焊盘上形成阻焊层的制作方法，其特征在于，所述使照射覆盖在焊盘本体边缘区域的阻焊层的光线的照射方向向靠近焊盘本体中心的方向倾斜，包括：
    在曝光工艺的光源和所述焊盘之间设置凸透镜，使照射覆盖在焊盘本体边缘区域的阻焊层的光线的照射方向向靠近焊盘本体中心的方向倾斜。
  14. 根据权利要求10所述的在电子器件的焊盘上形成阻焊层的制作方法，其特征在于，将焊盘本体边缘区域覆盖的阻焊层的局部去除，以使焊盘本体边缘区域覆盖的阻焊层围成的通孔的面积沿远离所述焊盘本体的方向逐渐增大，包括：
    在曝光工艺前，在阻焊层上覆盖遮光层，所述遮光层对应所述焊盘本体的中部区域形成有通孔，所述遮光层覆盖于所述焊盘本体的边缘区域的部分的透光度沿平行于连接面且远离焊盘本体中心的方向逐渐减小。
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