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WO2019205264A1 - Oled器件及其制造方法、oled显示器 - Google Patents

Oled器件及其制造方法、oled显示器 Download PDF

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Publication number
WO2019205264A1
WO2019205264A1 PCT/CN2018/092070 CN2018092070W WO2019205264A1 WO 2019205264 A1 WO2019205264 A1 WO 2019205264A1 CN 2018092070 W CN2018092070 W CN 2018092070W WO 2019205264 A1 WO2019205264 A1 WO 2019205264A1
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Prior art keywords
layer
light emitting
substrate
organic light
emitting unit
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PCT/CN2018/092070
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English (en)
French (fr)
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范英春
张晓星
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深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US16/041,849 priority Critical patent/US20190326368A1/en
Publication of WO2019205264A1 publication Critical patent/WO2019205264A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/841—Self-supporting sealing arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks

Definitions

  • the present application relates to the field of display, and in particular to an OLED (Organic Light-Emitting Diode) device, a method of manufacturing the same, and an OLED display.
  • OLED Organic Light-Emitting Diode
  • the OLED panel Compared with the traditional liquid crystal display panel, the OLED panel has the advantages of fast response speed, high contrast, wide viewing angle, etc., and is regarded as the next generation display technology.
  • the OLED device 10 generally includes a TFT (Thin Film Transistor) substrate 11 and a flat layer (PLN layer) 12 and a pixel defining layer (Pixel Define Layer) on the TFT substrate 11 .
  • PDL Thin Film Transistor
  • PDL organic light emitting unit
  • cover glass 151 and a barrier 152 for packaging.
  • the principle of illumination of the OLED panel is that a voltage is applied to an anode 141 and a cathode 142 of the organic light-emitting unit 14, and holes are injected from the cathode 142 and the anode 141, respectively, under voltage driving.
  • a voltage is applied to an anode 141 and a cathode 142 of the organic light-emitting unit 14, and holes are injected from the cathode 142 and the anode 141, respectively, under voltage driving.
  • To the electron and hole transport layers they migrate to the light-emitting layer 143 and meet at the light-emitting layer 143 to form excitons and excite the light-emitting molecules to emit visible light.
  • the organic light-emitting unit 14 is extremely sensitive to moisture, oxygen, and the like.
  • the organic light-emitting unit 14 is disposed adjacent to the pixel defining layer 13 , impurities such as water vapor and oxygen in the pixel defining layer 13 easily enter the organic light-emitting unit 14 , thereby seriously The photoelectric characteristics of the organic light emitting unit 14 are affected, and the service life of the OLED device 10 is shortened.
  • the present application provides an OLED device and a method of fabricating the same, and an OLED display capable of facilitating blocking of impurities in a pixel defining layer from entering an organic light emitting unit.
  • An OLED device includes a substrate and a pixel defining layer, an isolation layer, and an organic light emitting unit on the substrate, the pixel defining layer is configured to define a light emitting region, and the organic light emitting unit is located in the light emitting region
  • the isolation layer is between the pixel defining layer and the organic light emitting unit.
  • An OLED device includes an OLED device including a substrate, a pixel defining layer on the substrate, an isolation layer, and an organic light emitting unit, wherein the pixel defining layer is used to define a light emitting region, and the organic light emitting unit is located at the The light emitting region is located between the pixel defining layer and the organic light emitting unit.
  • a remaining layer structure of the organic light emitting unit is formed in the light emitting region defined by the pixel defining layer, including a light emitting layer and a cathode, the isolation layer being located between the pixel defining layer and the organic light emitting unit.
  • the present application can facilitate blocking the entry of impurities in the pixel defining layer into the organic light emitting unit by adding an isolation layer between the pixel defining layer and the organic light emitting unit.
  • FIG. 1 is a schematic structural view of an embodiment of a prior art OLED device
  • FIG. 2 is a schematic structural diagram of an OLED device according to an embodiment of the present application.
  • FIG. 3 is a schematic structural view of an OLED device having a bottom gate type TFT shown in FIG. 2;
  • FIG. 4 is a schematic flow chart of a method of fabricating an OLED device according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of a process for fabricating an OLED device based on the method of FIG. 4.
  • the main purpose of the present application is to add an isolation layer between the pixel defining layer and the organic light emitting unit for the display having the OLED device, the isolation layer is used to prevent impurities such as water vapor and oxygen from entering the side of the pixel defining layer from entering the organic layer.
  • the light emitting unit that is, can facilitate blocking the entry of impurities within the pixel defining layer into the organic light emitting unit, thereby ensuring the photoelectric characteristics of the organic light emitting unit and contributing to prolonging the service life of the OLED device.
  • the OLED device 20 includes a substrate 21, a pixel defining layer 22 on the substrate 21, an isolation layer 23, an organic light emitting unit 24, and an encapsulation layer 251 and a barrier 252 for packaging.
  • the pixel defining layer 22 is used to define a light emitting region of the OLED device 20, the isolation layer 23 is disposed on the pixel defining layer 22, and the organic light emitting unit 24 is located in the light emitting region and is in direct contact with the isolation layer 23, and is not defined by the pixel. 22 contacts.
  • the organic light-emitting unit 24 includes an anode 241, a light-emitting layer 242, a cathode 243, and an electron transport layer, a hole transport layer.
  • the anode 241 is disposed on the substrate 21.
  • the light-emitting layer 242, the electron transport layer, and the hole transport layer are disposed on the anode. Between 241 and cathode 243, and luminescent layer 242 is in direct contact with isolation layer 23, but not in contact with pixel defining layer 22.
  • the isolation layer 23 may be made of a transparent insulating material that is separated from water and oxygen, such as SiO 2 (silicon dioxide), silicon nitride (SiN x ), ITO (Indium tin oxide), and the like.
  • the isolation layer 23 may have a single layer structure or a composite layer structure.
  • the isolation layer 23 is disposed between the organic light emitting unit 24 and the pixel defining layer 22, the isolation layer 23 can better block impurities such as water vapor and oxygen emitted from the pixel defining layer 22, thereby preventing the pixel defining layer from being removed.
  • the impurities such as moisture, oxygen, and the like on this side enter the organic light-emitting unit 24, thereby ensuring the photoelectric characteristics of the organic light-emitting unit 24, thereby contributing to prolonging the service life of the OLED device 20.
  • the isolation layer 23 covers only a portion of the pixel defining layer 22 adjacent to the organic light emitting unit 24, that is, the isolation layer 23 covers only a portion of the outer surface of the pixel defining layer 22. In other embodiments, in order to further improve the water and oxygen barrier effect, the isolation layer 23 may also entirely cover the outer surface of the pixel defining layer 22.
  • the substrate 21 is a TFT substrate including a substrate substrate 211 and a TFT layer 212 and a flat layer 213 on the substrate substrate 211, the pixel defining layer 22, the isolation layer 23, and The organic light emitting units 24 are all located on the flat layer 213.
  • the TFT layer 212 is provided with a gate, a source, a drain, an active layer and the like.
  • the flat layer 213 is provided with a via hole exposing the drain of the TFT layer 212, and organic light is emitted.
  • the anode 241 of the cell 24 fills the via and is in contact with the drain of the TFT layer 212.
  • the present application does not limit the structural design and manufacturing materials of the TFTs in the TFT layer 212.
  • the TFT may be of a bottom gate type design or a top gate type design; for example, a metal trace or a conductive pattern in the TFT.
  • the material may be ITO, or a mixture of one or more of Mo (molybdenum), Al (aluminum), Ti (titanium), Cu (copper), and the like.
  • the TFT layer 212 includes respective layer structures sequentially formed on the substrate substrate 211: a gate 31, a Gate Insulation Layer (also referred to as a GI layer or a gate insulating layer) 32, and The source layer 33, the source/drain electrode layer formed of the source electrode 341 and the drain electrode 342, and a passivation layer (PV layer) 35.
  • a gate 31 a Gate Insulation Layer (also referred to as a GI layer or a gate insulating layer) 32
  • PV layer passivation layer
  • the gate 31, the insulating layer 32, the active layer 33, the source 341, the drain 342, and the passivation layer 35 form a TFT in the TFT layer 212, in view of the gate 31 being located under the active layer 33,
  • the OLED device 20 can be considered to employ a bottom gate type pixel design.
  • the planarization layer 3213 covers the passivation layer 35, the TFT 35 is opened through the passivation layer and the planarization layer via hole 213 O 1, O 1 via the exposed surface of the drain electrode 342 in conjunction with FIG. .
  • the organic light emitting unit of the anode 24 124 filling the via hole 342 O 1 and in contact with the drain, in order to achieve organic light emitting unit 24 is electrically connected to the drain of the TFT 342.
  • the TFT layer 212 may also adopt a top gate type design.
  • TFT based on the design reference may be made to the prior art, and details are not described herein again.
  • FIG. 4 is a schematic flow chart of a method for fabricating an OLED device according to an embodiment of the present application
  • FIG. 5 is a schematic diagram of a process for fabricating an OLED device based on the method of FIG. 4.
  • the manufacturing method of the OLED device includes steps S41 to S45.
  • the substrate 50 is a TFT substrate including a substrate substrate 51 and a TFT layer 52 and a flat layer 53 on the substrate substrate 51.
  • the TFT layer 52 is provided with a gate, a source, and a drain.
  • the flat layer 53 is provided with a via hole exposing the drain of the TFT layer 52, an active layer, or the like.
  • the substrate substrate 51 may be a light-transmitting substrate such as a glass substrate, a plastic substrate or a flexible substrate.
  • the present application does not limit the structural design and manufacturing materials of the TFTs in the TFT layer 52.
  • the TFT may be of a bottom gate type design or a top gate type design.
  • the process of forming the TFT of the present application may include the following steps:
  • the present application can form a full-face metal layer on the substrate substrate 51 by using a PVD (Physical Vapor Deposition) method, and then pattern the entire metal layer to retain only a predetermined area.
  • the metal layer forms a gate.
  • the patterning process may include photoresist coating, exposure, development, etching, and the like. For details, refer to the prior art, and details are not described herein.
  • the present application can form a full-surface insulating layer covering the gate by a CVD (Chemical Vapor Deposition) method.
  • the insulating layer may be made of silicon oxide (SiO x ), or the insulating layer may include a silicon oxide layer and a silicon nitride compound layer sequentially covering the gate, such as a SiO 2 layer and Si 3 N 4 (silicon trinitride).
  • the layer further improves the wear resistance and insulation properties of the insulating layer.
  • the present application can form a full-surface active layer by using a CVD method, and then patterning a full-surface active layer, thereby retaining only the portion of the entire active layer above the gate, thereby forming a final Active layer.
  • the present application can also directly form the active layer by a CVD method in combination with a mask having a predetermined pattern.
  • the present application can form the source and drain using the same patterning process as the fabrication gate principle, and form a passivation layer covering the source and drain.
  • the flat layer 53 is a one-sided structure overlying the TFT, and based on this, the flat layer 53 can be formed by a CVD method or a Coating PI material method. Further, the present application may employ etching or the like such that the planarization layer 53 forms a via hole exposing the drain electrode above the drain of the TFT.
  • the present application can form the anode 541 by a patterning process including photoresist coating, exposure, development, and etching processes. Specifically, a full-surface metal layer is formed on the flat layer 53, and then a full-surface photoresist is coated on the metal layer, and then a predetermined area of a full-surface photoresist is exposed by a photomask, and the remaining areas are exposed. The photoresist is not exposed due to the occlusion of the mask, the photoresist of the exposed area can be removed by development, and the photoresist of the unexposed area is retained, and then the metal layer is etched, and the metal layer not blocked by the remaining photoresist is engraved.
  • the etch is removed, and the metal layer blocked by the remaining photoresist is retained, thereby forming the anode 541 having a predetermined pattern.
  • the anode 541 fills the via of the flat layer 53 and is in contact with the drain of the TFT.
  • the pixel defining layer 55 is for defining a light emitting region of the OLED device, and the pixel defining layer 55 may cover a portion of the anode 541.
  • the present application can form the pixel defining layer 55 by a patterning process including photoresist coating, exposure, development, and etching processes.
  • the isolation layer 56 only covers a portion of the pixel defining layer 55 adjacent to the organic light emitting unit 54, that is, the isolation layer 56 covers only a portion of the outer surface of the pixel defining layer 55.
  • the isolation layer 56 may also entirely cover the outer surface of the pixel defining layer 55.
  • the present application may form the isolation layer 56 by a low temperature CVD process, or by a patterning process including photoresist coating, exposure, development, and etching processes, or a masking layer based deposition process in the pixel defining layer.
  • the isolation layer 56 is deposited on 55.
  • the light-emitting layer 542 and the cathode 543 may be formed by an evaporation process or a printing process.
  • the organic light-emitting unit 54 further includes other layer structures, such as an electron transport layer and a hole transport layer. These layer structures, not shown, can be made by using the prior art.
  • the present application forms an encapsulation layer 571 and a retaining wall 572 to encapsulate the structures formed in the foregoing steps S41 to S45.
  • the retaining wall 572 is disposed on the flat layer 53 and located at the periphery of the organic light emitting unit 54.
  • the encapsulating layer 571 is disposed on the retaining wall 572 and disposed opposite to the flat layer 53.
  • the encapsulating layer 571, the retaining wall 572, and the substrate 50 are disposed.
  • As a sealed space the remaining structural components of the OLED device 20 are located in the sealed space.
  • the manufacturing method of the present embodiment can be used to manufacture an OLED device having the same structure as the above-described OLED device 20, and thus has the same advantageous effects.

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Abstract

本申请公开一种OLED器件及其制造方法、OLED显示器。所述OLED器件包括基板及位于基板上的像素界定层、隔离层和有机发光单元，所述像素界定层用于界定发光区，所述有机发光单元位于发光区，所述隔离层位于像素界定层和有机发光单元之间。基于此，本申请能够有利于阻挡像素界定层内的杂质进入有机发光单元。

Description

OLED器件及其制造方法、OLED显示器 【技术领域】
本申请涉及显示领域，具体涉及一种OLED(Organic Light-Emitting Diode，有机发光二极管)器件及其制造方法、OLED显示器。
【背景技术】
与传统的液晶显示面板相比，OLED面板具有反应速度快、对比度高、视角广等优势，被视为下一代显示技术。如图1所示，OLED器件10一般包括TFT(Thin Film Transistor，薄膜晶体管)基板11以及位于所述TFT基板11上的平坦层(Planarization Layer，PLN层)12、像素界定层(Pixel Define Layer，PDL)13、有机发光单元14、以及用于封装的封装层(cover glass)151和挡墙(Dam)152。
结合图1所示，OLED面板的发光原理是：对有机发光单元14的阳极(anode)141和阴极(cathode)142施加电压，在电压驱动下，电子的空穴分别从阴极142和阳极141注入到电子和空穴传输层，再迁移至发光层143，并在发光层143相遇，形成激子并使发光分子激发以发出可见光。其中，有机发光单元14对水汽、氧气等杂质极为敏感，由于有机发光单元14与像素界定层13相邻设置，因此像素界定层13内的水汽、氧气等杂质容易进入有机发光单元14，从而严重影响有机发光单元14的光电特性，缩短OLED器件10的使用寿命。
【发明内容】
有鉴于此，本申请提供一种OLED器件及其制造方法、OLED显示器，能够有利于阻挡像素界定层内的杂质进入有机发光单元。
本申请一实施例的OLED器件，包括基板及位于所述基板上的像素界定层、隔离层和有机发光单元，所述像素界定层用于界定发光区，所述有机发光单元位于所述发光区，所述隔离层位于所述像素界定层和所述有机发光单元之间。
本申请一实施例的OLED显示器，其OLED器件包括基板及位于所述基板上的像素界定层、隔离层和有机发光单元，所述像素界定层用于界定发光区， 所述有机发光单元位于所述发光区，所述隔离层位于所述像素界定层和所述有机发光单元之间。
本申请一实施例的OLED器件的制造方法，包括：
提供基板；
在所述基板上形成有机发光单元的阳极；
在所述基板上形成像素界定层；
在所述像素界定层上形成隔离层；
在所述像素界定层所限定的发光区形成有机发光单元的其余层结构，包括发光层和阴极，所述隔离层位于所述像素界定层和所述有机发光单元之间。
有益效果：本申请通过在像素界定层和有机发光单元之间增加一隔离层，从而能够有利于阻挡像素界定层内的杂质进入有机发光单元。
【附图说明】
图1是现有技术的OLED器件一实施例的结构示意图；
图2是本申请一实施例的OLED器件的结构示意图；
图3是图2所示的具有底栅型TFT的OLED器件的结构示意图；
图4是本申请一实施例的OLED器件的制造方法的流程示意图；
图5是基于图4方法制造OLED器件的场景示意图。
【具体实施方式】
本申请的主要目的是：对于具有OLED器件的显示器，在像素界定层和有机发光单元之间增加一隔离层，该隔离层用于防止来自像素界定层这一侧的水汽、氧气等杂质进入有机发光单元，即，能够有利于阻挡像素界定层内的杂质进入有机发光单元，以此确保有机发光单元的光电特性，并有助于延长OLED器件的使用寿命。
下面将结合本申请实施例中的附图，对本申请所提供的各个示例性的实施例的技术方案进行清楚、完整地描述。在不冲突的情况下，下述各个实施例以及实施例中的特征可以相互组合。并且，本申请全文所采用的方向性术语，例如“上”、“下”等，均是为了更好的描述各个实施例的技术方案，并非用于限制本申请的保护范围。
图2是本申请一实施例的OLED器件的结构示意图。如图2所示，OLED器件20包括基板21，位于基板21上的像素界定层22、隔离层23、有机发光单元24，以及用于封装的封装层251和挡墙252。
其中，像素界定层22用于限定OLED器件20的发光区，隔离层23设置于像素界定层22上，有机发光单元24位于所述发光区且与隔离层23直接接触，而未与像素界定层22接触。具体地，有机发光单元24包括阳极241、发光层242、阴极243以及电子传输层、空穴传输层，阳极241设置于基板21上，发光层242、电子传输层和空穴传输层设置于阳极241和阴极243之间，并且发光层242与隔离层23直接接触，而未与像素界定层22接触。
所述隔离层23可以采用隔水、隔氧的透明绝缘材料制成，例如SiO 2(二氧化硅)、硅氮化合物(SiN x)、ITO(Indium tin oxide，氧化铟锡)等，并且，该隔离层23可以为单层结构，也可以为复合层结构。
由于隔离层23设置于有机发光单元24和像素界定层22之间，因此，该隔离层23能够对像素界定层22散发的水汽、氧气等杂质进行较好的阻挡，以此防止来自像素界定层22这一侧的水汽、氧气等杂质进入有机发光单元24，以此确保有机发光单元24的光电特性，从而有助于延长OLED器件20的使用寿命。
在本实施例中，所述隔离层23仅覆盖像素界定层22的邻近有机发光单元24的部分，即，隔离层23仅覆盖像素界定层22外表面的一部分。在其他实施例中，为了进一步提高隔水隔氧效果，隔离层23也可以全部覆盖所述像素界定层22的外表面。
请继续参阅图2，所述基板21为TFT基板，其包括衬底基材211以及位于所述衬底基材211上的TFT层212和平坦层213，上述像素界定层22、隔离层23和有机发光单元24均位于平坦层213上，TFT层212设置有栅极、源极、漏极、有源层等，所述平坦层213开设有暴露TFT层212的漏极的过孔，有机发光单元24的阳极241填充所述过孔并与TFT层212的漏极接触。
本申请对于TFT层212中TFT的结构设计和制造材料并不予以限定，例如，TFT可以采用底栅型设计，也可以采用顶栅型设计；又例如，TFT中的金属走线或导电图案的材质可以为ITO，或者Mo(钼)、Al(铝)、Ti(钛)、Cu(铜)等中的其中一种或多种混合。下面结合图3和图4所示的TFT对OLED器件20的结构进一步描述。
图3是图2所示的具有底栅型TFT的OLED器件的结构示意图。结合图3 所示，所述TFT层212包括依次形成于衬底基材211上的各层结构：栅极31、绝缘层(Gate Insulation Layer，又称GI层或栅极绝缘层)32、有源层33、由源极341和漏极342形成的源漏电极层、以及钝化层(Passivation Layer，PV层)35。
其中，栅极31、绝缘层32、有源层33、源极341、漏极342、以及钝化层35形成TFT层212中的TFT，鉴于栅极31位于有源层33的下方，所述OLED器件20可视为采用底栅型像素设计。
结合图2和图3所示，平坦层213覆盖于钝化层35上，TFT开设有贯穿钝化层35和平坦层213的过孔O 1，该过孔O 1暴露漏极342的上表面。有机发光单元24的阳极241填充所述过孔O 1并与所述漏极342接触，以此实现有机发光单元24与TFT的漏极342电连接。
应理解，所述TFT层212也可以采用顶栅型设计，基于该设计的TFT，可参阅现有技术，此处不再予以赘述。
图4是本申请一实施例的OLED器件的制造方法的流程示意图，图5是基于图4方法制造OLED器件的场景示意图。请参阅图4和图5，所述OLED器件的制造方法包括步骤S41～S45。
S41：提供基板。
如图5所示，所述基板50为TFT基板，其包括衬底基材51及位于衬底基材51上的TFT层52和平坦层53，TFT层52设置有栅极、源极、漏极、有源层等，平坦层53开设有暴露TFT层52的漏极的过孔。
其中，衬底基材51可以为玻璃基体、塑料基体或可挠式基体等透光基体。本申请对于TFT层52中TFT的结构设计和制造材料并不予以限定，例如，TFT可以采用底栅型设计，也可以采用顶栅型设计。
对于底栅型像素设计的TFT层52，本申请形成TFT的过程可以包括如下步骤：
首先，本申请可以采用PVD(Physical Vapor Deposition，物理气相沉积)方法在衬底基材51上形成一整面金属层，而后对所述一整面金属层进行图案化制程，从而仅保留预定区域的金属层，从而形成栅极。其中，图案化制程可以包括光阻涂布、曝光、显影、刻蚀等工艺，具体可参阅现有技术，此处不予以赘述。
然后，本申请可以采用CVD(Chemical Vapor Deposition，化学气相沉积) 方法形成覆盖栅极的一整面的绝缘层。该绝缘层的材质可以为硅氧化物(SiO x)，或者所述绝缘层包括依次覆盖栅极的硅氧化合物层和硅氮化合物层，例如SiO 2层和Si 3N 4(三氮化硅)层，进一步提高绝缘层的耐磨损能力和绝缘性能。
接着，本申请可采用CVD方法形成一整面有源层，而后对一整面有源层进行图案化制程，从而仅保留该一整面有源层的位于栅极上方的部分，即形成最终的有源层。当然，本申请也可采用CVD方法并结合具有预定图案的掩膜板，直接形成具有所述有源层。
最后，本申请可以采用与制造栅极原理相同的图案化制程工艺形成所述源极和漏极，并形成覆盖源极和漏极的钝化层。
于此，本实施例即可制得所需要的TFT。
平坦层53为覆盖于TFT之上的一整面结构，基于此，本申请可以采用CVD方法或Coating PI(涂层聚酰亚胺)材料方法形成所述平坦层53。进一步地，本申请可以采用刻蚀等方法使得所述平坦层53在TFT的漏极的上方形成暴露所述漏极的过孔。
S42：在所述基板上形成有机发光单元的阳极。
如图5所示，本申请可以采用包括光阻涂布、曝光、显影及刻蚀制程的图案化工艺形成所述阳极541。具体地，在所述平坦层53上形成一整面金属层，然后在金属层上涂布一整面光阻，而后采用光罩对一整面光阻的预定区域进行曝光，而其余区域的光阻由于光罩的遮挡而未曝光，曝光区域的光阻可以被显影去除，而未曝光区域的光阻被保留，然后对金属层进行刻蚀，未被剩余光阻遮挡的金属层被刻蚀去除，而被剩余光阻遮挡的金属层被保留，以此形成具有预定图案的阳极541。其中，该阳极541填充平坦层53的过孔并与TFT的漏极接触。
S43：在所述基板上形成像素界定层。
像素界定层55用于限定OLED器件的发光区，像素界定层55可以覆盖阳极541的一部分。本申请可以采用包括光阻涂布、曝光、显影及刻蚀制程的图案化工艺形成像素界定层55。
S44：在所述像素界定层上形成隔离层。
所述隔离层56仅覆盖像素界定层55的邻近有机发光单元54的部分，即，隔离层56仅覆盖像素界定层55外表面的一部分。当然，为了进一步提高隔水隔氧效果，隔离层56也可以全部覆盖像素界定层55的外表面。
本申请可以低温CVD工艺，或者采用包括光阻涂布、曝光、显影及刻蚀制程的图案化工艺形成所述隔离层56，又或者采用基于掩膜板的蒸镀工艺在所述像素界定层55上沉积形成所述隔离层56。
S45：在所述像素界定层所限定的发光区形成有机发光单元的其余层结构，包括发光层和阴极，所述隔离层位于像素界定层和有机发光单元之间。
本申请可以采用蒸镀工艺或者打印工艺形成所述发光层542和阴极543。当然，所述有机发光单元54还包括其他层结构，例如电子传输层、空穴传输层，这些未示出的层结构，可采用现有技术制得。
进一步地，本申请形成封装层571和挡墙572，以对前述步骤S41～S45形成的结构进行封装。具体地，挡墙572设置于平坦层53上且位于有机发光单元54的外围，封装层571设置于挡墙572上且与平坦层53相对间隔设置，封装层571、挡墙572和基板50围设成一密封空间，OLED器件20其余结构件位于该密封空间内。
本实施例的制造方法可用于制造与上述OLED器件20相同结构的OLED器件，因此具有与其相同的有益效果。
应理解，以上所述仅为本申请的实施例，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (16)

  1. 一种OLED器件，其中，所述OLED器件包括基板及位于所述基板上的像素界定层、隔离层和有机发光单元，所述像素界定层用于界定发光区，所述有机发光单元位于所述发光区，所述隔离层位于所述像素界定层和所述有机发光单元之间。
  2. 根据权利要求1所述的OLED器件，其中，所述隔离层全部覆盖所述像素界定层，或者仅覆盖所述像素界定层的邻近所述有机发光单元的部分。
  3. 根据权利要求1所述的OLED器件，其中，所述隔离层的制造材质为透明绝缘材料。
  4. 根据权利要求3所述的OLED器件，其中，所述隔离层为单层结构或者复合层结构。
  5. 根据权利要求1所述的OLED器件，其中，所述基板包括衬底基材以及位于所述衬底基材上的TFT层和平坦层，所述像素界定层、隔离层和有机发光单元均位于所述平坦层上，所述平坦层开设有暴露所述TFT层的漏极的过孔，所述有机发光单元的阳极填充所述过孔并与所述漏极接触。
  6. 一种OLED显示器，其中，所述OLED显示器包括OLED器件，所述OLED器件包括基板及位于所述基板上的像素界定层、隔离层和有机发光单元，所述像素界定层用于界定发光区，所述有机发光单元位于所述发光区，所述隔离层位于所述像素界定层和所述有机发光单元之间。
  7. 根据权利要求6所述的OLED显示器，其中，所述隔离层全部覆盖所述像素界定层，或者仅覆盖所述像素界定层的邻近所述有机发光单元的部分。
  8. 根据权利要求6所述的OLED显示器，其中，所述隔离层的制造材质为透明绝缘材料。
  9. 根据权利要求8所述的OLED显示器，其中，所述隔离层为单层结构或者复合层结构。
  10. 根据权利要求6所述的OLED显示器，其中，所述基板包括衬底基材以及位于所述衬底基材上的TFT层和平坦层，所述像素界定层、隔离层和有机发光单元均位于所述平坦层上，所述平坦层开设有暴露所述TFT层的漏极的过孔，所述有机发光单元的阳极填充所述过孔并与所述漏极接触。
  11. 一种OLED器件的制造方法，其中，所述方法包括：
    提供基板；
    在所述基板上形成有机发光单元的阳极；
    在所述基板上形成像素界定层；
    在所述像素界定层上形成隔离层；
    在所述像素界定层限定的发光区形成有机发光单元的其余层结构，包括发光层和阴极，所述隔离层位于所述像素界定层和所述有机发光单元之间。
  12. 根据权利要求11所述的方法，其中，采用包括光阻涂布、曝光、显影及刻蚀制程的图案化工艺形成所述隔离层，或者，采用基于掩膜板的蒸镀工艺在所述像素界定层上沉积形成所述隔离层。
  13. 根据权利要求11所述的方法，其中，所述隔离层全部覆盖所述像素界定层，或者仅覆盖所述像素界定层的邻近所述有机发光单元的部分。
  14. 根据权利要求11所述的方法，其中，采用透明绝缘材料形成所述隔离层。
  15. 根据权利要求14所述的方法，其中，所述隔离层为单层结构或者复合层结构。
  16. 根据权利要求11所述的方法，其中，所述基板包括衬底基材以及位于所述衬底基材上的TFT层和平坦层，所述像素界定层、隔离层和有机发光单元均位于所述平坦层上，所述平坦层开设有暴露所述TFT层的漏极的过孔，所述有机发光单元的阳极填充所述过孔并与所述漏极接触。
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