WO2013038911A1

WO2013038911A1 - Semiconductor device and infrared image-capturing device provided with same

Info

Publication number: WO2013038911A1
Application number: PCT/JP2012/071925
Authority: WO
Inventors: 邦幸奥山
Original assignee: 日本電気株式会社
Priority date: 2011-09-15
Filing date: 2012-08-23
Publication date: 2013-03-21
Also published as: JP5884997B2; JPWO2013038911A1; EP2757355A1; US9426388B2; US20140367573A1; EP2757355A4

Abstract

An infrared image-capturing device is formed by connecting, to a first and second input voltage wiring, a plurality of bolometer elements for receiving light form a subject, and a plurality of readout circuits connected to each of the plurality of bolometer elements. The readout circuit includes a bias circuit for providing a bias voltage to the corresponding bolometer element, a bias-canceling circuit for removing the offset electric current of the corresponding bolometer element, an integration circuit connected to a connection point of the bias circuit and the bias-canceling circuit and adapted for integrating the differential electric current of the bias circuit and the bias-canceling circuit, and a saturation-preventing circuit for preventing saturation of output voltage of the integration circuit.

Description

Semiconductor device and infrared imaging apparatus provided with the same

The present invention relates to a semiconductor device and an infrared imaging device including the same.

As an example of an infrared imaging device, a bolometer type infrared imaging device including a one-dimensional or two-dimensional sensor array and a readout circuit is known (Patent Document 1). An example thereof will be described with reference to FIG.
FIG. 4 partially shows a readout circuit and a two-dimensional sensor array in the bolometer-type infrared imaging device.
This infrared imaging device arranges thermoelectric conversion elements in a two-dimensional matrix, detects an infrared signal received by the thermoelectric conversion element for each thermoelectric conversion element, and outputs a detection signal as an electric signal. The infrared imaging apparatus receives a detection signal from a pixel switch 201 selected by a vertical shift register 205 via a scanning line 211, a horizontal switch 204, and a readout circuit 206 connected to the thermoelectric conversion element 202 via a signal line 203. Parallel processing is possible. Outputs of the plurality of readout circuits 206 are sequentially output from the output terminal 210 to the outside by the horizontal shift register 208.

Reference numerals

207 and 209 denote a multiplexer switch and an output buffer, respectively.
FIG. 5 shows the configuration of the read circuit in FIG. The readout circuit 101 includes a bias circuit 102 that applies a constant voltage to the bolometer element (thermoelectric conversion element) 105, a bias cancel circuit 103 that removes an offset current of components other than the signal of the subject, a bias circuit 102, and a bias cancel circuit 103. And an integration circuit 104 including an operational amplifier (hereinafter referred to as an integration operational amplifier) 111 connected to both of these circuits. The plurality of read circuits 101 are supplied with input voltages via the input voltage wirings 1 and 2 (106, 107), and execute read operations simultaneously in parallel.
The operation is roughly as follows. The change in resistance of each bolometer element 105 that occurs according to the intensity of infrared incident light from the subject is detected as the difference between the bolometer current determined by the input voltages VB1, VB2 (115, 121) and the bias cancellation current. The detected current difference is integrated by the integration circuit 104, and at the same time, current-voltage conversion is performed and output as a voltage value.
Specific operations of the bias circuit 102 and the bias cancel circuit 103 are as follows. First, the input voltages VB1 and VB2 are adjusted in a state where the shutter of the imaging device is closed (a state where light from the subject is not incident). Thereby, the current flowing through the bolometer element 105 and the current flowing through the bias cancel resistor 116 are balanced. Thereafter, by opening the shutter, it is possible to extract only the amount of current change that accompanies a change in resistance value of the bolometer element 105 due to light incident from the subject. Details of each circuit in FIG. 5 are shown below.
First, the bias circuit 102 includes an NMOS transistor (hereinafter referred to as a bias transistor) 108 whose source is connected to one end of the bolometer element 105, an input terminal connected to the input voltage wiring 1 (106), and an output terminal connected to the bias transistor 108. The source follower circuit 109 is connected to each gate. Since the bias transistor 108 is driven with a low impedance by the source follower circuit 109, it is possible to suppress the jumping noise of each readout circuit. The bias circuit 102 applies a constant voltage to each bolometer element 105. Thereby, the resistance value change of the bolometer element 105 is converted into a current value.
Furthermore, the VGS removal voltage generation circuit 1 (110) is a circuit that compensates for VGS (gate-source voltage) of both the bias transistor 108 and the source follower circuit 109, and the fluctuation voltage of VGS does not appear in the drain current. (Voltage fluctuation compensation) circuit configuration. More specifically, the VGS removal voltage generation circuit 1 (110) includes the same bias transistor 108, source follower circuit 109, and operational amplifier 114 as the bias circuit 102. Regarding the connection form, the source of the bias transistor 108 is connected to one end of the bolometer element 105, the gate of the bias transistor 108 is connected to the output terminal of the source follower circuit 109, and the drain of the bias transistor 108 is connected to + 5V. The operational amplifier 114 has its output terminal connected to the input terminal of the source follower circuit 109, the inverting input terminal (−) connected to the source of the bias transistor 108, and the non-inverting input terminal (+) connected to the input voltage VB1 (115). Has been.
Similarly, the bias cancel circuit 103 includes a resistor element (bias cancel resistor) 116 having a power source connected to one end, a PMOS transistor (hereinafter referred to as a canceller transistor) 117 having a source connected to the other end of the resistor element, and an input terminal having an input voltage. The wiring follower circuit 118 includes a source follower circuit 118 whose output terminal is connected to the gate of the canceller transistor 117.
Here, the infrared signal has a large offset component, and the signal component from the subject exists at a minute level on the offset component. Therefore, the bias cancel circuit 103 is configured for the purpose of removing the offset component. Further, since the canceller transistor 117 is driven with a low impedance by the source follower circuit 118, the jumping noise of each readout circuit 101 can be suppressed.
Similarly to the VGS removal voltage generation circuit 1 (110), the VGS removal voltage generation circuit 2 (119) is a circuit that compensates for VGS of both the canceller transistor 117 and the source follower circuit 118. More specifically, the VGS removal voltage generation circuit 2 (119) also includes the same bias cancellation resistor 116, canceller transistor 117, source follower circuit 118, and operational amplifier 120 as the bias cancellation circuit 103. Regarding the connection configuration, the source of the canceller transistor 117 is connected to one end of the bias cancel resistor 116, the gate is connected to the output end of the source follower circuit 118, and the drain is connected to + 5V. The operational amplifier 120 has its output terminal connected to the input terminal of the source follower circuit 118, the inverting input terminal (−) connected to the source of the canceller transistor 117, and the non-inverting input terminal (+) connected to the input voltage terminal VB2 (121). ing.
The drains of the bias transistor 108 and the canceller transistor 117 in the readout circuit 101 are connected to the inverting input terminal (−) of the integrating operational amplifier 111 and one end of the integrating capacitor 122 in the integrating circuit 104, respectively. The integration circuit 104 integrates the current change of the bolometer element 105 described above.
The other end of the integrating capacitor 122 is connected to the output terminal of the integrating operational amplifier 111, and the non-inverting input terminal (+) of the integrating operational amplifier 111 is connected to + 5V. As a result, the inverting input terminal (−) of the integrating operational amplifier 111, that is, the drains of the bias transistor 108 and the canceller transistor 117 are normally fixed at + 5V, respectively. The voltage of the integrating capacitor 122 after the integration is taken out from the output terminal of the integrating operational amplifier 111, and these are sequentially output from each readout circuit 101 as an output signal. Further, a reset switch 123 is provided between the inverting input terminal (−) and the output terminal of the integrating operational amplifier 111. After the integrated voltage is output from the integrating capacitor 122, the switch 123 is turned "ON", so that the voltage of the non-inverting input terminal (+) of the integrating operational amplifier 111 is set to + 5V.
A clip diode A (124) and a clip diode B (125) are connected to the inverting input terminal (−) of the integrating operational amplifier 111. These function so as to compensate for the excessive current when one of the current of the bolometer element 105 or the current on the bias cancel circuit 103 side becomes excessive and the output of the integrating operational amplifier 111 is saturated.
Next, the mechanism of the high temperature false signal and temperature drift will be described with reference to FIGS. 6A and 6B.
In FIG. 6A, since each input voltage wiring connected to a plurality of readout circuits is directly connected to a bias transistor or a canceller transistor, the influence of the voltage displacement inside the readout circuit when the input voltage is light incident from a high-temperature subject or the like. There is a problem that receives. Normally, the drain voltage of each of the above transistors is fixed to +5 V, but the voltage fluctuates when light from a high-temperature subject is incident on the bolometer element (thermoelectric conversion element). The resistance value of the bolometer element decreases due to light incident from a high-temperature subject. For this reason, when the current to the bolometer element increases, the integration operational amplifier along the path indicated by the arrow in the circuit on the right side of FIG. 6A at the moment when the reset switch RSTSW (switch 123 in FIG. 5) is “OFF” at the start of integration. A sudden current flows from the capacitor to the bolometer element. As a result, the imaginary short circuit of the operational amplifier collapses, and a voltage change occurs at the inverting input terminal (−) of the integrating operational amplifier (period t1 in FIG. 6B).
Thereafter, even when the output of the integrated operational amplifier saturates, the imaginary short of the operational amplifier collapses, and finally, the inverting input terminal (−) of the integrated operational amplifier drops from +5 V to about +4.3 V as the clip voltage (t1 in FIG. 6B). 'Period). When the voltage at the inverting input terminal (−) fluctuates, the voltage at the drain of the bias transistor or canceller transistor decreases. For this reason, the gate voltage also fluctuates due to the drain-gate parasitic capacitance of each transistor, and the voltage fluctuation of each input voltage wiring connected to the gate occurs.
For this reason, when light from a high-temperature subject is incident on some bolometer elements, all the readout circuits are connected via the input voltage wiring 1 and the input voltage wiring 2 due to the influence of the voltage fluctuation (jump noise) as described above. Displacement current is generated. The generated displacement current affects the output voltage of other bolometer elements to which light from a high-temperature subject is not incident.
As a countermeasure, the image pickup apparatus of Patent Document 1 uses a source follower circuit (109 and 118 in FIG. 5), and drives a bias transistor and a canceller transistor with low impedance, thereby suppressing fluctuations in gate voltage due to a high-temperature false signal.

JP 2008-22457 A

The bolometer type infrared imaging device has the following problems. By using a source follower circuit for the input of the bias transistor and the canceller transistor, each transistor is driven with a low impedance to prevent jumping noise due to a high-temperature subject or the like. Therefore, the area and power consumption for this source follower circuit are increased.
This problem is caused by the extremely small infrared signal, and the source follower circuit needs to realize low noise. Specifically, the source follower circuit needs to have a large area in order to reduce the influence of 1 / f noise, and to increase the mutual conductance gm of the transistor in order to reduce white noise. For this reason, the source follower circuit consumes a large amount of power. Since there are two such source follower circuits in each readout circuit, the area and power consumption of the entire chip increase.
The present invention is intended to realize low noise, small area, and low power consumption in a semiconductor device for an infrared imaging device.

According to an aspect of the present invention, a bolometer element that receives light from a subject, a bias circuit that applies a bias voltage to the bolometer element, a bias cancellation circuit that removes an offset current of the bolometer element, the bias circuit, and the bias One or more combinations of an integration circuit that is connected to a connection point of a cancellation circuit and integrates a difference current between the bias circuit and the bias cancellation circuit and a saturation prevention circuit that prevents saturation of the output voltage of the integration circuit are provided. A semiconductor device is provided.
According to another aspect of the present invention, a plurality of bolometer elements that receive light from a subject and a plurality of readout circuits connected to each of the plurality of bolometer elements are connected to the first and second input voltage wirings. An infrared imaging device is provided. The readout circuit is connected to a connection point between the bias circuit that applies a bias voltage to the corresponding bolometer element, a bias cancellation circuit that removes an offset current of the corresponding bolometer element, and the bias circuit and the bias cancellation circuit. An integration circuit that integrates a difference current between the bias circuit and the bias cancellation circuit; and a saturation prevention circuit that prevents saturation of an output voltage of the integration circuit.
According to still another aspect of the present invention, a plurality of bolometer elements that receive light from a subject and a plurality of readout circuits connected to each of the plurality of bolometer elements are connected to the first and second input voltage wirings. A bias circuit that applies a bias voltage to the corresponding bolometer element, a bias cancel circuit that removes an offset current of the corresponding bolometer element, and a connection between the bias circuit and the bias cancel circuit. There is provided a method for preventing output voltage saturation of the integration circuit in an infrared imaging device including an integration circuit that is connected to a point and integrates a difference current between the bias circuit and the bias cancellation circuit. In this output voltage saturation prevention method, the output voltage of the integration circuit is compared with a preset saturation prevention upper detection voltage, and when the output voltage of the integration circuit is higher than the saturation prevention upper detection voltage, the integration circuit is By disconnecting from the connection point, saturation of the output voltage of the integration circuit is prevented.

In the semiconductor device according to the present invention, the saturation prevention circuit prevents saturation of the output voltage of the integration circuit. As a result, the semiconductor device according to the present invention can achieve performance equivalent to that of a device including a source follower circuit with low noise, small area, and low power consumption even without a source follower circuit.
In the infrared imaging device according to the present invention, the saturation prevention circuit can prevent the saturation of the output voltage of the integration circuit, and can eliminate the voltage fluctuation component of the input voltage wiring due to a high-temperature subject or the like. Thereby, the infrared imaging device according to the present invention can eliminate the influence on the input voltage supplied to the other readout circuits operating in parallel, which is caused by the saturation phenomenon of the output voltage of the integration circuit, and uses the source follower circuit. It is possible to obtain a high temperature false signal prevention effect equivalent to the case. As a result, the infrared imaging device according to the present invention can realize low noise, small area, and low power consumption.

FIG. 1 is a diagram showing a configuration of a readout circuit in a bolometer-type infrared imaging device according to the first embodiment of the present invention.
FIG. 2 is a diagram showing a configuration of a readout circuit in a bolometer-type infrared imaging device according to the second embodiment of the present invention.
FIG. 3A is a circuit diagram for explaining an operation at the time of light incidence from a high-temperature subject in one of the readout circuits of FIG.
FIG. 3B is an output voltage and signal waveform diagram for explaining an operation at the time of light incidence from a high-temperature subject in one of the readout circuits of FIG. 3A.
FIG. 4 is a circuit diagram partially showing the bolometer-type infrared imaging device of Patent Document 1.
FIG. 5 is a diagram showing the configuration of the read circuit shown in FIG.
FIG. 6A is a circuit diagram for explaining a mechanism of a high-temperature false signal and temperature drift in the readout circuit shown in FIG.
FIG. 6B is a signal waveform diagram for explaining the mechanism of the high-temperature false signal and the temperature drift in the readout circuit shown in FIG. 6A.

(Configuration of the embodiment)
A configuration of a readout circuit according to the first embodiment of the present invention applied to a bolometer type infrared imaging apparatus is shown in FIG. Each readout circuit 301 includes a bias circuit 302 that applies a constant voltage to the bolometer element 305, a bias cancellation circuit 303 that removes an offset current of components other than the subject signal, an integration circuit 304 that integrates the subject signal, and an integration circuit 304. It comprises a saturation prevention circuit 309 that prevents output voltage saturation. The first input voltage wiring 1 (306) and the second input voltage wiring 2 (307) remove VGS using the input voltages VB1, VB2 (315, 321) as inputs, as in the circuit described in FIG. Although connected to the voltage generation circuits 1 (110) and 2 (119), illustration is omitted here.
Input voltage wirings 1 and 2 (306, 307) and a reset signal wiring 312 are commonly connected to each readout circuit 301, and each readout circuit 301 performs a readout operation simultaneously in parallel.
The bias circuit 302 includes an NMOS transistor (hereinafter referred to as a bias transistor) 308 whose source is connected to one end of the bolometer element 305, and applies a constant voltage to the bolometer element 305. Thereby, the resistance value change of the bolometer element 305 is converted into a current value.
The bias cancel circuit 303 includes a resistance element 316 having a power source (VDD) connected to one end and a transistor (hereinafter referred to as a canceller transistor) 317 having a source connected to the other end of the resistance element 316.
Here, the infrared signal has a large offset component, and the signal component from the subject exists at a minute level on the offset component. A bias cancel circuit 303 is configured for the purpose of removing the offset component.
The drains of the bias transistor 308 and the canceller transistor 317 are connected to the inverting input terminal (−) of the integrating operational amplifier 324 and one end of the integrating capacitor 322 in the integrating circuit 304 via the input separation switch 325. The integration circuit 304 integrates the current change of the bolometer element 305 described above. The other end of the integrating capacitor 322 is connected to the output terminal of the integrating operational amplifier 324. The non-inverting input terminal (+) of the integrating operational amplifier 324 is connected to the reference voltage (VDD / 2). Thereby, the inverting input terminal (−) of the integrating operational amplifier 324, that is, the drains of the bias transistor 308 and the canceller transistor 317 via the input separation switch 325 are normally fixed to the reference voltage (VDD / 2), respectively. The voltage of the integrating capacitor 322 after the integration is taken out from the output terminal of the integrating operational amplifier 324, and these are sequentially outputted from each readout circuit 301 as an output signal.
The saturation prevention circuit 309 compares the output voltage of the integration circuit 304 with a preset saturation prevention upper detection voltage (Vprev_sat_up), and controls the input separation switch 325 according to the comparison result. The saturation prevention circuit 309 disconnects the drains of the bias transistor 308 and the canceller transistor 317 (the connection point between them) and the input of the integration circuit 304 when the output voltage of the integration circuit 304 is higher than the saturation prevention upper detection voltage (Vprev_sat_up). As a result, the saturation prevention circuit 309 suppresses voltage fluctuation at the inverting input terminal (−) of the integrating operational amplifier 324 that occurs when the output voltage of the integrating operational amplifier 324 is saturated. More specifically, the saturation prevention circuit 309 includes a comparator 326 that compares the output voltage of the integration circuit 304 with the saturation prevention upper detection voltage (Vprev_sat_up). The saturation prevention circuit 309 also includes an SR latch 327 that holds the output of the comparator 326, and an input separation switch 325 that disconnects the drain of the bias transistor 308 and the canceller transistor 317 from the input of the integration circuit 304 by the output of the SR latch 327. Prepare.
The non-inverting input terminal (+) of the comparator 326 is connected to the output terminal of the integrating operational amplifier 324 and the integrating capacitor 322, and the inverting input terminal (−) of the comparator 326 is connected to the saturation prevention upper detection voltage (Vprev_sat_up). . The output terminal of the comparator 326 is connected to the set terminal (S) of the SR latch 327. The output of the comparator 326 becomes “High” when the output voltage of the integrating operational amplifier 324 exceeds the saturation prevention upper detection voltage (Vprev_sat_up).
The reset signal wiring 312 is connected to the reset terminal (R) of the SR latch 327, and the output terminal (Q) of the SR latch 327 is connected to the control terminal of the input separation switch 325. In the SR latch 327, when the set terminal (S) becomes “High” even for a moment while the reset terminal (R) is “Low”, the output terminal (Q) becomes “High” and the set terminal (S) becomes Even after returning to “Low”, the output terminal (Q) keeps “High”.
Similarly, when the reset terminal (R) becomes “High” for a moment while the set terminal (S) is “Low”, the output terminal (Q) becomes “Low” and the reset terminal (R) Even after R) returns to “Low”, the output terminal (Q) remains “Low”.
The input separation switch 325 is a single pole double throw (one circuit and two contacts), and the common terminal is connected to the drains of the bias transistor 308 and the canceller transistor 317. The contact 1 of the input separation switch 325 is connected to the inverting input terminal (−) of the integration operational amplifier 324 and the integration capacitor 322, and the contact 2 of the input separation switch 325 is connected to the reference voltage (VDD / 2). The control terminal is connected to the output terminal (Q) of the SR latch 327.
When the output terminal (Q) of the SR latch 327 is “Low”, the common terminal of the input separation switch 325 and the contact 1 are connected, and the current change of the bolometer element 305 flows to the integration circuit 304.
When the output terminal (Q) of the SR latch 327 is “High”, the common terminal of the input separation switch 325 and the contact 2 are connected, and the drains (the connection point between the bias transistor 308 and the canceller transistor 317) are connected to the reference voltage (VDD). / 2). For this reason, the input of the integration circuit 304 is disconnected from the connection point, and no current flows through the capacitor 322 of the integration circuit 304.
A reset switch (RSTSW) 323 is connected between the inverting input terminal (−) and the output terminal of the integrating operational amplifier 324. After the integrated voltage is output from the capacitor 322, the switch 323 is turned "ON" by the reset signal from the reset signal wiring 312, so that the output voltage of the integrating operational amplifier 324 is the reference voltage of the non-inverting input terminal (+). The voltage (VDD / 2) is set.
(Operation of the embodiment)
The outline of the operation of the first embodiment is as follows. A change in resistance value of each bolometer element 305 generated according to the intensity of infrared incident light from the subject is determined by input voltages VB1 and VB2 (not shown in FIG. 1, refer to FIG. 5) and a current of the bias cancel circuit 303. It is detected as a difference. The detected current difference is integrated by the integration circuit 304, and at the same time, is subjected to current-voltage conversion and output from the integration circuit 304 as a voltage value.
The saturation prevention circuit 309 detects the upper limit of the voltage value output from the integration circuit 304, and before the output voltage of the integration circuit 304 saturates, the input of the integration circuit 304 is input to the bias circuit 302 and the bias cancellation circuit by the input separation switch 325 Disconnect from 303 connection point.
Here, the SR latch 327 in the saturation prevention circuit 309 is provided to prevent chattering during the transition of the comparator 326. Therefore, when the influence of chattering is small, the SR latch 327 is not necessary.
Specific operations of the bias circuit 302 and the bias cancel circuit 303 are as follows. First, the input voltages VB1 and VB2 (see FIG. 5) are adjusted in a state where the shutter of the infrared imaging device is closed (the light from the subject is not incident), and the current flowing to the bolometer element 305 side and the bias cancel circuit 303 are adjusted. Balance the current flowing through Thereafter, when the shutter is opened, only the current change accompanying the change in the resistance value of the bolometer element 305 due to the light incident from the subject can be taken out.
The operation when light is incident from a high-temperature subject will be described in detail with reference to FIGS. 3A and 3B. In FIG. 3A, a readout circuit 301 connected to a bolometer element 305 to which light from a high-temperature subject is not incident, and a readout circuit 301-1 connected to a bolometer element 305-1 to which light from a high-temperature subject is incident. Is shown.
When the resistance temperature coefficient of the bolometer element is negative, the resistance value of the bolometer element 305-1 decreases due to the incidence of light from a high-temperature subject, and thus the current to the bolometer element 305-1 increases. At the moment when the reset switch RSTSW (switch 323-1) is “OFF” at the start of integration in the integration circuit 304-1, the capacitor 322 of the integration circuit 304-1 is taken along the path indicated by the arrow in the circuit on the right side of FIG. 3A. Current suddenly flows from -1 to the bolometer element 305-1. As a result, the imaginary short circuit of the integrating operational amplifier is destroyed, and the bias transistor 308-1 and the canceller transistor connected to the inverting input terminal (−) of the integrating operational amplifier 324-1 and the inverting input terminal (−) of the integrating operational amplifier 324-1. A voltage change (ΔV) occurs at the drain of 317-1 (the connection point between them) (period T1 in FIG. 3B).
The parasitic capacitance between the drain and gate of the bias transistor 308-1 and canceller transistor 317-1 is connected between the inverting input terminal (−) of the integrating operational amplifier 324-1 and the

input voltage wirings

1 and 2. For this reason, the voltage fluctuation of the inverting input terminal (−) of the integrating operational amplifier 324-1 is differentiated and appears in the input voltage wirings 1 and 2 ((−) ΔVS1 in FIG. 3B).
Here, as shown in FIG. 3B, the saturation prevention upper detection voltage (Vprev_sat_up) is set between the upper effective voltage and the upper saturation voltage of the output voltage of the integration circuit 304-1.
After that, when the output voltage of the integrating operational amplifier 324-1 reaches the saturation prevention upper detection voltage (Vprev_sat_up), the output of the comparator 326-1 of the saturation prevention circuit 309-1 becomes “High” and is connected to the comparator 326-1. The output of the SR latch 327-1 is also held at “High”. When the output of the SR latch 327-1 becomes “High”, the input separation switch 325-1 is connected to the common terminal (the drains of the bias transistor 308-1 and the canceller transistor 317-1) and the contact 2 (VDD / 2). The input of the integration circuit 304-1 is disconnected. Since the input of the integration circuit 304-1 is disconnected, the current from the capacitor 322-1 of the integration operational amplifier 324-1 does not flow. For this reason, the output voltage of the integrating operational amplifier 324-1 is fixed at the saturation prevention upper detection voltage (Vprev_sat_up), the inverting input terminal (−) of the integrating operational amplifier 324-1 is imaginary shorted, and returns to the reference voltage (VDD / 2). (Period T2 in FIG. 3B).
At this time, voltage fluctuations at the drains of the bias transistor 308-1 and the canceller transistor 317-1 are differentiated by the parasitic capacitance and appear in the input voltage wirings 1 and 2 ((+) ΔVS2 in FIG. 3B).
The voltage fluctuation of the drains of the bias transistor 308-1 and the canceller transistor 317-1 within the integration period changes from the reference voltage (VDD / 2) to ΔV, and further returns to the original reference voltage (VDD / 2). For this reason, the sum of the voltage fluctuation components of the input voltage wiring obtained by differentiating the voltage fluctuation is ± zero ((−) ΔVS1 + (+) ΔVS2 = 0 in FIG. 3B).
In the readout circuit 301 to which another bolometer element 305 to which light from a high-temperature subject is not incident is connected, the current generated by applying the voltage of the input voltage wiring is integrated by the integrating operational amplifier 324. Since the sum of the voltage fluctuation components of the input voltage wiring is zero, the integrated output voltage is not affected.
(Effect of embodiment)
The effect of the first embodiment is that performance equivalent to that provided with a source follower circuit as shown in Patent Document 1 can be obtained with low noise, small area, and low power consumption. The reason is that by using the saturation prevention circuit, the voltage fluctuation component of the input voltage wiring due to the high temperature subject or the like can be made zero, and the high temperature false signal prevention effect can be obtained. That is, the saturation prevention circuit prevents saturation of the output voltage of the integration circuit, thereby eliminating the influence on the input voltage supplied to other readout circuits operating in parallel, which is caused by the saturation phenomenon of the output voltage of the integration circuit. This is because it is possible to obtain a high-temperature false signal prevention effect equivalent to that when using a source follower circuit as disclosed in Patent Document 1.
Furthermore, since this saturation prevention circuit only controls the input separation switch, the noise of the comparator and latch does not appear in the output voltage after integration. Therefore, there is no need to increase the circuit area and power consumption to reduce noise, so that low noise, small area, and low power consumption can be achieved.
[Other Embodiments]
A second embodiment of the present invention will be described with reference to FIG. The second embodiment also shows the configuration of the readout circuit applied to the bolometer type infrared imaging device.
In FIG. 2, although the reference numbers are different, the configuration of the bias circuit 402, bias cancel circuit 403, and integration circuit 404 constituting the readout circuit 401, the bolometer element 405, the first input voltage wiring 1 (406), the first The connection relationship between the second input voltage wiring 2 (407) and the reset signal wiring 412 is the same as that in the first embodiment, and a description thereof will be omitted. Similarly to the first embodiment, the input voltage wiring 1 (406) and the input voltage wiring 2 (407) generate VGS removal voltages using the input voltages VB1, VB2 (315, 321) described in FIG. 5 as inputs. Although connected to the circuits 1 (110) and 2 (119), illustration is omitted.
In the circuit shown in FIG. 2, the saturation prevention circuit 409 includes a saturation prevention upper detection comparator (first comparator) 426 and a saturation prevention lower detection comparator for the purpose of preventing both high temperature false signals and low temperature false signals. 428 is used. In FIG. 2, the inverting input terminal (−) of the saturation prevention lower detection comparator (second comparator) 428 is the non-inversion of the output terminal of the integration operational amplifier 424, the capacitor 422, and the saturation prevention upper detection comparator 426 in the integration circuit 404. Connected to the input terminal (+). On the other hand, the non-inverting input terminal (+) of the saturation prevention lower detection comparator 428 is connected to the saturation prevention lower detection voltage (Vprev_sat_down).
Here, the saturation prevention lower detection voltage (Vprev_sat_down) is set between the lower effective voltage and lower saturation voltage (see FIG. 3B) of the output voltage of the integration circuit 404. The OR circuit 429 takes the logical sum of the output signal of the saturation prevention lower detection comparator 428 and the output signal of the saturation prevention upper detection comparator 426 and outputs the logical sum to the set terminal (S) of the SR latch 427. As in the first embodiment, the reset signal wiring 412 is connected to the reset terminal (R) of the SR latch 427.
With this configuration, when the output signal of the integrating operational amplifier 424 is lower than the saturation prevention lower detection voltage (Vprev_sat_down) or higher than the saturation prevention upper detection voltage (Vprev_sat_up), the drains of the bias transistor 408 and the canceller transistor 417 (both of them) Is connected to the reference voltage (VDD / 2), and the input of the integration circuit 404 is disconnected. For this reason, voltage fluctuation components of the first and second input voltage wirings 1 and 2 (406, 407) due to light incidence from a high-temperature subject and light incidence from a low-temperature subject can be reduced to zero. Low temperature false signal does not occur.
In general, since the energy is smaller as the subject temperature is lower, the integration circuit is less likely to be saturated in the case of a low-temperature subject, but the lower side saturation may occur depending on the gain of the integration circuit. In this case, in the first embodiment, the sum of the voltage fluctuation components of the input voltage wiring due to the lower saturation cannot be made zero, resulting in a low-temperature false signal. For this reason, although the circuit area slightly increases, the second embodiment in which the total of the voltage fluctuation components of the input voltage wiring due to the lower saturation can be made zero by adding a saturation detection lower detection comparator. preferable. In some cases, only lower saturation prevention may be used.
Although the present invention has been described with reference to a plurality of embodiments, the present invention is not limited to the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the spirit and scope of the present invention described in the claims.
This application claims the priority on the basis of Japanese application Japanese Patent Application No. 2011-201953 for which it applied on September 15, 2011, and takes in those the indications of all here.
A part or all of the above-described embodiment can be described as in the following supplementary notes, but is not limited thereto.
(Appendix 1)
A bolometer element that receives light from the subject;
A bias circuit for applying a bias voltage to the bolometer element;
A bias cancel circuit for removing the offset current of the bolometer element;
An integration circuit that is connected to a connection point between the bias circuit and the bias cancellation circuit and integrates a difference current between the bias circuit and the bias cancellation circuit;
A saturation prevention circuit for preventing saturation of the output voltage of the integration circuit;
A semiconductor device comprising:
(Appendix 2)
The semiconductor device according to attachment 1, wherein the saturation prevention circuit has a function of comparing an output voltage of the integration circuit with a preset saturation prevention upper detection voltage, and the output voltage of the integration circuit is the saturation prevention upper side. A semiconductor device which prevents the output voltage of the integration circuit from being saturated due to the high temperature of the subject by disconnecting the integration circuit from the connection point when the voltage is higher than a detection voltage.
(Appendix 3)
The semiconductor device according to attachment 2, wherein the saturation prevention circuit is inserted between a first comparator that compares the output voltage of the integration circuit and the saturation prevention upper detection voltage, and between the connection point and the integration circuit. And a switch connected and controlled to be turned on and off by the output of the first comparator.
(Appendix 4)
The semiconductor device according to appendix 3, wherein a latch portion is inserted and connected between the output of the first comparator and the switch.
(Appendix 5)
The semiconductor device according to attachment 2, wherein the saturation prevention circuit further has a function of comparing an output voltage of the integration circuit with a preset saturation prevention lower detection voltage, and the output voltage of the integration circuit is the saturation voltage A semiconductor device that prevents the output voltage of the integration circuit from being saturated due to the low temperature of the subject by disconnecting the integration circuit from the connection point when the voltage is lower than the lower detection voltage.
(Appendix 6)
The semiconductor device according to appendix 5, wherein the saturation prevention circuit includes a first comparator that compares an output voltage of the integration circuit and the saturation prevention upper detection voltage, an output voltage of the integration circuit, and the saturation prevention lower side. A second comparator for comparing a detection voltage; a logic circuit for calculating a logical sum of the outputs of the first and second comparators; and the logic circuit inserted between the connection point and the integration circuit. And a switch that is controlled to be turned on / off by the output of the semiconductor device.
(Appendix 7)
The semiconductor device according to appendix 6, wherein a latch portion is inserted and connected between the output of the logic circuit and the switch.
(Appendix 8)
An infrared imaging device in which a plurality of bolometer elements that receive light from a subject and a plurality of readout circuits connected to each of the plurality of bolometer elements are connected to first and second input voltage wirings,
The readout circuit is connected to a connection point between the bias circuit that applies a bias voltage to the corresponding bolometer element, a bias cancellation circuit that removes an offset current of the corresponding bolometer element, and the bias circuit and the bias cancellation circuit. An infrared imaging apparatus, comprising: an integration circuit that integrates a difference current between the bias circuit and the bias cancellation circuit; and a saturation prevention circuit that prevents saturation of an output voltage of the integration circuit.
(Appendix 9)
The infrared imaging device according to appendix 8, wherein the saturation prevention circuit has a function of comparing the output voltage of the integration circuit with a preset saturation prevention upper detection voltage, and the output voltage of the integration circuit is the saturation prevention circuit. An infrared imaging device that prevents the output voltage of the integration circuit from being saturated due to the high temperature of the subject by disconnecting the integration circuit from the connection point when the voltage is higher than the upper detection voltage.
(Appendix 10)
In the infrared imaging device according to appendix 9, the saturation prevention circuit includes a first comparator that compares an output voltage of the integration circuit and the saturation prevention upper detection voltage, and between the connection point and the integration circuit. An infrared imaging device comprising: a switch inserted and connected and controlled to be turned on and off by an output of the first comparator.
(Appendix 11)
The infrared imaging device according to appendix 10, wherein a latch portion is inserted and connected between the output of the first comparator and the switch.
(Appendix 12)
In the infrared imaging device according to appendix 9, the saturation prevention circuit further has a function of comparing the output voltage of the integration circuit with a preset saturation prevention lower detection voltage, and the output voltage of the integration circuit is An infrared imaging apparatus that prevents the output voltage of the integration circuit from being saturated due to the low temperature of the subject by disconnecting the integration circuit from the connection point when the detection voltage is lower than a saturation detection lower detection voltage.
(Appendix 13)
The infrared imaging device according to attachment 12, wherein the saturation prevention circuit includes a first comparator that compares an output voltage of the integration circuit and the saturation prevention upper detection voltage, an output voltage of the integration circuit, and the saturation prevention circuit. A second comparator for comparing the side detection voltage, a logic circuit for calculating the logical sum of the outputs of the first and second comparators, and being inserted and connected between the connection point and the integration circuit, An infrared imaging device comprising: a switch that is on / off controlled by an output of a circuit.
(Appendix 14)
The infrared imaging device according to appendix 13, wherein a latch portion is inserted and connected between the output of the logic circuit and the switch.
(Appendix 15)
A plurality of bolometer elements that receive light from a subject and a plurality of readout circuits connected to each of the plurality of bolometer elements are connected to first and second input voltage wirings, and the readout circuits correspond to each other. A bias circuit for applying a bias voltage to the bolometer element, a bias cancel circuit for removing the offset current of the corresponding bolometer element, and the bias circuit and the bias connected to a connection point of the bias circuit and the bias cancel circuit An integration circuit for integrating the difference current of the cancellation circuit, and an output voltage saturation prevention method for the integration circuit in an infrared imaging device,
By comparing the output voltage of the integration circuit with a preset saturation prevention upper detection voltage and disconnecting the integration circuit from the connection point when the output voltage of the integration circuit is higher than the saturation prevention upper detection voltage, the subject That prevents the output voltage of the integrating circuit from saturating due to the high temperature.
(Appendix 16)
The method according to claim 15, further comprising comparing the output voltage of the integration circuit with a preset saturation prevention lower detection voltage, and the integration circuit when the output voltage of the integration circuit is lower than the saturation prevention lower detection voltage. A method of preventing the output voltage of the integration circuit from being saturated due to the low temperature of the subject by disconnecting the circuit from the connection point.

101, 301, 401

Read circuit

102, 302, 402

Bias circuit

103, 303, 403 Bias cancel

circuit

104, 304, 404

Integration circuit

108, 308, 408

Bias transistor

117, 317, 417

Canceller transistor

122, 322, 422

Capacitor

123 , 323, 423

Reset switch

111, 324, 424 Integral

operational amplifier

309, 409

Saturation prevention circuit

325, 425

Input isolation switch

326, 426, 428

Comparator

327, 427 SR latch

Claims

A bolometer element that receives light from the subject;
A bias circuit for applying a bias voltage to the bolometer element;
A bias cancel circuit for removing the offset current of the bolometer element;
An integration circuit that is connected to a connection point between the bias circuit and the bias cancellation circuit and integrates a difference current between the bias circuit and the bias cancellation circuit;
A saturation prevention circuit for preventing saturation of the output voltage of the integration circuit;
A semiconductor device provided with one or more combinations.
2. The semiconductor device according to claim 1, wherein the saturation prevention circuit has a function of comparing an output voltage of the integration circuit with a preset saturation prevention upper detection voltage, and the output voltage of the integration circuit is the saturation prevention circuit. A semiconductor device, wherein the integration circuit is disconnected from the connection point when higher than an upper detection voltage.
3. The semiconductor device according to claim 1, wherein the saturation prevention circuit has a function of comparing an output voltage of the integration circuit with a preset saturation prevention lower detection voltage, and the output voltage of the integration circuit is A semiconductor device for preventing the integration circuit from being disconnected from the connection point when the saturation prevention lower detection voltage is lower.
An infrared imaging device in which a plurality of bolometer elements that receive light from a subject and a plurality of readout circuits connected to each of the plurality of bolometer elements are connected to first and second input voltage wirings,
The readout circuit is connected to a connection point between the bias circuit that applies a bias voltage to the corresponding bolometer element, a bias cancellation circuit that removes an offset current of the corresponding bolometer element, and the bias circuit and the bias cancellation circuit. An infrared imaging apparatus, comprising: an integration circuit that integrates a difference current between the bias circuit and the bias cancellation circuit; and a saturation prevention circuit that prevents saturation of an output voltage of the integration circuit.
5. The infrared imaging device according to claim 4, wherein the saturation prevention circuit has a function of comparing the output voltage of the integration circuit with a preset saturation prevention upper detection voltage, and the output voltage of the integration circuit is the saturation voltage. An infrared imaging device, wherein the integration circuit is disconnected from the connection point when the prevention upper detection voltage is higher.
6. The infrared imaging device according to claim 5, wherein the saturation prevention circuit includes a first comparator that compares an output voltage of the integration circuit and the saturation prevention upper detection voltage, and between the connection point and the integration circuit. And an on-off switch that is inserted and connected to the output of the first comparator.
7. The infrared imaging apparatus according to claim 6, wherein latch means is inserted and connected between the output of the first comparator and the switch.
The infrared imaging device according to claim 5, wherein the saturation prevention circuit further has a function of comparing an output voltage of the integration circuit with a preset saturation prevention lower detection voltage, and the output voltage of the integration circuit is An infrared imaging device, wherein the integration circuit is disconnected from the connection point when the saturation prevention lower detection voltage is lower.
9. The infrared imaging device according to claim 8, wherein the saturation prevention circuit includes a first comparator that compares an output voltage of the integration circuit and the saturation prevention upper detection voltage, an output voltage of the integration circuit, and the saturation prevention. A second comparator for comparing a lower detection voltage, a logic circuit for calculating a logical sum of the outputs of the first and second comparators, and being inserted and connected between the connection point and the integration circuit, An infrared imaging device comprising: a switch that is on / off controlled by an output of a logic circuit.
A plurality of bolometer elements that receive light from a subject and a plurality of readout circuits connected to each of the plurality of bolometer elements are connected to first and second input voltage wirings, and the readout circuits correspond to each other. A bias circuit for applying a bias voltage to the bolometer element, a bias cancel circuit for removing the offset current of the corresponding bolometer element, and the bias circuit and the bias connected to a connection point of the bias circuit and the bias cancel circuit An integration circuit for integrating the difference current of the cancellation circuit, and an output voltage saturation prevention method for the integration circuit in an infrared imaging device,
By comparing the output voltage of the integration circuit with a preset saturation prevention upper detection voltage, and disconnecting the integration circuit from the connection point when the output voltage of the integration circuit is higher than the saturation prevention upper detection voltage, the integration circuit A method of preventing the output voltage of a circuit from saturating.