WO2012023902A1

WO2012023902A1 - A flexible circuit and a method of producing the same

Info

Publication number: WO2012023902A1
Application number: PCT/SG2010/000303
Authority: WO
Inventors: Ravi Palaniswamy; Fong Liang Tan
Original assignee: 3M Innovative Properties Company
Priority date: 2010-08-18
Filing date: 2010-08-18
Publication date: 2012-02-23
Also published as: TW201215264A

Abstract

A structure comprising a flexible dielectric film supporting on at least one side a thermoplastic polyimide layer, and on it a conductive layer, is treated by an "semi- additive" process. The "semi-additive" process comprises forming a patterned photo¬ resist layer, filling gaps in the photo-resist layer with conductive material, removing the photo-resist and exposed portions of the laminated conductive layer, and covering the structure with a coverlay. The inventors have realized that the process of laminating the copper layer onto the thermoplastic polyimide layer roughens the surface of the thermoplastic polyimide layer, thus anchoring the copper layer to the polyimide, which means that when the conductive material is deposited into the gaps in the photo-resist, conductive bodies are formed which are strongly anchored to the thermoplastic polyimide layer, and which can be used as electrodes of a flexible circuit.

Description

A flexible circuit and a method of producing; the same Field of the Invention

The present invention relates to methods for producing flexible members, and in particular flexible circuits, such as ones which are suitable for use in printer heads.

Background of the Invention

A common method of forming a flexible circuit is referred to here as a "subtractive process". The starting material is a flexible dielectric layer covered by a layer of adhesive. Various apertures (such as die windows, sprocket holes, tooling holes etc) are formed in the dielectric layer by a punching process. A layer of copper is laminated onto the adhesive. Patterned photo-resist is formed on the copper. Then, the copper is etched through gaps in the photo-resist. Then the photo-resist is removed, leaving a pattern of circuitry ("electrodes"). Then a coverlay is adhered over the electrodes. Each electrode has the same thickness as the laminated copper layer. The thickness of the electrodes is sufficient for low current applications, but not for high current applications, such as printer heads.

Furthermore, following the etching, the electrodes tend to be trapezoidal in cross- section, tapering in the direction away from the flexible dielectric layer. This means that to achieve a given cross-sectional area with a given thickness of copper, the base of the electrodes must be wider than it would be if the electrodes were rectangular in cross- section. This makes it harder to achieve miniaturization. In one investigation it was found that the subtractive process produced electrodes having a thickness of about 30 μηι shaped such that, for their lowest 15 μηι , the angle between the surface of the dielectric layer and the sides of the electrodes was less than 70 degrees.

It is known for the starting material of the subtractive process to be a material known by the trade designation "UPISEL N", which is available commercially from Ube-Nitto Kasei Co. Ltd., Japan. One form of UPISEL N consists of a flexible dielectric substrate of the polyimide material known by the trade designation "UPILEX S", which is also available commercially from Ube-Nitto Kasei Co. Ltd., Japan, having a thickness of approximately 42 μηι and made from biphenyldicarboxylicacid dianhydride (BBDA) and phenyl diamine (PDA). The UPILEX S sheet is covered, on one or both sides, with approximately 4 pan thermoplastic polyimide layer, onto which a layer of copper has been laminated.

The copper on commercially available UPISEL N comes in a variety of thicknesses, e.g., 35 pm , 18 pan , 12 pan , and 3 pan . Using a subtractive etching process with the thicker copper layers would require the removal of a substantial amount of copper, which is inefficient and costly. Using a subtractive process with the 3 pan layer would result in electi des having no greater thickness than 3 pan . Such thin electrodes are only suitable for the production of products such as Liquid Crystal Displays (LCDs) and integrated circuit (IC) packaging for which electrodes of this thickness are acceptable. These problems make UPISEL N generally unsuitable for applications in which the electrodes must be thicker, so as to be capable of carrying a higher current. One example of such applications is in the head of a printer, for which electrodes of thickness at least 30 pan are typically required. This is not the only difficulty of providing acceptable printer head circuits. They must additionally be highly resistant to degradation from their harsh environment, particularly exposure to solvent based alkaline ink. There is increasing demand for printer head circuits which are able to operate in such an environment for long periods of time, such as 5-7 years.

Summary of the invention

The present invention aims to produce a new and useful flexible member, such as a flexible circuit.

One aspect of the invention provides that a structure comprising a flexible dielectric film supporting a thermoplastic polyimide layer on at least one side, and on it a laminated conductive layer, is treated by a "semi-additive" process. The semi-additive process comprises forming a patterned photo-resist layer, filling gaps in the photo-resist layer with conductive material, removing the photo-resist and exposed portions of the laminated conductive layer, and then adhering a coverlay onto the structure. The present inventors have realized that the process of laminating the conductive layer onto the thermoplastic polyimide layer roughens the surface of the thermoplastic polyimide layer as it conforms to the shape of the surface of the conductive layer during lamination, thus anchoring the conductive layer to the polyimide. This means that when the conductive material is deposited onto the conductive layer in the gaps in the photo-resist, conductive bodies are formed which are strongly anchored to the thermoplastic polyimide layer. These conductive bodies can be used as electrodes of the flexible circuit.

Experimentally, it was found that a semi-additive process permitted fabrication of electrodes with a thickness of over 35 μιη and an angle with the surface of the substrate, even measured over the bottom 17 μιη of the electrodes, of over 80 degrees. The higher angle means that miniaturization is more easily achieved.

Although the use of a semi-additive process for forming electrodes is not new, it has not previously been known to use this process when the starting material employs a thermoplastic layer. This meant that the electrodes formed were limited in thickness, since if they were too thick they tended to become separated from the flexible dielectric substrate in use. In other words, the possibility of forming electrode bodies of desired thickness by a semi-additive process, strongly anchored to the flexible dielectric via the rough thermoplastic polyimide layer, has not previously been realized.

An example of a structure on which the semi-additive process can be performed is the form of UPISEL N described above, which has a laminated layer of either rolled copper foil or electro-deposited copper foil. As noted, this material has not previously been used in a semi-additive process, and was designed for use in a subtractive process. Some previous applications of the semi-additive method have employed as a starting material a layer of a polyimide film available under the trade designation "KAPTON E" from DuPont, which does not include a thermoplastic layer. The present inventors have found that certain embodiments of the present invention have lower surface degradation than products formed using KAPTON E because the thermoplastic polyimide provides high resistance to hydrolysis. Furthermore, the embodiments of the present invention provide improved resistance to trace delamination due to corrosion caused by ink ingression. In fact, they provide superior dry and wet peel properties over known constructions with KAPTON E film, as well as less waviness and warpage and much better reliability. While the KAPTON E products may be suitable for many

applications, when more robust products are desired, embodiments of the present invention can provide an advantage.

The above summary of the present invention is not intended to describe each disclosed embodiment or every implementation of the present invention. The Figures and detailed description that follow below more particularly exemplify illustrative embodiments.

Brief description of the drawings

An embodiment of the invention will now be described for the sake of example only, with reference to the following figures, in which:

Figs. 1 A- IF illustrate steps of a method which is an embodiment of the invention; and

Fig. 2 is a flow diagram of the method of Figs. 1A-1F.

Detailed description

In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings that form a part hereof. The accompanying drawings show, by way of illustration, specific embodiments in which the invention may be practiced. It is to be understood that other embodiments may be utilized, and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the invention is defined by the appended claims.

An embodiment of the invention will now be described with reference to Figs. 1A-1F and 2.

As described below, the process involves a semi-additive process performed on a product illustrated in cross-sectional view in Fig. 1 A. The structure comprises a flexible dielectric substrate 1 , a thermoplastic polyimide (TPPI) layer 2 and a copper layer 3 laminated onto the TPPI layer 2. The lamination process is performed at a temperature of at least about 350 degrees C and produces surface roughness in the TPPI layer that is the negative image of the copper surface to which the TPPI layer is laminated. Before the lamination, the TPPI layer may have roughness on the nanometer level (for example, the upper surface of the layer may have a standard deviation from its mean level of less than lOOnm), but afterwards the roughness is on the micrometer level, which may be defined as having a standard deviation from its mean level of at least 0.5 pirn , and more preferably in the range 0.6 μιη and 3 μιη . The lower surface of the copper layer 3 may have a nodular structure with the same, or a different, degree of roughness.

Such a structure can be produced using the commercially available SR and SE series of the product UPISEL N available under the trade designation SE0320YSB or

SE0320MSH which include a structure similar to that shown in Fig. 1 A. That is, a flexible polyimide dielectric substrate is covered on one side with a TPPI layer, onto which a rolled or electro-deposited copper foil layer of thickness 3 μτη has been laminated. However, in some forms the laminated copper layer is covered by a thick copper carrier layer.

If the UPISEL N has a carrier layer, this carrier layer is removed in a first processing step shown as step 1 1 of Fig. 2, to form the structure of Fig. 1 A. In this case, the layer 3 typically has a thickness of 3 μη , and the roughness of the TPPI layer 2 is between 0.6 j in and 3 μ^ηι . This is the standard deviation of portions of the interface from the average level of the interface. It can also be termed the "nominal thickness" of the nodules on the laminated rolled copper foil layer. In different versions of UPISEL N the nominal thickness of the nodules is different, depending upon the intended application. Note that another form of UPISEL N exists in which the flexible polyimide dielectric substrate is covered on both sides by, in order, a TPPI layer, a laminated copper layer, and a thick copper earner layer that form a multilayer structure. Again, the laminated copper layer has a nodular structure. The nominal thickness of the nodules need not be the same on both sides of the structure. This form of UPISEL N can also be employed in the present invention. Specifically, the processing steps described below can be performed as desired on either or both of the sides of the structure. Before performing the processing steps described below on either of the sides of the structure, the copper carrier layer is removed from that side of the structure. Before or after the semi-additive process, apertures (die windows, sprocket holes, tooling holes etc) may be formed in the structure, but that process, which may be canied out using a conventional punching procedure, or otherwise, will not be described further here. In a processing step 12 of Fig. 2, photo-resist 4 is deposited and patterned over the laminated copper layer 3. to give the structure of Fig. I B.

In step 13 of Fig. 2, copper is deposited by electroplating to a desired thickness, e.g., 40 μη in the illustrated embodiment, into the gaps in the photo-resist 4, covering the thin copper layer 3 in the regions where it is exposed, as shown in Fig. 1 C. The deposited copper 5 is joined to the laminated copper layer 3.

In step 14 of Fig. 2, the photo-resist 4 is then removed, exposing parts of the thin copper layer 3, as shown in Fig. I D.

In step 15, the exposed portions of the thin copper layer 3 are etched away, thus exposing corresponding portions of the roughened TPPI layer. The upper portion of deposited copper 5 is also inadvertently etched away. This produces the structure of Fig. IE, in which the TPPI layer is indicated as layer 7 having an exposed rough upper surface in the portions marked by shading. The remaining portions of the copper layer 3 and the deposited copper 5 overlying them together form bodies 6 of copper which have a desired thickness and are well-fixed to the TPPI layer 7 due to the nodular teeth of the lower surface of the bodies 6.

In step 16, an adhesive 8 and cover film 9 are then laminated over the structure, together forming a coverlay. The structure is then cured. This gives the structure of Fig. IF. The coverlay, like the remaining copper, is strongly retained on the rough TPPI layer 7. The coverlay may be a Elephane CL-XU4013 from Tomoegawa Industries Ltd in which the adhesive 8 is a polyamide/phenolic adhesive of thickness 40 μιη and is coated on a cover film 9 of UPILEX SN which UPILEX SN films are available from Ube-Nitto Kasei Co. Ltd. and which have a thickness of 13 pan prior to the lamination.

Examples

This invention is illustrated by the following examples, but the particular materials and amounts thereof recited in these examples, as well as other conditions and details should not be construed to unduly limit this invention.

Examples 1-5 (Ex. 1-5)

Ex. 1-5 were made from a 20" (50.80cm) width x 50m length section of UPISEL N available under the trade designation SE0320YSB from Ube-Nitto Kasei Co. Ltd. The section of UPISEL N was first slit into 13.4" (34.04cm) width strips. Following removal of the 18 μη copper carrier layer, apertures were formed in the UPISEL N by a punching process. It was then subjected to a semi-additive process on one of its two sides in the same manner as described above. After the photo-resist was applied and patterned, about 45 pan of copper was electro-deposited onto the exposed portions of the laminated copper. After the photo-resist was removed, the exposed portions of the laminated copper layer were etched away, to give electrodes of thickness of about 35 μηι between exposed portions of the TPPI layer. As determined with a scanning electron microscope the electrodes had a generally rectangular cross-section, and the angles between their side-walls and the surface of the TPPI layer was about 81.4 degrees. The UPILEX S has a relatively small coefficient of thermal expansion compared to the copper, which means that it experiences little heat shrinkage, giving good dimensional stability.

Comparative Example A (C.E. A)

C. E. A was made using a 14" (35.56cm) width x 50m roll of KAPTON E having a thickness of 50 μπι as the starting material. KAPTON E is a flexible polyimide material, but does not carry a surface layer of thermoplastic polyimide. The KAPTON E was processed by first seeding a 2-20nm thin chrome (Cr) tie layer onto one face of the KAPTON E by vacuum deposition, then depositing a thin copper layer of thickness about lOOnm onto the tie layer by vacuum deposition to form a conductive surface. The substrate was then subjected to electroplating to build up the thin copper layer to a thickness of about 3 μιη . This provided a structure similar to the UPISEL N starting material of Ex. 1-5. The structure was then subjected to a semi-additive process in the same manner as Ex. 1-5., in which about 45 μιη of copper were electro-deposited using a patterned photo-resist. Then after the photo-resist was removed, the exposed portions of the 3 μη copper layer and the underlying nodular copper layer was etched away. This resulted electrodes of thickness 35 μιη between exposed portions of the polyimide layer. The 14" (35.56cm) web was then slit down into 7cm width strips and it was then cut into individual patterned circuits.

It was found that when C.E. A was subjected to an ink vapor test in which the circuit samples were suspended in a sealed vessel in a space above alkaline liquid ink at an elevated temperature of 100 degrees C for 3days, the corroded copper ions readily form copper complexes with chelating compounds present in the ink and the resulting complex catalysis leads to opening of polyimide rings in the KAPTON E. This causes the degradation of the polyimide surface and copper trace delamination. Examples 6-10 (Ex. 6-10) and Comparative Example B (C.E. B

Ex. 6-10 and C.E. B were made, respectively, by applying a coverlay material made of a 13 μτη thickness of UPISEL SN cover layer and 40 μη adhesive layer, available under the trade designation Elephane CL-XU 4013 from Tomoegwawa Co. Ltd. Japan, to Ex. l-5 and C.E. A.

The coverlay was cut into pieces with respective pattern by a die cut method and was pre-tacked by placing the individual pieces of coverlay manually onto the individual circuit in a 7cm width roll and pressed down using heated flat pins (about 160 degrees C) for about 4secs. Lamination of the pre-tacked coverlay onto the circuits were carried out by applying a pressure of about 200psi (pounds per square inch) (1.38x10° Nm^"2) at about 180 degrees C temperature for about 6secs.

The laminated circuits in a 7cm width reel form were then subjected to a curing process. The curing profile was employed with heating from 30 degrees C to 90 degrees C with increments of 10 degrees C per minute and allowed to stay at about 90 degrees C for about 60mins and then ramped up to 180 degrees C by increments of 10 degrees C per minute. After allowing the circuits to maintain at a temperature of about 1 SO degrees C for about 2hrs, the temperature was slowly reduced to 30 degrees C over a period of 2hrs.

The coverlay laminated resulting circuits were cut into individual circuits of 48mm x 27mm and subjected to an ink vapor test in which the circuit samples were suspended in a sealed vessel in a space above alkaline liquid ink at an elevated temperature of 100 degrees C for 3 days.

In C.E. B, delamination occurred at the interfaces (i) between the adhesive of the coverlay and the APTON E polyimide layer thereby the copper traces lift off from the polyimide surface, and (ii) between the adhesive and the cover film in the coverlay. However, unlike in C.E. B, in Ex. 6-10 of the invention, delamination only occurred at the interface between the adhesive and the cover film in the coverlay. No delamination was observed at the interface between the adhesive of the coverlay and thermoplastic polyimide layer of the UPISEL N. It is believed this is due to higher peel strength imparted, at least in part, by the strong bond between the roughened TPPI layer and the adhesive of the coverlay. The ink vapor test is particularly significant, because it is believed that the ink vapor ingress is responsible for the delamination of the coverlay in C.E. B.

Pieces of Ex. 6-10 and C.E. B, 0.125" (0.32cm) wide and 48mm long, were also subjected to a standardized "peel test", in which the coverlay was gradually peeled away from the underlying layer(s) using an applied load of 10N and at a speed of 2"/min (5.1cm/min). The portion of the coverlay which had been removed at each stage was held at an angle of 90 degrees from the plane of the circuit. The results are shown in Table 1.

The results in Table 1 labeled "dry peel test" were from performing the above-described standardized peel test on samples that had not been subjected to treatment by ink.

The results in Table 1 labeled "wet peel test" were from performing the standard peel test on samples that had been immersed in alkaline liquid ink for 3days at a temperature of 85 degrees C.

For each of these two tests, Table 1 shows the results for Ex. 6-10, and their average result. The results for C.E. B are the average of 5 samples. The numbers in Table 1 are the peel strength, measured in pounds (lbs) (one pound is 4.45N).

Table 1

The results revealed that in both the dry and wet peel cases, the embodiments of the invention yielded higher peel strength than the KAPTON E based comparative example. Most importantly, the failure mode for the embodiments of the invention occured between the adhesive and the cover film of the coverlay, showing the strong bonding strength between the adhesive and TPPI layer due to the higher roughness created by the nodular copper. Example 1 1 (Ex. 1 1 ) and Comparative Example C (C.E. C)

Ex. 1 1 was made by taking a 10cm x 48mm section of UPISEL N available under the trade designation SE0320YSB, completely removing the laminated copper layer, and laminating a coverlay Elephane CL-XU4013 from Tomoegawa Industries Ltd where the coverlay consists of a polyamide/phenolic adhesive of thickness 40

coated on a cover film of 13 μιη UPILEX SN where UPILEX SN films are available from Ube- Nitto Kasei Co. Ltd. The lamination of the coverlay onto the TPPI layer, after the copper is removed completely from the UPISEL N substrate, was done by applying pressure of about 200psi (1.38x10 Nm^'') at a temperature of about 180 degrees C for about 6secs.

The laminated structures were then subjected to a curing process. The curing profile was employed with heating from about 30 degrees C to about 90 degrees C with increments of 10 degrees C per minute and allowed to stay at about 90 degrees C for about 60mins. The temperature was later ramped up to about 180 degrees C by increments of 10 degrees C per minute. After allowing the temperature to stay at about 180 degrees C for about 2hrs, the laminated structures were then slowly cooled to about 30 degrees C over a period of 2hrs.

C.E. C was made by taking a 0.51 cm x 48mm section of KAPTON 2E known as KAPTON 200E available from DuPont and directly laminating the coverlay to it in the same manner as for Ex. 1 1, and then curing the structure in the same manner as for Ex. 1 1.

Both Examples were subjected to the standardized peel test described above for Ex. 1 -5 and C.E. A. Because the structures had no circuits, the test on these structures is referred to as a coupon level peel test. Ex. 1 1 had a coupon level peel in the dry peel test of 3.11 lbs, so it was very difficult to peel. C.E. C had a coupon level peel in the dry peel test of 0.551bs. Each of these results is the average peel strength for three samples. Again, this demonstrates the greater peel strength provided by the rough polyimide surface of the UPISEL N.

Although specific embodiments have been illustrated and described herein for purposes of description of the preferred embodiment, it will be appreciated by those of ordinary skill in the art that a wide variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the preferred embodiments discussed herein. Therefore, it is manifestly intended that this invention be limited only by the claims and the equivalents thereof.

Claims

1. A method of forming a flexible member, the method employing a structure which comprises (i) a flexible dielectric film (1) having a first surface, (ii) a

thermoplastic polyimide layer (2) carried on the first surface of the dielectric film (1), and (iii) a conductive layer (3) laminated onto the thermoplastic polyimide layer thereby roughening the thermoplastic polyimide layer,

the method comprising:

forming a patterned photo-resist layer (4) on the conductive layer;

depositing one or more elements of conductive material (5) into gaps defined by the photo-resist layer;

removing the photo-resist layer;

removing exposed portions of the conductive layer (3), the remaining portions of the conductive layer and the elements of conductive material forming conductive leads (6); and

forming a coverlay (8, 9) over the conductive leads, the conductive leads being sandwiched between the thermoplastic polyimide layer and the coverlay (8, 9).

2. A method according to claim 1, the electrodes having a thickness of at least 30 μη in a direction transverse to the first surface of the dielectric film.

3. A method according to claim 1 or claim 2 further comprising forming a plurality of holes in the flexible member, and dividing the flexible member into a plurality of flexible circuit elements.

4. A method according to claim 3 in which each flexible circuit element is a flexible circuit element for a print head assembly.

5. A flexible circuit element formed by a method according to claim 3 or claim 4.

6. A method of forming a flexible member comprising: forming a thermoplastic polyimide layer (2) on a first surface of a flexible dielectric film (1);

laminating a conductive layer (3) onto the thermoplastic polyimide layer, thereby roughening the thermoplastic polyimide layer;

forming a patterned photo-resist layer (4) on the conductive layer;

depositing one or more elements of conductive mateiial (5) into gaps defined by the photo-resist layer;

removing the photo-resist layer;

removing exposed portions of the conductive layer, the remaining portions of the conductive layer and the elements of conductive material forming conductive leads

(6) ; and

forming a coverlay (8, 9) over the conductive leads, the conductive leads being sandwiched between the thermoplastic polyimide layer and the coverlay.

7. A method according to claim 6 in which during the step of laminating the conductive layer onto the thermoplastic polyimide layer, the surface roughness of the polyimide layer becomes a value in the range 0.6 μι to 3 μιη .

8. A flexible circuit element comprising:

a flexible dielectric film (1) having a first surface;

a thermoplastic polyimide layer (7) bonded to the first surface of the dielectric film;

a plurality of conductive leads (6) bonded to the thermoplastic polyimide layer

(7) and upstanding from the thermoplastic polyimide layer, the conductive leads comprising a lower portion laminated onto the thermoplastic polyimide layer and an upper portion formed on the lower portion, the conductive leads having side surfaces extending at an angle of at least 80 degrees to the first surface of the dielectric film, and extending to a distance of at least 30 μιη from the thermoplastic polyimide film;

a coverlay (S, 9) formed over the plurality of conductive leads, the plurality of conductive leads being sandwiched between the coverlay and the thermoplastic polyimide layer.

9. A print head assembly comprising a flexible circuit element according to claim 8.