WO2006070299A1

WO2006070299A1 - Method and apparatus for synchronization control of digital signals

Info

Publication number: WO2006070299A1
Application number: PCT/IB2005/054253
Authority: WO
Inventors: Gang Wang; Jin Wang
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2004-12-28
Filing date: 2005-12-15
Publication date: 2006-07-06

Abstract

A method for processing at least two digital signal steams synchronously, including steps of: (a) processing a first digital signal stream; (b) processing a second digital signal stream, said second digital signal stream being shorter than said first digital signal stream; and (c) discarding portions of the first digital signal stream excess the second digital signal stream when said second digital signal stream is completely processed. The application also discloses an apparatus for processing at least two digital signal steams synchronously. According to the present invention, problems as chaos in Synchronization Control due to the different lengths of source signals can be solved smoothly without restarting the Synchronization Control system or even the total system.

Description

METHOD AND APPARATUS FOR SYNCHRONIZATION CONTROL OF DIGITAL SIGNALS

FIELD OF THE INVENTION The present invention relates to a method and apparatus for signal processing, and more particularly to a method and apparatus for Synchronization Control of digital signals.

BACKGROUND OF THE INVENTION Presently, digital signals from two or more channels need to be controlled synchronously in many electronics, for example, Synchronization Control of MPEG-2 decoded audio/video, Synchronization Control of base layer stream signals and enhancement layer stream signals produced by a spatial dual layer compressing system, etc. In addition, in multimedia communications, Synchronization Control is used to process multiple temporarily relevant media streams simultaneously, such as the sound/image synchronization between the voice stream (audio) and the movement of the mouth of the speaker (video).

In some applications using scalable coding technique of MPEG-2, Synchronization Control is used to process multiple MPEG2 streams with relevant contents. In such applications, a data stream is separated into two or more data streams (layers) at the encoding side, and at the decoding side, the relevant data streams are combined to form a single signal with high quality. For example, a spatial dual layer video compressing method described in W.H.A.Bruls and e.t., a spatial dual layer video compression method allowing for dynamic resolution control, IEEE Trans, on Consumer

Electronics, June, 2002 applies such a principle.

Fig.l shows this spatial dual layer video compressing method schematically. As shown in Fig.l, a source signal is separated into a base layer stream signal and an enhancement layer stream signal by a MPEG-2 encoder at the encoding side. The base layer stream signal provides a video signal with low quality, and the enhancement layer stream signal provides additional information for enhancing the base layer video. At the decoding side, the base layer stream signal and the enhancement layer stream signal will be decoded by a MPEG-2 decoder and then combined to form an output signal stream. During decoding the base layer stream signal and the enhancement layer stream signal, Synchronization Control is needed.

Fig.2 shows a conventional apparatus for processing two digital signals synchronously. The apparatus 200 for processing two digital signals synchronously comprises two processing modules 210, 220, and a synchronization control unit 230.

The unit 230 controls the processing modules 210 and 220 based on specific algorism, transfers the relevant processed data units (e.g. relevant decoded audio/video frame data) of the first source signal 240 and the second source signal 250 to subsequent processing module 260 for further processing at appropriate times. Generally, the processing modules 210 and 220 have two statuses, i.e. processing status and idle status. While no source signals received, the processing modules 210 and 220 stay in idle status. Once a source signal received, the processing modules 210 and 220 switch into processing status and start to process a data unit (e.g. a data frame of a video signal) of the source signal. For example, when the processing modules 210 receives the first source signal

240, its status transfers from idle to processing, and starts to process the first data unit of this first source signal 240. When the processing to the first data unit is completed, the status transfers back into idle.

The operation of the processing module 220 is similar to that of the module 210.

The unit 230 controls when to send the processed first data unit to the subsequent processing module 260.

After the first data units of the first source signal 240 and the second source signal 250 are processed by the processing modules 210 and 220 respectively, the unit 230 will control the processing modules 210 and 220 to send the processed first data units to the subsequent processing module 260. If the processing module 210 or the processing module 220 receives a second data unit of the first source signal 240 or the second source signal 250, its state will become processing status and start to process the second data unit. However, even if the control algorism itself has no problem, synchronization chaos may occur in the case that input first source signal 240 and second source signal 250 have different length. The prior art tends to focus attention to the Synchronization Control algorism for the Synchronization Control of such digital signals e.g. how the synchronization control unit 230 can control each processing module efficiently and effectively so that the total system operates appropriately.

OBJECT AND SUMMARY OF THE INVENTION

One object of the present invention is to provide a method and apparatus for processing at least two digital signal streams synchronously to prove the problem caused by difference length of source signals. And chaos in Synchronization Control due to the difference length of source signals can be avoided without restarting the

Synchronization Control system.

To this end, in one aspect of the present invention, there provides a method for controlling at least two digital signal streams synchronously, comprising the steps of: processing a first digital signal stream; processing a second digital signal stream, the second digital signal stream being shorter than the first digital signal stream; and discarding portions of the first digital signal stream excess the second digital signal stream when the second digital signal stream is completely processed.

In another aspect of the present invention, there provides an apparatus for controlling at least two digital signal streams synchronously, comprising: a first processing means for processing a first digital signal stream; a second processing means processing a second digital signal stream which is shorter than the first digital signal stream; wherein the second processing means further comprises a discarding means for discarding the portion of the first digital signal stream excess the second digital signal stream after the second digital signal stream have been processed. According to the present invention, problems as chaos in Synchronization

Control due to the different lengths of source signals can be solved smoothly without restarting the Synchronization Control system or even the total system.

The above and other objects, characteristics, and advantages of the present invention will become more apparent from the detailed description with reference the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS: Fig.l is schematic diagram showing the conventional coding and decoding of spatial dual layer video data;

Fig.2 schematically shows a conventional apparatus for processing two digital signal streams synchronously; Fig.3 shows the case where the lengths of a base layer stream signal and an enhancement layer stream signal of a spatial dual layer compressing system are different;

Fig.4 shows the schematic diagram of an apparatus for controlling at least two digital signal streams synchronously according to the first embodiment of the present invention; and

Fig.5 shows the flow chart for controlling at least two digital signal streams synchronously according to the first embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION: Now embodiments of the invention will be described in more detail with reference to the drawings.

Fig.3 shows the case where the source signals are base layer stream signals and enhancement layer stream signals of a spatial dual layer compressing system, and the lengths of the signals are different. In Fig.3, references Bl and El indicate the base layer stream signals and enhancement layer stream signals of the spatial dual layer compressing system respectively. The base layer stream signal Bl and enhancement layer stream signal El are content-relevant code streams, and the object of synchronously controlling the decoding is that only when all the corresponding frames have been decoded by the MPEG2 decoder, could the two decoded frame data be transferred to the subsequent processing module for processing (i.e. multiplying, frequency mixing). After that, the dual MPEG-2 decoders (corresponding to processing module 101 and processing module 103) may start to decode next frame of each layer stream signal.

As shown in Fig.3, the base layer stream signal Bl includes a first frame data BI l, a second frame data B 12, ..., and a Nb^th frame data BlNb, and the enhancement layer stream signal El includes a first frame data El l, a second frame data E 12, ..., and a Ne^th frame data ElNe. Accordingly, the frame numbers of the base layer stream signal Bl and enhancement layer stream signal El are Nb and Ne respectively, and Nb>Ne. When the base layer stream signal Bl and enhancement layer stream signal El are sent to the dual MPEG-2 decoders for decoding, their first to Ne^th frame data matches finely until decoding of the enhancement layer stream signal is completed. Because Synchronization Control is conducted, the decoder will stop decoding the base layer stream signal Bl upon decoding of the enhancement layer stream signal is completed.

When the base layer stream signal B2 and enhancement layer stream signal E2 are sent to the dual MPEG-2 decoders, the dual MPEG-2 decoders will continue to decode the remained frames of the base layer stream signal Bl and start to decode the enhancement layer stream signal E2. Thus, some preceding frames of the enhancement layer stream signal E2 will correspond to some succeeding frames of the base layer stream signal Bl, which will cause errors in the final output videos.

In Fig.3, reference O indicates the synchronization between two corresponding frames of the base layer stream signal Bl and enhancement layer stream signal El respectively is fine, and reference X indicates chaos in the synchronization between two corresponding frames of the base layer stream signal Bl and enhancement layer stream signal El (E2) respectively.

It can be seen that from the first frame E21 of the enhancement layer stream signal E2 on, chaos occurs in the synchronization between frames of the base layer stream signals Bl, B2 and corresponding frames of the enhancement layer stream signal E2.

The reason for this may be various, and based on the environment where the chaos occurs, the reason can be classified into three types:

Firstly, due to source side. Lengths of two or more source signals generated at the source side are different. For example, in a spatial dual layer video compressing system, the numbers of frames included in a base layer stream signal and an enhancement layer stream signal generated at the encoding side may be different due to wrong configuration;

Secondly, due to intermediate tache. Sources may be damaged while transferred to the processing modules through intermediate taches. For example, data packages may be lost due to bad network condition while source signals are transferred through a wired/wireless network. Source signals can be stored in a storage medium (e.g. hard disk, CD-ROM, or DVD-ROM) after generated at the source side. Partially damage of the storage medium may also cause some data of the source signal lost;

Thirdly, due to processing modules. The lengths of two or more input signals are absolutely same, but the same lengths may become different after processed by a hardware or software. For example, in a spatial dual layer video compressing system, the respective number of the frames of the two data streams generated at the encoder are really the same, but when the two data streams are decoded at the decoder side, their lengths may become different.

One solution to this problem is to stop processing the remained portion of the longer source signal when the shorter source signal has been completely processed. In most situations, this may be achieved by resetting the synchronization system or even the overall system. For example, the decoding process can be stopped, and than restarted, or the decoding hardware may be reset. The disadvantage of this is that the operation of the synchronization system or even the overall system will be influenced. Additionally, user may get confused due to not aware of the situation during resetting the overall system.

Fig.4 shows the schematic diagram of an apparatus for controlling at least two digital signal streams synchronously according to the first embodiment of the present invention. In the apparatus shown in Fig.4, only two source signals are shown in view of simplicity.

As shown in Fig.4, apparatus 400 for controlling at least two digital signal streams synchronously according to the first embodiment of the present invention comprises a first processing module 410, a second processing module 420, and a synchronization control unit 430.

The first processing module 410 comprises a first processing executing module 412, a first notifying module 414 and a first discarding module 416. To facilitate the implementation of the present invention, the first processing module 410 is set with three status, i.e. idle status, processing status, and consuming status. When there is no source signal entering the first processing module 410, the first processing module 410 remains in idle status. Once the first processing module 410 receives a first source signal 440, its state transits into processing status, an processes corresponding data units of the incoming first source signal 440 through the first processing executing module 412.

Similarly, when there is no source signal entering the second processing module 420, the second processing module 420 remains in idle status. Once the second processing module 420 receives a second source signal 450, its state transits into processing status, an processes corresponding data units of the incoming source signal through the second processing executing module 422.

When the first processing executing module 412 determines that all relevant data units of the first source signal 440 have been processed, it will send a notification signal to the synchronization control unit 430 through the first notifying module 414, indicating that the first processing module 410 has completed processing all data units of the relevant source signal, then the first processing module 410 converts its status into idle.

Upon receiving the notification signal, the synchronization control unit 430 will determine whether the second processing module 420 has completed processing all data units of the relevant source signal. If not, the status of the second processing module 420 will be converted into consuming, and the remained data units of the relevant source signal be discarded by the second discarding module 426. Or else, the synchronization control unit 430 will send transmitting commands to the first processing module 410 and the second processing module 420, so that the first processing module 410 and the second processing module 420 send their processed data units to the subsequent processing module 460 respectively.

In their consuming status, the first processing module 410 and the second processing module 420 just remove relevant data units without performing any substantive processing.

The case where the second processing module 420 completes processing all data units of a corresponding source signal is similar to above described, and detailed description of it will be omitted here.

The first processing module 410 and the second processing module 420 may detect the end point of a corresponding source signal, that is, determine whether all data units of the corresponding source signal have been processed, in the following manners: Manner 1, using a specific tag: if a source signal is stored in a storage medium and a processing module reads this source signal from the medium, the end of a file can be determined when the pointer of the file points to a tag "EOF'(End-Of-File).

If the processing is to decode a MPEG-2 data stream, each MPEG-2 data stream will have a sequence end code, which can be a specific hex number

(0x000001B7). Upon this end code detected, the end of the source signal can be determined.

Manner 2, detecting an input buffer: generally, a processing module starts to process data units of a source signal when the buffer loads contents up to a certain percentage of its capacity (e.g. 30%). During processing, the percentage will not be lower than 30% before the end phase. If the input buffer becomes empty, it means that the end of the source signal is arrived.

The method of sending notification signals mentioned above can be replaced by setting specific tag or setting specific bit of a register. Said processing includes operations of encoding, decoding, up-sampling, and down-sampling etc. to a digital signal.

It should be mentioned that the functions of the first notifying module 414 and the second notifying module 424 could be implemented by the synchronization control unit 430. The first notifying module 414 can of course send the notification signal to the second discarding module 426 in the second processing module 420, and the second notifying module 424 can send the notification signal to the first discarding module 416 in the first processing module 410, so that the synchronization control unit 430 is not needed to perform the above mentioned notifying operation.

The first discarding module 416 and the second discarding module 426 can be replaced by a third discarding means (not shown) outside the first processing module

410 and the second processing module 420. in this case, remained data units of the first processing module 410 and the second processing module 420 are all discarded by the third discarding means.

Now the operation of the synchronization control apparatus shown in Fig.4 will be described with reference to Fig.4 and Fig.5.

Fig.5 shows the flow chart for controlling at least two digital signal streams synchronously according to the first embodiment of the present invention. As shown in Fig.5, the method for controlling at least two digital signal streams synchronously according to the first embodiment of the present invention comprises the steps of:

Step S501: setting status of at least two processing modules, e.g. first processing module 410 and second processing module 420, to idle;

Step S502: when any of the processing modules, e.g. the first processing module 410, receives the first data unit of the first source signal 440, the status of the module is converted to processing status;

Step S503: processing the data unit by the first processing executing module 412.

Similarly, when the second processing module 420 receives the first data unit of the second source signal 450, its status will also be converted to processing status, and the data unit will be processed by the second processing executing module 422.

Step S504: the status of the first processing module 410 is converted from processing status to idle status;

When the first processing module 410 has completed processing the data unit, its status returns to idle.

Similarly, the status of the second processing module 420 will also return to idle after the first data unit of the second source signal 450 has been processed. Here if only the first processing module 410 has completed processing the first data unit of the first source signal 440, while the second processing module 420 has not completed processing the corresponding data unit, the synchronization control unit 430 will not allow the first processing module 410 to transmit the processed data unit to the relevant subsequent processing module 460. In other words, before the second processing module 420 has completed processing the first data unit of the second source signal 450, the first processing module 410 will wait for a transmitting command from the synchronization control unit 430.

Step S505: when the first processing module 410 and second processing module 420 have completed processing respective first data units, the synchronization control unit 430 will send a transmitting command to the first processing module 410 and second processing module 420, so that the first processing module 410 and second processing module 420 will send the processed data units to the subsequent processing module 460. After that, the first processing module 410 and second processing module 420 will process succeeding plurality of data units of the first source signal 440 and the second source signal 450 respectively, and send processed data units to the relevant subsequent processing module 460 under control of the synchronization control unit 430.

If the first processing module 410 and second processing module 420 complete processing all data units of the respective source signals simultaneously, their status will become idle simultaneously, and they will transmit their respective processed data units to the subsequent processing module 460 under control of the synchronization control unit 430.

Step S506: if the first processing module 410 has completed processing all data units of the corresponding source signal, while the second processing module 420 has not completed processing all data units of the corresponding source signal, the first processing module 410 will send a notification signal to the second processing module 420 indicating that the first processing module 410 has completed processing all data units of the corresponding source signal, then the status of the first processing module 410 is converted to idle.

Upon receiving the notification signal, the second processing module 420 will change its status to consuming. The consuming status of the second processing module 420 will last until all the remained data units of the second source signal have been consumed. In other words, all the remained data units of the second source signal 450 are discarded by the second discarding means 426.

Step S507: the status of the second processing module 420 is converted to idle. After all the remained data units of the second source signal 450 are discarded, the status of the second processing module 420 is converted to idle to be ready for next signal.

Similarly, if the second processing module 420 completes processing all data units of the second source signal firstly, the second processing module 420 will send a notification signal to the first processing module 410 indicating that the second processing module 420 has completed processing all data units of the corresponding source signal, then the status of the second processing module 420 is converted to idle. Upon receiving the notification signal, the first processing module 410 that has not completed processing all data units of the corresponding source signal will change its status to consuming, and the consuming status will last until all the remained data units of the first source signal have been consumed. That is, all the remained data units of the first source signal 440 are discarded by the first discarding means 416. Then the status of the first processing module 410 is converted to idle.

To facilitate understanding the synchronization control of digital signals according to the first embodiment of the present invention, pseudo code for showing the steps is listed below:

module_initialization() { status = "Idle";

while (check if there is a unit of the input source signal needs to be processed)} if (finished processing all the units of the source signal)} send a notification signal to other processing modules; }

if (one unit is ready for processing)} if (status is idle) status = "processing";

if (get sync control unit' s approval) run processing_module_task();

}

processing_module_task() } if (status is "Idle") do nothing;

if (status is "processing") process the unit

if (status is "consuming") consume the unit }

message_handle() { if (received a notification signal) status = "consuming"

if (received module initialization message) module_initialization() ; }

Pseudo code for the synchronization control unit 430 is: sync_condition_l=processing_module_410_ok&&processing_module_420_ok; sync_condition_2=setting of the "notification signal"

while(check if there is a processed unit){ if(the processed unit is processed by processing module 410) processing_module_410_ok = TRUE;

if(the processed unit is processed by processing module 420) processing_module_420_ok = TRUE;

if(sync_condition_l OR sync_condition_2){ if(sync_condition_2 is satisfied) unset the "notification signal";

approve of all processing modules sending processed unit to the follow-up processing module; } } Next will describe how the base layer stream signal and the enhancement layer stream signal shown in Fig.3 are processed by the synchronization control method for digital signals according to the first embodiment of the present invention.

It is assumed that the base layer stream signal Bl, B2 etc. shown in Fig.3 are processed by the first processing module 410 shown in Fig.4, while the enhancement layer stream signal El, E2 etc. are processed by the second processing module 420.

Firstly, the status of the first processing module 410 and second processing module 420 are set to idle.

Upon receiving the first data unit (the first frame) of the base layer stream signal Bl, the first processing module 410 changes its status to processing status, and then processes the first data frame. Once the processing of the first data frame is completed, the first processing module 410 changes its status to idle, and waits for a transmitting command from the synchronization control unit 430.

Similarly, upon receiving the first data unit (the first frame) of the enhancement layer stream signal El, the second processing module 420 changes its status to processing status, and then processes the first data frame. Once the processing of the first data frame is completed, the second processing module 420 changes its status to idle, and waits for a transmitting command from the synchronization control unit 430. When the first processing module 410 and second processing module 420 have both completed processing respective first data frame, the synchronization control unit 430 will send a transmitting command to the first processing module 410 and second processing module 420 respectively. Upon received the transmitting command, the first processing module 410 and second processing module 420 will send the processed data units to the subsequent processing module for further processing.

It should be mentioned that generally the first data frame of the base layer stream signal Bl and the first data frame of the enhancement layer stream signal El will not enter the first processing module 410 and the second processing module 420 simultaneously, for example, due to different delay during network transmitting. Further more, because the complexity of the processing performed by the first processing module 410 and the second processing module 420 respectively tends to be different (for example, the first processing module 410 processes video while the second processing module 420 processes audio, or the first processing module 410 processes standard definition code streams, while the second processing module 420 processes high definition code streams), it will be difficult to complete processing two corresponding data units simultaneously. In such cases, the synchronization control of the unit 430 is particularly important. However, in some cases, the first data frame of the base layer stream signal Bl and the first data frame of the enhancement layer stream signal El enter the respective first processing module 410 and the second processing module 420 simultaneously. In such cases, the first processing module 410 and the second processing module 420 will complete processing the respective first data frame of the base layer stream signal Bl and the first data frame of the enhancement layer stream signal El simultaneously. Therefore, the synchronization control unit 430 will send the transmitting command to the first processing module 410 and the second processing module 420 immediately.

If only one of the processing modules has completed processing the received first data frame, the synchronization control unit 430 will not allow it to transmit the processed first data frame. Only when the other processing module has also completed processing the received first data frame, the synchronization condition is satisfied, and the synchronization control unit 430 will send the transmitting command to the first processing module 410 and the second processing module 420, allowing them to transmit the processed first data frame to the subsequent processing module.

After transmitting the processed first data frame to the subsequent processing module, the first processing module 410 and the second processing module 420 will continue to process the respective second data frames, the third data frames, etc. of the base layer stream signal Bl and the first data frame of the enhancement layer stream signal El in the same way as processing the first data frames.

Since the number of data frames of the enhancement layer stream signal El shown in Fig.3 if less than that of the base layer stream signal Bl, the second processing module 420 will complete processing the last data frame (the Ne^th data frame) of the enhancement layer stream signal El firstly. At this point, the first processing module 410 has also completed processing the Ne^th data frame of the base layer stream signal Bl. Upon complete processing the Ne^th data frame of the enhancement layer stream signal El, the second processing module 420 will detect a tag data indicating the end of the enhancement layer stream signal El based on which the second processing module 420 will send a notification signal to the first processing module 410 indicating that the second processing module 420 has completed processing all data frames of the enhancement layer stream signal El. Then the second processing module 420 converts its status to idle and gets ready to process the first data frame of next enhancement layer stream signal E2. Once receives the notification signal, the first processing module 410 converts its status to consuming. The first processing module 410 in consuming status does not process the remained data frames of the incoming base layer stream signal, but consumes the data frames therein.

The consuming status of the first processing module 410 will last until the last data frame (the Nb^th data frame) of the base layer stream signal is consumed. Then the first processing module 410 will also detect a tag data indicating the end of the base layer stream signal Bl, and convert its status to idle, and get ready to receive the first data frame of next base layer stream signal B2.

The second processing module 420 can also notify the user "system detects inconsistence of signal length, processing..." upon completed the Ne^th data frame of the Enhancement layer stream signal El. The first processing module 410 can also notify the user "system ready..." upon consumed all the remained data frames of the base layer stream signal.

It should be mentioned that the above described first processing module 410, second processing module 420, and synchronization control unit 430 can also be implemented in software. And one skilled in the art will be able to implement these modules by a plurality of conventional devices if only such devices can be combined to implement the functions of the present invention.

In the first embodiment of the present invention, the synchronization control of digital signals is described taking the processing of two digital signals as an example. But it will be apparent for those skilled in the art that the present invention is not limited to synchronization control of two digital signals, it can also be applied to synchronization control of three or more digital signals. The devices mentioned in the flow chart showing the method are all illustrative, and other devices with similar functions and /or structures can also be applied in the flow.

Though the present invention has been described with reference to a representative embodiment, those skilled in the art will understand that various modifications and alterations are possible without departing the spirit and scope of the invention. Therefore, the present invention is not limited to the specific embodiment as a preferred mode for implementing the present invention, but will comprise all the variations falling in the scope defined by the attached claims.

Claims

1. A method for processing at least two digital signal streams synchronously, comprising the steps of: (a) processing a first digital signal stream;

(b) processing a second digital signal stream, the second digital signal stream being shorter than the first digital signal stream; and

(c) discarding portions of the first digital signal stream excess the second digital signal stream when the second digital signal stream is completely processed.

2. The method of claim 1, wherein the first digital signal stream is the base layer of a video stream, and the second digital signal stream is the enhancement layer of the video stream.

3. The method of claim 1, wherein the first digital signal stream is the enhancement layer of a video stream, and the second digital signal stream is the base layer of the video stream.

4. The method of claim 1, wherein the first digital signal stream is a video stream, and the second digital signal stream is an audio stream.

5. The method of claim 1, wherein the first digital signal stream is an audio stream, and the second digital signal stream is a video stream.

6. The method of claim 1, wherein each of the steps (a) and (b) comprises a decoding step for decoding the first digital signal stream and the second digital signal stream respectively.

7. The method of claim 1, wherein the step (c) comprises:

-when the processing of the second digital signal stream is completed, sending a notification signal indicating that the second digital signal stream is completely processed; and -discarding portions of the first digital signal stream excess the second digital signal stream in response to the notification signal.

8. An apparatus for processing at least two digital signal streams synchronously, comprising: a first processing means for processing a first digital signal stream; a second processing means for processing a second digital signal stream, the second digital signal stream being shorter than the first digital signal stream; wherein the second processing means comprises a discarding means for discarding portions of the first digital signal stream excess the second digital signal stream when the second digital signal stream is completely processed.

9. The apparatus of claim 8, wherein the second processing means further comprises a notifying means for sending a notification signal indicating that the second digital signal stream is completely processed when the processing of the second digital signal stream is completed; and the discarding means discards portions of the first digital signal stream excess the second digital signal stream according to the notification signal.

10. The apparatus of claim 8, wherein the first digital signal stream is the base layer of a video stream, and the second digital signal stream is the enhancement layer of the video stream.

11. The apparatus of claim 8, wherein the first digital signal stream is the enhancement layer of a video stream, and the second digital signal stream is the base layer of the video stream.

12. The apparatus of claim 8, wherein the first digital signal stream is an audio stream, and the second digital signal stream is a video stream.

13. The apparatus of claim 8, wherein each of a first processing means and a second processing means comprises a decoding means for decoding the first digital signal stream and the second digital signal stream respectively.

14. The apparatus of claim 8, wherein the first processing means is a decoding means, and the second processing means is another decoding means.