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WO2004017411A1 - Solid-state imaging device and its manufacturing method - Google Patents

Solid-state imaging device and its manufacturing method Download PDF

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Publication number
WO2004017411A1
WO2004017411A1 PCT/JP2003/010217 JP0310217W WO2004017411A1 WO 2004017411 A1 WO2004017411 A1 WO 2004017411A1 JP 0310217 W JP0310217 W JP 0310217W WO 2004017411 A1 WO2004017411 A1 WO 2004017411A1
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WO
WIPO (PCT)
Prior art keywords
substrate
potential
solid
imaging device
photosensor
Prior art date
Application number
PCT/JP2003/010217
Other languages
French (fr)
Japanese (ja)
Inventor
Kazushi Wada
Koichi Harada
Shuji Otsuka
Mitsuru Sato
Original Assignee
Sony Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corporation filed Critical Sony Corporation
Priority to US10/521,587 priority Critical patent/US7535038B2/en
Priority to JP2005502027A priority patent/JP4613821B2/en
Publication of WO2004017411A1 publication Critical patent/WO2004017411A1/en
Priority to US12/420,890 priority patent/US8217431B2/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14806Structural or functional details thereof

Definitions

  • the present invention relates to a solid-state imaging device provided with a plurality of pixels using a photoelectric conversion unit on a semiconductor substrate and a CCD transfer unit for transferring signal charges generated by the pixels, and particularly to an excess charge generated by the photoelectric conversion unit.
  • the present invention relates to a solid-state imaging device having a vertical overflow barrier structure for discharging sapphire toward the back surface of a semiconductor substrate.
  • FIG. 10 is a plan view showing a general configuration example of a conventional CCD image sensor.
  • a photosensor (photodiode) 22 serving as a photoelectric conversion unit that serves as a pixel is provided in an imaging area 20 provided on a semiconductor substrate (Si substrate, semiconductor chip) 10.
  • a plurality of vertical transfer registers 24 and a channel stop area 26 are arranged for each photo sensor row, and a horizontal transfer register 32 and an output section are arranged outside the imaging area 20. 3 4 is provided.
  • the outside of the imaging area 20 is a peripheral area 21 where bus lines and the like are arranged.
  • the signal charge generated by each photo sensor 22 is read out to the vertical transfer register 24, transferred in the vertical direction for each photo sensor column, and sequentially output to the horizontal transfer register 32.
  • the horizontal transfer register 32 transfers the signal charge of each photosensor 22 transferred by the vertical transfer register 24 in the horizontal direction for each row. And outputs them sequentially to the output unit 34.
  • the output unit 34 sequentially converts the signal charges transferred by the horizontal transfer register 32 into a voltage signal, applies a voltage to the signal, and outputs the signal.
  • channel stop region 26 prevents signal leakage between adjacent photosensor rows.
  • FIG. 11 is a cross-sectional view showing the internal element structure of the CCD image sensor shown in FIG.
  • a photo sensor 22, a vertical transfer register 24, and a channel stop region 26 are formed on a semiconductor substrate (Si substrate) 10.
  • a transfer electrode (polysilicon film) 44 of the vertical transfer register 24 is disposed via an insulating film (silicon oxide film) 42, and a light shielding film 46 is mounted thereon. .
  • An opening 46A is formed in the light-shielding film 46 so as to correspond to the light receiving area of the photosensor 22, and light enters the photosensor 22 through the opening 46A.
  • the photosensor 22 has an upper P + layer 22 A and a lower N layer 22 B, and holes generated by photoelectric conversion are taken into the P + layer 22 A, and the N layer 2 2 B generates a signal charge.
  • the signal charges generated in the N layer 22B are accumulated in a depletion layer formed below the N layer 22B, and are read out between the photosensor 22 and the vertical transfer register 24.
  • the data is read from the photo sensor 22 to the vertical transfer register 24 by the operation of the gate section.
  • an overflow flow barrier (OFB) 28 for storing the signal charge generated by each photosensor 22 in the lower region of the N layer 22B is provided. Is provided.
  • the overflow barrier 28 adjusts the impurity distribution in the semiconductor substrate to form a potential in the internal region of the semiconductor substrate 10. It forms a barrier by the signal and prevents leakage of signal charges. Also, when an excessive amount of light is incident, the signal charge excessively generated by the photo sensor 22 is discharged to the back side of the semiconductor substrate 10 over the overflow barrier 28.
  • the overflow barrier which is conventionally formed about 3 ⁇ m from the surface of the Si substrate, is formed at a deeper position (for example, 5 tm to 10 m). You could think so.
  • FIG. 12 is an explanatory diagram showing the distribution of the potential in each substrate cross section of the photosensor and the vertical transfer register.
  • the vertical axis represents the depth of the potential
  • the horizontal axis represents the depth from the substrate surface. I have.
  • the solid line A shows the potential distribution in the photosensor portion
  • the broken line B shows the potential distribution in the vertical transfer register portion.
  • Fig. 13 is an explanatory diagram showing the distribution of potential in the photosensor region in a three-dimensional manner.
  • the X-axis shows the horizontal direction
  • the Y-axis shows the potential depth direction
  • the Z-axis shows the substrate depth direction.
  • the plane constituted by the X axis and the Y axis indicates the substrate surface.
  • the vertical axis in FIG. 12 and the Y axis in FIG. 13 indicate that the potential is higher from the top to the bottom. Also, the numerical values of the scales attached to each axis are values adjusted for convenience.
  • an object of the present invention is to provide a solid-state imaging device capable of effectively preventing crosstalk between adjacent pixels even when an overflow barrier is provided deep in a substrate. Disclosure of the invention
  • the present invention provides a plurality of pixels including a photoelectric conversion unit that is provided on a semiconductor substrate and generates a charge according to the amount of incident light, and is formed on the semiconductor substrate and read from the pixel.
  • a transfer unit configured to transfer the charge; and an overflow barrier formed inside the semiconductor substrate and configured to discharge a surplus charge generated in the pixel toward a back surface of the semiconductor substrate.
  • the potential of the lower region of the transfer section is formed to be smaller than the potential of the lower region of the photoelectric conversion section between the minimum potential position of the transfer section and the overflow barrier. It is characterized by. BRIEF DESCRIPTION OF THE FIGURES
  • FIG. 1 is a sectional view showing a device structure of a CCD image sensor according to a first embodiment of the present invention.
  • FIG. 2 is a sectional view showing a photo sensor and a vertical transfer register of the CCD image sensor shown in FIG.
  • FIG. 3 is an explanatory diagram showing a potential distribution on a cross section of a substrate.
  • FIG. 3 is an explanatory diagram showing a three-dimensional distribution of a potential in a photosensor region of the CCD image sensor shown in FIG. 1, and
  • FIG. 2 shows the element structure of a CCD image sensor according to a second embodiment.
  • FIG. 5 is an explanatory diagram showing a potential distribution in a cross section of each substrate of the photo sensor, the vertical transfer register, and the pixel-to-pixel portion of the CCD image sensor shown in FIG. 4, and FIG. Shown in Figure 4
  • FIG. 7 is an explanatory view three-dimensionally showing a potential distribution in a photosensor region of the CCD image sensor.
  • FIG. 7 is a cross-sectional view showing a method of forming an overflow barrier of the CCD image sensor shown in FIG. 4, and
  • FIG. 9 is a cross-sectional view showing the element structure of a CCD image sensor according to a third embodiment of the present invention.
  • FIG. 9 shows a photo sensor, a vertical transfer register, and an inter-pixel portion of the CCD image sensor shown in FIG.
  • FIG. 10 is an explanatory diagram showing a potential distribution in each substrate cross section.
  • FIG. 10 is a plan view showing a device arrangement of a conventional CCD image sensor.
  • FIG. 11 is a device structure of the CCD image sensor shown in FIG.
  • FIG. 12 is a cross-sectional view showing the potential distribution of the photo sensor and the vertical transfer register of the CCD image sensor shown in FIG. A bright view
  • FIG. 1 3 is an explanatory diagram sterically showing a distribution of Po Tensharu in follower Tosensa region of C C D image sensor shown in FIG. 1 0.
  • FIG. 1 is a cross-sectional view showing an internal element structure of a CCD image sensor according to a first embodiment of the present invention. Note that the element arrangement in the planar direction of the CCD image sensor in this example is common to that of the conventional example shown in FIG. 10, and FIG. 1 shows a cross section taken along line aa of FIG.
  • the image sensor of this example has a photo sensor 122 and a vertical transfer register on the upper layer of a semiconductor substrate (Si substrate) 110, similarly to the image sensor shown in FIG. 1 2 4, and channel stop area A region 126 is formed, and a transfer electrode (polysilicon film) of a vertical transfer register 124 is placed on an upper surface of the semiconductor substrate 110 via an insulating film (silicon oxide film) 142. 4 is arranged, and a light shielding film 1 4 6 is mounted thereon.
  • the light-shielding film 146 has an opening 146A corresponding to the light receiving area of the photosensor 122, and light enters the photosensor 122 through the opening 146A. .
  • the photosensor 122 has an upper P + layer 122 A and a lower N layer 122 B, and holes generated by photoelectric conversion are taken into the P + layer 122 A, Signal charges are generated in the N layer 122B.
  • the signal charges generated in the N-layer 122B are accumulated in a depletion layer formed below the N-layer 122B, and the signal charges are generated between the photosensor 122 and the vertical transfer register 124.
  • the data is read from the photosensor 122 to the vertical transfer register 124 by the operation of the read gate unit provided in the memory.
  • N layer 122 B is provided below the P + layer 122 A, but the overflow layer and the depletion layer are located deep in the substrate 110.
  • a low-concentration N ⁇ layer may be provided below the N layer 122 B.
  • an overflow barrier (OFB) 128 for storing signal charges generated by the photosensors 122 in the lower region of the N layer 122B is provided inside the semiconductor substrate 110. Is provided.
  • the overflow barrier 128 forms a barrier due to a potential in the internal region of the semiconductor substrate 110 by adjusting the impurity distribution in the semiconductor substrate, and prevents leakage of signal charges. is there. Also, when an excessive amount of light is incident, the signal charges excessively generated by the photo sensor 122 are discharged to the back side of the semiconductor substrate 110 through the overflow barrier 128. .
  • a high-resistance layer 110B is provided on the N-type substrate 11OA by a predetermined method (for example, epitaxial growth), and various elements are formed on the high-resistance layer 11OB. In this case, an overflow barrier 128 is formed near the boundary between the N-type substrate 11 OA and the high-resistance layer 11 OB.
  • the overflow barrier 128 is formed, for example, at a depth of 5 ⁇ to 10 ⁇ from the surface of the substrate 110.
  • the vertical transfer register 1 A partial rectangular region 150 is formed at a predetermined position in the lower layer region of the channel top region 124 and the channel stop region 126. The rectangular region 150 forms the vertical transfer register 124 and the channel. The potential in the lower area of the stop area 1 2 6 is adjusted, and the potential in the lower area of the photo sensor 1 2 Smaller (ie, lower).
  • FIG. 2 is an explanatory diagram showing the potential distribution in the cross section of each substrate of the photosensors 122 and the vertical transfer registers 124.
  • the vertical axis represents the depth of the potential
  • the horizontal axis represents the depth from the substrate surface. ing.
  • the solid line ⁇ indicates the potential distribution in the photosensor portion
  • the dashed line B indicates the potential distribution in the vertical transfer register portion.
  • the unit of each axis can be set arbitrarily.
  • FIG. 3 is an explanatory view three-dimensionally showing the distribution of potential in the photosensor region, in which the X axis indicates the horizontal direction, the Y axis indicates the potential depth direction, and the Z axis indicates the substrate depth direction.
  • the plane constituted by the X axis and the Y axis indicates the substrate surface.
  • the unit of each axis can be set arbitrarily.
  • the “substrate depth direction” is a direction from the front surface to the rear surface of the substrate.
  • the Y-axis means that the potential increases from top to bottom.
  • the position of the potential of the photosensor is equal to the position of the potential of the lower layer of the vertical transfer register in the deep part of the substrate.
  • the potential in the lower layer area of the vertical transfer register 124 and the channel stop area 126 is the minimum potential of the vertical transfer register 124.
  • the potential of the lower part of the photosensor 122 is smaller (ie, lower) than the potential of the lower region.
  • the charge photoelectrically converted in the sensor area has a low potential in the lower layer area of the vertical transfer registers 124 and the channel stop area 126 on both sides, and is blocked by this potential barrier.
  • the state cannot be easily diffused and it is difficult to leak into the sensor area of the adjacent pixel, so that crosstalk can be effectively prevented.
  • a high-resistance substrate (high-resistance substrate of 100 ⁇ or more, for example, by epitaxy) is formed over the semiconductor substrate 110 ( ⁇ substrate 11OA) (ie, from the substrate surface to the overflow barrier).
  • the layer 110B) is formed.
  • a P-type impurity such as boron is ion-implanted from the surface of the semiconductor substrate 110 to form a P-type region which becomes the overflow barrier 128.
  • a P-type region 150 is formed by ion-implanting a P-type impurity into the layer.
  • a partial high-concentration P-type region 150 can be formed in the high-resistance layer 110B.
  • a photo sensor unit (a photoelectric conversion unit) out of the P-type well region for forming the overflow barrier described above.
  • the potential at the overflow barrier of the vertical transfer register (transfer section) and the potential at the overflow barrier at the intermediate portion between adjacent pixels are obtained.
  • the potential is smaller than the potential of the overflow barrier in the photosensor section, and the leakage of the electric charge in the overflow barrier is further completely prevented.
  • FIG. 4 is a cross-sectional view showing the internal element structure of the CCD image sensor according to the second embodiment of the present invention. Note that the same components as those shown in FIG. 1 are denoted by the same reference numerals and description thereof will be omitted. In addition, the element arrangement in the planar direction of the CCD image sensor in this example is common to the conventional example shown in FIG. 10, and FIG. 4 shows an a-a cross section of FIG.
  • an overflow barrier 160 is formed near the boundary between the N-type substrate 11 OA constituting the semiconductor substrate (Si substrate) 110 and the high-resistance layer 110 B.
  • a partial low-concentration region 162 is formed in a region corresponding to the photosensor 122, and other regions are formed.
  • the area is a normal density area 164.
  • the overflow barrier of the vertical transfer register 124 is obtained.
  • the potential at the overflow barrier in the middle of the adjacent pixels is smaller (ie, lower) than the potential at the overflow barrier of the photosensor 122.
  • FIG. 5 is an explanatory diagram showing the distribution of the potential in the photosensors 122, the vertical transfer registers 124, and the cross-sections of the respective substrates in the middle part of the adjacent pixels. It shows the depth from the substrate surface.
  • the solid line A indicates the potential distribution in the photosensor portion
  • the broken line B indicates the potential distribution in the vertical transfer register portion
  • the dashed-dotted line C indicates the potential distribution in the intermediate portion between adjacent pixels.
  • the unit of each axis can be set arbitrarily.
  • FIG. 6 is an explanatory view three-dimensionally showing a potential distribution in the photosensor region, in which the X-axis indicates the horizontal direction, the Y-axis indicates the potential depth direction, and the Z-axis indicates the substrate depth direction.
  • the plane constituted by the X axis and the Y axis indicates the substrate surface.
  • the unit of each axis can be set arbitrarily.
  • FIGS. 5 and 6 the vertical axis in FIG. 5 and the Y axis in FIG. 6 indicate that the potential increases from top to bottom.
  • the potential of the photo sensor unit and the potential of the vertical transfer register coincide at the depth position of the overflow transistor. Then, as shown in FIG. 5 and FIG. 6, the potential at the overflow barrier 160 of the vertical transfer register 124 and the potential at the overflow barrier 160 in the middle part of the adjacent pixel are determined by the photo sensor.
  • the potential at the overflow barrier 160 is smaller than the potential at the overflow barrier 160 (shown by the potential difference G in FIGS. 5 and 6). This further completely prevents the leakage of the electric charge, thereby obtaining the effect of suppressing crosstalk and the effect of improving sensitivity.
  • the difference in the impurity concentration of the overflow barrier 160 allows the overflow barrier 1 to be provided without providing the partial P-type region 150 described in the first embodiment.
  • the potential in the lower region of the vertical transfer register 124 and the channel stop region 126 is adjusted by the impurity concentration of 60, and between the maximum potential position of the vertical transfer register 124 and the overflow barrier 128. And is formed smaller (ie, lower) than the potential in the lower region of the photosensor 122.
  • it can be implemented in combination with the first embodiment.
  • the other points are the same as those of the first embodiment, and the description is omitted.
  • ion implantation of a normal concentration P-type impurity into the entire overflow barrier and ion implantation of an N-type impurity into the corresponding region of the photosensor 122 are required.
  • First method ion implantation of low-concentration P-type impurities into the entire overflow barrier, and ion implantation of low-concentration P-type impurities into the corresponding region of the photosensor 122.
  • the second method can be used.
  • P-type impurity ions are implanted into the entire area where the overflow barrier 160 is to be formed at a concentration similar to that of the related art.
  • the P-type impurity concentration in this portion is reduced, and a low-concentration region 162 is formed.
  • the other areas are the normal density areas 164.
  • P-type impurities are ion-implanted at a low concentration into the entire region forming the overflow barrier 160.
  • An impurity region 16OA is formed.
  • the second ion implantation of the low-concentration P-type impurity into the vertical transfer register 124 and the corresponding area of the pixel except for the area corresponding to the photosensor 122 is performed.
  • the P-type impurity concentration in this portion becomes the normal concentration, and becomes the normal concentration region 164.
  • the corresponding region of the photosensor 122 where the second ion implantation was not performed remains at a low concentration, and this becomes the low concentration region 16 2.
  • the dose ratio between the first ion implantation and the second ion implantation is determined by how deep the potential of the overflow barrier in the photosensor section is.
  • the vertical transfer register (transfer section) exhibits an effective barrier effect for suppressing crosstalk and increases the potential of the photosensor section (photoelectric conversion section). By doing so, the potential difference between the photosensor section and the vertical transfer register is increased to enhance the par- ial effect.
  • FIG. 8 is a sectional view showing the internal element structure of a CCD image sensor according to the third embodiment of the present invention.
  • the one shown in Fig. 1 The same reference numerals are given to the same components as those described above, and description thereof will be omitted.
  • the element arrangement in the planar direction of the CCD image sensor in this example is common to that of the conventional example shown in FIG. 10, and FIG. 8 shows an a-a cross section of FIG.
  • a partial P-type region 150 is independently provided at a predetermined position in the lower region of the vertical transfer register 124 and the channel drop region 126.
  • the P-type region 150 adjusts the potential in the lower region of the vertical transfer register 124 and the channel stop region 126, and the maximum potential position of the vertical transfer register 124 is formed. It is formed smaller (lower) than the potential in the lower region of the photosensor 122 between the overflow barrier 128 and the overflow barrier 128.
  • N-type regions 151 are independently formed at predetermined positions in the lower region of the photosensor 122, and the N-type regions 15 By 1, the potential in the lower region of the photosensor 122 is adjusted, and the potential in the lower region of the photosensor 122 is formed to be larger (higher) than in the first embodiment.
  • N-type region 151 is formed so as to have a different depth from P-type region 150.
  • FIG. 9 is an explanatory diagram showing the distribution of the potential in the photosensors 122, the vertical transfer registers 124, and the cross-section of each substrate in the middle part of the adjacent pixel.
  • the vertical axis represents the potential depth
  • the horizontal axis represents the potential. It shows the depth from the substrate surface.
  • the solid line A shows the potential distribution in the photo sensor portion
  • the broken line B shows the potential distribution in the vertical transfer register portion.
  • the unit of each axis can be set arbitrarily.
  • the potential in the lower region of the vertical transfer register 124 and the channel stop region 126 is Between the minimum potential position of the vertical transfer register 124 and the overflow barrier 128, it is formed smaller (ie, lower) than the potential of the lower region of the photosensor 122.
  • the potential of the lower layer region of the photosensor 122 is formed larger than in the case of the first embodiment shown in FIG.
  • the charge photoelectrically converted in the sensor area has a low potential in the lower layer area of the vertical transfer registers 124 on both sides and the channel stop area 126, so that this potential barrier
  • the light cannot be easily diffused into the sensor area of the adjacent pixels, so that it is difficult to leak into the sensor area of the adjacent pixel.
  • crosstalk can be effectively prevented.
  • the potential in the lower layer region of the photosensor 122 is large, the step with the potential barrier is large, and the barrier effect is stronger. Therefore, crosstalk can be more effectively prevented.
  • the P-type region 150 is formed in four layers and the N-type region 1501 is formed in seven layers in the third embodiment, the P-type region 150 is limited to four layers. However, similar effects can be obtained by forming one or more layers of P-type regions. Similarly, the N-type region 151 is not limited to seven layers, and the same effect can be obtained by forming one or more N-type regions.
  • the present invention has been described with reference to a CCD image sensor in which photo sensors are arranged vertically and horizontally.
  • the present invention is not limited to this, but may be applied to other solid-state imaging devices using CCDs. They can be applied in the same way.
  • the present invention may be similarly applied to a configuration using holes.
  • the polarity of the P and N polarities of each semiconductor region is reversed. That is, the magnitude (high or low) of the potential in the present invention has a meaning based on the absolute value.
  • the potential of the lower layer region of the transfer unit is set between the minimum potential position and the overflow barrier, and the lower layer of the photoelectric conversion unit is reduced. Since the potential is smaller than the potential of the region, even when the overflow barrier is formed at a deep position in the substrate, it is possible to prevent signal charges accumulated in the lower region of the photoelectric conversion portion from leaking to the adjacent transfer portion. .
  • the potential in the overflow barrier of the transfer unit and the potential in the overflow barrier of the middle part of the adjacent pixels are reduced in the overflow barrier of the photoelectric conversion unit. Since the potential is smaller than the potential, even if the overflow barrier is formed at a deep position in the substrate, the signal charges accumulated in the lower layer region of the photoelectric conversion portion do not leak to the adjacent transfer portion or pixel side. Can be prevented.

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Abstract

The crosstalk between adjacent pixels is prevented by a structure in which an overflow barrier is provided in a deep portion of a substrate. A local P-type region (150) is formed in a predetermined position in a lower layer region below a vertical transfer register (124) and a channel stop region (126). The potential in the lower layer region below the vertical transfer register (124) and the channel stop region (126) is controlled by the P-type region (150) so that the potential in the extent from the minimum potential position of the vertical transfer register (124) to the overflow barrier (128) in the lower layer region is lower than that in the lower layer region below a photosensor (122). Therefore, because the potential in the lower layer region below the vertical transfer register (124) and the channel-stop region (126) on both sides is low, the charge produced by the photoelectric transducing in the sensor region is blocked by this potential barrier and cannot diffuse easily. Thus, the crosstalk between adjacent pixels can be prevented.

Description

明細書  Specification
固体撮像素子及びその製造方法 技術分野  Technical Field
本発明は、 半導体基板に光電変換部を用いた複数の画素と、 こ の画素によって生成した信号電荷を転送する C C D転送部とを設 けた固体撮像素子に関し、 特に光電変換部で生成した過剰電荷を 半導体基板の裏面方向に排出するための縦形オーバーフローバリ ァ構造を有する固体撮像素子に関する。 背景技術  The present invention relates to a solid-state imaging device provided with a plurality of pixels using a photoelectric conversion unit on a semiconductor substrate and a CCD transfer unit for transferring signal charges generated by the pixels, and particularly to an excess charge generated by the photoelectric conversion unit. The present invention relates to a solid-state imaging device having a vertical overflow barrier structure for discharging sapphire toward the back surface of a semiconductor substrate. Background art
従来よ り、 この種の固体撮像素子と して画素をマ ト リ クス状に 配置した C C Dイメージセンサが知られている。  Conventionally, a CCD image sensor having pixels arranged in a matrix has been known as this type of solid-state imaging device.
図 1 0 は、 従来の C C Dイメージセンサの一般的な構成例を示 す平面図である。  FIG. 10 is a plan view showing a general configuration example of a conventional CCD image sensor.
この C C Dイメージセンサは、 半導体基板 ( S i 基板、 半導体 チップ) 1 0上に設けた撮像領域 2 0内に、 それぞれ画素となる 光電変換部と してのフォ トセンサ (フォ トダイオー ド) 2 2 を配 置し、 各フォ トセンサ列毎に複数の垂直転送レジスタ 2 4及ぴチ ャネルス ト ップ領域 2 6 を配置し、 さ らに、 撮像領域 2 0 の外側 に水平転送レジスタ 3 2及び出力部 3 4を設けたものである。  In this CCD image sensor, a photosensor (photodiode) 22 serving as a photoelectric conversion unit that serves as a pixel is provided in an imaging area 20 provided on a semiconductor substrate (Si substrate, semiconductor chip) 10. A plurality of vertical transfer registers 24 and a channel stop area 26 are arranged for each photo sensor row, and a horizontal transfer register 32 and an output section are arranged outside the imaging area 20. 3 4 is provided.
なお、 撮像領域 2 0の外側は、 バスライ ン等を配置した周辺領 域 2 1 となってレ、る。  The outside of the imaging area 20 is a peripheral area 21 where bus lines and the like are arranged.
各フォ トセンサ 2 2で生成された信号電荷は、 垂直転送レジス タ 2 4に読み出されて各フォ トセンサ列毎に垂直方向に転送され 順番に水平転送レジスタ 3 2 に出力される。  The signal charge generated by each photo sensor 22 is read out to the vertical transfer register 24, transferred in the vertical direction for each photo sensor column, and sequentially output to the horizontal transfer register 32.
水平転送レジスタ 3 2では、 垂直転送レジスタ 2 4によって転 送された各フォ トセンサ 2 2 の信号電荷を各行毎に水平方向に転 送し、 出力部 3 4に順次出力する。 The horizontal transfer register 32 transfers the signal charge of each photosensor 22 transferred by the vertical transfer register 24 in the horizontal direction for each row. And outputs them sequentially to the output unit 34.
出力部 3 4では、 水平転送レジスタ 3 2によつて転送された信 号電荷を順次電圧信号に変換し、 增幅等を施して出力する。  The output unit 34 sequentially converts the signal charges transferred by the horizontal transfer register 32 into a voltage signal, applies a voltage to the signal, and outputs the signal.
また、 チャネルス ト ップ領域 2 6 は、 隣接する各フォ トセンサ 列間の信号の漏洩を阻止している。  In addition, the channel stop region 26 prevents signal leakage between adjacent photosensor rows.
また、 図 1 1 は、 図 1 0 に示す C C Dイメージセンサの内部素 子構造を示す断面図であり、 図 1 0の a — a断面を示している。  FIG. 11 is a cross-sectional view showing the internal element structure of the CCD image sensor shown in FIG.
図示のよ う に、 半導体基板 ( S i 基板) 1 0の上層に、 フォ ト センサ 2 2、 垂直転送レジスタ 2 4、 及ぴチャネルス ト ップ領域 2 6 が形成され、 半導体基板 1 0の上面には、 絶縁膜 (シリ コン 酸化膜) 4 2を介して垂直転送レジスタ 2 4の転送電極 (ポリ シ リ コン膜) 4 4が配置され、 その上層に遮光膜 4 6が装着されて いる。  As shown in the figure, a photo sensor 22, a vertical transfer register 24, and a channel stop region 26 are formed on a semiconductor substrate (Si substrate) 10. On the upper surface, a transfer electrode (polysilicon film) 44 of the vertical transfer register 24 is disposed via an insulating film (silicon oxide film) 42, and a light shielding film 46 is mounted thereon. .
この遮光膜 4 6 には、 フォ トセンサ 2 2の受光領域に対応して 開口部 4 6 Aが形成され、 この開口部 4 6 Aを通して光がフォ ト センサ 2 2 に入射される。  An opening 46A is formed in the light-shielding film 46 so as to correspond to the light receiving area of the photosensor 22, and light enters the photosensor 22 through the opening 46A.
また、 フォ トセンサ 2 2は、 上層の P +層 2 2 Aと下層の N層 2 2 Bを有し、 P +層 2 2 Aに光電変換で発生した正孔が取り込 まれ、 N層 2 2 Bに信号電荷が生成される。  The photosensor 22 has an upper P + layer 22 A and a lower N layer 22 B, and holes generated by photoelectric conversion are taken into the P + layer 22 A, and the N layer 2 2 B generates a signal charge.
この N層 2 2 Bで生成された信号電荷は、 N層 2 2 Bの下層に 形成される空乏層に蓄積され、 フォ トセンサ 2 2 と垂直転送レジ スタ 2 4 との間に設けられた読み出しゲー ト部の動作によってフ ォ トセンサ 2 2から垂直転送レジ.スタ 2 4側に読み出される。  The signal charges generated in the N layer 22B are accumulated in a depletion layer formed below the N layer 22B, and are read out between the photosensor 22 and the vertical transfer register 24. The data is read from the photo sensor 22 to the vertical transfer register 24 by the operation of the gate section.
また、 半導体基板 1 0の内部領域には、 各'フォ トセンサ 2 2で 生成された信号電荷を N層 2 2 Bの下部領域に貯留するためのォ 一バーフローパリ ア (O F B ) 2 8が設けられている。  Also, in the internal region of the semiconductor substrate 10, an overflow flow barrier (OFB) 28 for storing the signal charge generated by each photosensor 22 in the lower region of the N layer 22B is provided. Is provided.
このオーバーフローバリ ア 2 8は、 半導体基板内の不純物分布 を調整するこ とによ り 、 半導体基板 1 0の内部領域にポテンシャ ルによるバリ ァを形成し、 信号電荷の漏洩をせき止めるものであ る。 また、 過大光量の入射時には、 フォ トセンサ 2 2で過剰に生 成された信号電荷が、 このオーバーフローバリ ァ 2 8 を越えて半 導体基板 1 0の裏側に排出されるよ う になっている。 The overflow barrier 28 adjusts the impurity distribution in the semiconductor substrate to form a potential in the internal region of the semiconductor substrate 10. It forms a barrier by the signal and prevents leakage of signal charges. Also, when an excessive amount of light is incident, the signal charge excessively generated by the photo sensor 22 is discharged to the back side of the semiconductor substrate 10 over the overflow barrier 28.
と ころで、 上述のよ うな C C D固体撮像素子では、 単位画素の 小型化に伴い、 単位面積あたり の感度を向上させる技術の開発が 急務となっている。  In such a CCD solid-state imaging device as described above, the development of technology for improving the sensitivity per unit area is urgently required as the size of the unit pixel is reduced.
そして、 その 1つの手段と して、 従来は S i 基板表面から 3 μ m程度に形成しているオーバーフローバリ アを、よ り深い位置(た とえば 5 t m〜 1 0 m ) に形成するこ とが考えられる。  As one of the measures, the overflow barrier, which is conventionally formed about 3 μm from the surface of the Si substrate, is formed at a deeper position (for example, 5 tm to 10 m). You could think so.
この状態で従来通り の垂直転送レジスタのポテンシャルを形成 する と、 その分布は図 1 2及ぴ図 1 3 に示すよ うなものとなる。  If the potential of the conventional vertical transfer register is formed in this state, the distribution is as shown in FIG. 12 and FIG.
すなわち、 図 1 2はフォ トセンサ及ぴ垂直転送レジスタの各基 板断面におけるポテンシャルの分布を示す説明図であ り、 縦軸は ポテンシャルの深さ、 横軸は基板表面からの深さを示している。 そして、 実線 Aはフォ トセンサ部分のポテンシャル分布、 破線 B は垂直転送レジスタ部分のポテンシャル分布を示している。  That is, FIG. 12 is an explanatory diagram showing the distribution of the potential in each substrate cross section of the photosensor and the vertical transfer register. The vertical axis represents the depth of the potential, and the horizontal axis represents the depth from the substrate surface. I have. The solid line A shows the potential distribution in the photosensor portion, and the broken line B shows the potential distribution in the vertical transfer register portion.
また、 図 1 3はフォ トセンサ領域におけるポテンシャルの分布 を立体的に示す説明図であり、 X軸が水平方向、 Y軸がポテンシ ャル深さ方向、 Z軸が基板の深さ方向をそれぞれ示し、 X軸と Y 軸で構成される面が基板表面を示している。  Fig. 13 is an explanatory diagram showing the distribution of potential in the photosensor region in a three-dimensional manner. The X-axis shows the horizontal direction, the Y-axis shows the potential depth direction, and the Z-axis shows the substrate depth direction. The plane constituted by the X axis and the Y axis indicates the substrate surface.
なお、 これらの図 1 2及ぴ図 1 3 において、 図 1 2の縦軸及ぴ 図 1 3の Y軸は、 上から下に向かってポテンシャルが高いことを 意味している。 また、 各軸に付した目盛り の数値は、 便宜的に調 整した値である。  In FIGS. 12 and 13, the vertical axis in FIG. 12 and the Y axis in FIG. 13 indicate that the potential is higher from the top to the bottom. Also, the numerical values of the scales attached to each axis are values adjusted for convenience.
そして、 このよ うなポテンシャル分布では、 基板の深い部分に おいて、 フォ トセンサのポテンシャルの位置と垂直転送レジスタ の下層部分のポテンシャルの位置が等しく なってしま う。 したがって、 このよ うな状態では、 センサ領域で光電変換され た電荷が横方向 (図 1 3中の矢印 Dで示す) に拡散してしまい、 隣接画素のセンサ領域に入り込む、 ク ロス トーク と呼ぶ問題が発 生するという問題がある。 In such a potential distribution, in a deep part of the substrate, the position of the potential of the photosensor is equal to the position of the potential of the lower part of the vertical transfer register. Therefore, in such a state, the charge photoelectrically converted in the sensor area diffuses in the horizontal direction (indicated by an arrow D in FIG. 13), and enters the sensor area of an adjacent pixel, a problem called crosstalk. There is a problem that occurs.
そこで本発明の目的は、 オーバーフローパリ アを基板の深部に 設けた場合にも、 隣接する画素間のク ロス トークを有効に防止す るこ とが可能な固体撮像素子を提供することにある。 発明の開示  Therefore, an object of the present invention is to provide a solid-state imaging device capable of effectively preventing crosstalk between adjacent pixels even when an overflow barrier is provided deep in a substrate. Disclosure of the invention
本発明は前記目的を達成するため、 半導体基板上に設けられ、 入射光量に応じて電荷を生成する光電変換部を含む複数の画素と 前記半導体基板上に形成され、 前記画素から読み出された前記電 荷を転送する転送部と、 前記半導体基板の内部に形成され、 前記 画素で生じた余剰電荷を半導体基板の裏面方向に排出するための ポテンシャルバリ ァょ り なるオーバーフローバリ ァとを有し、 前 記転送'部の下層領域のポテンシャルは、 前記転送部の最小ポテン シャル位置から前記オーバーフローバリ ァまでの間で、 前記光電 変換部の下層領域のポテンシャルよ り小さ く形成されているこ と を特徴とする。 図面の簡単な説明  In order to achieve the above object, the present invention provides a plurality of pixels including a photoelectric conversion unit that is provided on a semiconductor substrate and generates a charge according to the amount of incident light, and is formed on the semiconductor substrate and read from the pixel. A transfer unit configured to transfer the charge; and an overflow barrier formed inside the semiconductor substrate and configured to discharge a surplus charge generated in the pixel toward a back surface of the semiconductor substrate. The potential of the lower region of the transfer section is formed to be smaller than the potential of the lower region of the photoelectric conversion section between the minimum potential position of the transfer section and the overflow barrier. It is characterized by. BRIEF DESCRIPTION OF THE FIGURES
図 1 は、 本発明の第 1 の実施の形態例による C C Dイメージセ ンサの素子構造を示す断面図であり 、 図 2は、 図 1 に示す C C D イメージセンサのフォ トセンサ及ぴ垂直転送レジスタの各基板断 面におけるポテンシャルの分布を示す説明図であり、 図 3は、 図 1 に示す C C Dイメージセンサのフォ トセンサ領域におけるポテ ンシャルの分布を立体的に示す説明図であり、 図 4は、 本発明の 第 2の実施の形態例による C C Dイメージセンサの素子構造を示 す断面図であり、 図 5 は、 図 4に示す C C Dイメージセンサのフ ォ トセンサ、 垂直転送レジスタ及び画素間部の各基板断面におけ るポテンシャルの分布を示す説明図であり、 図 6 は、 図 4に示すFIG. 1 is a sectional view showing a device structure of a CCD image sensor according to a first embodiment of the present invention. FIG. 2 is a sectional view showing a photo sensor and a vertical transfer register of the CCD image sensor shown in FIG. FIG. 3 is an explanatory diagram showing a potential distribution on a cross section of a substrate. FIG. 3 is an explanatory diagram showing a three-dimensional distribution of a potential in a photosensor region of the CCD image sensor shown in FIG. 1, and FIG. 2 shows the element structure of a CCD image sensor according to a second embodiment. FIG. 5 is an explanatory diagram showing a potential distribution in a cross section of each substrate of the photo sensor, the vertical transfer register, and the pixel-to-pixel portion of the CCD image sensor shown in FIG. 4, and FIG. Shown in Figure 4
C C Dィメージセンサのフォ トセンサ領域におけるポテンシャル の分布を立体的に示す説明図であり、 図 7は、 図 4に示す C C D イメージセンサのォ パーフローバ リ アの形成方法を示す断面図 であり、 図 8 は、 本発明の第 3の実施の形態例による C C Dィメ ージセンサの素子構造を示す断面図であり、 図 9は、 図 8 に示す C C Dイメージセンサのフォ トセンサ、 垂直転送レジスタ及び画 素間部の各基板断面におけるポテンシャルの分布を示す説明図で あり、 図 1 0 は、 従来の C C Dイメージセンサの素子配置を示す 平面図であり 、 図 1 1 は、 図 1 0に示す C C Dイメージセンサの 素子構造を示す断面図であり、 図 1 2は、 図 1 0に示す C C Dィ メージセンサのフォ トセンサ及び垂直転送レジスタの各基板断面 におけるポテンシャルの分布を示す説明図であり、 図 1 3 は、 図 1 0 に示す C C Dイメージセンサのフォ トセンサ領域におけるポ テンシャルの分布を立体的に示す説明図である。 発明を実施するための最良の形態 FIG. 7 is an explanatory view three-dimensionally showing a potential distribution in a photosensor region of the CCD image sensor. FIG. 7 is a cross-sectional view showing a method of forming an overflow barrier of the CCD image sensor shown in FIG. 4, and FIG. FIG. 9 is a cross-sectional view showing the element structure of a CCD image sensor according to a third embodiment of the present invention. FIG. 9 shows a photo sensor, a vertical transfer register, and an inter-pixel portion of the CCD image sensor shown in FIG. FIG. 10 is an explanatory diagram showing a potential distribution in each substrate cross section. FIG. 10 is a plan view showing a device arrangement of a conventional CCD image sensor. FIG. 11 is a device structure of the CCD image sensor shown in FIG. FIG. 12 is a cross-sectional view showing the potential distribution of the photo sensor and the vertical transfer register of the CCD image sensor shown in FIG. A bright view, FIG. 1 3 is an explanatory diagram sterically showing a distribution of Po Tensharu in follower Tosensa region of C C D image sensor shown in FIG. 1 0. BEST MODE FOR CARRYING OUT THE INVENTION
以下、 本発明による固体撮像素子の実施の形態例について説明 する。  Hereinafter, embodiments of the solid-state imaging device according to the present invention will be described.
図 1 は、 本発明の第 1の実施の形態例による C C Dイメージセ ンサの内部素子構造を示す断面図である。 なお、 本例における C C Dイメージセンサの平面方向の素子配列は図 1 0 に示した従来 例と共通であり、 図 1 は図 1 0の a — a断面を示すものである。  FIG. 1 is a cross-sectional view showing an internal element structure of a CCD image sensor according to a first embodiment of the present invention. Note that the element arrangement in the planar direction of the CCD image sensor in this example is common to that of the conventional example shown in FIG. 10, and FIG. 1 shows a cross section taken along line aa of FIG.
図 1 に示すよ う に、 本例のイメージセンサは、 図 1 1 に示すも のと同様に、 半導体基板 ( S i 基板) 1 1 0 の上層に、 フォ トセ ンサ 1 2 2、 垂直転送レジスタ 1 2 4、 及ぴチャネルス ト ップ領 域 1 2 6が形成され、 半導体基板 1 1 0の上面には、 絶縁膜 (シ リ コン酸化膜) 1 4 2 を介して垂直転送レジスタ 1 2 4の転送電 極 (ポリシリ コン膜) 1 4 4が配置され、 その上層に遮光膜 1 4 6 が装着されている。 As shown in FIG. 1, the image sensor of this example has a photo sensor 122 and a vertical transfer register on the upper layer of a semiconductor substrate (Si substrate) 110, similarly to the image sensor shown in FIG. 1 2 4, and channel stop area A region 126 is formed, and a transfer electrode (polysilicon film) of a vertical transfer register 124 is placed on an upper surface of the semiconductor substrate 110 via an insulating film (silicon oxide film) 142. 4 is arranged, and a light shielding film 1 4 6 is mounted thereon.
この遮光膜 1 4 6 には、 フォ トセンサ 1 2 2の受光領域に対応 して開口部 1 4 6 Aが形成され、 この開口部 1 4 6 Aを通して光 がフォ トセンサ 1 2 2に入射される。  The light-shielding film 146 has an opening 146A corresponding to the light receiving area of the photosensor 122, and light enters the photosensor 122 through the opening 146A. .
そして、 フォ トセンサ 1 2 2は、 上層の P +層 1 2 2 Aと下層 の N層 1 2 2 Bを有し、 P +層 1 2 2 Aに光電変換で発生した正 孔が取り込まれ、 N層 1 2 2 Bに信号電荷が生成される。  The photosensor 122 has an upper P + layer 122 A and a lower N layer 122 B, and holes generated by photoelectric conversion are taken into the P + layer 122 A, Signal charges are generated in the N layer 122B.
この N層 1 2 2 Bで生成された信号電荷は、 N層 1 2 2 Bの下 層に形成される空乏層に蓄積され、 フォ トセンサ 1 2 2 と垂直転 送レジスタ 1 2 4 との間に設けられた読み出しゲー ト部の動作に よってフォ トセンサ 1 2 2から垂直転送レジスタ 1 2 4側に読み 出される。  The signal charges generated in the N-layer 122B are accumulated in a depletion layer formed below the N-layer 122B, and the signal charges are generated between the photosensor 122 and the vertical transfer register 124. The data is read from the photosensor 122 to the vertical transfer register 124 by the operation of the read gate unit provided in the memory.
なお、 本例では、 P +層 1 2 2 Aの下に 1層の N層 1 2 2 Bを 設けた構成を示しているが、 基板 1 1 0の深い位置にオーバーフ ローバリ ア及ぴ空乏層を形成する構成の場合、 N層 1 2 2 Bの下 層に低濃度の N—層を設けた構成とするこ とも可能である。  In this example, a configuration is shown in which one N layer 122 B is provided below the P + layer 122 A, but the overflow layer and the depletion layer are located deep in the substrate 110. In the case of forming a layer, a low-concentration N− layer may be provided below the N layer 122 B.
また、 半導体基板 1 1 0の内部領域には、 各フォ トセンサ 1 2 2で生成された信号電荷を N層 1 2 2 Bの下部領域に貯留するた めのオーバーフローバリ ア (O F B ) 1 2 8が設けられている。  In addition, an overflow barrier (OFB) 128 for storing signal charges generated by the photosensors 122 in the lower region of the N layer 122B is provided inside the semiconductor substrate 110. Is provided.
このオーバーフローバリア 1 2 8は、 半導体基板内の不純物分 布を調整するこ と によ り 、 半導体基板 1 1 0の内部領域にポテン シャルによるバリ アを形成し、 信号電荷の漏洩をせき止めるもの である。 また、 過大光量の入射時には、 フォ トセンサ 1 2 2で過 剰に生成された信号電荷が、 このオーバーフローパリア 1 2 8を 越えて半導体基板 1 1 0の裏側に排出されるよ う になっている。 なお、 半導体基板 1 1 0は、 N型基板 1 1 O Aの上層に所定の 方法 (例えばェピタキシャル成長) で高抵抗層 1 1 0 Bを設け、 この高抵抗層 1 1 O Bに各種素子を形成したものであってもよい, その場合には N型基板 1 1 O Aと高抵抗層 1 1 O Bの境界付近に オーバーフローバリ ア 1 2 8が形成される。 The overflow barrier 128 forms a barrier due to a potential in the internal region of the semiconductor substrate 110 by adjusting the impurity distribution in the semiconductor substrate, and prevents leakage of signal charges. is there. Also, when an excessive amount of light is incident, the signal charges excessively generated by the photo sensor 122 are discharged to the back side of the semiconductor substrate 110 through the overflow barrier 128. . In the semiconductor substrate 110, a high-resistance layer 110B is provided on the N-type substrate 11OA by a predetermined method (for example, epitaxial growth), and various elements are formed on the high-resistance layer 11OB. In this case, an overflow barrier 128 is formed near the boundary between the N-type substrate 11 OA and the high-resistance layer 11 OB.
このオーバーフローバリア 1 2 8 は、 例えば、 基板 1 1 0の表 面から 5 μ πι〜 1 0 μ παの深さ位置に形成されているものとする < そして、 本例においては、 垂直転送レジスタ 1 2 4及ぴチヤネ ルス トツプ領域 1 2 6の下層領域の所定位置に、 部分的な Ρ型領 域 1 5 0が形成され、 この Ρ型領域 1 5 0 によって垂直転送レジ スタ 1 2 4及びチャネルス トップ領域 1 2 6 の下層領域における ポテンシャルが調整され、 垂直転送レジスタ 1 2 4 の最大ポテン シャル位置からオーバーフローパリ ァ 1 2 8までの間で、 フォ ト センサ 1 2 2の下層領域のポテンシャルよ り小さ く (すなわち、 低く) 形成されている。  The overflow barrier 128 is formed, for example, at a depth of 5 μπι to 10 μπα from the surface of the substrate 110. <In this example, the vertical transfer register 1 A partial rectangular region 150 is formed at a predetermined position in the lower layer region of the channel top region 124 and the channel stop region 126. The rectangular region 150 forms the vertical transfer register 124 and the channel. The potential in the lower area of the stop area 1 2 6 is adjusted, and the potential in the lower area of the photo sensor 1 2 Smaller (ie, lower).
図 2は、 フォ トセンサ 1 2 2及び垂直転送レジスタ 1 2 4の各 基板断面におけるポテンシャルの分布を示す説明図であり 、 縦軸 はポテンシャルの深さ、横軸は基板表面からの深さを示している。 そして、 実線 Αはフォ トセンサ部分のポテンシャル分布、 破線 B は垂直転送レジスタ部分のポテンシャル分布を示している。なお、 各軸の単位は任意に設定できるものである。  FIG. 2 is an explanatory diagram showing the potential distribution in the cross section of each substrate of the photosensors 122 and the vertical transfer registers 124.The vertical axis represents the depth of the potential, and the horizontal axis represents the depth from the substrate surface. ing. The solid line Α indicates the potential distribution in the photosensor portion, and the dashed line B indicates the potential distribution in the vertical transfer register portion. The unit of each axis can be set arbitrarily.
また、 図 3は、 フォ トセンサ領域におけるポテンシャルの分布 を立体的に示す説明図であり、 X軸が水平方向、 Y軸がポテンシ ャル深さ方向、 Z軸が基板の深さ方向をそれぞれ示し、 X軸と Y 軸で構成される面が基板表面を示している。 なお、 各軸の単位は 任意に設定できるものである。 また、 「基板の深さ方向」 とは、 基 板の表面から裏面に向かう方向のこ とである。  FIG. 3 is an explanatory view three-dimensionally showing the distribution of potential in the photosensor region, in which the X axis indicates the horizontal direction, the Y axis indicates the potential depth direction, and the Z axis indicates the substrate depth direction. The plane constituted by the X axis and the Y axis indicates the substrate surface. The unit of each axis can be set arbitrarily. The “substrate depth direction” is a direction from the front surface to the rear surface of the substrate.
また、 これらの図 2及び図 3 において、 図 2 の縦軸及び図 3 の Y軸は、 上から下に向かってポテンシャルが高いこ とを意味して いる。 2 and 3, the vertical axis of FIG. 2 and the vertical axis of FIG. The Y-axis means that the potential increases from top to bottom.
上述した図 1 2及び図 1 3に示す従来例のポテンシャル分布で は、 基板の深い部分において、 フォ トセンサのポテンシャルの位 置と垂直転送レジスタの下層部分のポテンシャルの位置が等しく なっていたが、 本例では、 図 2及び図 3 に示すよ う に、 垂直転送 レジスタ 1 2 4及びチャネルス ト ップ領域 1 2 6の下層領域にお けるポテンシャルが、 垂直転送レジスタ 1 2 4の最小ポテンシャ ル位置からオーバーフローパリ ァ 1 2 8までの間で、 フォ トセン サ 1 2 2の下層領域のポテンシャルよ り小さ く (すなわち、 低く ) 形成されている。  According to the potential distribution of the conventional example shown in FIGS. 12 and 13 described above, the position of the potential of the photosensor is equal to the position of the potential of the lower layer of the vertical transfer register in the deep part of the substrate. In this example, as shown in FIGS. 2 and 3, the potential in the lower layer area of the vertical transfer register 124 and the channel stop area 126 is the minimum potential of the vertical transfer register 124. Between the position and the overflow par 128, the potential of the lower part of the photosensor 122 is smaller (ie, lower) than the potential of the lower region.
したがって、 本例の状態では、 センサ領域で光電変換された電 荷は、 両側の垂直転送レジスタ 1 2 4及ぴチヤネルス トップ領域 1 2 6 の下層領域におけるポテンシャルが低いため、 このポテン シャルバリ アに遮られて、 容易に拡散できない状態となり、 隣接 画素のセンサ領域に漏洩しにく く なるこ とから、 ク ロス トークを 有効に防止できるこ とになる。  Therefore, in the state of this example, the charge photoelectrically converted in the sensor area has a low potential in the lower layer area of the vertical transfer registers 124 and the channel stop area 126 on both sides, and is blocked by this potential barrier. As a result, the state cannot be easily diffused and it is difficult to leak into the sensor area of the adjacent pixel, so that crosstalk can be effectively prevented.
次に、 このよ う な第 1 の実施の形態例によるポテンシャル分布 を得るための製造方法の一例について簡単に説明する。  Next, an example of a manufacturing method for obtaining such a potential distribution according to the first embodiment will be briefly described.
まず、 半導体基板 1 1 0 ( Ν型基板 1 1 O A ) の上層 (すなわ ち、 基板表面からオーバーフローバリアまでの間) に例えばェピ タキシャル成長によって 1 0 0 Ω以上の高抵抗基板 (高抵抗層 1 1 0 B ) を形成する。  First, a high-resistance substrate (high-resistance substrate of 100 Ω or more, for example, by epitaxy) is formed over the semiconductor substrate 110 (Ν substrate 11OA) (ie, from the substrate surface to the overflow barrier). The layer 110B) is formed.
また、 半導体基板 1 1 0の表面からボロン等の P型不純物をィ オン注入するこ とによ り、 オーバーフローパリ ア 1 2 8 となる P 型領域を形成する。  In addition, a P-type impurity such as boron is ion-implanted from the surface of the semiconductor substrate 110 to form a P-type region which becomes the overflow barrier 128.
また、 垂直転送レジスタ 1 2 4及ぴチャネルス ト ップ領域 1 2 6の下層部分の深い位置 (オーバーフローパリ 了 1 2 8 よ り も上 層) に、 P型不純物をイオン注入するこ とによ り、 P型領域 1 5 0 を形成する。 Also, the vertical transfer register 124 and the channel stop area 126 are located deeper in the lower part (above the overflow end 128). A P-type region 150 is formed by ion-implanting a P-type impurity into the layer.
このよ う にして、 高抵抗層 1 1 O B中に部分的な高濃度の P型 領域 1 5 0 を形成すことができる。 ただし、 これは一例であり 、 種々の方法が利用できる。  In this way, a partial high-concentration P-type region 150 can be formed in the high-resistance layer 110B. However, this is only an example, and various methods can be used.
次に、 本発明の第 2の実施の形態例について説明する。  Next, a second embodiment of the present invention will be described.
本発明の第 2の実施の形態例では、 よ り有効なバリ ア効果を発 揮するために、 上述したオーバーフローパリアを形成するための P型ゥエル領域のう ち、 フォ トセンサ部 (光電変換部) に対応す る領域に部分的な低濃度領域を形成するこ とによ り 、 垂直転送レ ジスタ(転送部)のオーバーフローパリ アにおけるポテンシャル、 及び隣接する画素の中間部のオーバーフローバリ アにおけるポテ ンシャルが、 フォ トセンサ部のオーバーフローバリ ァにおけるポ テンシャルよ り小さ く なるよ う にし、 オーバーフローパリ ァでの 電荷の漏洩をさ らに完全に防止するよ う にしたものである。  In the second embodiment of the present invention, in order to exhibit a more effective barrier effect, a photo sensor unit (a photoelectric conversion unit) out of the P-type well region for forming the overflow barrier described above. By forming a partial low-concentration region in the region corresponding to (1), the potential at the overflow barrier of the vertical transfer register (transfer section) and the potential at the overflow barrier at the intermediate portion between adjacent pixels are obtained. In this case, the potential is smaller than the potential of the overflow barrier in the photosensor section, and the leakage of the electric charge in the overflow barrier is further completely prevented.
図 4は、 本発明の第 2の実施の形態例による C C Dイメージセ ンサの内部素子構造を示す断面図である。 なお、 図 1 に示すもの と共通の構成要素については同一符号を付して説明は省略する。 また、 本例における C C Dイメージセンサの平面方向の素子配列 は図 1 0 に示した従来例と共通であり、 図 4は図 1 0の a — a断 面を示すものである。  FIG. 4 is a cross-sectional view showing the internal element structure of the CCD image sensor according to the second embodiment of the present invention. Note that the same components as those shown in FIG. 1 are denoted by the same reference numerals and description thereof will be omitted. In addition, the element arrangement in the planar direction of the CCD image sensor in this example is common to the conventional example shown in FIG. 10, and FIG. 4 shows an a-a cross section of FIG.
本例のイメージセンサにおいても、 半導体基板 ( S i 基板) 1 1 0を構成する N型基板 1 1 O Aと高抵抗層 1 1 0 B との境界付 近にオーバーフローバリ ァ 1 6 0が形成されているが、 このォー パーフローパリ ア 1 6 0 を形成する P型領域は、 フォ トセンサ 1 2 2に対応する領域に部分的な低濃度領域 1 6 2が形成されてお り、 その他の領域は通常濃度領域 1 6 4 となっている。  In the image sensor of this example, too, an overflow barrier 160 is formed near the boundary between the N-type substrate 11 OA constituting the semiconductor substrate (Si substrate) 110 and the high-resistance layer 110 B. However, in the P-type region forming this overflow flow barrier 160, a partial low-concentration region 162 is formed in a region corresponding to the photosensor 122, and other regions are formed. The area is a normal density area 164.
これによ り 、 垂直転送レジスタ 1 2 4 のオーバーフローバリ ア におけるポテンシャル、 及ぴ隣接する画素の中間部のオーバーフ ローバリ ァにおけるポテンシャルが、 フォ トセンサ 1 2 2 のォー パーフローバリ ァにおけるポテンシャルよ り小さ く (すなわち、 低く) なっている。 As a result, the overflow barrier of the vertical transfer register 124 is obtained. And the potential at the overflow barrier in the middle of the adjacent pixels is smaller (ie, lower) than the potential at the overflow barrier of the photosensor 122.
図 5は、 フォ トセンサ 1 2 2、 垂直転送レジスタ 1 2 4、 及び 隣接画素の中間部の各基板断面におけるポテンシャルの分布を示 す説明図であり、 縦軸はポテンシャルの深さ、 横軸は基板表面か らの深さを示している。 そして、 実線 Aはフォ トセンサ部分のポ テンシャル分布、 破線 Bは垂直転送レジスタ部分のポテンシャル 分布、 一点破線 Cは隣接画素の中間部のポテンシャル分布を示し ている。 なお、 各軸の単位は任意に設定できるものである。  FIG. 5 is an explanatory diagram showing the distribution of the potential in the photosensors 122, the vertical transfer registers 124, and the cross-sections of the respective substrates in the middle part of the adjacent pixels. It shows the depth from the substrate surface. The solid line A indicates the potential distribution in the photosensor portion, the broken line B indicates the potential distribution in the vertical transfer register portion, and the dashed-dotted line C indicates the potential distribution in the intermediate portion between adjacent pixels. The unit of each axis can be set arbitrarily.
また、 図 6 は、 フォ トセンサ領域におけるポテンシャルの分布 を立体的に示す説明図であり、 X軸が水平方向、 Y軸がポテンシ ャル深さ方向、 Z軸が基板の深さ方向をそれぞれ示し、 X軸と Y 軸で構成される面が基板表面を示している。 なお、 各軸の単位は 任意に設定できるものである。  FIG. 6 is an explanatory view three-dimensionally showing a potential distribution in the photosensor region, in which the X-axis indicates the horizontal direction, the Y-axis indicates the potential depth direction, and the Z-axis indicates the substrate depth direction. The plane constituted by the X axis and the Y axis indicates the substrate surface. The unit of each axis can be set arbitrarily.
また、 これらの図 5及び図 6 において、 図 5の縦軸及ぴ図 6 の Y軸は、 上から下に向かってポテンシャルが高いこ とを意味して いる。  In FIGS. 5 and 6, the vertical axis in FIG. 5 and the Y axis in FIG. 6 indicate that the potential increases from top to bottom.
上述した図 2及び図 3に示す第 1 の実施の形態例のポテンシャ ル分布では、 フォ トセンサ部のポテンシャルと垂直転送レジスタ のポテンシャルがオーバーフローパリ ァの深さ位置で一致してい たが、 本例では、 図 5及ぴ図 6 に示すよ う に、 垂直転送レジスタ 1 2 4 のオーバーフローパリア 1 6 0におけるポテンシャル、 及 ぴ隣接する画素の中間部のオーバーフローバリ ア 1 6 0における ポテンシャルが、 フォ トセンサ 1 2 2のオーバーフローパリ ア 1 6 0 におけるポテンシャルより小さ く なる (図 5及び図 6 にポテ ンシャル差 Gで示す) よ う にし、 オーバーフローバリ ア 1 6 0で の電荷の漏洩をさ らに完全に防止し、 ク ロス トークの抑制効果と 感度向上効果を得るこ とができる。 In the potential distribution of the first embodiment shown in FIGS. 2 and 3 described above, the potential of the photo sensor unit and the potential of the vertical transfer register coincide at the depth position of the overflow transistor. Then, as shown in FIG. 5 and FIG. 6, the potential at the overflow barrier 160 of the vertical transfer register 124 and the potential at the overflow barrier 160 in the middle part of the adjacent pixel are determined by the photo sensor. The potential at the overflow barrier 160 is smaller than the potential at the overflow barrier 160 (shown by the potential difference G in FIGS. 5 and 6). This further completely prevents the leakage of the electric charge, thereby obtaining the effect of suppressing crosstalk and the effect of improving sensitivity.
なお、 オーバーフローバリア 1 6 0 の不純物濃度に差を持たせ るこ とによ り、 第 1 の実施の形態例で説明した部分的な P型領域 1 5 0 を設けることなく、 オーバーフローバリ ア 1 6 0の不純物 濃度によって垂直転送レジスタ 1 2 4及びチャネルス トップ領域 1 2 6 の下層領域におけるポテンシャルが調整され、 垂直転送レ ジスタ 1 2 4 の最大ポテンシャル位置からオーバーフローバリ ァ 1 2 8 までの間で、 フォ トセンサ 1 2 2 の下層領域のポテンシャ ルよ り小さ く (すなわち、 低く) 形成されている。 また逆に第 1 の実施の形態例と併用して実施すること も可能である。その他は、 上述した第 1 の実施の形態例と共通であるので説明は省略する。  The difference in the impurity concentration of the overflow barrier 160 allows the overflow barrier 1 to be provided without providing the partial P-type region 150 described in the first embodiment. The potential in the lower region of the vertical transfer register 124 and the channel stop region 126 is adjusted by the impurity concentration of 60, and between the maximum potential position of the vertical transfer register 124 and the overflow barrier 128. And is formed smaller (ie, lower) than the potential in the lower region of the photosensor 122. Conversely, it can be implemented in combination with the first embodiment. The other points are the same as those of the first embodiment, and the description is omitted.
次に、 このよ う な第 2の実施の形態例によるポテンシャル分布 を得るための製造方法の 2つの例について簡単に説明する。  Next, two examples of a manufacturing method for obtaining a potential distribution according to the second embodiment will be briefly described.
上述のよ うなオーバーフローバリ ア 1 6 0の濃度分布を得るに は、 オーバーフローパリァ全体に対する通常濃度の P型不純物の イオン注入とフォ トセンサ 1 2 2の対応領域への N型不純物のィ オン注入とを組み合わせる方法 (第 1 の方法) と、 オーバーフロ 一パリ ァ全体に対する低濃度の P型不純物のイオン注入とフォ ト センサ 1 2 2の対応領域への低濃度の P型不純物のイオン注入と を組み合わせる方法 (第 2 の方法) とを用いるこ とができる。  In order to obtain the concentration distribution of the overflow barrier 160 as described above, ion implantation of a normal concentration P-type impurity into the entire overflow barrier and ion implantation of an N-type impurity into the corresponding region of the photosensor 122 are required. (First method), ion implantation of low-concentration P-type impurities into the entire overflow barrier, and ion implantation of low-concentration P-type impurities into the corresponding region of the photosensor 122. (The second method) can be used.
まず、 第 1 の方法を図 4に基づき説明する。  First, the first method will be described with reference to FIG.
この方法では、 オーバーフローバリ ア 1 6 0を形成する全体領 域に対して従来と同様の濃度で P型不純物のイオン注入を行う。 次に、 フォ トセンサ 1 2 2の対応領域へ N型不純物のイオン注入 を行う こ とによ り、 この部分の P型不純物濃度を緩和し、 低濃度 領域 1 6 2を形成する。 その他の領域は通常濃度領域 1 6 4 とな る。 次に、 第 2の方法を図 7 に基づき説明する。 In this method, P-type impurity ions are implanted into the entire area where the overflow barrier 160 is to be formed at a concentration similar to that of the related art. Next, by ion-implanting N-type impurities into the corresponding region of the photosensor 122, the P-type impurity concentration in this portion is reduced, and a low-concentration region 162 is formed. The other areas are the normal density areas 164. Next, the second method will be described with reference to FIG.
まず、 図 7 ( A ) において、 オーバーフローバリ ア 1 6 0 を开 成する全体領域に対して低濃度で P型不純物のイオン注入を行い. 不純物領域 1 6 O Aを形成する。  First, in FIG. 7 (A), P-type impurities are ion-implanted at a low concentration into the entire region forming the overflow barrier 160. An impurity region 16OA is formed.
次に、 図 7 ( B ) において、 フォ トセンサ 1 2 2の対応領域を 除く 、 垂直転送レジスタ 1 2 4 と画素中間部の対応領域に対し、 2回目の低濃度の P型不純物のイオン注入を行う ことによ り 、 こ の部分の P型不純物濃度が通常濃度となり、 通常濃度領域 1 6 4 となる。  Next, in FIG. 7 (B), the second ion implantation of the low-concentration P-type impurity into the vertical transfer register 124 and the corresponding area of the pixel except for the area corresponding to the photosensor 122 is performed. By doing so, the P-type impurity concentration in this portion becomes the normal concentration, and becomes the normal concentration region 164.
また、 2回目のイオン注入を行わなかったフォ トセンサ 1 2 2 の対応領域は、 低濃度のままであり、 これが低濃度領域 1 6 2 と なる。  Further, the corresponding region of the photosensor 122 where the second ion implantation was not performed remains at a low concentration, and this becomes the low concentration region 16 2.
なお、 1 回目のイオン注入と 2回目のイオン注入の ドーズ量の 比率は、 フォ トセンサ部のオーバーフローバリ ァのポテンシャノレ をどの程度深くするかで決めるこ とになる。  The dose ratio between the first ion implantation and the second ion implantation is determined by how deep the potential of the overflow barrier in the photosensor section is.
このよ うな第 2 の方法では、 同じ P型不純物を注入するため、 不純物による飛程差 (ボロン >燐>ヒ素) を配慮することなく 、 イオン注入を行う ことが可能であり、 その分、 よ り深い位置まで オーバーフローパリ アを容易に形成するこ とができる利点がある 次に、 本発明の第 3 の実施の形態例について説明する。  In the second method, since the same P-type impurity is implanted, it is possible to perform ion implantation without considering the range difference (boron> phosphorus> arsenic) due to the impurity. There is an advantage that the overflow barrier can be easily formed to a deeper position. Next, a third embodiment of the present invention will be described.
本発明の第 3の実施の形態例では、 垂直転送レジスタ (転送部) においてク ロス トークを抑制する有効なバリ ア効果を発揮させる と ともに、 フォ トセンサ部 (光電変換部) のポテンシャルを大き くすることによ り 、 フォ トセンサ部と垂直転送レジスタとのポテ ンシャルの差を大きく してパリ ア効果を強めるよ う にしたもので ある。  In the third embodiment of the present invention, the vertical transfer register (transfer section) exhibits an effective barrier effect for suppressing crosstalk and increases the potential of the photosensor section (photoelectric conversion section). By doing so, the potential difference between the photosensor section and the vertical transfer register is increased to enhance the par- ial effect.
図 8は、 本発明の第 3の実施の形態例による C C Dイメージセ ンサの内部素子構造を示す断面図である。 なお、 図 1 に示すもの と共通の構成要素については同一符号を付して説明は省略する。 また、 本例における C C Dィメージセンサの平面方向の素子配列 は図 1 0 に示した従来例と共通であり、 図 8は図 1 0の a — a断 面を示すものである。 FIG. 8 is a sectional view showing the internal element structure of a CCD image sensor according to the third embodiment of the present invention. The one shown in Fig. 1 The same reference numerals are given to the same components as those described above, and description thereof will be omitted. The element arrangement in the planar direction of the CCD image sensor in this example is common to that of the conventional example shown in FIG. 10, and FIG. 8 shows an a-a cross section of FIG.
本例においては、 図 8 に示すよ う に、 垂直転送レジスタ 1 2 4 及ぴチャネルス小 ップ領域 1 2 6の下層領域の所定位置に、 部分 的な P型領域 1 5 0がそれぞれ独立して 4層形成され、 この P型 領域 1 5 0によって垂直転送レジスタ 1 2 4及びチャネルス ト ッ プ領域 1 2 6 の下層領域におけるポテンシャルが調整され、 垂直 転送レジスタ 1 2 4 の最大ポテンシャル位置からオーバーフロー バリ ア 1 2 8までの間で、 フォ トセンサ 1 2 2の下層領域のポテ ンシャルより小さ く (低く) 形成されている。  In this example, as shown in FIG. 8, a partial P-type region 150 is independently provided at a predetermined position in the lower region of the vertical transfer register 124 and the channel drop region 126. The P-type region 150 adjusts the potential in the lower region of the vertical transfer register 124 and the channel stop region 126, and the maximum potential position of the vertical transfer register 124 is formed. It is formed smaller (lower) than the potential in the lower region of the photosensor 122 between the overflow barrier 128 and the overflow barrier 128.
また、 本例においては、 さ らに、 フォ トセンサ 1 2 2の下層領 域の所定位置に、 部分的な N型領域 1 5 1 がそれぞれ独立して 7 層形成され、 この N型領域 1 5 1 によってフォ トセンサ 1 2 2 の 下層領域におけるポテンシャルが調整され、 第 1 の実施の形態例 より もさ らにフォ トセンサの 1 2 2の下層領域のポテンシャルが 大き く (高く) 形成されている。 N型領域 1 5 1 は、 P型領域 1 5 0 とは各々異なる深さ となるよ う に形成されている。  Further, in this example, seven layers of partial N-type regions 151 are independently formed at predetermined positions in the lower region of the photosensor 122, and the N-type regions 15 By 1, the potential in the lower region of the photosensor 122 is adjusted, and the potential in the lower region of the photosensor 122 is formed to be larger (higher) than in the first embodiment. N-type region 151 is formed so as to have a different depth from P-type region 150.
図 9は、 フォ トセンサ 1 2 2、 垂直転送レジスタ 1 2 4、 及び 隣接画素の中間部の各基板断面におけるポテンシャルの分布を示 す説明図であり、 縦軸はポテンシャルの深さ、 横軸は基板表面か らの深さを示している。 そして、 実線 Aはフォ トセンサ部分のポ テンシャル分布、 破線 Bは垂直転送レジスタ部分のポテンシャル 分布を示している。 なお、 各軸の単位は任意に設定できるもので ある。  FIG. 9 is an explanatory diagram showing the distribution of the potential in the photosensors 122, the vertical transfer registers 124, and the cross-section of each substrate in the middle part of the adjacent pixel. The vertical axis represents the potential depth, and the horizontal axis represents the potential. It shows the depth from the substrate surface. The solid line A shows the potential distribution in the photo sensor portion, and the broken line B shows the potential distribution in the vertical transfer register portion. The unit of each axis can be set arbitrarily.
本例では、 図 9 に示すよ うに、 垂直転送レジスタ 1 2 4及びチ ャネルス ト ップ領域 1 2 6 の下層領域におけるポテンシャルが、 垂直転送レジスタ 1 2 4 の最小ポテンシャル位置からオーバーフ ローバリ ア 1 2 8までの間で、 フォ トセンサ 1 2 2の下層領域の ポテンシャルよ り小さ く (すなわち、 低く) 形成されている。 In this example, as shown in FIG. 9, the potential in the lower region of the vertical transfer register 124 and the channel stop region 126 is Between the minimum potential position of the vertical transfer register 124 and the overflow barrier 128, it is formed smaller (ie, lower) than the potential of the lower region of the photosensor 122.
また、 本例では、 さ らに、 フォ トセンサ 1 2 2の下層領域のポ テンシャルが、 図 2 に示した第 1 の実施の形態例の場合よ り もさ らに大き く形成されている。  Further, in this example, the potential of the lower layer region of the photosensor 122 is formed larger than in the case of the first embodiment shown in FIG.
したがって、 本例の状態では、 センサ領域で光電変換された電 荷は、 両側の垂直転送レジスタ 1 2 4およびチャネルス ト ップ領 域 1 2 6 の下層領域におけるポテンシャルが低いため、 このポテ ンシャルバリ アに遮られて、 容易に拡散できない状態となり、 隣 接画素のセンサ領域に漏洩しにく く なるこ とから、 ク ロス トーク を有効に防止できることになる。 特に、 本例ではフォ トセンサ 1 2 2の下層領域のポテンシャルが大き く なっていることによ り、 ポテンシャルバリ アとの段差が大き く なり 、 バリ ア効果がよ り 強 く なつているこ とから、 クロス トークをよ り効果的に防止できる こ とになる。  Therefore, in the state of the present example, the charge photoelectrically converted in the sensor area has a low potential in the lower layer area of the vertical transfer registers 124 on both sides and the channel stop area 126, so that this potential barrier As a result, the light cannot be easily diffused into the sensor area of the adjacent pixels, so that it is difficult to leak into the sensor area of the adjacent pixel. Thus, crosstalk can be effectively prevented. In particular, in this example, since the potential in the lower layer region of the photosensor 122 is large, the step with the potential barrier is large, and the barrier effect is stronger. Therefore, crosstalk can be more effectively prevented.
なお、第 3 の実施の形態例では P型領域 1 5 0 を 4層に形成し、 N型領域 1 5 1 を 7層に形成していたが、 P型領域 1 5 0は 4層 に限定されるものではなく 、 1層又は複数層の P型領域を形成す れば同様の効果が得られる。 同様に、 N型領域 1 5 1 は 7層に限 定されるものではなく 、 1層又は複数層の N型領域を形成すれば 同様の効果が得られる。  Although the P-type region 150 is formed in four layers and the N-type region 1501 is formed in seven layers in the third embodiment, the P-type region 150 is limited to four layers. However, similar effects can be obtained by forming one or more layers of P-type regions. Similarly, the N-type region 151 is not limited to seven layers, and the same effect can be obtained by forming one or more N-type regions.
なお、 以上の例は、 本発明をフォ トセンサが縦横して配列され た C C Dイメージセンサについて説明したが、 本発明は、 これに 限定されるものではなく 、 C C Dを用いた他の固体撮像素子につ いても同様に適用し得るものである。  In the above example, the present invention has been described with reference to a CCD image sensor in which photo sensors are arranged vertically and horizontally. However, the present invention is not limited to this, but may be applied to other solid-state imaging devices using CCDs. They can be applied in the same way.
また、 以上の例は、 光電変換部で生成した電子を扱う場合につ いて説明したが、 同様に正孔を极う構成に適用してもよい。 この 場合には、 各半導体領域の P と Nの極性ゃポテンシャルの極性が 逆になる。 すなわち、 本発明におけるポテンシャルの大小 (高低) は絶対値を基準とする意味であるものとする。 In the above example, the case where electrons generated by the photoelectric conversion unit are handled has been described. However, the present invention may be similarly applied to a configuration using holes. this In this case, the polarity of the P and N polarities of each semiconductor region is reversed. That is, the magnitude (high or low) of the potential in the present invention has a meaning based on the absolute value.
以上説明したよ う に本発明の固体撮像素子及びその製造方法に よれば、 転送部の下層領域のポテンシャルが、 その最小ポテンシ ャル位置からオーバーフローバリ ァまでの間で、 光電変換部の下 層領域のポテンシャルよ り小さく なることから、 オーバ フロー パリアを基板の深い位置に形成した場合でも、 光電変換部の下層 領域に蓄積された信号電荷が隣接する転送部側に漏洩するのを防 止できる。  As described above, according to the solid-state imaging device and the method for manufacturing the same of the present invention, the potential of the lower layer region of the transfer unit is set between the minimum potential position and the overflow barrier, and the lower layer of the photoelectric conversion unit is reduced. Since the potential is smaller than the potential of the region, even when the overflow barrier is formed at a deep position in the substrate, it is possible to prevent signal charges accumulated in the lower region of the photoelectric conversion portion from leaking to the adjacent transfer portion. .
また、 本発明の固体撮像素子及ぴその製造方法によれば、 転送 部のオーバーフローバリ ァにおけるポテンシャル、 及ぴ隣接する 画素の中間部のオーバーフローバリ アにおけるポテンシャルが、 光電変換部のオーバーフローパリ ァにおけるポテンシャルよ り小 さ く なるこ とから、 オーバーフローバリアを基板の深い位置に形 成した場合でも、 光電変換部の下層領域に蓄積された信号電荷が 隣接する転送部や画素側に漏洩するのを防止できる。  Further, according to the solid-state imaging device and the method for manufacturing the same of the present invention, the potential in the overflow barrier of the transfer unit and the potential in the overflow barrier of the middle part of the adjacent pixels are reduced in the overflow barrier of the photoelectric conversion unit. Since the potential is smaller than the potential, even if the overflow barrier is formed at a deep position in the substrate, the signal charges accumulated in the lower layer region of the photoelectric conversion portion do not leak to the adjacent transfer portion or pixel side. Can be prevented.
この結果、 半導体基板の深い位置にオーバーフローパリアを形 成したこ とに伴う ク ロス トークの発生をなく して画質の劣化を防 止しつつ、 各画素における蓄積電荷量の増大を図るこ とができ、 感度の向上を実現できる効果がある。  As a result, it is possible to eliminate the occurrence of crosstalk due to the formation of the overflow barrier at a deep position in the semiconductor substrate, to prevent the image quality from deteriorating, and to increase the accumulated charge amount in each pixel. This has the effect of improving sensitivity.

Claims

請求の範囲 The scope of the claims
1 . 基板の表面に設けられ、 入射光を電荷に変換するフォ トセン サ部と、  1. A photo sensor unit provided on the surface of the substrate for converting incident light into electric charges;
前記基板の表面に形成され、 前記フォ トセンサ部から読み出さ れた前記電荷を転送する転送部と、  A transfer unit formed on the surface of the substrate and transferring the charge read from the photosensor unit;
前記基板の内部に形成され、 前記電荷の不要分を排出するォー バーフローパリ アとを有し、 前記基板の深さ方向において、前記転送部下のポテンシャルが、 その最小ポテンシャル位置から前記オーバーフローバリ アまでの 間に亘つて、 前記.フォ トセンサ部下のポテンシャルよ り小さ く形 成されている固体撮像素子。  An overflow barrier formed inside the substrate, for discharging an unnecessary portion of the electric charge, wherein a potential under the transfer portion in a depth direction of the substrate is changed from the minimum potential position to the overflow barrier. A solid-state imaging device formed to be smaller than the potential below the photosensor portion over a period up to a point.
2 . 前記転送部下に一又は複数の不純物領域が形成されている請 求の範囲第 1項に記載の固体撮像素子。  2. The solid-state imaging device according to claim 1, wherein one or more impurity regions are formed below the transfer unit.
3 . 前記フォ トセンサ部下に一又は複数の不純物領域が形成され ている請求の範囲第 1項に記載の固体撮像素子。  3. The solid-state imaging device according to claim 1, wherein one or more impurity regions are formed below the photosensor portion.
4 . 前記フォ トセンサ部下に形成された一又は複数の第 2の不純 物領域が、 前記不純物領域とは各々異なる深さ となるよ う に形成 されている請求の範囲第 2項に記載の固体撮像素子。  4. The solid according to claim 2, wherein one or a plurality of second impurity regions formed below the photosensor portion are formed so as to have different depths from the impurity regions. Imaging device.
5 . 前記不純物領域が前記基板の深さ方向において 4層に形成さ れ、 前記第 2 の不純物領域が前記基板の深さ方向において 7層に 形成されている請求の範囲第 4項に記載の固体撮像素子。  5. The method according to claim 4, wherein the impurity region is formed in four layers in the depth direction of the substrate, and the second impurity region is formed in seven layers in the depth direction of the substrate. Solid-state imaging device.
6 . 前記不純物領域が P型であり 、 前記第 2 の不純物領域が N型 である請求の範囲第 4項に記載の固体撮像素子。  6. The solid-state imaging device according to claim 4, wherein the impurity region is P-type, and the second impurity region is N-type.
7 . 前記転送部下の前記オーバーフローバリ ァでのポテンシャル が前記フォ トセンサ部下の前記オーバーフローパリ ァでのポテン シャルより も小さい請求の範囲第 1項に記載の固体撮像素子。 7. The solid-state imaging device according to claim 1, wherein a potential at the overflow barrier below the transfer unit is smaller than a potential at the overflow barrier below the photosensor unit.
8 .前記オーバーフローパリ ァの前記フォ トセンサ部下の領域が、 前記オーバーフローパリ アでの該領域よ り も低濃度である請求の 範囲第 7項に記載の固体撮像素子。 8. The area under the photosensor portion of the overflow barrier has a lower concentration than that of the area in the overflow barrier. Item 9. The solid-state image sensor according to item 7, wherein
9 . 前記オーバーフローバリ ァが前記基板の表面から 3 μ m以上 の深い位置に形成されている請求の範囲第 1項に記載の固体撮像 素子。  9. The solid-state imaging device according to claim 1, wherein the overflow barrier is formed at a depth of at least 3 μm from the surface of the substrate.
1 0 . 前記基板は、 第 1導電型の第 1基板と、 前記第 1基板の上 層に形成され前記第 1基板よ り も高抵抗である第 1導電型又は第 2導電型の第 2基板とから形成された請求の範囲第 1項に記載の 固体撮像素子。 10. The substrate includes a first substrate of a first conductivity type, and a second substrate of a first conductivity type or a second conductivity type formed on an upper layer of the first substrate and having higher resistance than the first substrate. 2. The solid-state imaging device according to claim 1, formed from a substrate.
1 1 . 前記第 1導電型が N型であり、 前記第 2導電型が P型であ る請求の範囲第 1 0項に記載の固体撮像素子。  11. The solid-state imaging device according to claim 10, wherein the first conductivity type is N-type, and the second conductivity type is P-type.
1 2 . 基板の表面に設けられ、 入射光を電荷に変換するフォ トセ ンサ部と、  1 2. A photosensor section provided on the surface of the substrate for converting incident light into electric charges;
前記基板の表面に形成され、 前記フォ トセンサ部から読み出さ れた前記電荷を転送する転送部と、  A transfer unit formed on the surface of the substrate and transferring the charge read from the photosensor unit;
前記基板の内部に形成され、 前記電荷の不要分を排出するォー バーフローパリ アとを有し、 前記転送部下のオーバーフローパリ ァでのポテンシャルが、 前 記フォ トセンサ部下のオーバーフローバリ ァでのポテンシャルよ り も小さい固体撮像素子。  An overflow barrier formed inside the substrate, for discharging an unnecessary portion of the electric charge, wherein the potential at the overflow barrier below the transfer unit is reduced by the overflow barrier below the photosensor unit. Solid-state imaging device smaller than the potential.
1 3 . 前記オーバーフローバリ アの前記フォ トセンサ部下の領域 に、 前記オーバーフローバリ アでの該領域以外の領域よ り も低濃 度である低濃度領域を形成した請求の範囲第 1 2項に記載の固体 撮像素子。  13. A low-density region having a lower concentration than the region other than the overflow barrier in the area below the photosensor portion of the overflow barrier. Solid state imaging device.
1 4 . 基板の表面に設けられ、 入射光を電荷に変換するフォ トセ ンサ部と、 前記基板の表面に形成され、 前記フォ トセンサ部から 読み出された前記電荷を転送する転送部と、 前記基板の内部に形 成され、 前記電荷の不要分を排出するオーバーフローパリ アとを 有する固体撮像素子の製造方法であって、 前記基板における前記転送部の下層に一又は複数の不純物領域を 形成する工程を含む固体撮像素子の製造方法。 14. A photosensor unit provided on the surface of the substrate and converting incident light into electric charge; a transfer unit formed on the surface of the substrate and transferring the electric charge read from the photosensor unit; A method of manufacturing a solid-state imaging device, comprising: an overflow barrier formed inside a substrate, for discharging an unnecessary portion of the charge, A method for manufacturing a solid-state imaging device, comprising a step of forming one or more impurity regions in a lower layer of the transfer section on the substrate.
1 5 . 前記フォ トセンサ部の下層に一又は複数の第 2の不純物領 域を形成する工程を含む請求の範囲第 1 4項に記載の固体撮像素 子の製造方法。  15. The method for manufacturing a solid-state imaging device according to claim 14, comprising a step of forming one or a plurality of second impurity regions in a lower layer of the photosensor portion.
1 6 . 前記第 2の不純物領域を、 前記不純物領域と各々異なる深 さ となるよ う に形成する工程を含む請求の範囲第 1 5項に記載の 固体撮像素子の製造方法。  16. The method for manufacturing a solid-state imaging device according to claim 15, further comprising a step of forming the second impurity regions so as to have different depths from the impurity regions.
1 7 . 前記オーバーフローバリ アの前記フォ トセンサ部下の領域 を、 前記オーバーフローバリ アでの該領域以外の領域よ り も低濃 度に形成する工程を含む請求の範囲第 1 4項に記載の固体撮像素 子の製造方法。  17. The solid according to claim 14, further comprising a step of forming a region under the photosensor portion of the overflow barrier at a lower concentration than a region other than the region in the overflow barrier. Manufacturing method of imaging device.
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JP2007059733A (en) * 2005-08-26 2007-03-08 Sony Corp Solid-state imaging device, method for manufacturing the same, and image photographing device using the same

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US7535038B2 (en) 2009-05-19
TWI266418B (en) 2006-11-11
CN100474607C (en) 2009-04-01
JP4613821B2 (en) 2011-01-19
JPWO2004017411A1 (en) 2005-12-08
TW200409351A (en) 2004-06-01
KR20050048600A (en) 2005-05-24
US20090194794A1 (en) 2009-08-06
CN1685516A (en) 2005-10-19
KR101016539B1 (en) 2011-02-24
US20060163617A1 (en) 2006-07-27

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