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WO2003100839A3 - Procede de realisation par epitaxie d'un film de nitrure de gallium separe de son substrat - Google Patents

Procede de realisation par epitaxie d'un film de nitrure de gallium separe de son substrat Download PDF

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Publication number
WO2003100839A3
WO2003100839A3 PCT/FR2003/001615 FR0301615W WO03100839A3 WO 2003100839 A3 WO2003100839 A3 WO 2003100839A3 FR 0301615 W FR0301615 W FR 0301615W WO 03100839 A3 WO03100839 A3 WO 03100839A3
Authority
WO
WIPO (PCT)
Prior art keywords
gallium nitride
substrate
gan
nitride film
epitaxial growth
Prior art date
Application number
PCT/FR2003/001615
Other languages
English (en)
Other versions
WO2003100839A2 (fr
Inventor
Hacene Lahreche
Gilles Nataf
Bernard Beaumont
Original Assignee
Lumilog
Hacene Lahreche
Gilles Nataf
Bernard Beaumont
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lumilog, Hacene Lahreche, Gilles Nataf, Bernard Beaumont filed Critical Lumilog
Priority to EP03755219A priority Critical patent/EP1514297A2/fr
Priority to US10/516,358 priority patent/US7488385B2/en
Priority to JP2004508396A priority patent/JP2005527978A/ja
Priority to AU2003255613A priority patent/AU2003255613A1/en
Publication of WO2003100839A2 publication Critical patent/WO2003100839A2/fr
Publication of WO2003100839A3 publication Critical patent/WO2003100839A3/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76248—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using lateral overgrowth techniques, i.e. ELO techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/018—Bonding of wafers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S117/00—Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
    • Y10S117/915—Separating from substrate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

La présente invention concerne l'élaboration de films de nitrure de gallium par épitaxie avec des densités de défauts réduites. Elle a pour objet un procédé de réalisation d'un film de nitrure de gallium (GaN) par dépôt de GaN par épitaxie, caractérisé en ce que le dépôt de GaN comporte au moins une étape de surcroissance épitaxiale latérale (ELO) et en ce qu'il comporte une étape de séparation d'une partie de la couche de GaN de son substrat par fragilisation par implantation d'ions dans la couche de GaN directement. Elle concerne aussi les films de GaN susceptibles d'être obtenus par ce procédé ainsi que les composants optoélectroniques et électroniques munis de ces films de nitrure de gallium.
PCT/FR2003/001615 2002-05-28 2003-05-28 Procede de realisation par epitaxie d'un film de nitrure de gallium separe de son substrat WO2003100839A2 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP03755219A EP1514297A2 (fr) 2002-05-28 2003-05-28 Procede de realisation par epitaxie d un film de nitrure de gallium separe de son substrat
US10/516,358 US7488385B2 (en) 2002-05-28 2003-05-28 Method for epitaxial growth of a gallium nitride film separated from its substrate
JP2004508396A JP2005527978A (ja) 2002-05-28 2003-05-28 基板から分離された窒化ガリウムの膜をエピタキシーにより製造する方法
AU2003255613A AU2003255613A1 (en) 2002-05-28 2003-05-28 Method for epitaxial growth of a gallium nitride film separated from its substrate

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0206486A FR2840452B1 (fr) 2002-05-28 2002-05-28 Procede de realisation par epitaxie d'un film de nitrure de gallium separe de son substrat
FR02/06486 2002-05-28

Publications (2)

Publication Number Publication Date
WO2003100839A2 WO2003100839A2 (fr) 2003-12-04
WO2003100839A3 true WO2003100839A3 (fr) 2004-04-08

Family

ID=29558766

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2003/001615 WO2003100839A2 (fr) 2002-05-28 2003-05-28 Procede de realisation par epitaxie d'un film de nitrure de gallium separe de son substrat

Country Status (6)

Country Link
US (1) US7488385B2 (fr)
EP (1) EP1514297A2 (fr)
JP (2) JP2005527978A (fr)
AU (1) AU2003255613A1 (fr)
FR (1) FR2840452B1 (fr)
WO (1) WO2003100839A2 (fr)

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US6380108B1 (en) * 1999-12-21 2002-04-30 North Carolina State University Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on weak posts, and gallium nitride semiconductor structures fabricated thereby
US6355497B1 (en) * 2000-01-18 2002-03-12 Xerox Corporation Removable large area, low defect density films for led and laser diode growth
WO2002043112A2 (fr) * 2000-11-27 2002-05-30 S.O.I.Tec Silicon On Insulator Technologies Procede de fabrication d'un substrat

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EP1514297A2 (fr) 2005-03-16
WO2003100839A2 (fr) 2003-12-04
JP2005527978A (ja) 2005-09-15
AU2003255613A1 (en) 2003-12-12
FR2840452B1 (fr) 2005-10-14
AU2003255613A8 (en) 2003-12-12
US7488385B2 (en) 2009-02-10
FR2840452A1 (fr) 2003-12-05
US20050217565A1 (en) 2005-10-06
JP2010251776A (ja) 2010-11-04

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