WO2003056812A1

WO2003056812A1 - Method for producing an image which is composed of two stored images

Info

Publication number: WO2003056812A1
Application number: PCT/EP2002/014265
Authority: WO
Inventors: Reiner Noske
Original assignee: Bts Holding International Bv
Priority date: 2001-12-28
Filing date: 2002-12-14
Publication date: 2003-07-10
Also published as: DE10164337A1; AU2002356656A1

Abstract

In a method for producing an image which is composed of two stored images, with video signals which represent both images being buffer-stored by means of a random access memory (SDRAM), video signals which represent a first image are written to a first memory area, and video signals which represent at least one second image are written to at least one second memory area in the random access memory. Video signals are read pixel-by-pixel alternately from the first memory area and from the at least one second memory area. Video signal components of the first image in a first image area and video signal components of the at least one second image in a second image area are passed to an output.

Description

DESCRIPTION

METHOD FOR PRODUCING AN IMAGE WHICH IS COMPOSED OF TWO STORED IMAGES

Technical field

The invention relates to a method for producing an image which is composed of two stored images, with video signals which represent both images being buffer-stored by means of a random access memory (SDRAM) .

Background to the invention

When processing stored images for the purpose of reproduction in an improved manner especially with regard to the sensation, it is frequently necessary to compare them with reference images. Thus, particularly for color correction of films, the so-called split screen method is used for setting the correction factors when scanning the films, in which the colorist stores one of the images as a reference image and can see a portion of this reference image, for example half of it, during subsequent correction of further images, on the control monitor alongside the respective image to be corrected (main image) and, if necessary, the colors of the image to be corrected can be matched to those of the reference image.

Modern film scanners have a frame memory, which, in detail, has various functions depending on the embodiments of the film scanner, for example conversion of progressive video signals to video signals with intermediate lines, reading of the video signals in accordance with various Standards or reproduction at rates other than the standard rate (slow motion, quick motion, -^"still pictures). Description of the invention

The method according to the invention is distinguished in that video signals which represent a first image are written to a first memory area, and video signals which represent at least one second image are written to at least one second memory area in the random access memory, wherein video signals are read pixel-by-pixel alternately from the first memory area and from the at least one second memory area, and wherein video signal components of the first image in a first image area and video signal components of the at least one second image in a second image area are passed to an output. In this case, provision is preferably made for the image areas to be adjustable.

The method according to the invention makes use, in a particularly advantageous, manner, of the characteristics of the memories which are used in the method of the generic type of the main claim. These memories, which are in particular in the form of film scanners, require a relatively large capacity in any case so that it is possible to store a second image - also referred to as a reference image in the following text - with little effort. If necessary, a number of reference images may also be stored. The process of reading the memory pixel- by-pixel can also be carried out with little effort by suitable addressing. By way of example, SDRAMs allow simple switching of the bank address for this purpose. However, the process of reading pixel-by-pixel allows particularly advantageous further processing and selection of the images, without any additional memory being required for producing the split screen image.

A further advantage of the method according to the invention is that the video signals which are read from the memory contain in their entirety both the main image and the at least one reference image. For selection of the components of the various images, there is then no need to revert to addressing and controlling the main memory (SDRAM) . Thus, for example, the boundary between the main image and the reference image can be varied as required by means of a key signal, without any change being required to the addressing.

In order to make it possible to use different clock rates for reading and writing, the random access memory may be followed by a further memory (FIFO) , which is configured for writing and reading at different clock rates. In order that the further memory neither overflows nor becomes empty, these devices have a controller for reading from the random access memory, which takes account of the filling level of the further memory.

The method according to the invention provides for such devices that the video signals, which are read alternately pixel-by-pixel, are written to the further memory, and that, from the video signals which are read from the further memory, video signal components of the first image in a first image area and video signal components of the at least one second image in a second image area are passed to an output. This avoids any further increase in the addressing complexity for the process of addressing the random access memory, which process is already extremely complicated in any case.

In order to allow broadband digital video signals to be processed as well using the method according to the invention at the rate at which the currently available memory modules read and write, one development of the invention provides that the video signals are written, split into a number of parallel data streams, to the random access memory and are read in a number of parallel data streams from the random access memory, are passed through the further memory and are then combined to form a video signal which contains both images. In this case, the image which is composed of the two images can be produced in a particularly advantageous manner in that the video signals which are read from the further memory are passed on in such a way that the data streams which represent the first image are separated from one another by the data streams which represent the second image, and the data which is associated with the respective image area is selected from the separate data streams as a function of a binary split signal .

Brief description of the drawing

Exemplary embodiments of the invention will be explained in more detail in the following description and are illustrated in a number of figures in the drawing, in which:

Figure 1 shows a memory device which is designed for carrying out the method according to the invention,

Figure 2 shows, schematically, the illustration of how the video signals are split into a number of data streams,

Figure 3 shows, schematically, read and write processes, as well as the control of SDRAM which is carried out between these processes,

Figure 4 and Figure 5 show schematic illustrations of video data, and

Figure 6 shows a split image, likewise illustrated schematically.

Description of the exemplary embodiment The arrangement shown in Figure 1 is supplied via an input 2 with digital video signals which are split, in a demultiplexer 3, into four parallel data streams. This is done by first of all in each case buffer-storing digital video signals with a delay equal to the duration of one pixel, and then in each case taking the data of a pixel from the four delayed digital video signals at the same time. This process is illustrated schematically in Figure 2, with pulses for in each case one television line being illustrated in line a, for example horizontal pulses from the digital video signals supplied at 2. Lines b to e show the digital video signals which are each being delayed by the duration of one pixel, with the pixels being numbered 0 to 9, etc. The pixels identified by vertical rectangles are then transmitted in parallel to the SDRAM 1 (Figure 1) . These are the pixels 0, 1, 2, 3 at the time tl, and the pixels 4, 5, 6, 7 at the time t2. This splitting between four channels and writing of the respective fourth pixel results in data packets which are compressed in comparison to the supplied lines of the video signal .

One color component of one pixel is in each case reproduced by a data word with a length of 10 bits. However, other bit lengths are also possible. To make the illustration clearer, the processing of a number of color components is not shown in detail in the exemplary embodiment . It can be assumed that a number of data streams, for example for R, G and B or Y, CR and CB, are processed in parallel in a corresponding manner. It is likewise possible, when supplying video signals which are based on progressive scanning and are used later as video signals with an intermediate line, to provide separate memories or memory areas for the even-numbered and odd- numbered lines.

The data streams indicated in the lines b to e in Figure 2 are then written to the random access memory 1, where they are buffer-stored. The SDRAM 1 receives addresses ADDR and control data CONTR from an SDRAM controller 8. Furthermore, the SDRAM 1 and the SDRAM controller 8 receive the clock CKA. This clock is used for reading and writing in the SDRAM 1.

The SDRAM controller 8 can also be supplied with a signal SELREF, which is entered manually by the operator and results in the video signals for the respectively supplied image being written to an area 1' ' in the SDRAM 1, while the continuously supplied video signals, or the corresponding data streams, are written to a memory area 1' .

The SDRAM 1 is followed by a FIFO memory 4, to which data streams read from the SDRAM are written using the clock CKA. A clock CKB is used for reading from the FIFO memory 4. This is part of the studio standard and is not synchronized to the clock CKA. The filling level of the FIFO memory 4 is determined from the two clocks in a further control device 7. If there is a threat of the FIFO memory 4 overflowing or running empty, appropriate information is passed to the SDRAM controller 8, which fills the FIFO memory 4 by reading further data, or initially prevents the reading of further data.

A read/write cycle which is illustrated in its entirety in Figure 3 contains a write period WR and read periods READ1 to READ3. Each of these write and read periods is associated with a time period WP or RP, respectively, for preparing for the writing and reading processes, respectively, and with a time period WF and RF, respectively, for terminating the writing and reading processes, respectively. The memory contents of the SDRAM are also refreshed during these time periods.

Instruction sequences which are matched to the use of the respective SDRAM module are programmed in the SDRAM controller 8 for the write and read preparation processes WP and RP and for the termination WF and RF of the respective processes. In one practical embodiment of the invention using an SDRAM of the MB81F64842C-102 type from the company Toshiba, the commands chosen were as follows: P NOPs, PALL, NOPs, REF, ACTV, ACTV, NOPs, WR WRIT, (NOPs) , WF BST, PALL, REF, NOPs, RP NOPs, PALL, NOPs, REF, ACTV, ACTV, NOPs, RD READ, (NOPs) , RF BST, PALL, REF, NOPs.

In order to produce video signals which represent the image composed of the two stored images, the data streams read from the FIFO memory 4 first of all pass through a further demultiplexer 9, which is followed by a selector 10 whose outputs are connected to a multiplexer 11. The output 12 of the multiplexer 11 carries the video signal which represents parts of both images. The selector 10 is controlled by a selection signal SEL, which is derived by means of a key generator 13 from supplied horizontal- frequency and vertical-frequency synchronization signals, corresponding to the desired split of the image. Details of the operation of the elements 9 to 11 will be explained in more detail in the following text with reference to Figures 4 and 5.

The illustrations in Figures 4 and 5 show only a small number of pixels MO to M7 of a main image and a small number of pixels R0 to R7 of a reference image, although these represent a very large number of pixels. The clock CKB is identified by arrows in line g in Figure 4.

The lines a to d in Figure 4 show the data streams which are read from the FIFO memory 4 (Figure 1) and, in each case with a length of one clock period, contain one pixel MO to M3 of the main image, one pixel R0 to R3 of the reference image, a further pixel M4 to M7 of the main image and a further pixel R4 to R7 of the reference image. In the illustrated exemplary embodiment clock periods without any new information (hold) are also shown between the clock periods with pixels. It would also be possible to insert further images here, possibly stored in the SDRAM 1, with these images being introduced into the composed image by suitable configuration of the demultiplexer 9, of the selector 10 and of the key generator 13.

The lines e to f show gate pulses GMAIN and GREF, by means of which the demultiplexer 9 (Figure 1) is controlled such that only pixels of the main image are produced at the upper four outputs h, i, j, k, and pixels of the reference image are produced at the lower four outputs 1, m, n, o, as is illustrated in the lines annotated by the same letters in Figure 4. These data streams are supplied to the selector 10 (Figure 1) , which is controlled by the signal SEL shown in line U. This results in the data streams illustrated in the lines q to t in Figure 5. The downstream multiplexer 11 then passes the four pixels MO to M4 of the main image to the output 12 when the signal SEL is in a first state, and passes the four pixels R4 to R7 of the reference image to the output 12 when the signal SEL is in the other state. Figure 6 now shows the complete split image, in which the left-hand part is formed by the main image M, and the right-hand part is formed by the reference image R.

Claims

PATENT CLAIMS

1. A method for producing an image which is composed of two stored images, with video signals which represent both images being buffer-stored by means of a random access memory (SDRAM) , wherein video signals which represent a first image are written to a first memory area, and video signals which represent at least one second image are written to at least one second memory area in the random access memory, wherein video signals are read alternately pixel-by-pixel from the first memory area and from the at least one second memory area, and wherein video signal components of the first image in a first image area and video signal components of the at least one second image in a second image area are passed to an output .

2. The method as claimed in claim 1, wherein the image areas are adjustable.

3. The method as claimed in one of claims 1 or 2 , with the random access memory being followed by a further memory (FIFO) with different frequencies for reading and writing, wherein the video signals which are read alternately pixel-by-pixel are written to the further memory, and wherein, from the video signals which are read from the further memory, video signal components of the first image in a first image area and video signal components of the at least one second image in a second image area are passed to an output .

4. The method as claimed in claim 3, wherein the video signals are written, split into a number of parallel data streams, to the random access memory and are read in a number of parallel data streams from the random access memory, are passed through the further memory and are then combined to form a video signal which contains both images .

5. The method as claimed in claim 4, wherein the video signals which are read from the further memory are passed on in such a way that the data streams which represent the first image are separated from one another by the data streams which represent the second image, and the data which is associated with the respective image area is selected from the separate data streams as a function of a binary split signal.