WO2000077852A1

WO2000077852A1 - Method for making devices comprising a chip associated with a circuit element and resulting devices

Info

Publication number: WO2000077852A1
Application number: PCT/FR2000/001492
Authority: WO
Inventors: Jean-Christophe Fidalgo; Bernard Calvas; Philippe Patrice
Original assignee: Gemplus
Priority date: 1999-06-15
Filing date: 2000-05-30
Publication date: 2000-12-21
Also published as: FR2795235B1; FR2795235A1; AU5229100A

Abstract

The invention concerns a method for making electronic devices, each comprising at least a chip (2) electrically connected to at least a circuit element (20), the chip being in the form of a very thin layer associated with a protective substrate (4). The invention is characterised in that it consists in producing at least part of the circuit element (20) on the protective substrate (4), the latter integrally forming part of the device produced. The chip (2) can be produced according to the silicon on insulator technology. The circuit element produced on the protective substrate can be an antenna (20) designed to form a communication interface with the or each chip (2) whereto it is connected. The invention also concerns the use of said method for producing means for identifying and/or tracking an object (30), the use of a protective substrate to produce at least part of at least a circuit element and a device using such a substrate.

Description

METHOD FOR PRODUCING DEVICES COMPRISING A

CHIP ASSOCIATED WITH A CIRCUIT ELEMENT

AND DEVICES OBTAINED

The present invention relates to a device comprising an integrated circuit in the form of a chip, associated with a component, for example a communication interface, to form an integrated whole. More particularly, the invention makes it possible to produce modules composed of at least one chip and of the associated component from the so-called silicon on insulator technology. This technology makes it possible to obtain chips whose active part in silicon is of a very great thinness, this one being able to be of the order of 10 microns or less. Because of the great thinness of the chips, it is necessary, according to this technology, to provide a protective substrate whose role is to maintain a set of chips during the various stages of their manufacture and to allow the manipulation of the chips during their cutting. and their transfer to a final auguel support they are intended.

This technology for producing very thin chips on a protective substrate is described in particular in patent document O-A-9802921 in the name of the company KOPIN. The content of this document is to be considered as included in the present application by reference, and the details concerning the various stages of production of the chips and their protective substrate will not be repeated here for the sake of brevity.

The general characteristics of the products resulting from this technology are recalled in the following with reference to FIGS. 1 and 2. Figure 1 is a plan view showing part of a wafer 12 from the technology called silicon on insulator (in English SOI for "silicon on insulator"). The chips 2 are arranged in row lines on an insulating protective substrate 4, typically glass, which constitutes the body of the wafer 12. This insulating substrate 4 serves inter alia to facilitate the handling of the chips 2, which are flexible and fragile in because of their thinness (of the order of 10 microns).

Each chip 2 is retained on the protective glass substrate 4 by adhesive pads 6. These adhesive pads 6 consist of small rectangular areas, turned at 45 ° relative to the sides of the chips 2 and placed on the respective corners of each chip , so that outside the periphery of the wafer 12 a stud 6 covers four corners joined by four different chips.

Figure 2 is a partial sectional view along the line II-II 'of Figure 1 which shows the structure of an assembly consisting of a chip 2, adhesive pads 6 and the protective substrate, in this case the glass.

The chip 2 has, towards one or more of these edges, electrical connection pads 8 which make it possible to connect the circuit produced on the chip with the outside. Each connection pad is produced by a boss 8, more generally known by the English term "bump". The bosses 8 of the chip 2 constitute points protruding from one or other of the faces 2a or 2b of the chip 2, allowing the necessary interconnections with a communication interface.

In the example illustrated, the bosses 8 are formed on the face 2a of the chip 2, which faces the protective glass substrate 4. However, the bosses 8 can also be formed on the face 2a of the chip facing outward relative to the protective substrate 4.

Each boss 8 has a substantially ogival shape making it possible to ensure good mechanical and electrical contact with a corresponding connection pad at its communication interface.

Typically, the thickness el of the adhesive pads 6 is sufficient for the top of the bosses 8 not to be in contact with the face 4a of the protective substrate 4 which is opposite it.

It should be noted that SOI technology currently makes it possible to produce chips 2 whose overall thickness is of the order of 10 microns, or even substantially less. This dimension comprises on the one hand the thickness e2 of the whole of the layer forming the chip 2 and on the other hand the elevations e3 at the level of the connection pads 8.

In the example shown in FIG. 2, the thickness e2 of the layer of the chip 2 is of the order of 5 microns and the relief e3 of the bosses 8 is also of the order of 5 microns.

In accordance with conventional practices, the wafer is cut along the lines D of separation of the individual chips in order to obtain, for each chip, an assembly 14 composed of the chip itself, the portion of protective substrate 4 being located directly under the chip and the parts of the adhesive pads at the corners of the chip, retaining it to the protective substrate. Then, the chip is transferred to its final support, which may for example be an electronic component box or a printed circuit board. Once the transfer has been made, the protective substrate 4 is removed with the parts of the studs adhesives 6. The protective substrate 4, having then fulfilled its function, is then discarded.

Removing the protective substrate 4 is a delicate operation, given the poor mechanical strength of the silicon layer which constitutes the chip 2. The usual techniques used are cleavage, which is an operation consisting in cutting around the adhesive pads 6 to release the chip 2, or the peeling of the substrate from the protective substrate 4, if the chip is sufficiently well retained on its transfer support.

If the chip 2 is intended to be associated with another component, for example an antenna for producing a contactless communication interface, it is necessary to provide this component on or near the support on which the chip is transferred. Then, an interconnection is established between the chip and the component. This interconnection can be achieved by direct contact between the chip and the component, or by current supply means connecting the latter.

It is noted that the operations of removing the protective substrate and producing certain components on the transfer support are difficult to perform, that they require complex tools and are liable to damage the component, which leads to losses in yield.

In view of these problems, the present invention provides a method of manufacturing electronic devices, each comprising at least one chip electrically connected to at least one circuit element, the chip _^ being in the form of a very thin layer associated with a protective substrate. , characterized in that at least part of the circuit element is produced on the protective substrate, this last forming: an integral part of the manufactured device.

Thus, the present invention makes it possible to integrate efficiently and elegantly an element which, in the state of the art, is considered to be parasitic after having fulfilled its protective function during manufacture.

What is more, since the substrate element associated with each chip is kept, there is no recourse to the conventional operation of removing the protective substrate. However, this operation requires significant tools and processing time and involves the risk of damaging the device during manufacture. Advantageously, the chip is produced using silicon on insulator technology, making it possible to have an active layer of very thinness.

In a preferred embodiment, the circuit element produced on the protective substrate is an antenna intended to constitute a communication interface with the or each chip to which it is connected.

For each connection point between the chip and a circuit element on the substrate, a contact pad can be produced respectively at the level of the chip and at the level of the circuit element, thus forming a pair of contact pads facing each other. opposite.

In this case, each contact pad at the level of the chip can be in the form of a boss. Preferably, each contact pad at the circuit element is in the form of a contact pad capable of fusing with the corresponding contact pad of the chip.

In one embodiment envisaged, the thin layer is associated with the protective substrate by adhesive means which maintain a separation between the facing faces of the layer and of the substrate. For the or each connection between the chip and the circuit element, a contact pad is then produced respectively on the chip and on the circuit element, the corresponding contact pads being substantially arranged opposite and joining each other. or being slightly set back from each other in the rest state before their connection. Preferably, at least one connection is made between the chip and the circuit element on the substrate by soldering, optionally by applying pressure making it possible to bring together corresponding connection means of the chip and of the circuit element formed on the substrate.

According to a preferred embodiment of the invention, the weld (s) is carried out by transmitting a weld energy through the thickness of the protective substrate. The welding energy can come from a laser beam.

In this case, it can be transmitted by a plurality of optical paths, each directed towards a respective connection to be made between the substrate and the chip.

Preferably, each optical path is materialized by at least one optical fiber.

Alternatively, the thermocompression welding can also be carried out. Preferably, there is provided the connections between each chip and its _^ respective circuit member for a chip set associated with the same _ protective substrate, and then cutting the protective substrate to form individual modules composed of at least one chip and a portion of protective substrate in the format of the or each chip forming the module.

Thus, at least one module can be integrated into an object. This module can then be affixed to a surface of the object.

Optionally, at least the exposed face of the or each chip of the module and at least part of the surface of the object can be covered with a protective film. The present invention also relates to the use of an electronic device resulting from a method as described above as a means of identifying and / or monitoring an object associated with said device. The present invention also relates to the use of a protective substrate normally intended to protect a very thin active layer forming chips according to the technology known as silicon on insulator for the production on said protective substrate of at least a part of at least an element intended to be connected a corresponding chip.

The present invention also relates to an electronic device comprising at least one chip electrically connected to at least one circuit element, the chip being in the form of a very thin layer associated with a protective substrate, characterized in that at least a part of the circμit element is produced on the protective substrate, the latter forming an integral part of the device. The circuit element produced on the protective substrate can be an antenna intended to constitute a communication interface with the or each chip to which it is connected.

Each connection point between the chip and a circuit element on the substrate can include a contact pad respectively at the chip and at the circuit element, thus forming a pair of facing contact pads.

Each contact pad at the chip can be in the form of a boss.

Advantageously, the thin layer is associated with the protective substrate by adhesive means which maintain a separation between the facing faces of said layer and said substrate. According to a preferred embodiment, the device is in the form of elementary modules composed of at least one chip and a portion of the protective substrate in the format of the or each chip forming the module. The module can thus constitute a means of identifying or monitoring an object with which it is associated. It can in particular allow an exchange of data towards the outside by hertzian way.

The invention will be better understood and its advantages will appear more clearly on reading the preferred embodiments, given purely by way of nonlimiting examples with reference to the appended drawings in which:

- Figure 1, already described, is a plan view showing a set of chips from the technology

SOI and backed by a protective substrate;

- Figure 2, already described, is a sectional view along line II-II 'of Figure 1, showing an assembly consisting of a chip, a portion of substrate backed by the chip and adhesive pads retaining the chip to substrate;

- Figure 3 is a plan view of a protective substrate comprising patterns forming elements intended to be connected to chips, in accordance with the present invention; - Figure 4 is a plan view of a silicon layer on which chips are formed according to the technology known as silicon on insulator;

- Figure 5 is a sectional view showing the arrangement of a chip and its protective substrate produced in accordance with Figure 4; FIG. 6 schematically represents a welding operation between contact pads on the chips and the protective substrate in accordance with a preferred embodiment of the invention;

- Figure 7 is a plan view showing the semiconductor layer on which the chips are formed with its protective substrate 1 after the welding operation; and FIG. 8 is a sectional view of a module comprising a chip and its protective substrate after cutting of the assembly shown in FIG. 7.

FIG. 3 is a plan view of a glass plate intended to form the protective substrate (also known as an intermediate substrate) 4, after the processing steps in accordance with the embodiment according to the invention. This protective substrate 4 is intended to be used for the production of a set of chips according to the silicon on insulator technology (also known under the term of SOI for "silicon on insulator" according to English terminology).

This technology is known in itself; the embodiments which are described here are based on an implementation of this technology disclosed in the document _^ patent OA-98 02921 in the name of the company KOPIN, which „allows in particular to obtain an active layer forming the chip 2 d '' a thickness of the order of 10 microns, or even substantially less. The protective substrate 4 is in the form of a thin circular wafer in the format of the silicon wafer on which the chips are formed 2. Typically, the protective substrate 4 has a thickness of the order of 800 microns for a diameter d '' about 150 mm.

Normally, the protective substrate 4 is free of any electrically active element, its role being purely to serve as a mechanical support during the various stages of the development of the silicon layer. Indeed, the fragility of the silicon layer due to its extreme thinness tolerated by SOI technology makes it necessary to use a protective substrate upstream of the processing steps, until it is cut into individual chips and the transfer of the chips to their final support. Then, one normally proceeds to the removal of the glass substrate 4 - or of the portion of the latter remaining after cutting - and to its disposal, its role being completed.

On the other hand, in accordance with the present invention, the protective substrate 4 is used to give it an additional role of support for one or more electrical element (s). In the example, the electrical element is an antenna which will be associated with each chip. As shown in FIG. 3, a set of patterns 20 is printed on one face 4a of the substrate 4, each pattern being identical and placed at a location which will be directly opposite a chip during the subsequent manufacturing steps. Thus, the patterns 20 are arranged in rows of columns by making the best use of the rounded outline of the substrate 4. In the example, each pattern comprises an electrically conductive track in the form of a spiral 20a with the ends close to each other, each end ending in a connection pad 20b. Each connection pad 20b, produced in the continuity of the spiral 20a, is formed by an electrically conductive area large enough to establish good electrical and mechanical contact with a corresponding contact pad of the chip, as will be described below.

Various techniques can be used to form the patterns 20 on the substrate 4. The latter being conventionally made of glass, it is in particular possible to produce the patterns 20 by screen printing, by printing with an electrically conductive ink with an adhesive power on the glass, by lithography, by vacuum metallization, etc. The thickness of the layer of electrically conductive material forming the pattern 20 is sufficient to allow a laser or thermocompression welding operation with the contact pads of the chip 2. In the example, the patterns are produced by metallizations in aluminum with a thickness of the order of 5 microns.

FIG. 4 represents the active layer of silicon after cutting into slices from an ingot of crystalline silicon. The surface elements 2 'intended to constitute the chips at the end of the manufacturing process are arranged in rows of columns in the same manner as the patterns 20 on the protective substrate 4. Each chip in the precursor state 2' comprises locations 8 'reserved for the formation of two contact pads 8 which, at the end of manufacture, will be in the form of bosses 8, like the bosses described with reference to FIG. 2. These locations 8' are close to each other near a corner of the 2 'chip. Their configuration and arrangement are provided for so that, for each chip, the two bosses 8 are directly opposite the two respective connection pads 20b of the pattern formed on the protective substrate 4. FIG. 5 is a sectional view which shows the relative positioning between the layer of silicon comprising the chips 2 and the protective glass substrate 4 when these two are combined. Note that the face 4a of the substrate comprising the patterns 20 (composed of the elements 20a and 20b) faces the chips 2. As for the example described with reference to FIGS. 1 and 2, the chips 2 of the silicon layer are fixed by adhesive pads 6, each having a face bonded to a corner of a chip 2 and the other bonded to the face 4a of the substrate 4 facing the chip. These adhesive pads 6 also serve as a spacer and make it possible in particular to establish a constant and well-controlled gap between the faces 4a and 2b of the substrate 4 and of the chip 2 which are opposite. In the example, this difference el is substantially equal to or slightly greater than the sum of the protuberance e3 of the bosses 8 relative to the general plane of the surface 2b of the chip 2 and of the thickness e4 of the printing layer forming the connection pads 20b. In this way, in the assembly position of the silicon layer with the protective substrate 4, the top of each boss 8 is flush with or is very slightly set back from the outside face of its corresponding connection pad 20b. The welding operation between the bosses-.8 and the connection pads 20b will now be described with reference to FIG. 6. This welding is carried out by applying welding energy through the thickness of the protective substrate 4. In the example, the welding is carried out by laser beams 22. Each laser beam 22 passes through the glass substrate 4 and reaches a connection range 20b on the face 4a of the substrate 4. In the embodiment, the laser transmits its energy simultaneously on several optical paths, each directed directly above a respective connection to be made. To do this, an optical fiber matrix is used, each fiber 24 of which is connected by a first end 24a to a laser source 26 and has a second end 24b against the external face 4b of the substrate, directly above a range of respective connection 20b, possibly with a correction for the phenomena of refraction. The energy thus transmitted raises the temperature of the connection pads 20b and, by thermal contact, that of the bosses 8. If necessary, it is possible to apply a light force on the substrate 4 or on the chips 2 during this soldering operation. in order to compress the adhesive pads 6 and thus ensure pressure at the junction points of the bosses 8 with the connection pads 20b.

The rise in temperature by thermal energy causes the fusion of either connection pads 20b, or bosses 8, or both. This fusion produces the weld between the connection pads and the bosses. As a result, each electrical element formed on the protective substrate 4 is connected to its corresponding chip 2 both electrically and mechanically.

The choice of metals or alloys for the bosses 8 or the connection pads 20b allowing welding under good conditions is within the reach of the skilled person. In the example, the glass constituting the substrate 4 is transparent to the wavelengths of the laser beams usually used for microwelding. It is in particular possible to use for welding a laser of the YAGNd type emitting at a wavelength of 1.06 microns.

The number of optical fibers 24 associated with the same laser source 26 depends on the power of the latter, the possible optical couplings and the optical paths from one end to the other of the fibers. According to the modes of implementation, one or more laser sources 26 can be provided connected to a matrix of optical fibers 24 making it possible to carry out all the solderings of a chip board 2 simultaneously. It is of course also possible to split the number of welds carried out in parallel, so that all of the welds necessary for a wafer of chips 2 are carried out in several batches of chips. Furthermore, it is possible to associate not a single optical fiber 24, but several with each soldering point to obtain a better energy supply.

As a variant, one or more laser heads can be mounted on a robot arm or other automaton programmed to perform the welds sequentially on the connection points, also through the thickness of the substrate 4.

According to another variant, the welds are produced by a thermocompression process or by ultrasound. In these cases, the connection pads 20b and the contact pads 8 will preferably be made of aluminum. These two techniques are in themselves well known and will not be described here for the sake of brevity. Again, the welds can be produced by transmission of the welding energy through the thickness of the substrate 4.

Once the welding operation is completed for a wafer, an integral block is obtained composed of the protective substrate 4 and the interconnected chips 2, as shown in FIG. 7.

We can then proceed to cut the wafer into elementary assemblies 28 along the cutting lines D shown in FIG. 7. As shown in FIG. 8, each assembly 28 thus comprises a chip 2, a portion of the substrate 4, in the format of the chip thus cut, comprising an electrical element (here an antenna 20) and the portions of adhesive pads 26. The latter can remain stuck to the corners between the substrate 4 and the chip 2 to contribute to maintaining the integrity of the assembly 28.

In the example, the antenna 20 produced on the protective substrate 4 is electrically connected to points of the circuit contained in the chip in order to allow an exchange of data (analog and / or digital) between the chip and the outside by way over the air. The antenna 20 can also be used to power the circuit contained in the chip. The techniques of data exchange and remote power supply by an antenna in the context of chips are in themselves known and will not be described here for the sake of brevity.

The. sets 28 thus individually cut find many applications in various fields, the chips can be designed to perform all kinds of functions.

Some non-exhaustive examples of the application of chips thus produced are given below for purely indicative purposes: - production of contactless smart cards, for example for electronic toll collection or access control;

- production of electronic labels (also known by the English term "tags") permanently or temporarily attached to objects or animals to allow their identification and electronic monitoring by data storage, which can be scalable, in particular in the areas of: - animal husbandry, ecology;

- surveillance of objects subject to litigation or investigation in the event of an incident (gas cylinders, containers of toxic products, etc.); checking the authenticity of objects likely to be counterfeit (luxury products, prestige brands, records, videos, etc.), or original works or documents (certificates, titles, tickets, etc.); tracking devices requiring service or maintenance, for example to record and read electronically the history of parts or machines;

- control against theft of goods;

- the creation of intelligent objects; - etc.

It will be noted that the invention makes it possible to produce on the protective substrate 4 all kinds of components connected to the chip facing it, these components possibly being, among others: - at least one passive component: self, capacitance, resistance, shielding electromagnetic (by metallization); and or,

- at least one active component: integrated circuit, electronic components (transistors, diodes, diodes electroluminescent, pixel display screens; and or

- at least one micromechanical element: switch, micro-actuator, etc. ; - etc.

The modules 28 can be glued directly to the surface of the support for which they are intended. As shown in Figure 8, it is possible to interpose an adhesive layer 32 between the face 4b of the substrate facing the support 30 and the exposed face 30a thereof.

Finally, it is possible to cover the exposed face 2a of the chip 2 with a protective film 34 once the module 28 is mounted on its support 30. In the example of FIG. 8, the protective film 34 completely covers the module 28 and at least part of the exposed face 30a of the support 30.

Claims

1. Method for manufacturing electronic devices, each comprising at least one chip (2) electrically connected to at least one circuit element (20), the chip being in the form of a very thin layer associated with a protective substrate (4), characterized in that at least part of the circuit element (20) is produced on the protective substrate (4), the latter forming an integral part of the manufactured device.

2. Method according to claim 2, characterized in that the chip (2) is produced according to silicon on insulator technology.

3. Method according to claim 1 or 2, characterized in that the circuit element produced on the protective substrate is an antenna (20) intended to constitute a communication interface with the or each chip (2) to which it is connected .

4. Method according to any one of claims 1 to 3, characterized in that for each connection point between the chip (2) and a circuit element (20) on the substrate (4) a contact pad ( 8, 20b) respectively at the level of the chip and at the level of the circuit element, thus forming a pair of contact pads facing each other.

5. Method according to claim 4, characterized in that each contact pad at the level of the part (2) is in the form of a boss (8).

6. Method according to claim 4 or 5, characterized in that each contact pad at the level of the circuit element is in the form of a contact pad (20b) able to merge with the corresponding contact pad (8) of the chip (2).

7. Method according to any one of claims l to 6, characterized in that said thin layer is associated with the protective substrate (4) by adhesive means (6) which maintain a separation (el) between the facing faces (2b , 4a) of said layer and of said substrate, and in that for the or each connection between the chip (2) and the circuit element (20) a contact pad (8, 20b) is produced respectively on the chip and on the circuit element, the corresponding contact pads being substantially arranged opposite and joining or being slightly recessed from each other in the rest state before their connection.

8. Method according to any one of claims 1 to 7, characterized in that at least one connection is made between the chip (2) and the circuit element (20) on the substrate (4) by soldering, optionally by applying a pressure making it possible to bring together corresponding connection means of the chip and of the circuit element formed on the substrate.

9. Method according to claim 8, characterized in that one or the weld (s) is carried out by transmitting a weld energy through the thickness of the protective substrate (4).

10. Method according to claim 9, characterized in that the welding energy comes from a laser beam (32).

11. Method according to claim 10, characterized in that in the laser beam (22) is transmitted by _ a plurality of optical paths (24), each directed towards a respective connection (20b, 8) to be produced between the substrate (4) and the chip (2).

12. Method according to claim 11, characterized in that each optical path is materialized by at least one optical fiber (24).

13. Method according to claim 8 or 9, characterized in that the welding is carried out by thermocompression.

14. Method according to any one of claims 1 to 13, characterized in that the connections are made between each chip (2) and its respective circuit element (20) for a set of chips associated with the same protective substrate (4), and in that said protective substrate is then cut to form elementary modules (28) composed of at least one chip and a portion of the protective substrate in the format of the or each chip forming the module.

15. Method according to claim 14, characterized in that one integrates at least one module (28) to an object (30).

16. Method according to claim 15, characterized in that one affixes at least one module

(28) on a surface (30a) of said object (30).

17. Method according to claim 16, characterized in that at least the exposed face (2a) of the or each chip (2) of the module (28) is covered and at least part of the surface (30a) of said object

(30) with a protective film (34).

18 ,, Use of an electronic device (28) resulting from the method according to any one of Claims 1 to 17 as a means of identifying and / or monitoring an object (30) associated with said device.

19. Use of a protective substrate (4) normally intended to protect a very thin active layer forming chips (2) according to the so-called technology of silicon on insulator for producing on said protective substrate (4) at least a part of at least one element (20) intended to be connected to a corresponding chip.

20. Electronic device comprising at least one chip (2) electrically connected to at least one circuit element (20), the chip being in the form of a very thin layer associated with a protective substrate (4), characterized in that at least part of the circuit element (20) is formed on the protective substrate (4), the latter forming an integral part of the device.

21. Device according to claim 20, characterized in that the circuit element produced on the protective substrate is an antenna (20) intended to constitute a communication interface with the or each chip (2) to which it is connected.

22. Device according to claim 20 or 21, characterized in that for each connection point between the chip and a circuit element on the substrate comprises a contact pad (8, 20b) respectively at the level of the chip (2) and at the level of the circuit element (20b), thus forming a pair of facing contact pads.

23. Device according to claim 22, characterized in that each contact pad at the chip (2) is in the form of a boss (8).

24. Device according to any one of claims 20 to 23, characterized in that said thin layer is _^ associated with the protective substrate (4) by adhesive means (6) which maintain a separation (el) between the facing faces ( 2b, 4a) of said layer and of said substrate (4).

25. Device according to any one of claims 20 to 24, characterized in that it is in the form of elementary module (28) composed of at least one chip (2) and a portion of the protective substrate (4 ) in the format of the or each chip forming the module.

26. Device according to claim 25, characterized in that the module (28) constitutes a means of identifying or monitoring an object (30) with which it is associated.

27. Device according to claim 26, characterized in that the module (28) allows an exchange of data towards the outside by hertzian way.