WO1996019866B1 - Differential audio line receiver - Google Patents
Differential audio line receiverInfo
- Publication number
- WO1996019866B1 WO1996019866B1 PCT/US1995/016799 US9516799W WO9619866B1 WO 1996019866 B1 WO1996019866 B1 WO 1996019866B1 US 9516799 W US9516799 W US 9516799W WO 9619866 B1 WO9619866 B1 WO 9619866B1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- differential
- gain
- amplifier
- input
- terminal
- Prior art date
Links
- 239000003990 capacitor Substances 0.000 claims abstract 21
- 230000002411 adverse Effects 0.000 abstract 1
- 230000000593 degrading Effects 0.000 abstract 1
Abstract
A bootstrapped audio line receiver that receives a differential-mode input signal from first and second differential lines and outputs a single-ended signal on an output line. The line receiver includes a differential amplifier and an input amplifier having differential output terminals and differential input terminals. The input amplifier is connected between the differential lines and the differential amplifier. The input amplifier provides a dc current path to a ground terminal while maintaining a high input impedance to ac signals at audio frequencies. The input amplifier also includes an rf filter that removes rf noise without adversely affecting the line receiver's common-mode noise rejection at audio frequencies. In one embodiment, the input amplifier includes two operational amplifiers connected for unity gain and having two bias resistors connected in series between each input terminals of the input amplifier and a ground terminal. A capacitor is connected from the output of each operational amplifier to a node between each set of series connected bias resistors and prevents the low impedance of the bias resistors from significantly degrading the line receiver's common-mode rejection ratio. Thus, the line receiver tolerates a wide range of balanced and unbalanced source impedances with a minimal deterioration of the line receiver's common-mode rejection ratio.
Claims
1. A line receiver for receiving a differential- mode input signal from first and second differential lines and for outputting an output signal relative to a local ground reference on an output line, the line receiver comprising: a differential amplifier having first and second input terminals and an output terminal, wherein the output terminal of the differential amplifier is adapted to be connected to the output line; and a gain-stage amplifier having first and second differential input terminals and first and second differential output terminals, wherein the first differential input terminal is adapted to be coupled to the first differential line, the second differential input terminal is adapted to be coupled to the second differential line, the first differential output terminal is coupled to the first input terminal of the differential amplifier, and the second differential output terminal is coupled to the second input terminal of the differential amplifier; wherein the gain-stage amplifier is adapted to provide at each differential input terminal of the gain- stage amplifier, a dc current path to a ground terminal sufficient to accommodate a bias current while maintaining a high input impedance to ac signals above a first predetermined frequency, such that the input impedance of the line receiver is larger for ac signals above the first predetermined frequency than for dc signals so that, above the first predetermined frequency, the line receiver receives the differential-mode input signal and substantially rejects any common-mode signals received along with the differential-mode input signal; 36
and wherein the gain-stage amplifier further includes a differential-gain stage having first and second differential-gain stage input terminals and first and second output terminals, wherein the differential-mode gain of the differential-gain stage is greater than its common-mode gain, the first and second input terminals of the differential-gain stage are coupled, respectively, to the first and second input differential input terminals of the gain-stage amplifier, and the first and second output terminals of the differential-gain stage are coupled, respectively, to the first and second output terminals of the gain-stage amplifier, and first and second shunt elements, the first shunt element having one end coupled to the first differential-gain stage input terminal and its other end coupled to the ground terminal through a portion of the gain-stage amplifier that effectively couples the first and second shunt elements to the ground terminal only at frequencies above a second predetermined frequency, and the second shunt element having one end coupled to the second differential-gain stage input terminal and its other end coupled to the ground terminal through the portion of the gain-stage amplifier that effectively couples the first and second shunt elements to the ground terminal only at frequencies above the second predetermined frequency, wherein the second predetermined frequency is higher than the first predetermined frequency so that the line receiver receives the differential-mode signal at frequencies between the first and second predetermined frequencies and substantially rejects signals having a frequency above the second predetermined frequency.
2. A line receiver as defined in claim 1, further comprising: a low-pass filter, having first and second series elements, that rejects signals having a frequency above the second predetermined frequency, the first series element providing a dc connection between the first differential input terminal of the gain-stage amplifier and the first differential-gain stage input terminal, the second series element providing a dc connection between the second differential input terminal of the gain-stage amplifier and the second differential- gain stage input terminal.
3. A line receiver as defined in claim 1, wherein the first predetermined frequency is approximately .1 hertz and the second predetermined frequency is approximately 300 kilohertz.
4. A line receiver as defined in claim 1, wherein: the differential gain-stage amplifier includes first and second operational amplifiers, each having an output terminal, an inverting input terminal, and a noninverting input terminal, the noninverting input terminal of the first operational amplifier being connected to the first differential gain-stage input terminal, the noninverting input terminal of the second operational amplifier being connected to the second differential gain-stage input terminal, the output terminal of the first 38
operational amplifier being connected to the first differential output terminal, and the output terminal of the second operational amplifier being connected to the second differential output terminal, first, second and third gain resistors, the first gain resistor connected between the output and the inverting input of the first operational amplifier, the second gain resistor connected between the output and the inverting input of the second operational amplifier, and the third gain resistor connected between the inverting inputs of the first and second operational amplifiers; and the gain-stage amplifier further includes first and second filter elements, each having an ac impedance that is generally greater than or equal to its respective dc resistance, the first filter element being connected between the first differential input terminal of the gain-stage amplifier and the first differential-gain stage input terminal, and second filter element being connected between the second differential input terminal of the gain-stage amplifier and the second differential-gain stage input terminal, first and second bias resistors connected in series between the first and second differential input terminals, a third bias resistor connected between the ground terminal and the node between the first and second bias resistors to provide the dc current path from the first and second differential input terminals to the ground terminal. 39
fourth and fifth bias resistors connected in series between the first and second differential output terminals of the gain-stage amplifier, a unity-gain amplifier having an input terminal and an output terminal, the input terminal of the unity-gain amplifier being connected to a node between the fourth and fifth bias resistors, a feedback capacitor connected between the output terminal of the unity-gain amplifier and the node between the first, second and third bias resistors, the feedback capacitor being sized to have an impedance less than the resistance of the third bias resistor at frequencies above the first predetermined frequency, first and second filter capacitors connected in series between the first and second differential-gain stage input terminals, a filter resistor connected between the output terminal of the unity-gain amplifier and a node between the first and second filter capacitors, and a third filter capacitor connected between the node between the first and second filter capacitors and the ground terminal, the third filter capacitor being sized to have an impedance less than the resistance of the first filter resistor at frequencies above the second predetermined frequency.
5. A line receiver as defined in claim 1, wherein the gain-stage amplifier is further adapted to provide dc electrical power at its first and second differential input terminals. 40
6. A line receiver as defined in claim 1, wherein the first differential input terminal of the gain-stage amplifier is directly connected, without any intervening series capacitor, to the first differential line and the second differential input terminal of the gain-stage amplifier is directly connected, without any intervening series capacitor, to the second differential line.
7. A line receiver for receiving a differential- mode input signal from first and second differential lines and for outputting an output signal relative to a local ground reference on an output line, the line receiver comprising: a differential amplifier having first and second input terminals and an output terminal, wherein the output terminal of the differential amplifier is adapted to be connected to the output line; and a gain-stage amplifier having first and second differential input terminals and first and second differential output terminals, wherein the first differential input terminal is adapted to be connected to the first differential line and the second differential input terminal is adapted to be connected to the second differential line and the first differential output terminal is coupled to the first input terminal of the differential amplifier, and the second differential output terminal is coupled to the second input terminal of the differential amplifier, the gain-stage amplifier including first and second operational amplifiers, each having an output terminal, an inverting input terminal, and a noninverting input terminal, the output terminal of the first operational amplifier being connected to the first differential output 4 1
terminal, and the output terminal of the second operational amplifier being connected to the second differential output terminal, first and second filter elements, each having an ac impedance that is generally greater than or equal to its respective dc resistance, the first filter element being connected between the first differential input terminal and the noninverting input terminal of the first operational amplifier, and second filter element being connected between the second differential input terminal and the noninverting input terminal of the second operational amplifier, first, second and third gain resistors, the first gain resistor connected between the output and the inverting input of the first operational amplifier, the second gain resistor connected between the output and the inverting input of the second operational amplifier, and the third gain resistor connected between the inverting inputs of the first and second operational amplifiers, first and second bias resistors connected in series between the first and second differential input terminals, a third bias resistor connected between the ground terminal and the node between the first and second bias resistors to provide the dc current path from the first and second differential input terminals to the ground terminal, fourth and fifth bias resistors connected in series between the first and second differential output terminals, a unity-gain amplifier having an input terminal and an output terminal, the input terminal 42
of the unity-gain amplifier being connected to a node between the fourth and fifth bias resistors, a feedback capacitor connected between the output terminal of the unity-gain amplifier and the node between the first, second and third bias resistors, the feedback capacitor being sized to have an impedance less than the resistance of the third bias resistor at frequencies above the first predetermined frequency, first and second filter capacitors connected in series between the noninverting input terminal of the first operational amplifier and the noninverting input terminal of the second operational amplifier, a filter resistor connected between the output terminal of the unity-gain amplifier and a node between the first and second filter capacitors, and a third filter capacitor connected between the node between the first and second filter capacitors and the ground terminal, the third filter capacitor being sized to have an impedance less than the resistance of the first filter resistor at frequencies above the second predetermined frequency.
8. A line receiver, comprising:
An input amplifier for receiving a differential-mode input signal at first and second differential input terminals and for producing a differential-mode output signal at first and second differential output terminals; 43
shunt elements coupled between the first and second differential input terminals, the shunt elements defining a first node; and a feedback circuit that effectively couples the first node to a ground terminal, only at frequencies above a predetermined frequency, based on the differential-mode output signal, so that the line receiver substantially rejects frequency components of the differential-mode input signal above the predetermined frequency.
9. A line receiver as defined in claim 8, further comprising first and second series elements, connected to the first and second differential input terminals, respectively, that substantially reject frequency components of the differential-mode input signal above the predetermined frequency.
10. A line receiver as defined in claim 8, wherein the predetermined frequency is approximately 300 kilohertz.
11. A line receiver as defined in claim 8, wherein: the input amplifier includes first and second operational amplifiers, each having an inverting input terminal, a noninverting input terminal, and an output terminal, the noninverting input terminal of the first operational amplifier being connected to the first differential input terminal, the noninverting input terminal of the second operational amplifier being connected to the second differential input terminal, the output terminal of the first operational 44
amplifier being connected to the first differential output terminal, and the output terminal of the second operational amplifier being connected to the second differential output terminal, and first, second and third gain resistors, the first gain resistor being connected between the output terminal and the inverting input terminal of the first operational amplifier, the second gain resistor being connected between the output terminal and the inverting input terminal of the second operational amplifier, and the third gain resistor connected between the inverting input terminals of the first and second operational amplifiers; the shunt elements include first and second shunt capacitors connected in series between the first and second differential input terminals and defining the first node there between; and the feedback circuit further includes first and second bias resistors connected in series between the first and second differential output terminals, a unity-gain amplifier having an input terminal and an output terminal, the input terminal of the unity-gain amplifier being connected to a second node between the first and second bias resistors, a filter resistor connected between the output terminal of the unity-gain amplifier and the first node between the first and second shunt capacitors, and a third shunt capacitor connected between the first node and the ground terminal, the third shunt capacitor being sized to have an impedance 45
less than the resistance of the filter resistor at frequencies above the predetermined frequency.
12. A line receiver for receiving a differential- mode input signal on first and second input lines and for outputting a differential-mode output signal on first and second output lines, the line receiver comprising: an input amplifier having first and second differential input terminals and first and second output terminals adapted to be coupled to the first and second output lines; and first and second series elements that substantially reject frequency components of the differential-mode input signals above the predetermined frequency, the first series element being connected between the first input line and the first differential input terminal, and the second series element being connected between the second input line and the second differential input terminal.
13. A line receiver as defined in claim 12, wherein the predetermined frequency is approximately 300 kilohertz.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE69530414T DE69530414T2 (en) | 1994-12-22 | 1995-12-22 | DIFFERENTIAL LOW-FREQUENCY LINE RECEIVER |
| EP95944208A EP0799524B1 (en) | 1994-12-22 | 1995-12-22 | Differential audio line receiver |
| AT95944208T ATE237886T1 (en) | 1994-12-22 | 1995-12-22 | DIFFERENTIAL LOW FREQUENCY LINE RECEIVER |
| JP52001896A JP4310383B2 (en) | 1994-12-22 | 1995-12-22 | Differential audio line receiver |
| CA002208120A CA2208120C (en) | 1994-12-22 | 1995-12-22 | Differential audio line receiver |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US363,243 | 1989-06-08 | ||
| US08/363,243 US5568561A (en) | 1993-04-22 | 1994-12-22 | Differential line receiver with common-mode AC bootstrapping |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO1996019866A1 WO1996019866A1 (en) | 1996-06-27 |
| WO1996019866B1 true WO1996019866B1 (en) | 1996-08-15 |
Family
ID=23429422
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US1995/016799 WO1996019866A1 (en) | 1994-12-22 | 1995-12-22 | Differential audio line receiver |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US5568561A (en) |
| EP (1) | EP0799524B1 (en) |
| JP (1) | JP4310383B2 (en) |
| AT (1) | ATE237886T1 (en) |
| CA (1) | CA2208120C (en) |
| DE (1) | DE69530414T2 (en) |
| WO (1) | WO1996019866A1 (en) |
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-
1994
- 1994-12-22 US US08/363,243 patent/US5568561A/en not_active Expired - Lifetime
-
1995
- 1995-12-22 DE DE69530414T patent/DE69530414T2/en not_active Expired - Lifetime
- 1995-12-22 AT AT95944208T patent/ATE237886T1/en not_active IP Right Cessation
- 1995-12-22 WO PCT/US1995/016799 patent/WO1996019866A1/en active IP Right Grant
- 1995-12-22 CA CA002208120A patent/CA2208120C/en not_active Expired - Fee Related
- 1995-12-22 EP EP95944208A patent/EP0799524B1/en not_active Expired - Lifetime
- 1995-12-22 JP JP52001896A patent/JP4310383B2/en not_active Expired - Fee Related
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