Nothing Special   »   [go: up one dir, main page]

US8476919B2 - Prober unit - Google Patents

Prober unit Download PDF

Info

Publication number
US8476919B2
US8476919B2 US12/712,734 US71273410A US8476919B2 US 8476919 B2 US8476919 B2 US 8476919B2 US 71273410 A US71273410 A US 71273410A US 8476919 B2 US8476919 B2 US 8476919B2
Authority
US
United States
Prior art keywords
wiring
wiring board
probe assembly
probes
probe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related, expires
Application number
US12/712,734
Other versions
US20110204911A1 (en
Inventor
Gunsei Kimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to US12/712,734 priority Critical patent/US8476919B2/en
Publication of US20110204911A1 publication Critical patent/US20110204911A1/en
Application granted granted Critical
Publication of US8476919B2 publication Critical patent/US8476919B2/en
Expired - Fee Related legal-status Critical Current
Adjusted expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/06711Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • G01R1/06716Elastic
    • G01R1/06727Cantilever beams
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • H05K1/0268Marks, test patterns or identification means for electrical inspection or testing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/144Stacked arrangements of planar printed circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04Assemblies of printed circuits
    • H05K2201/041Stacked PCBs, i.e. having neither an empty space nor mounted components in between
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09472Recessed pad for surface mounting; Recessed electrode of component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/096Vertically aligned vias, holes or stacked vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09709Staggered pads, lands or terminals; Parallel conductors in different planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

Definitions

  • the present invention relates to a probe assembly of a prober unit for testing circuits of semiconductor chips on a semiconductor wafer during fabrication of electronic devices including LSI. More particularly, the invention relates to a prober unit used for probe testing.
  • circuit terminals i.e., pads
  • probes to collectively test the electrical conductivity of the semiconductor chips at the wafer level, before the wafer is diced.
  • circuit terminals i.e., pads
  • the pads have been arranged more precisely in reduced pad areas at narrowed pad pitches.
  • probe cards used in semiconductor circuit testing in which the pads on the semiconductor circuits are brought into electrical connection with a probe group, the probes have been arranged more densely for increased number of pads on the semiconductor chip, reduced pad areas or narrowed pad pitches.
  • a narrow-pitched probe assembly is disposed at a central portion of a printed circuit board having standard, coarse-pitched lands or through holes at an outer periphery thereof to be connected to a test unit.
  • High-density wiring near the probe assembly is connected to standard, coarse-pitched pads or through holes at an outer periphery of a common wiring board using, for example, flexible flat cables.
  • a probe assembly may be fabricated using laminated multiple resin film probes as disclosed in JP-A-2007-279009.
  • Each resin film probe includes a conductive section with a probe and an output terminal section.
  • the conductive section is produced by etching a sheet of copper alloy foil adhering to a resin film.
  • the output terminal sections formed on the resin films are arranged to be shifted from each other in coarse pitches when the resin film probes are laminated together. With this configuration, the output terminal sections can be connected with a printed circuit board in certain coarse pitches even in the vicinity of the probe assembly, thereby reducing the number of layers of the printed circuit boards or simplifying the wiring.
  • connection is established only linearly at one ends of the flexible flat cables as disclosed in JP-A-2003-075503, mounting of the probe assembly onto the printed circuit board and therefore achievement of the positional accuracy at the connecting sections may become difficult because of congestion of the flexible flat cables for further narrowed pad pitches, increased number of pins or varied pad arrangement of the semiconductor circuits.
  • the printed circuit board must include multiple layers and the resin film probes must increase in size in order for further narrowed pad pitches.
  • an object of the invention is to provide a prober unit which incorporates a probe assembly developed to correspond to narrow-pitched pad arrangements on semiconductor chips in order to solve problems regarding connection between a narrow-pitched probe assembly and coarse-pitched printed circuit boards or connection terminals of connectors.
  • the prober unit testing of electrical property of narrowed pad pitches on semiconductor chips can be facilitated and the cost of the prober unit can be reduced.
  • a first aspect of the invention is a prober unit in which probes are brought into contact with to-be-tested semiconductor chips to establish electrical connection between the semiconductor chips and a test unit via the probes, in which: a probe assembly and a plurality of wiring boards are prepared, the probe assembly including output terminals to be connected directly to the probes, the probe assembly being constituted by integrated regularly-arranged multiple probe groups including the output terminals, and each of the wiring boards including wiring adhering to a surface of a non-conductive film; and an n-th row of an output terminal group of the probe assembly is brought into contact with a land group provided at an end of an n-th wiring board, and a wiring terminal provided at the other end of the n-th wiring board is connected to one of a common wiring board and a connector to establish electrical connection between the to-be-tested semiconductor chips and the test unit.
  • an opening is provided at an area of one of a non-conductive section and a conductive section of a wiring board above the n-th wiring board including the n-th wiring board, above a land group that is to be brought into contact with a (n+1)th row of the output terminal group of the probe assembly formed at an area of the (n+1)th wiring board disposed below the n-th wiring board.
  • some or all of the wiring boards are made of flexible flat cables.
  • some or all of the wiring boards are made of multilayer print circuit boards.
  • a converting circuit board is provided between wiring terminals of the wiring boards and the common wiring board.
  • an existing common wiring board can be employed.
  • the probe assembly is fabricated from multiple resin film probes laminated using a support rod, each of the resin film probes including a conductive section having the probes and output terminal sections, the conductive section being fabricated by etching a sheet of copper alloy foil adhering to resin films.
  • the output terminal sections on the resin films are shifted from one another at substantially regular pitches when the resin film probes are laminated together.
  • the support rod used for laminating the resin film probes and the wiring boards are restrained in at least a direction of an XY plane (i.e., a direction of a wafer plane) by a support provided on the same support plate.
  • At least the support plate is made of a material having a thermal expansion coefficient similar to that of the semiconductor wafer.
  • a probe assembly and a plurality of wiring boards are prepared, the probe assembly including output terminals to be connected directly to the probes and the probe assembly being constituted by integrated regularly-arranged multiple probe groups including the output terminals.
  • an n-th row of an output terminal group of the probe assembly is brought into contact with a land group provided at an end of an arbitrary n-th wiring board, and a wiring terminal provided at the other end of the n-th wiring board is connected to one of a common wiring board and a connector to establish electrical connection between the to-be-tested semiconductor chips and the test unit.
  • FIG. 1 is a perspective view of a first embodiment of the invention.
  • FIG. 2 is a cross-sectional view of a central portion of FIG. 1 .
  • FIG. 3 is a front view of a probe assembly configuration relating to the first embodiment.
  • FIG. 4 is a perspective view of the probe assembly configuration relating to the first embodiment.
  • FIG. 5 is a plan view of the central portion of FIG. 1 illustrating the first embodiment of the invention.
  • FIG. 6 is a cross-sectional view of the central portion of FIG. 1 .
  • FIG. 7 is a perspective view of a second embodiment of the invention.
  • FIG. 8 is a cross-sectional view of a central portion of FIG. 7 .
  • FIG. 9 is a plan view of the central portion of FIG. 7 illustrating the second embodiment.
  • FIG. 10 is a perspective view of a third embodiment.
  • FIG. 11 is a cross-sectional view of a central portion of FIG. 10 .
  • FIG. 1 is a perspective view schematically illustrating a configuration of a prober unit according to a first embodiment of the invention.
  • FIG. 2 is a detailed cross-sectional view of a probe assembly disposed at a central portion of the prober unit shown in FIG. 1 .
  • FIGS. 3 and 4 illustrate a probe assembly configuration.
  • FIG. 5 is a front view of the central portion of FIG. 1 .
  • FIG. 6 is a cross-sectional view illustrating a positional relationship among the probe assembly, wiring boards and a common wiring board.
  • the prober unit illustrated in FIGS. 1 and 2 includes a probe assembly 1 , LSI pads 2 arranged on an electronic device, such as a wafer, to be tested for inputting/outputting signals, wiring boards 3 , a common wiring board 4 and probes 10 .
  • Each probe 10 is made of a conductive material and is connected to an output terminal 14 .
  • a bending portion 13 is formed in the middle of each probe 10 .
  • a plurality of probes 10 each contacting a distribution cable, altogether constitutes a probe assembly.
  • the present embodiment includes probes 10 - 1 to 10 - 4 as shown in FIG. 2 .
  • the probes 10 - 1 to 10 - 4 are arranged in this order in a direction perpendicular to the sheet of FIG.
  • the wiring boards 3 include lands 33 - 1 to 33 - 4 for the output terminals to be brought into contact with the probes 10 - 1 to 10 - 4 .
  • the probe assembly 1 includes probes 10 - 1 to 10 - 4 arranged regularly to correspond to the arrangement of the pads 2 .
  • Each of the wiring boards 3 includes multiple wiring patterns 32 formed by etching or by bonding on a surface of a horizontally-extending non-conductive film 31 thereof.
  • the wiring patterns 32 are made of a sheet of metallic foil, such as copper foil.
  • a plurality of non-conductive films 31 and the wiring patterns 32 are laminated in the vertical direction at predetermined intervals to form n layers.
  • the example illustrated in FIG. 2 includes four layers: a first to a fourth layers from above.
  • a second wiring pattern 32 - 2 extends further than a first wiring pattern 32 - 1 .
  • a third wiring pattern 32 - 3 extends further than the second wiring pattern 32 - 2 .
  • ends of the wiring patterns 32 are visible when seen from above.
  • the lands 33 - 1 to 33 - 4 are provided at the respective ends of the wiring patterns 32 - 1 to 32 - 4 .
  • the lands 33 - 1 to 33 - 4 are therefore shifted vertically and horizontally from one another.
  • Each of the lands 33 - 1 to 33 - 4 is constituted by a land group including a plurality of lands arranged in the depth direction of the sheet of FIG. 2 at predetermined intervals at an end of each of the wiring boards 3 .
  • the output terminals of the probes 10 - 1 to 10 - 4 are suspended above the lands 33 - 1 to 33 - 4 . Tips of the output terminals of the probes 10 - 1 to 10 - 4 are aligned with the lands 33 - 1 to 33 - 4 so as to be brought into contact with each other. In order to move the output terminals of the probes 10 - 1 to 10 - 4 into contact with the lands 33 - 1 to 33 - 4 , the probe 10 - 4 extends further than the probe 10 - 3 and the output terminal of the probe 10 - 4 extends further downward than that of the probe 10 - 3 .
  • the probe 10 - 3 extends further than the probe 10 - 2 and the output terminal of the probe 10 - 3 extends further downward than that of the probe 10 - 2 .
  • the probe 10 - 2 extends further than the probe 10 - 1 and the output terminal of the probe 10 - 2 extends further downward than that of the probe 10 - 1 .
  • the probes 10 - 1 to 10 - 4 are disposed to correspond to the lands 33 - 1 to 33 - 4 that are shifted vertically and horizontally from one another.
  • each of the output terminals of the probes 10 - 1 to 10 - 4 is constituted by a probe output terminal group including a plurality of output terminals arranged in the depth direction of the sheet of FIG. 2 at predetermined intervals.
  • Grounding members 30 - 1 to 30 - 4 are disposed between the layers of the wiring patterns 32 - 1 to 32 - 4 .
  • the grounding members 30 - 1 to 30 - 4 reduce crosstalk, i.e., interference, of the currents or the signals flowing through the layers of the wiring patterns 32 - 1 to 32 - 4 .
  • the second wiring pattern 32 - 2 extends further than the first wiring pattern 32 - 1 .
  • the first wiring pattern 32 - 1 may extend further than the second wiring pattern 32 - 2 .
  • a through hole may be provided at a part of the first wiring pattern 32 - 1 (including the non-conductive film 31 and the ground 30 ) in order to expose the second wiring pattern 32 - 2 .
  • the land 33 - 2 for the second wiring pattern 32 - 2 is disposed at the exposed area and the tip of the output terminal of the corresponding probe 10 - 2 is brought into contact with the land 33 - 2 .
  • the possibility can be eliminated with the wiring width increased to be sufficiently larger than the diameter of the through hole.
  • the third and the fourth wiring patterns 32 - 3 and 32 - 4 may have the same configuration as described above. Accordingly, in some arrangements of the wiring patterns, the through hole may penetrate two or more layers of the wiring patterns.
  • a common wiring board 4 includes peripheral common lands 42 .
  • the common lands 42 are disposed corresponding to positions of common pogo pins 46 for electrical connection with a test unit (not shown).
  • a through hole 41 is formed in the common wiring board 4 for connection with the other ends of the wiring boards.
  • FIGS. 3 and 4 illustrate configurations of the probe 10 and the probe assembly 1 according to the present embodiment.
  • the probe 10 is made of a conductive and mechanically strong material, such as beryllium copper.
  • a parallelogram spring section 12 is provided in the middle of the probe 10 which imparts spring force.
  • the bending portion 13 can absorb any external force imparted perpendicularly (i.e., in a Z direction) to the output terminal 14 which is the output section.
  • the output terminal 14 is pressed against the land 33 on the wiring board to establish an electrical connection.
  • Output positions of the output terminals 14 are shifted sequentially in an X direction of a XYZ three-dimensional orthogonal coordinate system by the distance of Px as shown in FIG. 3 .
  • a resin film probe 10 having desired precise dimension can be fabricated by, for example, affixing the conductive material to a resin film 15 and then etching the conductive material.
  • a plurality of the resin film probes 10 are stacked and fixed together with a support rod 17 inserted in a hole 16 formed in the resin film 15 .
  • the probe assembly 1 having the pitch Px in the X direction and having a pitch Py in a Y direction can be obtained.
  • a plurality of (four in the present embodiment) probe groups shifted continuously at the pitch Px in the X direction are periodically combined together.
  • the thus-fabricated probe assembly 1 can be used for narrow, Py-pitched LSI pads.
  • the narrow pitches Py can be converted into relatively coarse pitches Px on the wiring boards.
  • FIG. 5 shows positional relationships between the output terminals 14 of the probe assembly 1 and the lands 33 on the wiring boards 3 corresponding to the output terminals 14 .
  • the land 33 - 1 is constituted by a land group provided on the first wiring board so as to correspond to a first row 14 - 1 of the tips of the output terminals of the probe assembly 1 along the Y direction.
  • the land 33 - 2 is constituted by a land group provided on the second wiring board so as to correspond to a second row 14 - 2 of the tips of the output terminals of the probe assembly 1 along the Y direction.
  • the land 33 - 3 is constituted by a land group provided on the third wiring board so as to correspond to a third row 14 - 3 of the tips of the output terminals of the probe assembly 1 along the Y direction.
  • the land 33 - 4 is constituted by a land group provided on the fourth wiring board so as to correspond to a fourth row 14 - 4 of the tips of the output terminals of the probe assembly 1 along the Y direction.
  • An opening 34 - n is provided at an area of the n-th wiring board above the pad group that is brought into contact with the (n+1)th row of the output terminal group of the probe assembly 1 formed in the (n+1)th wiring board disposed below the n-th wiring board. With this configuration, the (n+1)th row of the output terminal group of the probe assembly can be brought into direct contact with the lands 33 formed on the (n+1)th wiring board.
  • the probe assembly 1 that includes the output terminal group 14 having the narrow pitch Py in the Y direction and the coarse pitch Px in the X direction is accurately positioned above the wiring boards with the support rod 17 so as to correspond to the LSI pads 2 (not shown).
  • An opening 34 is provided at an area of the n-th wiring board above the land group that is brought into contact with the (n+1)th row of the output terminal group 14 - n of the probe assembly 1 formed in the (n+1)th wiring board disposed below the n-th wiring board 3 - n .
  • the wiring boards 3 are fixed to the common wiring board 4 via, for example, a support plate 51 at positions where the (n+1)th row of the output terminal group of the probe assembly can be brought into direct contact with the lands formed in (n+1)th wiring board.
  • the other ends of the wiring boards 3 protrude from the non-conductive films 31 to form wiring patterns 32 a .
  • the wiring patterns 32 a are electrically connected to a surface land of a through hole 41 formed in the common wiring board 4 with pressure by using a pressing tool 52 .
  • the through hole 41 is further connected to peripheral common lands 42 via conductive patterns 45 formed on a surface layer 43 and an intermediate layer 44 .
  • Common pogo pins 46 communicate with the test unit with electrical signals.
  • the wiring boards 3 may be formed of multiple single-layer flexible flat cables, or one or more multi-layered stacked flexible flat cables.
  • the other ends of the wiring boards 3 and the through hole 41 formed in the common wiring board 4 may be connected by using a connector or soldered together.
  • FIG. 6 is a cross-sectional view showing a positional relationship among the probe assembly, the wiring boards and the common board. With reference to FIG. 6 , the positional relationship will be described in detail.
  • a support plate 51 and a support A 53 provided on the support plate 51 are illustrated.
  • the support A 53 has a hole 53 a at an upper portion thereof whose inner diameter is slightly larger than an outer diameter of the support rod 17 used for laminating the resin film probes.
  • the hole 53 a positions the support rod 17 with sufficient accuracy.
  • a support B 54 is provided on the support plate 51 .
  • An outer diameter of the support B 54 is slightly smaller than an inner diameter of a reference hole 35 provided in each of the wiring boards 3 .
  • the support B 54 is inserted in the reference hole 35 to align the wiring boards together in the direction of the XY plane.
  • the positional relationship among the probe tips of the resin film probes, the tips of the output terminals and the lands on the wiring boards is kept with sufficient accuracy.
  • the support plate 51 is made of a material having a thermal expansion coefficient substantially similar to that of the semiconductor wafer (e.g., a Fe-36 Ni alloy)
  • the positional relationship among the probe tips, the tips of the output terminals the lands on the wiring boards can be kept with sufficient accuracy without any influence of the thermal expansion of the common wiring board 4 even in high-temperature environments.
  • FIG. 7 is a perspective view of a prober unit according to the present embodiment.
  • FIG. 8 is a cross-sectional view and
  • FIG. 9 is a front view of a central portion of the prober unit.
  • the prober unit shown in FIGS. 7 and 8 includes wiring boards 6 and a common wiring board 4 .
  • Each of the wiring boards 6 includes a wiring pattern 62 made of, for example, a sheet of copper foil.
  • the wiring boards 6 are laminated together with intermediate insulating layers 61 interposed therebetween.
  • the common wiring board 4 includes peripheral common lands 42 .
  • the common lands 42 are disposed corresponding to positions of common pogo pins 46 for electrical connection with a test unit (not shown).
  • a through hole 47 is formed in the common wiring board 4 to be connected to a relay through hole 64 .
  • FIG. 9 shows positional relationships between the output terminals 14 of the probe assembly 1 and the lands 63 for the output terminals provided on the wiring boards 6 so as to correspond to the output terminals 14 .
  • the land 63 - 1 is constituted by a land group provided on the first wiring board corresponding to a first row 14 - 1 of the tips of the output terminals of the probe assembly 1 along the Y direction.
  • the land 63 - 2 is constituted by a land group provided on the second wiring board corresponding to a second row 14 - 2 of the tips of the output terminals of the probe assembly 1 along the Y direction.
  • the land 63 - 3 is constituted by a land group provided on the third wiring board corresponding to a third row 14 - 3 of the tips of the output terminals of the probe assembly 1 along the Y direction.
  • the land 63 - 4 is constituted by a land group provided on the fourth wiring board corresponding to a fourth row 14 - 4 of the tips of the output terminals of the probe assembly 1 along the Y direction.
  • An opening hole 64 - n is provided at an area of the n-th wiring board above the pad group that is brought into contact with the (n+1)th row of the output terminal group of the probe assembly 1 formed in the (n+1)th wiring board disposed below the n-th wiring board.
  • the probe assembly 1 that includes the output terminal group 14 having the narrow pitch Py in the Y direction and the coarse pitch Px in the X direction is accurately positioned above the wiring boards with a fixing tool 17 so as to correspond to the LSI pads 2 (not shown).
  • the opening hole 64 is provided at an area of the n-th wiring board above each of the lands that is brought into contact with the (n+1)th row of the output terminal group 14 - n of the probe assembly 1 formed in the (n+1)th wiring board disposed below the n-th wiring board 6 - n .
  • the wiring boards 6 are fixed to the common wiring board 4 at positions where the (n+1)th row of the output terminal group of the probe assembly can be brought into direct contact with the lands formed in (n+1)th wiring board.
  • the wiring boards 6 are connected to a relay through hole 65 via the wiring patterns 62 from the lands 63 .
  • the relay through hole 65 is connected to the through hole 47 provided in the common wiring board 4 to keep electrical connection with the common wiring board 4 .
  • the relay through hole 65 and the through hole 47 can be connected via, for example, lands of the through holes (illustrated) or via connectors.
  • the through hole 47 is further connected to peripheral common lands 42 via conductive patterns 45 formed on a surface layer 43 and an intermediate layer 44 .
  • Common pogo pins 46 communicate with the test unit with electrical signals.
  • FIG. 10 is a perspective view of a prober unit according to the present embodiment.
  • FIG. 11 is a cross-sectional view of a central portion of the prober unit shown in FIG. 10 .
  • the prober unit shown in FIGS. 10 and 11 includes wiring boards 7 which are laminated with intermediate insulating layers 71 interposed therebetween.
  • Each of the wiring boards 7 includes a wiring pattern 72 made of, for example, a sheet of copper foil.
  • Each of the wiring boards 7 includes peripheral common lands 42 .
  • the common lands 42 are disposed corresponding to positions of common pogo pins 46 for electrical connection with a test unit (not shown).
  • the probe assembly 1 that includes the output terminal group 14 having the narrow pitch Py in the Y direction and the coarse pitch Px in the X direction is accurately positioned above the wiring boards with the fixing tool 17 so as to correspond to the LSI pads 2 (not shown).
  • An opening hole 74 is provided at an area of the n-th wiring board above each of the lands that is brought into contact with the (n+1)th row of the output terminal group 14 - n of the probe assembly 1 formed in the (n+1)th wiring board disposed below the n-th wiring board 7 - n .
  • the wiring boards 7 are fixed together at positions where the (n+1)th row of the output terminal group of the probe assembly can be brought into direct contact with the lands formed in (n+1)th wiring board.
  • the lands for the output terminals are connected to peripheral common lands 42 via wiring patterns 72 . Common pogo pins 46 communicate with the test unit with electrical signals.
  • a probe assembly and a plurality of wiring boards are prepared, the probe assembly including output terminals to be connected directly to the probes and the probe assembly being constituted by integrated regularly-arranged multiple probe groups including the output terminals.
  • an n-th row of an output terminal group of the probe assembly is brought into contact with a land group provided at an end of an arbitrary n-th wiring board, and a wiring terminal provided at the other end of the n-th wiring board is connected to one of a common wiring board and a connector to establish electrical connection between the to-be-tested semiconductor chips and the test unit.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

A prober unit in which probes are brought into contact with to-be-tested semiconductor chips to establish electrical connection between the semiconductor chips and a test unit via the probes. A probe assembly and a plurality of wiring boards are prepared, the probe assembly being constituted by integrated regularly-arranged multiple probe groups including output terminals connected directly to the probes, and each of the wiring boards including wiring adhering to a surface of a non-conductive film; and an n-th row of an output terminal group of the probe assembly is brought into contact with a land group provided at an end of an n-th wiring board, and a wiring terminal provided at the other end of the n-th wiring board is connected to one of a wiring board of the test unit and a connector to establish electrical connection between the to-be-tested semiconductor chips and the test unit.

Description

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a probe assembly of a prober unit for testing circuits of semiconductor chips on a semiconductor wafer during fabrication of electronic devices including LSI. More particularly, the invention relates to a prober unit used for probe testing. In the probe testing, circuit terminals (i.e., pads) that are present on the semiconductor chips on the semiconductor wafer are moved into contact with probes to collectively test the electrical conductivity of the semiconductor chips at the wafer level, before the wafer is diced.
2. Description of the Related Art
As the semiconductor technology advances, highly integrated electronic devices have become more and more common. The circuit terminals (i.e., pads) on the wafer chip have also increased in number. The pads have been arranged more precisely in reduced pad areas at narrowed pad pitches.
Also in probe cards used in semiconductor circuit testing, in which the pads on the semiconductor circuits are brought into electrical connection with a probe group, the probes have been arranged more densely for increased number of pads on the semiconductor chip, reduced pad areas or narrowed pad pitches.
In a general probe card, as disclosed in Japanese Unexamined Patent Application Publication (JP-A) No. 2003-075503, a narrow-pitched probe assembly is disposed at a central portion of a printed circuit board having standard, coarse-pitched lands or through holes at an outer periphery thereof to be connected to a test unit. High-density wiring near the probe assembly is connected to standard, coarse-pitched pads or through holes at an outer periphery of a common wiring board using, for example, flexible flat cables.
As another approach, a probe assembly may be fabricated using laminated multiple resin film probes as disclosed in JP-A-2007-279009. Each resin film probe includes a conductive section with a probe and an output terminal section. The conductive section is produced by etching a sheet of copper alloy foil adhering to a resin film. The output terminal sections formed on the resin films are arranged to be shifted from each other in coarse pitches when the resin film probes are laminated together. With this configuration, the output terminal sections can be connected with a printed circuit board in certain coarse pitches even in the vicinity of the probe assembly, thereby reducing the number of layers of the printed circuit boards or simplifying the wiring.
However, if the connection is established only linearly at one ends of the flexible flat cables as disclosed in JP-A-2003-075503, mounting of the probe assembly onto the printed circuit board and therefore achievement of the positional accuracy at the connecting sections may become difficult because of congestion of the flexible flat cables for further narrowed pad pitches, increased number of pins or varied pad arrangement of the semiconductor circuits.
Further, if the connection of the output terminals of the probe assembly is established only on the surface layer of the printed circuit board as disclosed in JP-A-2007-279009, the printed circuit board must include multiple layers and the resin film probes must increase in size in order for further narrowed pad pitches.
In view of the aforementioned, an object of the invention is to provide a prober unit which incorporates a probe assembly developed to correspond to narrow-pitched pad arrangements on semiconductor chips in order to solve problems regarding connection between a narrow-pitched probe assembly and coarse-pitched printed circuit boards or connection terminals of connectors. With the prober unit, testing of electrical property of narrowed pad pitches on semiconductor chips can be facilitated and the cost of the prober unit can be reduced.
SUMMARY OF THE INVENTION
A first aspect of the invention is a prober unit in which probes are brought into contact with to-be-tested semiconductor chips to establish electrical connection between the semiconductor chips and a test unit via the probes, in which: a probe assembly and a plurality of wiring boards are prepared, the probe assembly including output terminals to be connected directly to the probes, the probe assembly being constituted by integrated regularly-arranged multiple probe groups including the output terminals, and each of the wiring boards including wiring adhering to a surface of a non-conductive film; and an n-th row of an output terminal group of the probe assembly is brought into contact with a land group provided at an end of an n-th wiring board, and a wiring terminal provided at the other end of the n-th wiring board is connected to one of a common wiring board and a connector to establish electrical connection between the to-be-tested semiconductor chips and the test unit.
In an embodiment of the invention, an opening is provided at an area of one of a non-conductive section and a conductive section of a wiring board above the n-th wiring board including the n-th wiring board, above a land group that is to be brought into contact with a (n+1)th row of the output terminal group of the probe assembly formed at an area of the (n+1)th wiring board disposed below the n-th wiring board. With this configuration, since the output terminal group of the probe assembly can be connected directly to intermediate layers of the wiring boards, a narrow-pitched output terminal group can be employed.
In an embodiment of the invention, some or all of the wiring boards are made of flexible flat cables.
In an embodiment of the invention, some or all of the wiring boards are made of multilayer print circuit boards.
In an embodiment of the invention, a converting circuit board is provided between wiring terminals of the wiring boards and the common wiring board. With this configuration, an existing common wiring board can be employed.
In an embodiment of the invention, the probe assembly is fabricated from multiple resin film probes laminated using a support rod, each of the resin film probes including a conductive section having the probes and output terminal sections, the conductive section being fabricated by etching a sheet of copper alloy foil adhering to resin films.
In an embodiment of the invention, the output terminal sections on the resin films are shifted from one another at substantially regular pitches when the resin film probes are laminated together.
In an embodiment of the invention, the support rod used for laminating the resin film probes and the wiring boards are restrained in at least a direction of an XY plane (i.e., a direction of a wafer plane) by a support provided on the same support plate.
In an embodiment of the invention, at least the support plate is made of a material having a thermal expansion coefficient similar to that of the semiconductor wafer.
According to the prober unit of the invention, a probe assembly and a plurality of wiring boards are prepared, the probe assembly including output terminals to be connected directly to the probes and the probe assembly being constituted by integrated regularly-arranged multiple probe groups including the output terminals. In addition, an n-th row of an output terminal group of the probe assembly is brought into contact with a land group provided at an end of an arbitrary n-th wiring board, and a wiring terminal provided at the other end of the n-th wiring board is connected to one of a common wiring board and a connector to establish electrical connection between the to-be-tested semiconductor chips and the test unit. With this configuration, the problems on connection of a narrow-pitched probe assembly and coarse-pitched printed circuit board or connection terminals of connectors can be solved. Thus, testing of electrical property of narrowed pad pitches on semiconductor chips can be facilitated and the cost of the prober unit can be reduced.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a perspective view of a first embodiment of the invention.
FIG. 2 is a cross-sectional view of a central portion of FIG. 1.
FIG. 3 is a front view of a probe assembly configuration relating to the first embodiment.
FIG. 4 is a perspective view of the probe assembly configuration relating to the first embodiment.
FIG. 5 is a plan view of the central portion of FIG. 1 illustrating the first embodiment of the invention.
FIG. 6 is a cross-sectional view of the central portion of FIG. 1.
FIG. 7 is a perspective view of a second embodiment of the invention.
FIG. 8 is a cross-sectional view of a central portion of FIG. 7.
FIG. 9 is a plan view of the central portion of FIG. 7 illustrating the second embodiment.
FIG. 10 is a perspective view of a third embodiment.
FIG. 11 is a cross-sectional view of a central portion of FIG. 10.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring now to the drawings, embodiments of the invention will be described in detail. FIG. 1 is a perspective view schematically illustrating a configuration of a prober unit according to a first embodiment of the invention. FIG. 2 is a detailed cross-sectional view of a probe assembly disposed at a central portion of the prober unit shown in FIG. 1. FIGS. 3 and 4 illustrate a probe assembly configuration. FIG. 5 is a front view of the central portion of FIG. 1. FIG. 6 is a cross-sectional view illustrating a positional relationship among the probe assembly, wiring boards and a common wiring board.
The prober unit illustrated in FIGS. 1 and 2 includes a probe assembly 1, LSI pads 2 arranged on an electronic device, such as a wafer, to be tested for inputting/outputting signals, wiring boards 3, a common wiring board 4 and probes 10. Each probe 10 is made of a conductive material and is connected to an output terminal 14. A bending portion 13 is formed in the middle of each probe 10. A plurality of probes 10, each contacting a distribution cable, altogether constitutes a probe assembly. The present embodiment includes probes 10-1 to 10-4 as shown in FIG. 2. The probes 10-1 to 10-4 are arranged in this order in a direction perpendicular to the sheet of FIG. 2 (i.e., the depth direction) from the near side at predetermined intervals. The wiring boards 3 include lands 33-1 to 33-4 for the output terminals to be brought into contact with the probes 10-1 to 10-4. The probe assembly 1 includes probes 10-1 to 10-4 arranged regularly to correspond to the arrangement of the pads 2. Each of the wiring boards 3 includes multiple wiring patterns 32 formed by etching or by bonding on a surface of a horizontally-extending non-conductive film 31 thereof. The wiring patterns 32 are made of a sheet of metallic foil, such as copper foil.
A plurality of non-conductive films 31 and the wiring patterns 32 are laminated in the vertical direction at predetermined intervals to form n layers. The example illustrated in FIG. 2 includes four layers: a first to a fourth layers from above. A second wiring pattern 32-2 extends further than a first wiring pattern 32-1. A third wiring pattern 32-3 extends further than the second wiring pattern 32-2. In this manner, ends of the wiring patterns 32 are visible when seen from above. The lands 33-1 to 33-4 are provided at the respective ends of the wiring patterns 32-1 to 32-4. The lands 33-1 to 33-4 are therefore shifted vertically and horizontally from one another. Each of the lands 33-1 to 33-4 is constituted by a land group including a plurality of lands arranged in the depth direction of the sheet of FIG. 2 at predetermined intervals at an end of each of the wiring boards 3.
The output terminals of the probes 10-1 to 10-4 are suspended above the lands 33-1 to 33-4. Tips of the output terminals of the probes 10-1 to 10-4 are aligned with the lands 33-1 to 33-4 so as to be brought into contact with each other. In order to move the output terminals of the probes 10-1 to 10-4 into contact with the lands 33-1 to 33-4, the probe 10-4 extends further than the probe 10-3 and the output terminal of the probe 10-4 extends further downward than that of the probe 10-3. Similarly, the probe 10-3 extends further than the probe 10-2 and the output terminal of the probe 10-3 extends further downward than that of the probe 10-2. Similarly, the probe 10-2 extends further than the probe 10-1 and the output terminal of the probe 10-2 extends further downward than that of the probe 10-1. Accordingly, the probes 10-1 to 10-4 are disposed to correspond to the lands 33-1 to 33-4 that are shifted vertically and horizontally from one another. In the probe assembly 1, each of the output terminals of the probes 10-1 to 10-4 is constituted by a probe output terminal group including a plurality of output terminals arranged in the depth direction of the sheet of FIG. 2 at predetermined intervals.
Grounding members 30-1 to 30-4 are disposed between the layers of the wiring patterns 32-1 to 32-4. The grounding members 30-1 to 30-4 reduce crosstalk, i.e., interference, of the currents or the signals flowing through the layers of the wiring patterns 32-1 to 32-4.
The foregoing arrangement of the layers of the wiring patterns 32 and the lands 33 are illustrated for the ease of understanding of the invention. In a further generalized arrangement, it is not necessary that the second wiring pattern 32-2 extends further than the first wiring pattern 32-1. Alternatively, the first wiring pattern 32-1 may extend further than the second wiring pattern 32-2. In this configuration, although the second wiring pattern 32-2 is not visible when seen from above, a through hole may be provided at a part of the first wiring pattern 32-1 (including the non-conductive film 31 and the ground 30) in order to expose the second wiring pattern 32-2. The land 33-2 for the second wiring pattern 32-2 is disposed at the exposed area and the tip of the output terminal of the corresponding probe 10-2 is brought into contact with the land 33-2. Although there is a possibility of disconnection in the first wiring pattern 32-1 that includes the through hole, the possibility can be eliminated with the wiring width increased to be sufficiently larger than the diameter of the through hole. The third and the fourth wiring patterns 32-3 and 32-4 may have the same configuration as described above. Accordingly, in some arrangements of the wiring patterns, the through hole may penetrate two or more layers of the wiring patterns.
A common wiring board 4 includes peripheral common lands 42. The common lands 42 are disposed corresponding to positions of common pogo pins 46 for electrical connection with a test unit (not shown). A through hole 41 is formed in the common wiring board 4 for connection with the other ends of the wiring boards.
FIGS. 3 and 4 illustrate configurations of the probe 10 and the probe assembly 1 according to the present embodiment. As shown in FIG. 3, the probe 10 is made of a conductive and mechanically strong material, such as beryllium copper. A parallelogram spring section 12 is provided in the middle of the probe 10 which imparts spring force. When the probe tip 11 and the LSI pad 2 is brought into contact with each other, the probe 10 and the LSI pad 2 are electrically conducted. The bending portion 13 can absorb any external force imparted perpendicularly (i.e., in a Z direction) to the output terminal 14 which is the output section. The output terminal 14 is pressed against the land 33 on the wiring board to establish an electrical connection. Output positions of the output terminals 14 are shifted sequentially in an X direction of a XYZ three-dimensional orthogonal coordinate system by the distance of Px as shown in FIG. 3. A resin film probe 10 having desired precise dimension can be fabricated by, for example, affixing the conductive material to a resin film 15 and then etching the conductive material.
As shown in FIG. 4, a plurality of the resin film probes 10 are stacked and fixed together with a support rod 17 inserted in a hole 16 formed in the resin film 15. In this manner, the probe assembly 1 having the pitch Px in the X direction and having a pitch Py in a Y direction can be obtained. A plurality of (four in the present embodiment) probe groups shifted continuously at the pitch Px in the X direction are periodically combined together. The thus-fabricated probe assembly 1 can be used for narrow, Py-pitched LSI pads. The narrow pitches Py can be converted into relatively coarse pitches Px on the wiring boards.
FIG. 5 shows positional relationships between the output terminals 14 of the probe assembly 1 and the lands 33 on the wiring boards 3 corresponding to the output terminals 14. The land 33-1 is constituted by a land group provided on the first wiring board so as to correspond to a first row 14-1 of the tips of the output terminals of the probe assembly 1 along the Y direction. The land 33-2 is constituted by a land group provided on the second wiring board so as to correspond to a second row 14-2 of the tips of the output terminals of the probe assembly 1 along the Y direction. The land 33-3 is constituted by a land group provided on the third wiring board so as to correspond to a third row 14-3 of the tips of the output terminals of the probe assembly 1 along the Y direction. The land 33-4 is constituted by a land group provided on the fourth wiring board so as to correspond to a fourth row 14-4 of the tips of the output terminals of the probe assembly 1 along the Y direction. An opening 34-n is provided at an area of the n-th wiring board above the pad group that is brought into contact with the (n+1)th row of the output terminal group of the probe assembly 1 formed in the (n+1)th wiring board disposed below the n-th wiring board. With this configuration, the (n+1)th row of the output terminal group of the probe assembly can be brought into direct contact with the lands 33 formed on the (n+1)th wiring board.
The configuration and the function of the prober unit with the foregoing components will be described in further detail below.
The probe assembly 1 that includes the output terminal group 14 having the narrow pitch Py in the Y direction and the coarse pitch Px in the X direction is accurately positioned above the wiring boards with the support rod 17 so as to correspond to the LSI pads 2 (not shown). An opening 34 is provided at an area of the n-th wiring board above the land group that is brought into contact with the (n+1)th row of the output terminal group 14-n of the probe assembly 1 formed in the (n+1)th wiring board disposed below the n-th wiring board 3-n. In this manner, the wiring boards 3 are fixed to the common wiring board 4 via, for example, a support plate 51 at positions where the (n+1)th row of the output terminal group of the probe assembly can be brought into direct contact with the lands formed in (n+1)th wiring board. The other ends of the wiring boards 3 protrude from the non-conductive films 31 to form wiring patterns 32 a. The wiring patterns 32 a are electrically connected to a surface land of a through hole 41 formed in the common wiring board 4 with pressure by using a pressing tool 52. The through hole 41 is further connected to peripheral common lands 42 via conductive patterns 45 formed on a surface layer 43 and an intermediate layer 44. Common pogo pins 46 communicate with the test unit with electrical signals.
The wiring boards 3 may be formed of multiple single-layer flexible flat cables, or one or more multi-layered stacked flexible flat cables. The other ends of the wiring boards 3 and the through hole 41 formed in the common wiring board 4 may be connected by using a connector or soldered together.
FIG. 6 is a cross-sectional view showing a positional relationship among the probe assembly, the wiring boards and the common board. With reference to FIG. 6, the positional relationship will be described in detail. In FIG. 6, a support plate 51 and a support A 53 provided on the support plate 51 are illustrated. The support A 53 has a hole 53 a at an upper portion thereof whose inner diameter is slightly larger than an outer diameter of the support rod 17 used for laminating the resin film probes. The hole 53 a positions the support rod 17 with sufficient accuracy. A support B 54 is provided on the support plate 51. An outer diameter of the support B 54 is slightly smaller than an inner diameter of a reference hole 35 provided in each of the wiring boards 3. The support B 54 is inserted in the reference hole 35 to align the wiring boards together in the direction of the XY plane.
With this configuration, the positional relationship among the probe tips of the resin film probes, the tips of the output terminals and the lands on the wiring boards is kept with sufficient accuracy. If the support plate 51 is made of a material having a thermal expansion coefficient substantially similar to that of the semiconductor wafer (e.g., a Fe-36 Ni alloy), the positional relationship among the probe tips, the tips of the output terminals the lands on the wiring boards can be kept with sufficient accuracy without any influence of the thermal expansion of the common wiring board 4 even in high-temperature environments.
Referring now to the drawings, a second embodiment of the invention will be described in detail. FIG. 7 is a perspective view of a prober unit according to the present embodiment. FIG. 8 is a cross-sectional view and FIG. 9 is a front view of a central portion of the prober unit. The prober unit shown in FIGS. 7 and 8 includes wiring boards 6 and a common wiring board 4. Each of the wiring boards 6 includes a wiring pattern 62 made of, for example, a sheet of copper foil. The wiring boards 6 are laminated together with intermediate insulating layers 61 interposed therebetween.
The common wiring board 4 includes peripheral common lands 42. The common lands 42 are disposed corresponding to positions of common pogo pins 46 for electrical connection with a test unit (not shown). A through hole 47 is formed in the common wiring board 4 to be connected to a relay through hole 64.
FIG. 9 shows positional relationships between the output terminals 14 of the probe assembly 1 and the lands 63 for the output terminals provided on the wiring boards 6 so as to correspond to the output terminals 14. The land 63-1 is constituted by a land group provided on the first wiring board corresponding to a first row 14-1 of the tips of the output terminals of the probe assembly 1 along the Y direction. The land 63-2 is constituted by a land group provided on the second wiring board corresponding to a second row 14-2 of the tips of the output terminals of the probe assembly 1 along the Y direction. The land 63-3 is constituted by a land group provided on the third wiring board corresponding to a third row 14-3 of the tips of the output terminals of the probe assembly 1 along the Y direction. The land 63-4 is constituted by a land group provided on the fourth wiring board corresponding to a fourth row 14-4 of the tips of the output terminals of the probe assembly 1 along the Y direction. An opening hole 64-n is provided at an area of the n-th wiring board above the pad group that is brought into contact with the (n+1)th row of the output terminal group of the probe assembly 1 formed in the (n+1)th wiring board disposed below the n-th wiring board. With this configuration, the (n+1)th row of the output terminal group of the probe assembly can be brought into direct contact with the lands 63 formed on the (n+1)th wiring board.
The probe assembly 1 that includes the output terminal group 14 having the narrow pitch Py in the Y direction and the coarse pitch Px in the X direction is accurately positioned above the wiring boards with a fixing tool 17 so as to correspond to the LSI pads 2 (not shown). The opening hole 64 is provided at an area of the n-th wiring board above each of the lands that is brought into contact with the (n+1)th row of the output terminal group 14-n of the probe assembly 1 formed in the (n+1)th wiring board disposed below the n-th wiring board 6-n. In this manner, the wiring boards 6 are fixed to the common wiring board 4 at positions where the (n+1)th row of the output terminal group of the probe assembly can be brought into direct contact with the lands formed in (n+1)th wiring board. At the outer peripheries of the wiring boards 6, the wiring boards 6 are connected to a relay through hole 65 via the wiring patterns 62 from the lands 63.
The relay through hole 65 is connected to the through hole 47 provided in the common wiring board 4 to keep electrical connection with the common wiring board 4. The relay through hole 65 and the through hole 47 can be connected via, for example, lands of the through holes (illustrated) or via connectors. The through hole 47 is further connected to peripheral common lands 42 via conductive patterns 45 formed on a surface layer 43 and an intermediate layer 44. Common pogo pins 46 communicate with the test unit with electrical signals.
Referring now to the drawings, a third embodiment of the invention will be described in detail. FIG. 10 is a perspective view of a prober unit according to the present embodiment. FIG. 11 is a cross-sectional view of a central portion of the prober unit shown in FIG. 10. In the third embodiment, functions of the wiring boards 6 and the common wiring board 4 in the second embodiment are integrated together. The prober unit shown in FIGS. 10 and 11 includes wiring boards 7 which are laminated with intermediate insulating layers 71 interposed therebetween. Each of the wiring boards 7 includes a wiring pattern 72 made of, for example, a sheet of copper foil. Each of the wiring boards 7 includes peripheral common lands 42. The common lands 42 are disposed corresponding to positions of common pogo pins 46 for electrical connection with a test unit (not shown).
Since the positional relationship between output terminals 14 of the probe assembly 1 and corresponding lands 73 for the output terminals provided on the wiring boards 7 is similar to that illustrated with reference to FIGS. 8 and 9, description thereof will be omitted.
The probe assembly 1 that includes the output terminal group 14 having the narrow pitch Py in the Y direction and the coarse pitch Px in the X direction is accurately positioned above the wiring boards with the fixing tool 17 so as to correspond to the LSI pads 2 (not shown). An opening hole 74 is provided at an area of the n-th wiring board above each of the lands that is brought into contact with the (n+1)th row of the output terminal group 14-n of the probe assembly 1 formed in the (n+1)th wiring board disposed below the n-th wiring board 7-n. In this manner, the wiring boards 7 are fixed together at positions where the (n+1)th row of the output terminal group of the probe assembly can be brought into direct contact with the lands formed in (n+1)th wiring board. The lands for the output terminals are connected to peripheral common lands 42 via wiring patterns 72. Common pogo pins 46 communicate with the test unit with electrical signals.
As described above, a probe assembly and a plurality of wiring boards are prepared, the probe assembly including output terminals to be connected directly to the probes and the probe assembly being constituted by integrated regularly-arranged multiple probe groups including the output terminals. In addition, an n-th row of an output terminal group of the probe assembly is brought into contact with a land group provided at an end of an arbitrary n-th wiring board, and a wiring terminal provided at the other end of the n-th wiring board is connected to one of a common wiring board and a connector to establish electrical connection between the to-be-tested semiconductor chips and the test unit. With this configuration, the problems on connection of a narrow-pitched probe assembly and coarse-pitched printed circuit board or connection terminals of connectors can be solved. Thus, testing of electrical property of narrowed pad pitches on semiconductor chips can be facilitated and the cost of the prober unit can be reduced.
The present invention has been described with reference to the preferred embodiments shown in the drawings. However, it will be apparent to those skilled in the art that various changes and can be made without departing from the spirit and scope of the invention. The invention includes any modified embodiments.

Claims (8)

What is claimed is:
1. A prober unit in which probes are brought into contact with to-be-tested semiconductor chips to establish electrical connection between the semiconductor chips and a test unit via the probes, wherein:
a probe assembly and a plurality of wiring boards are prepared, the probe assembly including output terminals to be connected directly to the probes, the probe assembly being constituted by integrated regularly-arranged multiple probe groups including the output terminals, and each of the wiring boards including wiring adhering to a surface of a non-conductive film;
an n-th row of an output terminal group of the probe assembly is brought into contact with a land group provided at an end of an arbitrary n-th wiring board, and a wiring terminal provided at the other end of the n-th wiring board is connected to one of a common wiring board and a connector to establish electrical connection between the to-be-tested semiconductor chips and the test unit; and
wherein a converting circuit board is provided between wiring terminals of the wiring boards and the common wiring board.
2. A prober unit according to claim 1, wherein an opening is provided at an area of one of a non-conductive section and a conductive section of a wiring board above the n-th wiring board including the n-th wiring board, above a land group that is to be brought into contact with a (n+1)th row of the output terminal group of the probe assembly formed at an area of the (n+1)th wiring board disposed below the n-th wiring board.
3. A prober unit according to claim 1, wherein some or all of the wiring boards are made of flexible flat cables.
4. A prober unit according to claim 1, wherein some or all of the wiring boards are made of multilayer print circuit boards.
5. A prober unit according to claim 1, wherein the probe assembly is fabricated from multiple resin film probes laminated using a support rod, each of the resin film probes including a conductive section having the probes and output terminal sections, the conductive section being fabricated by etching a sheet of copper alloy foil adhering to resin films.
6. A prober unit according to claim 5, wherein the output terminal sections on the resin films are shifted from one another at substantially regular pitches when the resin film probes are laminated together.
7. A prober unit according to claim 1, wherein the support rod used for laminating the resin film probes and the wiring boards are restrained in at least an XY direction (i.e., a direction of a wafer plane) by a support provided on the same support plate.
8. A prober unit according to claim 7, wherein at least the support plate is made of a material having a thermal expansion coefficient similar to that of the semiconductor wafer.
US12/712,734 2010-02-25 2010-02-25 Prober unit Expired - Fee Related US8476919B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US12/712,734 US8476919B2 (en) 2010-02-25 2010-02-25 Prober unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/712,734 US8476919B2 (en) 2010-02-25 2010-02-25 Prober unit

Publications (2)

Publication Number Publication Date
US20110204911A1 US20110204911A1 (en) 2011-08-25
US8476919B2 true US8476919B2 (en) 2013-07-02

Family

ID=44475993

Family Applications (1)

Application Number Title Priority Date Filing Date
US12/712,734 Expired - Fee Related US8476919B2 (en) 2010-02-25 2010-02-25 Prober unit

Country Status (1)

Country Link
US (1) US8476919B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9470715B2 (en) * 2013-01-11 2016-10-18 Mpi Corporation Probe head
CN113376504A (en) * 2021-04-29 2021-09-10 苏州通富超威半导体有限公司 Device for testing chip

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003075503A (en) 2001-09-03 2003-03-12 Isao Kimoto Prober device
US20070063718A1 (en) * 2005-09-19 2007-03-22 Gunsei Kimoto Contact assembly and LSI chip inspecting device using the same
JP2007279009A (en) 2006-04-06 2007-10-25 Isao Kimoto Contact assembly
US20070268031A1 (en) * 2006-05-18 2007-11-22 Centipede Systems, Inc. Wafer Probe Interconnect System
US20080094090A1 (en) * 2006-10-18 2008-04-24 Gunsei Kimoto Probe

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003075503A (en) 2001-09-03 2003-03-12 Isao Kimoto Prober device
US6731123B2 (en) * 2001-09-03 2004-05-04 Gunsei Kimoto Probe device
US20070063718A1 (en) * 2005-09-19 2007-03-22 Gunsei Kimoto Contact assembly and LSI chip inspecting device using the same
JP2007279009A (en) 2006-04-06 2007-10-25 Isao Kimoto Contact assembly
US20070268031A1 (en) * 2006-05-18 2007-11-22 Centipede Systems, Inc. Wafer Probe Interconnect System
US20080094090A1 (en) * 2006-10-18 2008-04-24 Gunsei Kimoto Probe

Also Published As

Publication number Publication date
US20110204911A1 (en) 2011-08-25

Similar Documents

Publication Publication Date Title
TWI221197B (en) High density planar electrical interface
US6343940B1 (en) Contact structure and assembly mechanism thereof
US7622937B2 (en) Electrical signal connector
US7096748B2 (en) Embedded strain gauge in printed circuit boards
US7898276B2 (en) Probe card with stacked substrate
US7423441B2 (en) Contactor assembly
KR101334795B1 (en) Coordinate transforming apparatus for electrical signal connection
US20150061719A1 (en) Vertical probe card for micro-bump probing
US7948253B2 (en) Probe assembly
JP2012093375A (en) Lsi chip inspection device using contact piece assembly
KR20130047933A (en) Probe, probe assembly and probe card comprising it
US8476919B2 (en) Prober unit
JP4962929B2 (en) PROBER DEVICE AND PROBE ASSEMBLY USED FOR THE SAME
CN114829957A (en) Transposition through hole arrangement in probe card for automated test equipment
KR20140110443A (en) Probe card
JP2019219368A (en) Probe card
KR20110097529A (en) Prober unit
JP2010054487A (en) Prober apparatus
JP5333829B2 (en) Probe assembly
TWI397691B (en) Probe station device
KR100979502B1 (en) Circuit board of probe card
KR20170020185A (en) Probe card
CN117330800A (en) Test probe card and test apparatus
KR20130051843A (en) Probe, probe assembly and probe card comprising it
JP2010038691A (en) Circuit board, method of manufacturing the same, electrical testing tool, and electrical testing apparatus

Legal Events

Date Code Title Description
REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20170702