US3821712A

US3821712A - Musical sequencer

Info

Publication number: US3821712A
Application number: US00319635A
Authority: US
Inventors: W Wetzel
Original assignee: Sonic Industries Inc
Current assignee: Sonic Industries Inc
Priority date: 1972-12-29
Filing date: 1972-12-29
Publication date: 1974-06-28
Anticipated expiration: 1991-06-28

Abstract

A muscial sequencer for producing control voltages is disclosed together with an electronic device for producing music controlled by the electronic voltages. The electronic device disclosed includes a voltage controlled oscillator, a pair of voltage controlled amplifiers and a speaker normally actuated by a keyboard. The electronic device is electrically and mechanically adapted to be controlled by the musical sequencer. The musical sequencer consists of three rewrite memories and control circuitry therefor.

Description

United States Patent Wetzel [111 3,821,712 June 28, 1974 MUSICAL SEQUENCER William H. Wetzel, Neptune, NJ.

[73] Assignee: Sonic Industries Incorporated,

Morristown, NJ.

221 Filed: Dec. 29, 1972 211 Appl. No.2 319,635

[75] Inventor:

{52] US. Cl. 340/1725, 84/l.0l

[5]} Int. Cl Gllc 7/00 [58] Field of Search 340/l72.5; 84/l.0l, L03, 84/l.24

[ 56] References Cited UNITED STATES PATENTS 3,673,573 6/1972 Smith 340/1725 llG COUNTER AND 97 ADDRESS REGISTER READ-WRITE MEMORY READ- WRITE READ-WRlTE Primary ExaminerPaul J. Henon Assistant ExaminerPaul R. Woods Attorney, Agent, or FirmLemer, David, Littenbcrg & Samuel [57] ABSTRACT A muscial sequencer for producing control voltages is disclosed together with an electronic device for producing music controlled by the electronic voltages. The electronic device disclosed includes a voltage controlled oscillator, a pair of voltage controlled am plifiers and a speaker normally actuated by a keyboard. The electronic device is electrically and mechanically adapted to be controlled by the musical sequencer. The musical sequencer consists of three rewrite memories and control circuitry therefor.

11 Claims, 2 Drawing Figures 1 MUSICAL SEQUENCER FIELD OF THE INVENTION BACKGROUND OF THE INVENTION Electronic equipment which produces music has been known for a long period of time. Public address systems amplify music, radios transmit and reproduce music at great distances, while recording equipment stores and plays back music at a later time.

Electronic circuitry is now well known which synthesizes wave forms for the reproduction of music. Some circuitry is known which randomly actuates an electronic synthesizer to produce the so-called machine generated music.

Presently existing equipment for driving electronic synthesizers, however, are not capable of recording music as it is being played by an individual on the synthesizer. The presently available machines further are not capable of taking such recorded music and playing it back in accordance with predetermined manipulations or randomly.

Therefore, it is an object of this invention to provide a new and improved musical sequencer.

It is a further object of this invention to provide a new and improved musical sequencer which can record musical sequencers in real time while the operator thereof is listening to the music.

It is yet another object of this invention to provide a musical sequencer which can manipulate stored musical sequencers in accordance with desired algorithms.

BRIEF DESCRIPTION OF THE INVENTION With these and other objects in view the present invention contemplates a musical sequencer for providing drive signals to a voltage controlled musical device. The musical sequencer includes a first memory which is rendered effective by an address signal and responsive to a store signal for storing information signals applied to the input in an address location therein dependent upon the address signal. The first memory is further responsive to a resignal for providing the information signal stored in the address location therein dependent upon the address signal at an output. Circuitry is provided for applying an address signal to the first memory. The store signal to the first memory and circuitry which is responsive to the store signal for providing the read signal to the first memory a predetermined time interval after the occurrence of the store signal. In this way musical sequencers being stored in the first memory can be applied to the voltage controlled musical device so that the person programming the first memory can hear the music that is being stored therein.

The musical sequencer has additional circuitry therein which increments the address signal being applied to the memory each time the store signal is applied thereto.

In the preferred embodiment of this invention, the musical sequencer has a second memory located therein, a clock signal generator and a counter. The counter counts the clock signals from the clock signal generator for providing rhythm information which is stored in the second memory.

The preferred embodiment of this invention has additional circuitry therein so that the information stored in the first memory can be read out to drive the voltage controlled musical device in predetermined sequences or at random.

DESCRIPTION OF THE DRAWINGS For a more complete understanding of the invention, reference should be made to the following detailed description of the invention and drawings in which:

FIG. 1 is a schematic block diagram of an electronic musical device modified in accordance with the teachings of this invention to be adaptable to a musical sequencer of this invention; and

FIG. 2 is a schematic block diagram of a musical sequencer constructed in accordance with the teachings of this invention.

DETAILED DESCRIPTION OF THE INVENTION Referring now to FIG. 1 we see an electronic synthesizer 10 modified to be compatible with a sequencer constructed in accordance with the teachings of this invention. Thesynthesizer 10 shown in FIG. I has only a limited circuitry therein sufficient to explain the functioning of the sequencer of FIG. 2. Of course, it should be understood that synthesizers which are commercially practical are substantially more complicated that the synthesizer 10, having various additional tracks, components and switches for additional interconnection.

The synthesizer 10 includes a keyboard II which provides an analog voltage on a lead 12 each time a key (not shown) on the keyboard 11 is depressed. The value of the analog voltage appearing on the lead 12 is dependent upon which key of the keyboard 11 is depressed. Each time a key on the keyboard 11 is depressed, a pulse is supplied on the lead 13 which is used for timing purposes. Therefore, the signal on the lead 12 is indicative of the tone which the player of the synthesizers desire while the timing of the pulse on the lead 13 indicates the time which the player desires the tone to be played. The signal on the lead 12 is passed by a normally conducting jack 14 to a lead 16 which applies the voltage to a voltage controlled oscillator 17. The voltage controlled oscillator 17 provides a signal on a lead I8 having a frequency dependent upon the signal supplied to the voltage controlled oscillator 17 on the lead 16. The amplitude of the signal, however, on a lead 18 is constant. The signal on the lead 18 is passed through a voltage controlled amplifier 19 which passes the signal on the lead 18 as modified by a signal applied to the voltage controlled amplifier 19 on a lead 21.

The timing pulse provided on the lead 13 is passed by a normally conducting jack 22 and a lead 23 to trigger a one-shot multivibrator 24. The one-shot multivibrator provides a square wave on a lead 26, the edges of which are shaped by a circuit including a variable resistor 27 and a capacitor 28. The lead 21 is connected to the junction of the variable resistor 27 and the capacitor 28 so that the square wave having the shaped edges is applied to the voltage controlled amplifier 19. Therefore, it can be seen that each time a key is depressed on the keyboard 11, a tone is provided by the voltage controlled oscillator 17 in accordance with the particular key depress while the voltage controlled amplifier is supplied a single cycle of a half square wave having shaped edges at that time thereby passing a shaped tone therethrough providing such a signal on a lead 29. The variable resistor 27 is a front panel control on the synthesizer l controlling the attack of the tone alter nately produced. The signal on the lead 29 is passed through a voltage controlled amplifier 31, the gain of which is controlled by the setting of a variable resistor 32. The signal from the variable resistor 32 connected between a source of potential and ground is provided to the voltage controlled amplifier by the leads 33 and 34 and a normally conducting jack 36. The signal provided by the voltage controlled amplifier 31 on a lead 37 actuates a speaker 38 for producing music in response to the keyboard 11.

The jacks 14, 22 and 36 are provided in the synthesizer so that the circuits can be interrupted and external circuitry connected in. Therefore, mating portions for the jacks 14, 22 and 36 are 14a, 22a and 36a which render the jacks 14, 22 and 36 nonconducting by pushing the backs thereof away and connecting the leads attached to the jacks 14, 22 and 36 to independent leads which are then connected to other circuitry. Therefore. when the jack 14a is mated with the jack 14, a lead 39 is connected to the lead 16 while a lead 41 is connected to the lead 12. In a like manner, the jacks 22a and 22 connect a lead 42 to the lead 13 and a lead 43 to the lead 23 and the jacks 36a and 36 connect the lead 33 to a lead 44 and the lead 34 to a lead 46. It should of course be understood that with these connections the leads 12 and 16, 23 and 26 and 33 and 34, respectively, are no longer electrically connected.

Referring now to FIGS. 1 and 2 together we see that when a key on the keyboard 11 is depressed. an analog voltage representing that key is passed by the lead '12, the jacks 14a and 14, the lead 41 to a terminal of a switch 47. With the switch 47 in the position shown. the analog voltage is passed therefrom by a lead 48 to an analog-to-digital converter 49. In a like manner, the timing signal provided on the lead 13 by the keyboard 11 is passed by the combination of the jacks 22a and 22 to the lead 42 and then by leads 5], 52, 53 and 54 to actuate the analog-to-digital converter 49. Thereupon the analog-to-digital converter 49 converts the analog signal provided on the lead 48 to a digital signal which is passed by the closed switch 56 to be stored in a location of a read/write memory 57 determined by a signal applied thereto on a plurality of leads designated 58. The signal on the leads S8 is supplied by an address register 59.

The timing signal supplied by the keyboard 11 to lead 42 is also applied thereby to a delay element 61. The delay element 61 could be a delay line or a digital delay device such as a shift register. The output of the delay element is passed by leads 62 and 63 to the read/write memory 57. The application of the delayed pulse from the delay element 61 to the read/write memory 57 interrogates the read/write memory 57 to provide the information stored therein at locations determined by the address register 59 on a set of output leads 64 in digital form. A digital-to-analog converter 66 converts the signals applied thereto to analog form and applies it to the lead 39. The lead 39 being connected to the lead 16 applies the analog voltage to the voltage controlled oscillator 17 in the synthesizer 10.

An And gate 67 which normally has an enabling signal applied at one input thereof by a signal on a lead 68 passes the pulse from the delay element 6] to the lead 43 and from there to the lead 23 in the synthesizer 10 thus firing the one shot 24. Therefore. it can be seen that the equipment above described enables a signal to be stored in the memory 57 indicating which key of the keyboard 11 had been depressed but at the same time energizes the synthesizer 10 to play the note as though the equipment shown in FIG. 2 were not present. It should be noted that the note played by the synthesizer 10 is not a direct result of the key being depressed in the keyboard 11 but rather is resultant from the information having just been written into the read/write memory 57. Therefore if the wrong information had been stored in the read/write memory 57, the wrong note would have been played by the sequencer 10. This insures that the user of the equipment knows whether or not the appropriate information is being stored in the memory 57.

It should be noted that the voltage applied to the voltage controlled amplifier is similarly being recorded and stored in a second read/write memory 69 which is driven by an analog-to-digital converter 71 and is controlled by the same signals as is the read/write memory 57. In this way the setting of the pot 32 on the synthesizer 10 is recorded in the read/write memory 69 at a corresponding location to the key or tone information stored in the read/write memory 57 so that when the read/write

memories

57 and 69 are read out. the appropriate amplitude as well as frequency of tone is provided by the sequencer 10. It should be noted that the switch 47 or a corresponding switch 72 could be manipulated so that the information being stored in the read/write

memories

57 and 69 are controlled by the

potentiometer

73 and 74 on the sequencer rather than the keyboard 11 or the potentiometer 32 in the synthesizer 10. It should be further noted that if the jacks 36 and 36a were not engaged. the amplitude provided by the synthesizer 20 would be controlled by the potentiometer 32 but that the information therefrom would not be stored in the read/write memory 69. Further, upon playback the information from the read/write memory 57 would control the voltage controlled oscillator 17 but the potentiometer 32 could be used to control the amplitude of the voltage controlled amplifier 31. It is of course obvious that the various jacks can be individually plugged in and controlled so that for exam ple, information can be stored in the read/write memory 57 by the keyboard by plugging the jack 14a into the jack 14 without recording in the read/write memory 69. This would be accomplished by opening up a switch 76. After the information were stored in the read/write memory 57, the switch 56 could be opened and the switch 76 closed, the jack 14a removed from the jack l4 and the jack 36a substituted therefor so that then the keyboard 11 could be used to write in the rear/write memory 69. In this way, information could be independently put into the two

memory channels

57 and 69.

It, of course, now becomes quite clear that tremendous flexibility is provided by the structure thus far described. It should be further noted that other parameters of the synthesizer 10 can be controlled by the sequencer of FIG. 2.

Two important functions remain for the sequencer of FIG. 2 to perform. One is to control the timing of signals provided on the leads 39 and 46 while the second is to control the memory locations addressed by the register 59. The timing information is stored and controlled in a third channel associated with a third read/- write memory 77 while the addressing function performed by the address register 59 is controlled by circuitry designated generally 78.

The address register 59 is normally advanced one location each time a pulse is applied to the lead 42 during the writing operation. The pulse applied to the lead 42 is passed by the lead 51 to a lead 79 which enables three And

gates

81, 82 and 83. The And gate 83 is normally disabled until a switch 84 is closed. An inverting amplifier 86 inverts the signal applied to the And gate 83 so that appropriate signals are applied to the And

gates

81 and 82 to enable them. The And

gates

81 and 82 are driven at their third inputs by a lead from a flipflop 87. The signals applied to the And

gates

81 and 82 are compliments of each other so that only one of these And gates can pass signals at a particular time. The And

gates

81 and 82 drive up and down inputs to the address register 50 so that depending upon which of the And

gates

81 or 82 is enabled by the flip-flop 87, the address register 59 will advance in either an up or a down direction each time a pulse is applied by the lead 79 to the And

gates

81 and 82. Therefore, it can be seen that each time information is applied to the A to D converters 49 and 71 in response to the actuation of the keyboard 11, the address register 59 will advance to a new location. In order to recover the information stored in the read/

write memory

57 and 69 at a later time in a playback mode, the

switches

56 and 76 are open while a switch 88 is thrown to connect the Wiper arm to a lower contact shown in FIG. 2 connecting a clock source 89 to the

leads

51, 52 and 79. The clock source 89 would then provide periodic timing signals to advance the address register 59 and would also provide a signal to the delay element 61 which would read out the read/write

memories

57 and 69 and provide a timing signal via lead 43 to synthesizer 10. Therefore, the timing as well as amplitude and frequency signals would be applied to the synthesizer to control the synthesizer for playing the information stored in the

memories

57 and 69. It should of course be appreciated that this would provide only evenly spaced notes rather than any sort of rhythm.

When all the notes are played from the read/write memory 57 and the next memory location is reached, a predetermined coded piece of information is provided by the read/write memory 57 on a lead 64. It should be noted that this information can either be written into all the memory cells or the end of the music can be specifically written into the read/write memory 57 by providing either a digitally coded signal directly thereto or providing a specific analog voltage to the lead 48. When the predetermined coded signal is supplied on the lead 64 a decode circuit 88 provides a signal to an Or gate 89. The Or gate 89 provides a signail on a lead 91 which either resets the address register 59 or compliments the flip-flop 87 in accordance with the position of a switch 92. If the address register 59 is reset, the same musical sequence is repeated when the next series of clock pulses is provided by the clock source 89. If the switch 92 is located in a position to compliment the flip-flop 87, the one of the And

gates

81 or 82 which is advancing the addressregister 59 is disabled and the other is enabled so that the address register now advances in its reverse direction. Therefore, in this condition the sequence of musical notes is played in reverse. When the decode circuit 88 provides its pulse to the Or gate 89 it also provides a signal on a lead 93 which is inverted by'an inverting amplifier 94 for disabling And gate 67. Therefore, the timing pulse provided by the delay element 61 is not provided for this time interval so that the end of code coding information provided by the read/write memory 57 is not played by the synthesizer 10.

When the address register gets to its zero position, a second decode circuit 96 provides pulse to the Or gate 89 to again either compliment the flip-flop 87 or reset the address 59. Normally the decode circuit 89 decodes the zero position from the address register 59 so that the resetting thereof is a redundant operation. However, when the switch 92 is in the position as shown the pulse from the decode circuit 96 compliments the flipflop 87 so that the musical sequence is again played in its original direction when the flip-flop 87 is complimented. Therefore, it can be seen that the decode circuits 88 and 96 periodically reverse the flip-flop 87 when the switch 92 is in a position as shown so that the musical sequencer stored in the

memories

57 and 69 are played back and forth repeatedly. When the switch 92 is in a position not shown, the decode circuit 88 resets the address register to zero when the end of the sequence of music is reached so that the sequence is played in its predetermined direction repeatedly. In this mode, the decode circuit 96 is redundant.

An additional mode of control for the address register 59 can be provided by throwing the switch 84 to its closed position. When the switch 84 is in its closed position, the inverting amplifier 86 disables both of the And

gates

81 and 82 while the closing of the switch 84 enables the And gate 83 to pass the timing pulse provided on the lead 79. Therefore, each time the timing pulse appears on the lead 79, the And gate 83 enables an And gate 97 to transfer information in a counter 98 directly to the address register 59. It should of course be appreciated that the And gate 97 is representative of a plurality of And gates as are other leads and gates which pass signals and multibit binary forms. The counter 98 is driven by a clock source 99. The clock source 99, for example, provides pulses at a rate of 1 million per second where the normal timing of the pulses on the lead 79 is in the range of about ten per second. Therefore, it can be seen that the particular number at which the counter 98 will be when a pulse appears on the lead 79 is arbitrary so that the numbers passed by the And gate 97 from the counter 98 to the address register 59 will be random. In this mode therefore the information stored in the

memories

57 and 69 will be randomly applied to the sequencer 10. It should be appreciated that in this mode the music played by the sequencer 10 will have the same density of notes and amplitudes stored in the read/write

memories

57 and 69 but the sequence of playing these notes will be random. This is different, of course, than the random selection of all notes.

As mentioned above, the read/write memory 57 can be employed to control the timing of-the signals supplied by the read/write

memories

57 and 69. In this regard during the recording mode when the keyboard 11 is employed to insert information signals into the read/- write

memories

57 and 69, the switch 88 is left in the position as shown while a switch 101 is left as shown also in FIG. 2. With the switches in this position when a timing signal is supplied by the keyboard 11 ultimately onto

lead

42, 51 and 52 the currents of the timing signal reset the counter 102 and transfers whatever signal is present in the counter 102 at that time through an And gate 103, lead 104 and And gate 105 to the Or gate 106 which applies it to the read/write memory 57 at the location determined by the address register 59. The clock source 79 then advances the counter 102 at a predetermined rate so that upon the next occurrence of a pulse provided by the keyboard 11, the number contained in the counter 102 is dependent upon the interval between which keys were depressed on the keyboard 11. At this time. the number contained in the counter 102 is again transferred into the position of the read/write memory 77 determined by the address register 59. Therefore. the interval between the depressions of keys on the keyboard 11 is stored in the read/write memory 77 at a position related to the position in the read/write

memories

57 and 69 that the particular information connected with depression of such keys is located.

To employ the information contained in the read/- write memory 77 on playback, the switch 88 is put to its upper position so that the timing for the system is supplied on a lead 107. The lead 101 is put to its upper position enabling an And gate 108 while a switch 109 is opened so that new information is not transferred to the read/write memory 77. In this mode the clock source 89 advances the counter 102 until a predetermined number determined by the decode circuit 111 is reached. When this number is reached, the decode circuit 11] supplies a pulse on the lead 107 which is now the basic system timing which advances the address register 59 and is delayed by delay element 61 to provide a read pulse on lead 62 and 63 and an output pulse on the lead 43.

When the read pulse is applied to the read/write memory 77 the number stored therein is passed by And gate 108 to the counter 102 so that the counter 102 is not preset to the value determined by the information in the read/write memory 77. The clock source 89 again counts the counter 102 until the predetermined number determined by the decode circuit 111 is reached. Therefore it can be seen that since the interval between pulses from the clock source 89 is constant, the timing between pulses provided by the decode circuit 111 will be determined by the information stored in the read/write memory 77. In this way it is clear that the read/write memory 77 in this mode of operation determines the rhythm or timing of the music played by the synthesizer 10.

Of course, the potentiometer 112 can be used in other modes of operation in connection with switch 113, analog-to-digital converter 114 to provide other information through the And gate 116, Or gate 106, switch 109 to the read/write memory 77. The digital-toanalog converter 117 can also be employed to provide analog signals for operation of other functions in the synthesizer 10.

From the above, it should be clear that the sequencer shown in FIG. 2 can be employed in numerous modes by the manipulation of switches provided therein to provide a device which can be of wide application when used in connection with a synthesizer.

It is of course understood that numerous changes can be made in the details of the sequencer of FIG. 2 without departing from the spirit or scope of this invention. For example. the functions performed by all of the analog-to-digital converters and digital-to-analog converters can be performed by one analog-to-digital converter which is appropriately time shared by well known techniques.

It should of course be understood that while this invention has been described with respect to particular embodiments thereof, numerous others will become obvious to those of ordinary skill in the art in light thereof.

What is claimed is:

1. In combination: a musical sequencer including:

a first memory having an input and an output; said first memory being rendered effective by an address signal and responsive to a store signal for storing information signals applied to said input in an address location therein dependent upon said address signal; said first memory being further responsive to a read signal for providing said information signals stored in said address location therein dependent upon said address signal at said output;

first means for providing said address signal to said first memory;

second means for applying said store signal to said first memory; and 1 third means responsive to said store signal for providing said read signal to said first memory a predetermined time interval thereafter, and

a voltage controlled musical device responsive to said information signals at said output of said first memory for providing tones in accordance therewith; said voltage device having a means for providing said information signals to said input of said first memory.

2. The combination as defined in claim 1 in which said first means is responsive to said store signal for changing said address signal applied to said memory.

3. The combination as defined in claim 2 also including fourth means for rendering said second means inoperative.

4. The combination as defined in claim 3 also including:

fifth means responsive to predetermined information being provided at said output for resetting said first means to provide a predetermined address signal.

5. The combination as defined in claim 3 in which said first means is normally responsive to said store signal for changing said address signal in a first sense, said musical sequencer also including:

fifth means responsive to predetermined information being provided at said output for enabling said first means to change said address signal in a second sense in response to said store signal.

6. The combination as defined in claim 3 in which said store signal changes said address signal randomly.

7. The combination as defined in claim 2 also including:

a second memory having an input and an output; said second memory being rendered effective by said address signal and responsive to said store signal for storing information signals applied to said input thereof in an address location therein dependent upon said address signal; said second memory being further responsive to a read signal for providing said information signals stored in said address location therein dependent upon said address signal at said output thereof;

fourth means for applying said address signal to said second memory;

fifth means for applying said store signal to said second memory;

sixth means responsive to said store signal for providing said read signal to said second memory a predetermined time interval thereafter;

seventh means for providing a clock signal; and

a counter for counting said clock signal to provide said information signal to said input thereof.

8. The combination as defined in claim 7 also including eighth means for rendering said second means inoperative.

9. The combination as defined in claim 8 also includ- 10 ing:

ninth means responsive to predetermined information being provided at said output for resetting said first means to provide a predetemiined address signal.

10. The combination as defined in claim 8 in which said first means is normally responsive to said store signal for changing said address signal in a first sense, said musical sequencer also including:

ninth means responsive to predetermined information being provided at said output for enabling said first means to change said address signal in a second sense in response to said store signal.

11. The combination as defined in claim 8 in which said store signal changes said address signal randomly. 1: =0: 4: 4:

Patent No. Dated June 28 1974 William H. Wetzel Inventor(s) It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:

The Assignee should read Ionic Industries Incorporated, Morristown, N. J.

Signed and sealed this 12th day of November 1974.

(SEAL) Attest:

MCCOY M. GIBSON JR. C. MARSHALL DANN Attesting Officer Commissioner of Patents RM P0-1OSD (D-691 USCOMM-OC wane-P59

Claims

1. In combination: a musical sequencer including: a first memory having an input and an output; said first memory being rendered effective by an address signal and responsive to a store signal for storing information signals applied to said input in an address location therein dependent upon said address signal; said first memory being further responsive to a read signal for providing said information signals stored in said address location therein dependent upon said address signal at said output; first means for providing said address signal to said first memory; second means for applying said store signal to said first memory; and third means responsive to said store signal for providing said read signal to said first memory a predetermined time interval thereafter, and a voltage controlled musical device responsive to said information signals at said output of said first memory for providing tones in accordance therewith; said voltage device having a means for providing said information signals to said input of said first memory.

4. The combination as defined in claim 3 also including: fifth means responsive to predetermined information being provided at said output for resetting said first means to provide a predetermined address signal.

5. The combination as defined in claim 3 in which said first means is normally responsive to said store signal for changing said address signal in a first sense, said musical sequencer also including: fifth means responsive to predetermined information being provided at said output for enabling said first means to change said address signal in a second sense in response to said store signal.

7. The combination as defined in claim 2 also including: a second memory having an input and an output; said second memory being rendered effective by said address signal and responsive to said store signal for storing information signals applied to said input thereof in an address location therein dependent upon said address signal; said second memory being further responsive to a read signal for providing said information signals stored in said address location therein dependent upon said address signal at said output thereof; fourth Means for applying said address signal to said second memory; fifth means for applying said store signal to said second memory; sixth means responsive to said store signal for providing said read signal to said second memory a predetermined time interval thereafter; seventh means for providing a clock signal; and a counter for counting said clock signal to provide said information signal to said input thereof.

9. The combination as defined in claim 8 also including: ninth means responsive to predetermined information being provided at said output for resetting said first means to provide a predetermined address signal.

10. The combination as defined in claim 8 in which said first means is normally responsive to said store signal for changing said address signal in a first sense, said musical sequencer also including: ninth means responsive to predetermined information being provided at said output for enabling said first means to change said address signal in a second sense in response to said store signal.

11. The combination as defined in claim 8 in which said store signal changes said address signal randomly.