Nothing Special   »   [go: up one dir, main page]

US20220051904A1 - Etching method - Google Patents

Etching method Download PDF

Info

Publication number
US20220051904A1
US20220051904A1 US17/516,586 US202117516586A US2022051904A1 US 20220051904 A1 US20220051904 A1 US 20220051904A1 US 202117516586 A US202117516586 A US 202117516586A US 2022051904 A1 US2022051904 A1 US 2022051904A1
Authority
US
United States
Prior art keywords
region
gas
plasma
processing apparatus
fluorocarbon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
US17/516,586
Inventor
Hikaru Watanabe
Akihiro Tsuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to US17/516,586 priority Critical patent/US20220051904A1/en
Publication of US20220051904A1 publication Critical patent/US20220051904A1/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76808Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76813Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving a partial via etch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step

Definitions

  • the present disclosure relates to an etching method, and particularly to a method of selectively etching a first region formed of silicon oxide, with respect to a second region formed of silicon nitride by a plasma processing on an object to be processed (“workpiece”).
  • a processing of forming an opening such as a hole or a trench may be performed on a region formed of silicon oxide (SiO 2 ).
  • SiO 2 silicon oxide
  • a workpiece is exposed to plasma of a fluorocarbon gas so that the region is etched.
  • a technology of selectively etching a first region formed of silicon oxide with respect to a second region formed of silicon nitride has been known.
  • a self-aligned contact (SAC) technology has been known.
  • the SAC technology is described in Japanese Patent Laid-Open Publication No. 2000-307001.
  • a workpiece to be processed in the SAC technology includes a first region made of silicon oxide, a second region made of silicon nitride, and a mask.
  • the second region is formed to define a recess
  • the first region is formed to fill the recess and cover the second region
  • the mask is formed on the first region and provides an opening above the recess.
  • plasma of a processing gas containing a fluorocarbon gas, an oxygen gas, and a rare gas is used in order to etch the first region.
  • the first region is etched and an upper opening is formed in the portion exposed from the opening of the mask.
  • the portion surrounded by the second region, that is, the first region within the recess is etched in a self-aligned manner. Accordingly, a lower opening continuous to the upper opening is formed in a self-aligned manner.
  • the present disclosure provides an etching method including: (a) providing a workpiece including a first region made of a first material and a second region made of a second material defining a recess, the first region filling the recess of the second region while covering the second region; (b) generating plasma of a first fluorocarbon gas to etch the first region until before exposing the second region; (c) generating plasma of a second fluorocarbon gas to form fluorocarbon deposits on the first region; (d) generating plasma of an inert gas to etch the first region by fluorocarbon radicals contained in the fluorocarbon deposits; and (e) repeating step (c) and step (d) one or more times until after exposing the second region.
  • An etching rate of the first material of the first region is higher than that of the second material of the second region with respect to the second fluorocarbon gas.
  • FIG. 1 is a flow chart illustrating an etching method according to an exemplary embodiment.
  • FIG. 2 is a sectional view exemplifying a workpiece to which the etching method according to the exemplary embodiment is applied.
  • FIG. 3 is a view schematically illustrating an example of a plasma processing apparatus that may be used to carry out the method illustrated in FIG. 1 .
  • FIG. 4 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 5 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 6 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 7 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 8 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 9 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 10 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 11 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 12 is a flow chart illustrating an etching method according to another exemplary embodiment.
  • FIG. 13 is a sectional view illustrating the workpiece after a step ST 14 of the method illustrated in FIG. 12 is performed.
  • a state where a film for protecting the second region is not formed on the top surface of the second region may occur at a time of gradually etching the first region and exposing the second region.
  • the second region is scraped.
  • a method of selectively etching a first region formed of silicon oxide with respect to a second region formed of silicon nitride using a plasma processing on a workpiece includes the second region configured to define a recess, the first region formed to fill the recess and to cover the second region, and a mask formed on the first region, the mask providing an opening having a width wider than a width of the recess, above the recess.
  • the method includes a sequence that is performed one or more times to etch the first region in a period including a time of exposing the second region, and a process of etching the first region by plasma of a second processing gas containing a fluorocarbon gas generated within a processing container after the sequence is performed one or more times.
  • the sequence includes (a) a process of generating plasma of a first processing gas containing a fluorocarbon gas within the processing container that accommodates the workpiece in order to form deposits containing fluorocarbon on the workpiece, and (b) a process of etching the first region by radicals of the fluorocarbon included in the deposits.
  • the first region in the process of generating the plasma of the second processing gas, the first region may be continuously etched to a bottom of the recess.
  • deposits of fluorocarbon are formed on the workpiece when the second region is exposed, and then the first region is etched by the radicals in the deposits.
  • the sequence SQ although the etching rate is low, the first region is etched, and the second region is suppressed from being scraped when the second region is exposed.
  • the first region in a state where the second region is protected by the deposits formed by carrying out the sequence, the first region is further etched by the plasma of the fluorocarbon gas.
  • the etching rate of the first region etched by the plasma of fluorocarbon after the sequence is performed is higher than the etching rate of the first region in the sequence. Accordingly, according to the method, it is possible to achieve both a scraping suppression of the second region, and a decrease of a processing time required for etching the first region.
  • each time of the sequence may further include a process of generating plasma of a third processing gas containing an oxygen-containing gas and an inert gas within the processing container that accommodates the workpiece.
  • the amount of the deposits formed on the workpiece may be properly reduced by the active species of oxygen. Accordingly, it is possible to suppress an opening of the mask, and an opening formed by etching from being clogged.
  • the oxygen-containing gas in the processing gas, is diluted with the inert gas, and thus it is possible to suppress the deposits from being excessively removed.
  • a process of generating the plasma of the third processing gas is performed between the process of generating the plasma of the first processing gas, and the process of etching the first region by the radicals of the fluorocarbon.
  • Each time of the sequence may further include a process of generating the plasma of the third processing gas within the processing container that accommodates the workpiece after the process of etching the first region by the radicals of the fluorocarbon is performed.
  • the deposits may clog the openings.
  • the workpiece is exposed to active species of oxygen.
  • the deposits which narrow the widths of the openings may be reduced so that the openings may be more reliably prevented from being clogged.
  • FIG. 1 is a flow chart illustrating an etching method according to an exemplary embodiment.
  • the method MT illustrated in FIG. 1 is a method of selectively etching a first region formed of silicon oxide with respect to a second region formed of silicon nitride by a plasma processing on a workpiece.
  • FIG. 2 is a sectional view exemplifying a workpiece to which the etching method according to the exemplary embodiment is applied.
  • a workpiece that is, a wafer W
  • a wafer W includes a substrate SB, a first region R 1 , a second region R 2 , and an organic layer OL constituting a mark later.
  • the wafer W is obtained in the course of manufacturing a fin field effect transistor and includes a raised area RA, a silicon-containing anti-reflection layer AL, and a resist mask RM.
  • the raised area RA is formed to be raised from the substrate SB.
  • the raised area RA may constitute, for example, a gate region.
  • the second region R 2 is formed of silicon nitride (Si 3 N 4 ), and is formed on the top surface of the raised area RA and the top surface of the substrate SB.
  • the second region R 2 as illustrated in FIG. 2 , extends to define a recess.
  • the depth of the recess is about 150 nm, and the width of the recess is about 20 nm.
  • the first region R 1 is formed of silicon oxide (SiO 2 ) and is formed on the second region R 2 . Specifically, the first region R 1 is formed to fill the recess defined by the second region R 2 and to cover the second region R 2 .
  • the organic layer OL is formed on the first region RE
  • the organic layer OL may be formed of an organic material, for example, an amorphous carbon.
  • the anti-reflection layer AL is formed on the organic layer OL.
  • the resist mask RM is formed on the anti-reflection layer AL.
  • the resist mask RM provides an opening having a width wider than a width of the recess, above the recess defined by the second region R 2 .
  • the width of the opening of the resist mask RM is, for example, 60 nm.
  • the pattern of the resist mask RM is formed by a photolithography technology.
  • FIG. 3 is a view schematically illustrating an example of a plasma processing apparatus that may be used to carry out the method illustrated in FIG. 1 .
  • a plasma processing apparatus 10 illustrated in FIG. 3 is a capacitively-coupled plasma etching apparatus, and includes a substantially cylindrical processing container 12 .
  • An inner wall surface of the processing container 12 is made of, for example, anodized aluminum.
  • the processing container 12 is frame-grounded.
  • a substantially cylindrical support unit 14 is provided on a bottom portion of the processing container 12 .
  • the support unit 14 is made of, for example, an insulating material.
  • the support unit 14 vertically extends from the bottom portion of the processing container 12 within the processing container 12 .
  • a placing table PD is provided within the processing container 12 .
  • the placing table PD is supported by the support unit 14 .
  • the placing table PD holds the wafer W on the top surface thereof.
  • the placing table PD includes a lower electrode LE and an electrostatic chuck ESC.
  • the lower electrode LE includes a first plate 18 a and a second plate 18 b .
  • Each of the first plate 18 a and the second plate 18 b is made of a metal such as, for example, aluminum, and has substantially a disk shape.
  • the second plate 18 b is provided on the first plate 18 a , and is electrically connected to the first plate 18 a.
  • the electrostatic chuck ESC has a structure where an electrode serving as a conductive film is disposed between a pair of insulating layers or insulating sheets.
  • a DC power supply 22 is electrically connected to the electrode of the electrostatic chuck ESC via a switch 23 .
  • the electrostatic chuck ESC attracts the wafer W by an electrostatic force such as a coulomb force generated by a DC voltage from the DC power supply 22 . Accordingly, the electrostatic chuck ESC may hold the wafer W thereon.
  • a focus ring FR is disposed to surround the edge of the wafer W and the electrostatic chuck ESC.
  • the focus ring FR is provided to improve the uniformity of the etching.
  • the focus ring FR is formed of a material appropriately selected depending on a material of a film to be etched, and may be made of, for example, quartz.
  • a coolant flow path 24 is formed within the second plate 18 b .
  • the coolant flow path 24 constitutes a temperature control mechanism.
  • a coolant is supplied to the coolant flow path 24 from a chiller unit provided outside the processing container 12 through a pipe 26 a .
  • the coolant supplied to the coolant flow path 24 is returned to the chiller unit through a pipe 26 b . In this manner, between the coolant flow path 24 and the chiller unit, the coolant is circulated.
  • the temperature of the wafer W supported by the electrostatic chuck ESC is controlled.
  • a gas supply line 28 is formed in the plasma processing apparatus 10 .
  • the gas supply line 28 supplies a heat transfer gas such as, for example, a He gas, from a heat transfer gas supply mechanism to a gap between the top surface of the electrostatic chuck ESC and the rear surface of the wafer W.
  • a heat transfer gas such as, for example, a He gas
  • the plasma processing apparatus 10 includes an upper electrode 30 .
  • the upper electrode 30 is disposed to face the placing table PD above the placing table PD.
  • the lower electrode LE and the upper electrode 30 are provided substantially parallel to each other. Between the upper electrode 30 and the lower electrode LE, a processing space S is provided to perform a plasma processing on the wafer W.
  • the upper electrode 30 is supported at the top portion of the processing container 12 through an insulating shielding member 32 .
  • the upper electrode 30 may be configured such that a distance from the top surface of the placing table PD, that is, the wafer placing surface, in a vertical direction is variable.
  • the upper electrode 30 may include an electrode plate 34 and an electrode support 36 .
  • the electrode plate 34 faces the processing space S, and a plurality of gas ejecting holes 34 a are formed in the electrode plate 34 .
  • the electrode plate 34 is made of silicon in the exemplary embodiment.
  • the electrode support 36 is configured to detachably support the electrode plate 34 and may be made of, for example, a conductive material such as aluminum.
  • the electrode support 36 may have a water-cooling structure.
  • a gas diffusion chamber 36 a is formed within the electrode support 36 .
  • a plurality of gas flow holes 36 b extend downwards from the gas diffusion chamber 36 a to communicate with the gas ejecting holes 34 a .
  • a gas inlet port 36 c is formed in the electrode support 36 to guide a processing gas into the gas diffusion chamber 36 a .
  • a gas supply pipe 38 is connected to the gas inlet port 36 c.
  • a gas source group 40 is connected to the gas supply pipe 38 through a valve group 42 and a flow rate controller group 44 .
  • the gas source group 40 includes a plurality of gas sources.
  • the gas source group 40 includes one or more sources of a fluorocarbon gas, a source of a rare gas, a source of a nitrogen gas (N 2 gas), a source of a hydrogen gas (H 2 gas), and a source of an oxygen-containing gas.
  • One or more sources of the fluorocarbon gas in an example, may include a source of C 4 F 8 gas, a source of CF 4 gas, and a source of C 4 F 6 gas.
  • the source of the rare gas may be a source of any rare gas such as He gas, Ne gas, Ar gas, Kr gas, or Xe gas, and may be, in an example, a source of Ar gas.
  • the source of the oxygen-containing gas may be, in an example, a source of oxygen gas (O 2 gas).
  • the oxygen-containing gas may be any gas containing oxygen, and may be, for example, a carbon oxide gas such as CO gas or CO 2 gas.
  • the valve group 42 includes a plurality of valves
  • the flow rate controller group 44 includes a plurality of flow rate controllers such as, for example, a mass flow controller.
  • the plurality of gas sources of the gas source group 40 are connected to the gas supply pipe 38 through respective corresponding valves of the valve group 42 , and respective corresponding flow controllers of the flow rate controller group 44 .
  • a deposition shield 46 is detachably provided along the inner wall of the processing container 12 .
  • the deposition shield 46 is also provided on the outer periphery of the support unit 14 .
  • the deposition shield 46 is configured to suppress etching by-products (deposits) from being attached to the processing container 12 , and may be formed by coating a ceramic such as, for example, Y 2 O 3 on an aluminum material.
  • An exhaust plate 48 is provided on the bottom side of the processing container 12 between the support unit 14 and the side wall of the processing container 12 .
  • the exhaust plate 48 may be formed by coating a ceramic such as, for example, Y 2 O 3 on an aluminum material.
  • An exhaust port 12 e is formed below the exhaust plate 48 in the processing container 12 .
  • An exhaust device 50 is connected to the exhaust port 12 e through an exhaust pipe 52 .
  • the exhaust device 50 includes a vacuum pump such as, for example, a turbo molecular pump and may decompress the space within the processing container 12 to a desired degree of vacuum.
  • a carry-in/out port 12 g of the wafer W is formed in the side wall of the processing container 12 .
  • the carry-in/out port 12 g is configured to be capable of being opened/closed by a gate valve 54 .
  • the plasma processing apparatus 10 further includes a first high frequency power supply 62 and a second high frequency power supply 64 .
  • the first high frequency power supply 62 is a power supply which generates a high frequency power for generating plasma and generates a high frequency power of a frequency ranging from, for example, 27 MHz to 100 MHz.
  • the first high frequency power supply 62 is connected to the lower electrode LE through a matching unit 66 .
  • the matching unit 66 is a circuit configured to match an output impedance of the first high frequency power supply 62 to an input impedance of a load side (a lower electrode LE side).
  • the first high frequency power supply 62 may be connected to the upper electrode 30 through the matching unit 66 .
  • the second high frequency power supply 64 is a power supply which generates a high frequency bias power for drawing ions into the wafer W, and generates a high frequency bias power of a frequency ranging from, for example, 400 kHz to 13.56 MHz.
  • the second high frequency power supply 64 is connected to the lower electrode LE through a matching unit 68 .
  • the matching unit 68 is a circuit configured to match an output impedance of the second high frequency power supply 64 to an input impedance of a load side (a lower electrode LE side).
  • the plasma processing apparatus 10 further includes a power supply 70 .
  • the power supply 70 is connected to the upper electrode 30 .
  • the power supply 70 applies a voltage for drawing positive ions present within the processing space S to the electrode plate 34 , to the upper electrode 30 .
  • the power supply 70 is a DC power supply for generating a negative DC voltage.
  • the power supply 70 may be an AC power supply for generating an AC voltage of a relatively low frequency.
  • the voltage applied to the upper electrode from the power supply 70 may be a voltage of ⁇ 150 V or less. That is, the voltage applied to the upper electrode 30 by the power supply 70 may be a negative voltage having an absolute value of 150 V or more.
  • the plasma processing apparatus 10 may further include a controller Cnt.
  • the controller Cnt is a computer provided with, for example, a processor, a storage unit, an input device, and a display device, and controls respective units of the plasma processing apparatus 10 .
  • the controller Cnt allows an operator to perform, for example, the input operation of a command through the input device in order to manage the plasma processing apparatus 10 , and allows the display device to visually display the driving situation of the plasma processing apparatus 10 .
  • the storage unit of the controller Cnt stores a control program which controls the processor to execute various processings in the plasma processing apparatus 10 , or a program which causes respective units of the plasma processing apparatus 10 to execute the processings according to processing conditions, i.e., a processing recipe.
  • FIGS. 4 to 11 are sectional views illustrating the workpiece after each step of the method MT is performed. Meanwhile, the following descriptions will be made on an example of a processing of the wafer W illustrated in FIG. 2 , using one plasma processing apparatus 10 illustrated in FIG. 3 in the method MT.
  • the wafer W illustrated in FIG. 2 is carried into the plasma processing apparatus 10 , placed on the placing table PD, and held by the placing table PD.
  • step ST 1 is performed.
  • step ST 1 the anti-reflection layer AL is etched.
  • a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40 .
  • the processing gas contains a fluorocarbon gas.
  • the fluorocarbon gas may contain, for example, at least one kind of C 4 F 8 gas and CF 4 gas.
  • the processing gas may further contain a rare gas, for example, Ar gas.
  • the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure.
  • the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE, and the high frequency bias power is supplied from the second high frequency power supply 64 to the lower electrode LE.
  • step ST 1 various conditions in step ST 1 will be exemplified.
  • step ST 1 the plasma of the processing gas is generated, and the anti-reflection layer AL is etched at the portion exposed from the opening of the resist mask RM by the active species of the fluorocarbon.
  • the portion exposed from the opening of the resist mask RM is removed. That is, a pattern of the resist mask RM is transferred to the anti-reflection layer AL so that a pattern for providing an opening in the anti-reflection layer AL is formed.
  • the above described operations of the respective units of the plasma processing apparatus 10 in step ST 1 , may be controlled by the controller Cnt.
  • step ST 2 the organic layer OL is etched.
  • a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40 .
  • the processing gas may further contain a hydrogen gas and a nitrogen gas.
  • the processing gas used in step ST 2 may be any processing gas containing another gas such as, for example, an oxygen gas as long as it can etch the organic layer.
  • the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure.
  • the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE, and the high frequency bias power is supplied from the second high frequency power supply 64 to the lower electrode LE.
  • step ST 2 various conditions in step ST 2 will be exemplified.
  • step ST 2 the plasma of the processing gas is generated, and the organic layer OL is etched at the portion exposed from the opening of the anti-reflection layer AL. Also, the resist mask RM is etched. As a result, as illustrated in FIG. 5 , the resist mask RM is removed, and among the whole area of the organic layer OL, the portion exposed from the opening of the anti-reflection layer AL is removed. That is, a pattern of the anti-reflection layer AL is transferred to the organic layer OL so that a pattern for providing an opening MO in the organic layer OL is formed, and a mask MK is generated from the organic layer OL. Meanwhile, the above described operations of the respective units of the plasma processing apparatus 10 , in step ST 2 , may be controlled by the controller Cnt.
  • step ST 3 is performed.
  • the first region R 1 is etched until just before the second region R 2 is exposed. That is, the first region R 1 is etched until the first region R 1 is slightly left on the second region R 2 .
  • a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40 .
  • the processing gas contains a fluorocarbon gas.
  • the processing gas may further contain a rare gas, for example, Ar gas.
  • the processing gas may further contain an oxygen gas.
  • the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure.
  • the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE, and the high frequency bias power is supplied from the second high frequency power supply 64 to the lower electrode LE.
  • step ST 3 the plasma of the processing gas is generated, and the first region R 1 is etched at the portion exposed from the opening of the mask MK by the active species of the fluorocarbon.
  • the processing time in step ST 3 is set such that at the end of step ST 3 , the first region R 1 is left to a predetermined film thickness on the second region R 2 .
  • an upper opening UO is partially formed.
  • the above described operations of the respective units of the plasma processing apparatus 10 in step ST 3 , may be controlled by the controller Cnt.
  • step ST 11 a condition for a mode in which formation of deposits containing fluorocarbon on the top surface of the wafer W including the first region R 1 is dominant instead of etching of the first region R 1 , that is, a condition for a deposition mode is selected.
  • step ST 3 a condition for a mode in which etching of the first region R 1 is dominant instead of formation of deposits, that is a condition for an etching mode is selected.
  • the fluorocarbon gas used in step ST 3 may contain at least one kind of C 4 F 8 gas and CF 4 gas.
  • the fluorocarbon gas in this example is a fluorocarbon gas having a higher ratio of the number of fluorine atoms to the number of carbon atoms (that is, number of fluorine atoms/number of carbon atoms), than a ratio of the number of fluorine atoms to the number of carbon atoms (that is, number of fluorine atoms/number of carbon atoms) of the fluorocarbon gas used in step ST 11 .
  • the high frequency power for generating plasma used in step ST 3 may be set to be higher than the high frequency power for generating plasma used in step ST 11 . According to these examples, it is possible to realize the etching mode.
  • the high frequency bias power used in step ST 3 may also be set to be higher than the high frequency bias power used in step ST 11 .
  • the energy of ions to be drawn to the wafer W may be increased so that the first region R 1 may be etched at a high speed.
  • step ST 3 various conditions in step ST 3 will be exemplified.
  • step ST 4 is performed.
  • the plasma of a processing gas containing an oxygen-containing gas is generated within the processing container 12 .
  • a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40 .
  • the processing gas in an example, may contain an oxygen gas as an oxygen-containing gas.
  • the processing gas may further contain an inert gas such as a rare gas (e.g., Ar gas) or a nitrogen gas.
  • the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure.
  • the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE.
  • the high frequency bias power may not be supplied from the second high frequency power supply 64 to the lower electrode LE.
  • step ST 4 the active species of oxygen is generated and the opening MO of the mask MK is widened at its upper end portion by the active species of the oxygen. Specifically, as illustrated in FIG. 7 , the upper shoulder portion of the mask MK which defines the upper end portion of the opening MO is etched to exhibit a tapered shape. Accordingly, even when deposits produced in the subsequent steps are attached to the surface of the mask MK defining the opening MO, the reduction amount of the width of the opening MO may be reduced. Meanwhile, the above described operations of the respective units of the plasma processing apparatus 10 , in step ST 4 , may be controlled by the controller Cnt.
  • step ST 12 to be described below is to reduce a trace quantity of deposits formed during a sequence SQ, and it is required to suppress an excessive decrease of the deposits.
  • step ST 4 is performed to widen the width of the upper end portion of the opening MO of the mask MK, and its processing time is required to be short.
  • step ST 4 various conditions in step ST 4 will be exemplified.
  • step ST 11 the plasma of the processing gas (a first processing gas) is generated within the processing container 12 accommodating the wafer W.
  • a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40 .
  • the processing gas contains a fluorocarbon gas.
  • the processing gas may further contain a rare gas, for example, Ar gas.
  • the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure.
  • the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE.
  • step ST 11 the plasma of a processing gas containing a fluorocarbon gas is generated, and the dissociated fluorocarbon is deposited on the top surface of the wafer W to form deposits DP (see, e.g., FIG. 8 ).
  • the above described operations of the respective units of the plasma processing apparatus 10 , in step ST 11 may be controlled by the controller Cnt.
  • step ST 11 a condition for a deposition mode is selected.
  • C 4 F 6 gas is used as the fluorocarbon gas.
  • step ST 11 various conditions in step ST 11 will be exemplified.
  • step ST 12 the plasma of a processing gas (a third processing gas) containing an oxygen-containing gas and an inert gas is generated within the processing container 12 .
  • a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40 .
  • the processing gas contains an oxygen gas as the oxygen-containing gas.
  • the processing gas contains a rare gas such as Ar gas, as an inert gas.
  • the inert gas may be a nitrogen gas.
  • the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure.
  • the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE.
  • the high frequency bias power may not be supplied from the second high frequency power supply 64 to the lower electrode LE.
  • step ST 12 the active species of oxygen is generated, and the amount of the deposits DP on the wafer W is properly reduced by the active species of oxygen (see, e.g., FIG. 9 ). As a result, the opening MO and the upper opening UO are suppressed from being clogged by excessive deposits DP.
  • the oxygen gas is diluted with the inert gas, and thus it is possible to suppress the deposits DP from being excessively removed.
  • the above described operations of the respective units of the plasma processing apparatus 10 , in step ST 12 may be controlled by the controller Cnt.
  • step ST 12 various conditions in step ST 12 will be exemplified.
  • step ST 12 of the sequence SQ of each time is performed for 2 sec or more, and the deposits DP may be etched at a rate of 1 nm/sec or less in step ST 12 .
  • a time is required to switch gases for transition between respective steps ST 11 , ST 12 , and ST 13 . Accordingly, in consideration of a time required for stabilizing a discharge, step ST 12 needs to be performed at least 2 sec.
  • deposits for protecting the second region R 2 may be excessively removed.
  • step ST 12 the deposits DP are etched at a rate of 1 nm/sec or less. Accordingly, it is possible to properly adjust the amount of the deposits DP formed on the wafer W. Meanwhile, the rate of 1 nm/sec or less in the etching of the deposits DP in step ST 12 may be achieved by selecting a pressure within a processing container, the oxygen dilution degree with a rare gas in the processing gas, that is, an oxygen concentration, and a high frequency power for generating plasma from the above described conditions.
  • step ST 13 is performed.
  • the first region R 1 is etched.
  • a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40 .
  • the processing gas contains an inert gas.
  • the inert gas in an example, may be a rare gas such as, for example, Ar gas. Otherwise, the inert gas may be a nitrogen gas.
  • the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure.
  • the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE.
  • the high frequency bias power is supplied from the second high frequency power supply 64 to the lower electrode LE.
  • step ST 13 various conditions in step ST 13 will be exemplified.
  • step ST 13 the plasma of the inert gas is generated, and ions are drawn into the wafer W.
  • the first region R 1 is etched by radicals of fluorocarbon included in the deposits DP (see, e.g., FIG. 10 ).
  • the above described operations of the respective units of the plasma processing apparatus 10 in step ST 13 , may be controlled by the controller Cnt.
  • the sequence SQ is carried out in a period including the time of exposing the second region R 2 .
  • step ST 11 of the sequence SQ as illustrated in FIG. 8 , the deposits DP are formed on the wafer W.
  • FIG. 8 illustrates a state where the first region R 1 is gradually etched, the second region R 2 is exposed, and deposits DP are formed on the second region R 2 .
  • the deposits DP protect the second region R 2 .
  • step ST 12 of the sequence SQ as illustrated in FIG. 9 , the amount of the deposits DP formed in step ST 11 is decreased.
  • step ST 13 of the sequence SQ the first region R 1 is etched by radicals of fluorocarbon included in the deposits DP.
  • the second region R 2 is exposed, and then the second region R 2 is protected by the deposits DP and the first region R 1 within the recess provided by the second region R 2 is slightly etched. Accordingly, as illustrated in FIG. 10 , a lower opening LO is gradually formed.
  • step STJ After step ST 13 is performed, it is determined whether a stop condition is satisfied in step STJ.
  • the stop condition is determined to be satisfied when the sequence SQ has been carried out a predetermined number of times.
  • step STJ when it is determined that the stop condition is not satisfied, the sequence SQ is carried out from step ST 11 .
  • step STJ when it is determined that a stop condition is satisfied, subsequently, step ST 5 is performed.
  • step ST 5 the first region R 1 is further etched.
  • a processing gas (a second processing gas) is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40 .
  • the processing gas contains a fluorocarbon gas.
  • the processing gas may further contain a rare gas, for example, Ar gas.
  • the processing gas may further contain an oxygen gas.
  • the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure.
  • the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE, and the high frequency bias power is supplied from the second high frequency power supply 64 to the lower electrode LE. Meanwhile, in step ST 5 , a voltage having a negative voltage value may be applied to the upper electrode 30 from the power supply 70 .
  • step ST 5 the plasma of the processing gas is generated, and the first region R 1 within the recess is etched by the active species of fluorocarbon.
  • step ST 5 in the exemplary embodiment, as illustrated in FIG. 11 , the first region R 1 is etched until the bottom of the recess is exposed. That is, in step ST 5 , the plasma of the processing gas is continuously generated so that etching of the first region R 1 is continued to the bottom of the recess.
  • step ST 5 a condition for a mode in which etching of the first region R 1 by the active species of fluorocarbon is dominant, instead of formation of deposits of fluorocarbon, that is, a condition for an etching mode is selected.
  • the fluorocarbon gas used in step ST 5 is C 4 F 6 gas.
  • the fluorocarbon gas used in step ST 5 may contain at least one kind of C 4 F 8 gas and CF 4 gas.
  • the high frequency power for generating plasma used in step ST 5 may be set to be higher than the high frequency power for generating plasma used in step ST 11 . According to these examples, it is possible to realize the etching mode.
  • the high frequency bias power used in step ST 5 may also be set to be higher than the high frequency bias power used in step ST 11 .
  • the energy of ions to be drawn to the wafer W may be increased so that the first region R 1 may be etched at a high speed.
  • step ST 5 various conditions in step ST 5 will be exemplified.
  • step ST 5 is performed in a state where the second region R 2 is protected by the deposits DP formed by carrying out the sequence SQ.
  • step ST 5 the first region is further etched by the plasma of the fluorocarbon gas.
  • the etching rate of the first region R 1 in step ST 5 is higher than the etching rate of the first region R 1 in the sequence SQ. Accordingly, as compared to a processing time when the first region R 1 is etched to the bottom of the recess by repeatedly carrying out the sequence SQ, the processing time of the method MT is largely shortened. Thus, according to the method MT, it is possible to achieve both a scraping suppression of the second region R 2 , and a decrease of a processing time required for etching the first region R 1 .
  • FIG. 12 is a flow chart illustrating an etching method according to another exemplary embodiment.
  • FIG. 13 is a sectional view illustrating the workpiece after step ST 14 of the method illustrated in FIG. 12 is performed.
  • the method MT 2 illustrated in FIG. 12 is different from the method MT in that the sequence SQ further includes step ST 14 performed after step ST 13 is performed.
  • Step ST 14 is the same step as step ST 12 .
  • the conditions described in the processing in step ST 12 may be employed.
  • step ST 13 ions are drawn into the wafer W. Accordingly, substances constituting the deposits DP are released from the wafer W, and the substances are attached again to the wafer W so that, as illustrated in FIG. 10 , the deposits DP are formed to narrow the width of the opening MO and the lower opening LO.
  • the deposits DP in some cases, may clog the opening MO and the lower opening LO.
  • step ST 14 when step ST 14 is performed, the wafer W illustrated in FIG. 10 is exposed to active species of oxygen in the same manner as in step ST 12 . Accordingly, as illustrated in FIG. 13 , the deposits DP which narrow the width of the opening MO and the lower opening LO may be reduced so that the opening MO and the lower opening LO may be more reliably prevented from being clogged.
  • a high frequency power for generating plasma is supplied to the lower electrode LE, but the high frequency power may be supplied to the upper electrode 30 .
  • a plasma processing apparatus other than the plasma processing apparatus 10 may be used.
  • the method MT and the method MT 2 may be carried out using any plasma processing apparatus such as an inductively coupled plasma processing apparatus or a plasma processing apparatus for generating the plasma using surface waves such as microwaves.
  • step ST 11 the execution order of steps ST 11 , ST 12 , and ST 13 may be changed.
  • step ST 12 may be performed.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Plasma & Fusion (AREA)
  • Electromagnetism (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Analytical Chemistry (AREA)
  • Plasma Technology (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

An etching method including: (a) providing a workpiece including a first region made of a first material and a second region made of a second material defining a recess, the first region filling the recess of the second region while covering the second region; (b) generating plasma of a first fluorocarbon gas to etch the first region until before exposing the second region; (c) generating plasma of a second fluorocarbon gas to form fluorocarbon deposits on the first region; (d) generating plasma of an inert gas to etch the first region by fluorocarbon radicals contained in the fluorocarbon deposits; and (e) repeating step (c) and step (d) one or more times until after exposing the second region. An etching rate of the first material of the first region is higher than that of the second material of the second region with respect to the second fluorocarbon gas.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • This application is a continuation of U.S. patent application Ser. No. 15/905,213, filed on Feb. 26, 2018, which is a continuation of U.S. patent application Ser. No. 15/046,871, filed on Feb. 18, 2016, which is abandoned, which claims priority from Japanese Patent Application No. 2015-034144, filed on Feb. 24, 2015, all of which are incorporated herein in their entireties by reference.
  • TECHNICAL FIELD
  • The present disclosure relates to an etching method, and particularly to a method of selectively etching a first region formed of silicon oxide, with respect to a second region formed of silicon nitride by a plasma processing on an object to be processed (“workpiece”).
  • BACKGROUND
  • In manufacturing an electronic device, a processing of forming an opening such as a hole or a trench may be performed on a region formed of silicon oxide (SiO2). In such a processing, as described in the specification of U.S. Pat. No. 7,708,859, in general, a workpiece is exposed to plasma of a fluorocarbon gas so that the region is etched.
  • A technology of selectively etching a first region formed of silicon oxide with respect to a second region formed of silicon nitride has been known. As an example of such a technology, a self-aligned contact (SAC) technology has been known. The SAC technology is described in Japanese Patent Laid-Open Publication No. 2000-307001.
  • A workpiece to be processed in the SAC technology includes a first region made of silicon oxide, a second region made of silicon nitride, and a mask. The second region is formed to define a recess, the first region is formed to fill the recess and cover the second region, and the mask is formed on the first region and provides an opening above the recess. In the conventional SAC technology, as described in Japanese Patent Laid-Open Publication No 2000-307001, plasma of a processing gas containing a fluorocarbon gas, an oxygen gas, and a rare gas is used in order to etch the first region. When the workpiece is exposed to the plasma of the processing gas, the first region is etched and an upper opening is formed in the portion exposed from the opening of the mask. When the workpiece is exposed to the plasma of the processing gas, the portion surrounded by the second region, that is, the first region within the recess is etched in a self-aligned manner. Accordingly, a lower opening continuous to the upper opening is formed in a self-aligned manner.
  • SUMMARY
  • The present disclosure provides an etching method including: (a) providing a workpiece including a first region made of a first material and a second region made of a second material defining a recess, the first region filling the recess of the second region while covering the second region; (b) generating plasma of a first fluorocarbon gas to etch the first region until before exposing the second region; (c) generating plasma of a second fluorocarbon gas to form fluorocarbon deposits on the first region; (d) generating plasma of an inert gas to etch the first region by fluorocarbon radicals contained in the fluorocarbon deposits; and (e) repeating step (c) and step (d) one or more times until after exposing the second region. An etching rate of the first material of the first region is higher than that of the second material of the second region with respect to the second fluorocarbon gas.
  • The foregoing summary is illustrative only and is not intended to be in any way limiting. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a flow chart illustrating an etching method according to an exemplary embodiment.
  • FIG. 2 is a sectional view exemplifying a workpiece to which the etching method according to the exemplary embodiment is applied.
  • FIG. 3 is a view schematically illustrating an example of a plasma processing apparatus that may be used to carry out the method illustrated in FIG. 1.
  • FIG. 4 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 5 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 6 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 7 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 8 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 9 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 10 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 11 is a sectional view illustrating the workpiece after each step of the method illustrated in FIG. 1 is performed.
  • FIG. 12 is a flow chart illustrating an etching method according to another exemplary embodiment.
  • FIG. 13 is a sectional view illustrating the workpiece after a step ST14 of the method illustrated in FIG. 12 is performed.
  • DETAILED DESCRIPTION
  • In the following detailed description, reference is made to the accompanying drawing, which form a part hereof. The illustrative embodiments described in the detailed description, drawing, and claims are not meant to be limiting. Other embodiments may be utilized, and other changes may be made without departing from the spirit or scope of the subject matter presented here.
  • In the conventional technology described above, a state where a film for protecting the second region is not formed on the top surface of the second region may occur at a time of gradually etching the first region and exposing the second region. In the state, when the first region is etched, the second region is scraped. Thus, it is necessary to suppress the second region from being scraped when the second region is exposed. Further, in such a technology, it is necessary to shorten the time required from the start of the processing to the end.
  • That is, in the technology of selectively etching the first region formed of silicon oxide, it is required to suppress the second region formed of silicon nitride from being scraped, and to shorten the processing time.
  • According to one aspect, there is provided a method of selectively etching a first region formed of silicon oxide with respect to a second region formed of silicon nitride using a plasma processing on a workpiece. The workpiece includes the second region configured to define a recess, the first region formed to fill the recess and to cover the second region, and a mask formed on the first region, the mask providing an opening having a width wider than a width of the recess, above the recess. The method includes a sequence that is performed one or more times to etch the first region in a period including a time of exposing the second region, and a process of etching the first region by plasma of a second processing gas containing a fluorocarbon gas generated within a processing container after the sequence is performed one or more times. The sequence includes (a) a process of generating plasma of a first processing gas containing a fluorocarbon gas within the processing container that accommodates the workpiece in order to form deposits containing fluorocarbon on the workpiece, and (b) a process of etching the first region by radicals of the fluorocarbon included in the deposits. In one exemplary embodiment, in the process of generating the plasma of the second processing gas, the first region may be continuously etched to a bottom of the recess.
  • In the sequence of the method according to one aspect, deposits of fluorocarbon are formed on the workpiece when the second region is exposed, and then the first region is etched by the radicals in the deposits. By the sequence SQ, although the etching rate is low, the first region is etched, and the second region is suppressed from being scraped when the second region is exposed. In the method, in a state where the second region is protected by the deposits formed by carrying out the sequence, the first region is further etched by the plasma of the fluorocarbon gas. The etching rate of the first region etched by the plasma of fluorocarbon after the sequence is performed is higher than the etching rate of the first region in the sequence. Accordingly, according to the method, it is possible to achieve both a scraping suppression of the second region, and a decrease of a processing time required for etching the first region.
  • In the exemplary embodiment, each time of the sequence may further include a process of generating plasma of a third processing gas containing an oxygen-containing gas and an inert gas within the processing container that accommodates the workpiece. According to the exemplary embodiment, the amount of the deposits formed on the workpiece may be properly reduced by the active species of oxygen. Accordingly, it is possible to suppress an opening of the mask, and an opening formed by etching from being clogged. In the exemplary embodiment, in the processing gas, the oxygen-containing gas is diluted with the inert gas, and thus it is possible to suppress the deposits from being excessively removed.
  • In each time of the sequence in the exemplary embodiment, a process of generating the plasma of the third processing gas is performed between the process of generating the plasma of the first processing gas, and the process of etching the first region by the radicals of the fluorocarbon. Each time of the sequence may further include a process of generating the plasma of the third processing gas within the processing container that accommodates the workpiece after the process of etching the first region by the radicals of the fluorocarbon is performed. When the process of etching the first region by the radicals of the fluorocarbon is performed, substances constituting the deposits attached to the workpiece are released, and the substances are attached again to the workpiece so that the deposits are formed to narrow the width of the opening of the mask and the opening formed by etching. The deposits, in some cases, may clog the openings. According to the exemplary embodiment, after the process of etching the first region by the radicals of the fluorocarbon is performed, the workpiece is exposed to active species of oxygen. Thus, the deposits which narrow the widths of the openings may be reduced so that the openings may be more reliably prevented from being clogged.
  • As described above, in the technology of selectively etching the first region formed of silicon oxide, it is possible to suppress the second region formed of silicon nitride from being scraped, and to shorten a processing time.
  • Hereinafter, various exemplary embodiments will be described in detail with reference to drawings. Meanwhile, it is assumed that in respective drawings, the same reference numerals are given to the same or corresponding parts.
  • FIG. 1 is a flow chart illustrating an etching method according to an exemplary embodiment. The method MT illustrated in FIG. 1 is a method of selectively etching a first region formed of silicon oxide with respect to a second region formed of silicon nitride by a plasma processing on a workpiece.
  • FIG. 2 is a sectional view exemplifying a workpiece to which the etching method according to the exemplary embodiment is applied. As illustrated in FIG. 2, a workpiece, that is, a wafer W, includes a substrate SB, a first region R1, a second region R2, and an organic layer OL constituting a mark later. In an example, the wafer W is obtained in the course of manufacturing a fin field effect transistor and includes a raised area RA, a silicon-containing anti-reflection layer AL, and a resist mask RM.
  • The raised area RA is formed to be raised from the substrate SB. The raised area RA may constitute, for example, a gate region. The second region R2 is formed of silicon nitride (Si3N4), and is formed on the top surface of the raised area RA and the top surface of the substrate SB. The second region R2, as illustrated in FIG. 2, extends to define a recess. In an example, the depth of the recess is about 150 nm, and the width of the recess is about 20 nm.
  • The first region R1 is formed of silicon oxide (SiO2) and is formed on the second region R2. Specifically, the first region R1 is formed to fill the recess defined by the second region R2 and to cover the second region R2.
  • The organic layer OL is formed on the first region RE The organic layer OL may be formed of an organic material, for example, an amorphous carbon. The anti-reflection layer AL is formed on the organic layer OL. The resist mask RM is formed on the anti-reflection layer AL. The resist mask RM provides an opening having a width wider than a width of the recess, above the recess defined by the second region R2. The width of the opening of the resist mask RM is, for example, 60 nm. The pattern of the resist mask RM is formed by a photolithography technology.
  • In the method MT, the workpiece such as the wafer W illustrated in FIG. 2 is processed within a plasma processing apparatus. FIG. 3 is a view schematically illustrating an example of a plasma processing apparatus that may be used to carry out the method illustrated in FIG. 1. A plasma processing apparatus 10 illustrated in FIG. 3 is a capacitively-coupled plasma etching apparatus, and includes a substantially cylindrical processing container 12. An inner wall surface of the processing container 12 is made of, for example, anodized aluminum. The processing container 12 is frame-grounded.
  • On a bottom portion of the processing container 12, a substantially cylindrical support unit 14 is provided. The support unit 14 is made of, for example, an insulating material. The support unit 14 vertically extends from the bottom portion of the processing container 12 within the processing container 12. A placing table PD is provided within the processing container 12. The placing table PD is supported by the support unit 14.
  • The placing table PD holds the wafer W on the top surface thereof. The placing table PD includes a lower electrode LE and an electrostatic chuck ESC. The lower electrode LE includes a first plate 18 a and a second plate 18 b. Each of the first plate 18 a and the second plate 18 b is made of a metal such as, for example, aluminum, and has substantially a disk shape. The second plate 18 b is provided on the first plate 18 a, and is electrically connected to the first plate 18 a.
  • On the second plate 18 b, the electrostatic chuck ESC is provided. The electrostatic chuck ESC has a structure where an electrode serving as a conductive film is disposed between a pair of insulating layers or insulating sheets. A DC power supply 22 is electrically connected to the electrode of the electrostatic chuck ESC via a switch 23. The electrostatic chuck ESC attracts the wafer W by an electrostatic force such as a coulomb force generated by a DC voltage from the DC power supply 22. Accordingly, the electrostatic chuck ESC may hold the wafer W thereon.
  • On the periphery edge of the second plate 18 b, a focus ring FR is disposed to surround the edge of the wafer W and the electrostatic chuck ESC. The focus ring FR is provided to improve the uniformity of the etching. The focus ring FR is formed of a material appropriately selected depending on a material of a film to be etched, and may be made of, for example, quartz.
  • A coolant flow path 24 is formed within the second plate 18 b. The coolant flow path 24 constitutes a temperature control mechanism. A coolant is supplied to the coolant flow path 24 from a chiller unit provided outside the processing container 12 through a pipe 26 a. The coolant supplied to the coolant flow path 24 is returned to the chiller unit through a pipe 26 b. In this manner, between the coolant flow path 24 and the chiller unit, the coolant is circulated. By controlling the temperature of the coolant, the temperature of the wafer W supported by the electrostatic chuck ESC is controlled.
  • A gas supply line 28 is formed in the plasma processing apparatus 10. The gas supply line 28 supplies a heat transfer gas such as, for example, a He gas, from a heat transfer gas supply mechanism to a gap between the top surface of the electrostatic chuck ESC and the rear surface of the wafer W.
  • The plasma processing apparatus 10 includes an upper electrode 30. The upper electrode 30 is disposed to face the placing table PD above the placing table PD. The lower electrode LE and the upper electrode 30 are provided substantially parallel to each other. Between the upper electrode 30 and the lower electrode LE, a processing space S is provided to perform a plasma processing on the wafer W.
  • The upper electrode 30 is supported at the top portion of the processing container 12 through an insulating shielding member 32. In the exemplary embodiment, the upper electrode 30 may be configured such that a distance from the top surface of the placing table PD, that is, the wafer placing surface, in a vertical direction is variable. The upper electrode 30 may include an electrode plate 34 and an electrode support 36. The electrode plate 34 faces the processing space S, and a plurality of gas ejecting holes 34 a are formed in the electrode plate 34. The electrode plate 34 is made of silicon in the exemplary embodiment.
  • The electrode support 36 is configured to detachably support the electrode plate 34 and may be made of, for example, a conductive material such as aluminum. The electrode support 36 may have a water-cooling structure. A gas diffusion chamber 36 a is formed within the electrode support 36. A plurality of gas flow holes 36 b extend downwards from the gas diffusion chamber 36 a to communicate with the gas ejecting holes 34 a. A gas inlet port 36 c is formed in the electrode support 36 to guide a processing gas into the gas diffusion chamber 36 a. A gas supply pipe 38 is connected to the gas inlet port 36 c.
  • A gas source group 40 is connected to the gas supply pipe 38 through a valve group 42 and a flow rate controller group 44. The gas source group 40 includes a plurality of gas sources. In an example, the gas source group 40 includes one or more sources of a fluorocarbon gas, a source of a rare gas, a source of a nitrogen gas (N2 gas), a source of a hydrogen gas (H2 gas), and a source of an oxygen-containing gas. One or more sources of the fluorocarbon gas, in an example, may include a source of C4F8 gas, a source of CF4 gas, and a source of C4F6 gas. The source of the rare gas may be a source of any rare gas such as He gas, Ne gas, Ar gas, Kr gas, or Xe gas, and may be, in an example, a source of Ar gas. The source of the oxygen-containing gas may be, in an example, a source of oxygen gas (O2 gas). Meanwhile, the oxygen-containing gas may be any gas containing oxygen, and may be, for example, a carbon oxide gas such as CO gas or CO2 gas.
  • The valve group 42 includes a plurality of valves, and the flow rate controller group 44 includes a plurality of flow rate controllers such as, for example, a mass flow controller. The plurality of gas sources of the gas source group 40 are connected to the gas supply pipe 38 through respective corresponding valves of the valve group 42, and respective corresponding flow controllers of the flow rate controller group 44.
  • In the plasma processing apparatus 10, a deposition shield 46 is detachably provided along the inner wall of the processing container 12. The deposition shield 46 is also provided on the outer periphery of the support unit 14. The deposition shield 46 is configured to suppress etching by-products (deposits) from being attached to the processing container 12, and may be formed by coating a ceramic such as, for example, Y2O3 on an aluminum material.
  • An exhaust plate 48 is provided on the bottom side of the processing container 12 between the support unit 14 and the side wall of the processing container 12. The exhaust plate 48 may be formed by coating a ceramic such as, for example, Y2O3 on an aluminum material. An exhaust port 12 e is formed below the exhaust plate 48 in the processing container 12. An exhaust device 50 is connected to the exhaust port 12 e through an exhaust pipe 52. The exhaust device 50 includes a vacuum pump such as, for example, a turbo molecular pump and may decompress the space within the processing container 12 to a desired degree of vacuum. A carry-in/out port 12 g of the wafer W is formed in the side wall of the processing container 12. The carry-in/out port 12 g is configured to be capable of being opened/closed by a gate valve 54.
  • The plasma processing apparatus 10 further includes a first high frequency power supply 62 and a second high frequency power supply 64. The first high frequency power supply 62 is a power supply which generates a high frequency power for generating plasma and generates a high frequency power of a frequency ranging from, for example, 27 MHz to 100 MHz. The first high frequency power supply 62 is connected to the lower electrode LE through a matching unit 66. The matching unit 66 is a circuit configured to match an output impedance of the first high frequency power supply 62 to an input impedance of a load side (a lower electrode LE side). The first high frequency power supply 62 may be connected to the upper electrode 30 through the matching unit 66.
  • The second high frequency power supply 64 is a power supply which generates a high frequency bias power for drawing ions into the wafer W, and generates a high frequency bias power of a frequency ranging from, for example, 400 kHz to 13.56 MHz. The second high frequency power supply 64 is connected to the lower electrode LE through a matching unit 68. The matching unit 68 is a circuit configured to match an output impedance of the second high frequency power supply 64 to an input impedance of a load side (a lower electrode LE side).
  • The plasma processing apparatus 10 further includes a power supply 70. The power supply 70 is connected to the upper electrode 30. The power supply 70 applies a voltage for drawing positive ions present within the processing space S to the electrode plate 34, to the upper electrode 30. In an example, the power supply 70 is a DC power supply for generating a negative DC voltage. In another example, the power supply 70 may be an AC power supply for generating an AC voltage of a relatively low frequency. The voltage applied to the upper electrode from the power supply 70 may be a voltage of −150 V or less. That is, the voltage applied to the upper electrode 30 by the power supply 70 may be a negative voltage having an absolute value of 150 V or more. When the voltage is applied to the upper electrode 30 from the power supply 70, positive ions present in the processing space S collide with the electrode plate 34. Accordingly, secondary electrons and/or silicon are released from the electrode plate 34. The released silicon combines with active species of fluorine present in the processing space S to reduce the amount of the active species of fluorine.
  • In the exemplary embodiment, the plasma processing apparatus 10 may further include a controller Cnt. The controller Cnt is a computer provided with, for example, a processor, a storage unit, an input device, and a display device, and controls respective units of the plasma processing apparatus 10. The controller Cnt allows an operator to perform, for example, the input operation of a command through the input device in order to manage the plasma processing apparatus 10, and allows the display device to visually display the driving situation of the plasma processing apparatus 10. The storage unit of the controller Cnt stores a control program which controls the processor to execute various processings in the plasma processing apparatus 10, or a program which causes respective units of the plasma processing apparatus 10 to execute the processings according to processing conditions, i.e., a processing recipe.
  • Hereinafter, the method MT will be described in detail with reference to FIG. 1 again. The following description appropriately refers to FIGS. 2, and 4 to 11. FIGS. 4 to 11 are sectional views illustrating the workpiece after each step of the method MT is performed. Meanwhile, the following descriptions will be made on an example of a processing of the wafer W illustrated in FIG. 2, using one plasma processing apparatus 10 illustrated in FIG. 3 in the method MT.
  • First, in the method MT, the wafer W illustrated in FIG. 2 is carried into the plasma processing apparatus 10, placed on the placing table PD, and held by the placing table PD.
  • In the method MT, then, step ST1 is performed. In step ST1, the anti-reflection layer AL is etched. Thus, in step ST1, a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40. The processing gas contains a fluorocarbon gas. The fluorocarbon gas may contain, for example, at least one kind of C4F8 gas and CF4 gas. The processing gas may further contain a rare gas, for example, Ar gas. In step ST1, the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure. Also, in step ST1, the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE, and the high frequency bias power is supplied from the second high frequency power supply 64 to the lower electrode LE.
  • Hereinafter, various conditions in step ST1 will be exemplified.
      • Pressure within processing container: 10 mTorr (1.33 Pa) to 50 mTorr (6.65 Pa)
      • Processing gas
        • C4F8 gas: 10 sccm to 30 sccm
        • CF4 gas: 150 sccm to 300 sccm
        • Ar gas: 200 sccm to 500 sccm
      • High frequency power for generating plasma: 300 W to 1000 W
      • High frequency bias power: 200 W to 500 W
      • Voltage of power supply 70: 0 V to −500 V
      • Temperature of wafer W: 20° C. to 80° C.
  • In step ST1, the plasma of the processing gas is generated, and the anti-reflection layer AL is etched at the portion exposed from the opening of the resist mask RM by the active species of the fluorocarbon. As a result, as illustrated in FIG. 4, among the whole area of the anti-reflection layer AL, the portion exposed from the opening of the resist mask RM is removed. That is, a pattern of the resist mask RM is transferred to the anti-reflection layer AL so that a pattern for providing an opening in the anti-reflection layer AL is formed. Meanwhile, the above described operations of the respective units of the plasma processing apparatus 10, in step ST1, may be controlled by the controller Cnt.
  • Then, in step ST2, the organic layer OL is etched. Thus, in step ST2, a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40. The processing gas may further contain a hydrogen gas and a nitrogen gas. The processing gas used in step ST2 may be any processing gas containing another gas such as, for example, an oxygen gas as long as it can etch the organic layer. Also, in step ST2, the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure. Also, in step ST2, the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE, and the high frequency bias power is supplied from the second high frequency power supply 64 to the lower electrode LE.
  • Hereinafter, various conditions in step ST2 will be exemplified.
      • Pressure within processing container: 50 mTorr (6.65 Pa) to 200 mTorr (26.6 Pa)
      • Processing gas
        • N2 gas: 200 sccm to 400 sccm
        • H2 gas: 200 sccm to 400 sccm
      • High frequency power for generating plasma: 500 W to 2000 W
      • High frequency bias power: 200 W to 500 W
      • Voltage of power supply 70: 0 V
      • Temperature of wafer W: 20° C. to 80° C.
  • In step ST2, the plasma of the processing gas is generated, and the organic layer OL is etched at the portion exposed from the opening of the anti-reflection layer AL. Also, the resist mask RM is etched. As a result, as illustrated in FIG. 5, the resist mask RM is removed, and among the whole area of the organic layer OL, the portion exposed from the opening of the anti-reflection layer AL is removed. That is, a pattern of the anti-reflection layer AL is transferred to the organic layer OL so that a pattern for providing an opening MO in the organic layer OL is formed, and a mask MK is generated from the organic layer OL. Meanwhile, the above described operations of the respective units of the plasma processing apparatus 10, in step ST2, may be controlled by the controller Cnt.
  • In an exemplary embodiment, after step ST2 is performed, step ST3 is performed. In step ST3, the first region R1 is etched until just before the second region R2 is exposed. That is, the first region R1 is etched until the first region R1 is slightly left on the second region R2. Thus, in step ST3, a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40. The processing gas contains a fluorocarbon gas. Also, the processing gas may further contain a rare gas, for example, Ar gas. Also, the processing gas may further contain an oxygen gas. Also, in step ST3, the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure. Also, in step ST3, the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE, and the high frequency bias power is supplied from the second high frequency power supply 64 to the lower electrode LE.
  • In step ST3, the plasma of the processing gas is generated, and the first region R1 is etched at the portion exposed from the opening of the mask MK by the active species of the fluorocarbon. The processing time in step ST3 is set such that at the end of step ST3, the first region R1 is left to a predetermined film thickness on the second region R2. As a result of the execution of step ST3, as illustrated in FIG. 6, an upper opening UO is partially formed. Meanwhile, the above described operations of the respective units of the plasma processing apparatus 10, in step ST3, may be controlled by the controller Cnt.
  • Here, in step ST11 to be described later, a condition for a mode in which formation of deposits containing fluorocarbon on the top surface of the wafer W including the first region R1 is dominant instead of etching of the first region R1, that is, a condition for a deposition mode is selected. Meanwhile, in step ST3, a condition for a mode in which etching of the first region R1 is dominant instead of formation of deposits, that is a condition for an etching mode is selected. Thus, in an example, the fluorocarbon gas used in step ST3 may contain at least one kind of C4F8 gas and CF4 gas. The fluorocarbon gas in this example is a fluorocarbon gas having a higher ratio of the number of fluorine atoms to the number of carbon atoms (that is, number of fluorine atoms/number of carbon atoms), than a ratio of the number of fluorine atoms to the number of carbon atoms (that is, number of fluorine atoms/number of carbon atoms) of the fluorocarbon gas used in step ST11. Also, in an example, in order to increase the dissociation degree of the fluorocarbon gas, the high frequency power for generating plasma used in step ST3 may be set to be higher than the high frequency power for generating plasma used in step ST11. According to these examples, it is possible to realize the etching mode. In an example, the high frequency bias power used in step ST3 may also be set to be higher than the high frequency bias power used in step ST11. According to this example, the energy of ions to be drawn to the wafer W may be increased so that the first region R1 may be etched at a high speed.
  • Hereinafter, various conditions in step ST3 will be exemplified.
      • Pressure within processing container: 10 mTorr (1.33 Pa) to 50 mTorr (6.65 Pa)
      • Processing gas
        • C4F8 gas: 10 sccm to 30 sccm
        • CF4 gas: 50 sccm to 150 sccm
        • Ar gas: 500 sccm to 1000 sccm
        • O2 gas: 10 sccm to 30 sccm
      • High frequency power for generating plasma: 500 W to 2000 W
      • High frequency bias power: 500 W to 2000 W
      • Voltage of power supply 70: 0 V to 600 V
      • Temperature of wafer W: 20° C. to 80° C.
  • In an exemplary embodiment, subsequently, step ST4 is performed. In step ST4, the plasma of a processing gas containing an oxygen-containing gas is generated within the processing container 12. Thus, in step ST4, a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40. The processing gas, in an example, may contain an oxygen gas as an oxygen-containing gas. The processing gas may further contain an inert gas such as a rare gas (e.g., Ar gas) or a nitrogen gas. Also, in step ST4, the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure. Also, in step ST4, the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE. Also, in step ST4, the high frequency bias power may not be supplied from the second high frequency power supply 64 to the lower electrode LE.
  • In step ST4, the active species of oxygen is generated and the opening MO of the mask MK is widened at its upper end portion by the active species of the oxygen. Specifically, as illustrated in FIG. 7, the upper shoulder portion of the mask MK which defines the upper end portion of the opening MO is etched to exhibit a tapered shape. Accordingly, even when deposits produced in the subsequent steps are attached to the surface of the mask MK defining the opening MO, the reduction amount of the width of the opening MO may be reduced. Meanwhile, the above described operations of the respective units of the plasma processing apparatus 10, in step ST4, may be controlled by the controller Cnt.
  • Here, step ST12 to be described below is to reduce a trace quantity of deposits formed during a sequence SQ, and it is required to suppress an excessive decrease of the deposits. Meanwhile, step ST4 is performed to widen the width of the upper end portion of the opening MO of the mask MK, and its processing time is required to be short.
  • Hereinafter, various conditions in step ST4 will be exemplified.
      • Pressure within processing container: 30 mTorr (3.99 Pa) to 200 mTorr (26.6 Pa)
      • Processing gas
        • O2 gas: 50 sccm to 500 sccm
        • Ar gas: 200 sccm to 1500 sccm
      • High frequency power for generating plasma: 100 W to 500 W
      • High frequency bias power: 0 W to 200 W
      • Voltage of power supply 70: 0 V
      • Temperature of wafer W: 20° C. to 200° C.
  • Subsequently, in the method MT, in a period including the time of exposing the second region R2, in order to etch the first region R1, a sequence SQ is carried out one or more times. In the sequence SQ, first, step ST11 is performed. In step ST11, the plasma of the processing gas (a first processing gas) is generated within the processing container 12 accommodating the wafer W. Thus, in step ST11, a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40. The processing gas contains a fluorocarbon gas. The processing gas may further contain a rare gas, for example, Ar gas. Also, in step ST11, the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure. Also, in step ST11, the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE.
  • In step ST11, the plasma of a processing gas containing a fluorocarbon gas is generated, and the dissociated fluorocarbon is deposited on the top surface of the wafer W to form deposits DP (see, e.g., FIG. 8). The above described operations of the respective units of the plasma processing apparatus 10, in step ST11, may be controlled by the controller Cnt.
  • As described above, in step ST11, a condition for a deposition mode is selected. Thus, in an example, C4F6 gas is used as the fluorocarbon gas.
  • Hereinafter, various conditions in step ST11 will be exemplified.
      • Pressure within processing container: 10 mTorr (1.33 Pa) to 50 mTorr (6.65 Pa)
      • Processing gas
        • C4F6 gas: 2 sccm to 10 sccm
        • Ar gas: 500 sccm to 1500 sccm
      • High frequency power for generating plasma: 100 W to 500 W
      • High frequency bias power: 0 W
      • Voltage of power supply 70: 0 V to 600 V
      • Temperature of wafer W: 20° C. to 200° C.
  • In the sequence SQ of the exemplary embodiment, subsequently, step ST12 is performed. In step ST12, the plasma of a processing gas (a third processing gas) containing an oxygen-containing gas and an inert gas is generated within the processing container 12. Thus, in step ST12, a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40. In an example, the processing gas contains an oxygen gas as the oxygen-containing gas. In an example, the processing gas contains a rare gas such as Ar gas, as an inert gas. The inert gas may be a nitrogen gas. Also, in step ST12, the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure. In step ST12, the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE. In step ST12, the high frequency bias power may not be supplied from the second high frequency power supply 64 to the lower electrode LE.
  • In step ST12, the active species of oxygen is generated, and the amount of the deposits DP on the wafer W is properly reduced by the active species of oxygen (see, e.g., FIG. 9). As a result, the opening MO and the upper opening UO are suppressed from being clogged by excessive deposits DP. In the processing gas used in step ST12, the oxygen gas is diluted with the inert gas, and thus it is possible to suppress the deposits DP from being excessively removed. The above described operations of the respective units of the plasma processing apparatus 10, in step ST12, may be controlled by the controller Cnt.
  • Hereinafter, various conditions in step ST12 will be exemplified.
      • Pressure within processing container: 10 mTorr (1.33 Pa) to 50 mTorr (6.65 Pa)
      • Processing gas
        • O2 gas: 2 sccm to 20 sccm
        • Ar gas: 500 sccm to 1500 sccm
      • High frequency power for generating plasma: 100 W to 500 W
      • High frequency bias power: 0 W
      • Voltage of power supply 70: 0 V
      • Temperature of wafer W: 20° C. to 200° C.
  • In the exemplary embodiment, step ST12 of the sequence SQ of each time is performed for 2 sec or more, and the deposits DP may be etched at a rate of 1 nm/sec or less in step ST12. In order to carry out the sequence SQ using a plasma processing apparatus such as the plasma processing apparatus 10, a time is required to switch gases for transition between respective steps ST11, ST12, and ST13. Accordingly, in consideration of a time required for stabilizing a discharge, step ST12 needs to be performed at least 2 sec. However, when the rate of etching of the deposits DP in a period of such a length of time is excessively high, deposits for protecting the second region R2 may be excessively removed. Thus, in step ST12, the deposits DP are etched at a rate of 1 nm/sec or less. Accordingly, it is possible to properly adjust the amount of the deposits DP formed on the wafer W. Meanwhile, the rate of 1 nm/sec or less in the etching of the deposits DP in step ST12 may be achieved by selecting a pressure within a processing container, the oxygen dilution degree with a rare gas in the processing gas, that is, an oxygen concentration, and a high frequency power for generating plasma from the above described conditions.
  • In the sequence SQ, subsequently, step ST13 is performed. In step ST13, the first region R1 is etched. Thus, in step ST13, a processing gas is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40. The processing gas contains an inert gas. The inert gas, in an example, may be a rare gas such as, for example, Ar gas. Otherwise, the inert gas may be a nitrogen gas. Also, in step ST13, the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure. Also, in step ST13, the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE. Also, in step ST13, the high frequency bias power is supplied from the second high frequency power supply 64 to the lower electrode LE.
  • Hereinafter, various conditions in step ST13 will be exemplified.
      • Pressure within processing container: 10 mTorr (1.33 Pa) to 50 mTorr (6.65 Pa)
      • Processing gas
        • Ar gas: 500 sccm to 1500 sccm
      • High frequency power for generating plasma: 100 W to 500 W
      • High frequency bias power: 20 W to 300 W
  • In step ST13, the plasma of the inert gas is generated, and ions are drawn into the wafer W. The first region R1 is etched by radicals of fluorocarbon included in the deposits DP (see, e.g., FIG. 10). The above described operations of the respective units of the plasma processing apparatus 10, in step ST13, may be controlled by the controller Cnt.
  • In the method MT, the sequence SQ is carried out in a period including the time of exposing the second region R2. In step ST11 of the sequence SQ, as illustrated in FIG. 8, the deposits DP are formed on the wafer W. Meanwhile, FIG. 8 illustrates a state where the first region R1 is gradually etched, the second region R2 is exposed, and deposits DP are formed on the second region R2. The deposits DP protect the second region R2. In step ST12 of the sequence SQ, as illustrated in FIG. 9, the amount of the deposits DP formed in step ST11 is decreased. In step ST13 of the sequence SQ, the first region R1 is etched by radicals of fluorocarbon included in the deposits DP. By the sequence SQ, the second region R2 is exposed, and then the second region R2 is protected by the deposits DP and the first region R1 within the recess provided by the second region R2 is slightly etched. Accordingly, as illustrated in FIG. 10, a lower opening LO is gradually formed.
  • The sequence SQ is repeated one or more times. Accordingly, as illustrated in FIG. 1, after step ST13 is performed, it is determined whether a stop condition is satisfied in step STJ. The stop condition is determined to be satisfied when the sequence SQ has been carried out a predetermined number of times. In step STJ, when it is determined that the stop condition is not satisfied, the sequence SQ is carried out from step ST11. Meanwhile, in step STJ, when it is determined that a stop condition is satisfied, subsequently, step ST5 is performed.
  • In step ST5, the first region R1 is further etched. In step ST5, a processing gas (a second processing gas) is supplied into the processing container 12 from a gas source selected from the plurality of gas sources of the gas source group 40. The processing gas contains a fluorocarbon gas. The processing gas may further contain a rare gas, for example, Ar gas. Also, the processing gas may further contain an oxygen gas. Also, in step ST5, the exhaust device 50 is operated such that the pressure within the processing container 12 is set to a predetermined pressure. Also, in step ST5, the high frequency power is supplied from the first high frequency power supply 62 to the lower electrode LE, and the high frequency bias power is supplied from the second high frequency power supply 64 to the lower electrode LE. Meanwhile, in step ST5, a voltage having a negative voltage value may be applied to the upper electrode 30 from the power supply 70.
  • In step ST5, the plasma of the processing gas is generated, and the first region R1 within the recess is etched by the active species of fluorocarbon. In step ST5, in the exemplary embodiment, as illustrated in FIG. 11, the first region R1 is etched until the bottom of the recess is exposed. That is, in step ST5, the plasma of the processing gas is continuously generated so that etching of the first region R1 is continued to the bottom of the recess.
  • In step ST5, a condition for a mode in which etching of the first region R1 by the active species of fluorocarbon is dominant, instead of formation of deposits of fluorocarbon, that is, a condition for an etching mode is selected. Thus, in an example, the fluorocarbon gas used in step ST5 is C4F6 gas. Meanwhile, the fluorocarbon gas used in step ST5 may contain at least one kind of C4F8 gas and CF4 gas. In an example, in order to increase the dissociation degree of the fluorocarbon gas, the high frequency power for generating plasma used in step ST5 may be set to be higher than the high frequency power for generating plasma used in step ST11. According to these examples, it is possible to realize the etching mode. In an example, the high frequency bias power used in step ST5 may also be set to be higher than the high frequency bias power used in step ST11. According to this example, the energy of ions to be drawn to the wafer W may be increased so that the first region R1 may be etched at a high speed.
  • Hereinafter, various conditions in step ST5 will be exemplified.
      • Pressure within processing container: 10 mTorr (1.33 Pa) to 50 mTorr (6.65 Pa)
      • Processing gas
        • C4F6 gas: 2 sccm to 10 sccm
        • Ar gas: 500 sccm to 2000 sccm
        • O2 gas: 2 sccm to 20 sccm
      • High frequency power for generating plasma: 100 W to 500 W
      • High frequency bias power: 20 W to 300 W
      • Voltage of power supply 70: 0 V to 900 V
      • Temperature of wafer W: 20° C. to 200° C.
  • In the sequence SQ of the method MT, the deposits DP of fluorocarbon are formed on the wafer W when the second region R2 is exposed. Then, the first region R1 is etched by radicals in the deposits DP. By the sequence SQ, although the etching rate is low, the first region R1 is etched, and the second region is suppressed from being scraped when the second region is exposed. In the method MT, in a state where the second region R2 is protected by the deposits DP formed by carrying out the sequence SQ, step ST5 is performed. In step ST5, the first region is further etched by the plasma of the fluorocarbon gas. The etching rate of the first region R1 in step ST5 is higher than the etching rate of the first region R1 in the sequence SQ. Accordingly, as compared to a processing time when the first region R1 is etched to the bottom of the recess by repeatedly carrying out the sequence SQ, the processing time of the method MT is largely shortened. Thus, according to the method MT, it is possible to achieve both a scraping suppression of the second region R2, and a decrease of a processing time required for etching the first region R1.
  • Hereinafter, an etching method according to another exemplary embodiment will be described. FIG. 12 is a flow chart illustrating an etching method according to another exemplary embodiment. FIG. 13 is a sectional view illustrating the workpiece after step ST14 of the method illustrated in FIG. 12 is performed. The method MT2 illustrated in FIG. 12 is different from the method MT in that the sequence SQ further includes step ST14 performed after step ST13 is performed. Step ST14 is the same step as step ST12. As conditions for processing in step ST14, the conditions described in the processing in step ST12 may be employed.
  • As described above, in step ST13, ions are drawn into the wafer W. Accordingly, substances constituting the deposits DP are released from the wafer W, and the substances are attached again to the wafer W so that, as illustrated in FIG. 10, the deposits DP are formed to narrow the width of the opening MO and the lower opening LO. The deposits DP, in some cases, may clog the opening MO and the lower opening LO. In the method MT2, when step ST14 is performed, the wafer W illustrated in FIG. 10 is exposed to active species of oxygen in the same manner as in step ST12. Accordingly, as illustrated in FIG. 13, the deposits DP which narrow the width of the opening MO and the lower opening LO may be reduced so that the opening MO and the lower opening LO may be more reliably prevented from being clogged.
  • As described above, various exemplary embodiments have been described, but various modifications may be configured without being limited to the exemplary embodiments described above. For example, in the execution of the method MT and the method MT2, a high frequency power for generating plasma is supplied to the lower electrode LE, but the high frequency power may be supplied to the upper electrode 30. Also, in the execution of the method MT and the method MT2, a plasma processing apparatus other than the plasma processing apparatus 10 may be used. Specifically, the method MT and the method MT2 may be carried out using any plasma processing apparatus such as an inductively coupled plasma processing apparatus or a plasma processing apparatus for generating the plasma using surface waves such as microwaves.
  • In the sequence SQ of the method MT, the execution order of steps ST11, ST12, and ST13 may be changed. For example, in the sequence SQ of the method MT, after step ST13 is performed, step ST12 may be performed.
  • From the foregoing, it will be appreciated that various embodiments of the present disclosure have been described herein for purposes of illustration, and that various modifications may be made without departing from the scope and spirit of the present disclosure. Accordingly, the various embodiments disclosed herein are not intended to be limiting, with the true scope and spirit being indicated by the following claims.

Claims (20)

What is claimed is:
1. A plasma processing apparatus comprising:
a processing container having at least one gas inlet and at least one gas outlet;
a substrate support in the processing container;
a plasma generator configured to generate a plasma in the processing container; and
a controller configured to cause:
(a) providing a substrate including a first region made of a first material and a second region made of a second material, the second region defining a recess, the first region filling the recess of the second region and covering the second region;
(b) generating a first plasma from a first fluorocarbon gas to etch the first region until before exposing the second region;
(c) generating a second plasma from a second fluorocarbon gas to form fluorocarbon deposits on the first region;
(d) generating a third plasma from a processing gas consisting essentially of an inert gas to etch the first region; and
(e) repeating (c) and (d) one or more times until after exposing the second region,
wherein during a sequence of (c) through (e), the first region is selectively etched with respect to the second region, and
wherein a material of the fluorocarbon deposits is different from a material of the first region.
2. The plasma processing apparatus according to claim 1, wherein the first material includes silicon oxide, and the second material includes silicon nitride.
3. The plasma processing apparatus according to claim 1, wherein the controller is further configured to cause:
(f) generating a fourth plasma from a third fluorocarbon gas to etch the first region after (e).
4. The plasma processing apparatus according to claim 3, wherein an etching rate in (f) is higher than an etching rate during the sequence of (c) through (e).
5. The plasma processing apparatus according to claim 3, wherein (f) continuously etches the first region in the recess to a bottom of the recess.
6. The plasma processing apparatus according to claim 3, further comprising a radio frequency bias power supply configured to apply a radio frequency bias power to the substrate support,
wherein the radio frequency bias power in (f) is higher than a radio frequency bias power in (c).
7. The plasma processing apparatus according to claim 1, wherein the first fluorocarbon gas is different from the second fluorocarbon gas in a ratio of a number of fluorine atoms to a number of carbon atoms.
8. The plasma processing apparatus according to claim 7, wherein the ratio of the number of fluorine atoms to the number of carbon atoms is higher in the first fluorocarbon gas than in the second fluorocarbon gas.
9. The plasma processing apparatus according to claim 1, wherein the substrate includes a mask formed on the first region providing an opening having a width wider than a width of the recess formed in the second region.
10. The plasma processing apparatus according to claim 1, wherein the first fluorocarbon gas includes at least one of a CF4 gas, and a C4F8 gas, and the second fluorocarbon gas includes a C4F6 gas.
11. The plasma processing apparatus according to claim 3, further comprising DC power supply configured to apply a DC voltage to an upper electrode which faces the substrate support,
wherein in (f), a negative voltage is applied to the upper electrode.
12. The plasma processing apparatus according to claim 1, wherein, in (d), a high frequency power for generating plasma and a high frequency bias power are applied to a lower electrode that supports the substrate.
13. The plasma processing apparatus according to claim 12, wherein the high frequency power ranges from 100 W to 500 W.
14. The plasma processing apparatus according to claim 12, wherein the high frequency bias power ranges from 20 W to 300 W.
15. The plasma processing apparatus according to claim 1, wherein, in (d), a flow rate of the inert gas ranges from 500 sccm to 1500 sccm.
16. The plasma processing apparatus according to claim 1, wherein the controller is further configured to cause:
(h) generating a fifth plasma from an oxygen-containing gas between (b) and (c).
17. A plasma processing apparatus comprising:
a processing container having at least one gas inlet and at least one gas outlet;
a substrate support in the processing container;
a plasma generator configured to generate a plasma in the processing container; and
a controller configured to cause:
(a) providing a substrate including a first region made of a first silicon-containing material and a second region made of a second silicon containing material that is different from the first silicon-containing material, the second region defining a recess, the first region filling the recess of the second region and covering the second region;
(b) generating a first plasma from a first fluorocarbon gas to etch the first region until before exposing the second region;
(c) generating a second plasma from a second fluorocarbon gas to form fluorocarbon deposits on the first region;
(d) generating a third plasma from an inert gas to etch the first region;
(e) repeating (c) and (d) one or more times until after exposing the second region; and
(f) generating a fourth plasma from a third fluorocarbon gas to etch the first region after (e).
18. The plasma processing apparatus according to claim 17, wherein a radio frequency power in (b) and (f) is higher than a radio frequency power in (c).
19. The plasma processing apparatus according to claim 17, further comprising a radio frequency bias power supply configured to apply a radio frequency bias power to the substrate support,
wherein the radio frequency bias power in (b) and (f) is higher than a radio frequency bias power in (c).
20. A plasma processing apparatus comprising:
a processing container having at least one gas inlet and at least one gas outlet;
a substrate support in the processing container;
a plasma generator configured to generate a plasma in the processing container; and
a controller configured to cause:
(a) providing a substrate including a first region made of silicon oxide and a second region made of silicon nitride, the second region defining a recess, the first region filling the recess of the second region and covering the second region;
(b) generating a first plasma from a first fluorocarbon gas to etch the first region until before exposing the second region;
(c) generating a second plasma from a second fluorocarbon gas to form fluorocarbon deposits on the first region;
(d) generating a third plasma from an inert gas to etch the first region;
(e) repeating step (c) and step (d) one or more times until after exposing the second region;
(f) generating a fourth plasma from a third fluorocarbon gas to etch the first region after (e), and
wherein the first fluorocarbon gas is different from the second fluorocarbon gas
US17/516,586 2015-02-24 2021-11-01 Etching method Pending US20220051904A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/516,586 US20220051904A1 (en) 2015-02-24 2021-11-01 Etching method

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2015-034144 2015-02-24
JP2015034144A JP2016157793A (en) 2015-02-24 2015-02-24 Etching method
US15/046,871 US20160247691A1 (en) 2015-02-24 2016-02-18 Etching method
US17/516,586 US20220051904A1 (en) 2015-02-24 2021-11-01 Etching method

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US15/046,871 Continuation US20160247691A1 (en) 2015-02-24 2016-02-18 Etching method

Publications (1)

Publication Number Publication Date
US20220051904A1 true US20220051904A1 (en) 2022-02-17

Family

ID=55409767

Family Applications (3)

Application Number Title Priority Date Filing Date
US15/046,871 Abandoned US20160247691A1 (en) 2015-02-24 2016-02-18 Etching method
US15/905,213 Active 2036-03-16 US11205577B2 (en) 2015-02-24 2018-02-26 Method of selectively etching silicon oxide film on substrate
US17/516,586 Pending US20220051904A1 (en) 2015-02-24 2021-11-01 Etching method

Family Applications Before (2)

Application Number Title Priority Date Filing Date
US15/046,871 Abandoned US20160247691A1 (en) 2015-02-24 2016-02-18 Etching method
US15/905,213 Active 2036-03-16 US11205577B2 (en) 2015-02-24 2018-02-26 Method of selectively etching silicon oxide film on substrate

Country Status (6)

Country Link
US (3) US20160247691A1 (en)
EP (1) EP3062338A1 (en)
JP (1) JP2016157793A (en)
KR (1) KR102363778B1 (en)
CN (1) CN105914144B (en)
TW (1) TWI716378B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220181162A1 (en) * 2016-05-19 2022-06-09 Tokyo Electron Limited Etching apparatus

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6948181B2 (en) * 2017-08-01 2021-10-13 東京エレクトロン株式会社 How to etch a multilayer film
KR102487054B1 (en) * 2017-11-28 2023-01-13 삼성전자주식회사 Etching method and methods of manufacturing semiconductor device using the same
WO2020205335A1 (en) * 2019-04-05 2020-10-08 Tokyo Electron Limited Independent control of etching and passivation gas components for highly selective silicon oxide/silicon nitride etching
CN110993499B (en) 2019-11-05 2022-08-16 北京北方华创微电子装备有限公司 Etching method, air gap type dielectric layer and dynamic random access memory
JP7462444B2 (en) * 2020-03-19 2024-04-05 東京エレクトロン株式会社 Etching method and plasma processing apparatus
TW202414581A (en) 2021-06-22 2024-04-01 日商東京威力科創股份有限公司 Etching method and plasma processing apparatus
JP2023050972A (en) 2021-09-30 2023-04-11 東京エレクトロン株式会社 Etching method and plasma processing apparatus
JP2024033846A (en) 2022-08-31 2024-03-13 東京エレクトロン株式会社 Substrate-processing method and plasma-processing device
KR20240112214A (en) 2023-01-11 2024-07-18 도쿄엘렉트론가부시키가이샤 Etching method and plasma processing apparatus

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2367199A2 (en) * 2010-03-12 2011-09-21 Tokyo Electron Limited Plasma etching method, plasma etching apparatus, and computer-readable storage medium
US20140256147A1 (en) * 2011-09-26 2014-09-11 Tokyo Electron Limited Plasma processing apparatus and plasma processing method
US20150056808A1 (en) * 2013-08-20 2015-02-26 Tokyo Electron Limited Method of etching silicon oxide film
US20150170932A1 (en) * 2013-12-13 2015-06-18 Tokyo Electron Limited Etching method
US20200161138A1 (en) * 2015-01-16 2020-05-21 Tokyo Electron Limited Plasma etching method for selectively etching silicon oxide with respect to silicon nitride
US20220181162A1 (en) * 2016-05-19 2022-06-09 Tokyo Electron Limited Etching apparatus

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56158873A (en) 1980-05-14 1981-12-07 Hitachi Ltd Dry etching method
US5122225A (en) * 1990-11-21 1992-06-16 Texas Instruments Incorporated Selective etch method
US5286344A (en) 1992-06-15 1994-02-15 Micron Technology, Inc. Process for selectively etching a layer of silicon dioxide on an underlying stop layer of silicon nitride
US5880037A (en) 1992-09-08 1999-03-09 Applied Materials, Inc. Oxide etch process using a mixture of a fluorine-substituted hydrocarbon and acetylene that provides high selectivity to nitride and is suitable for use on surfaces of uneven topography
JP3027951B2 (en) * 1997-03-12 2000-04-04 日本電気株式会社 Method for manufacturing semiconductor device
US6074959A (en) 1997-09-19 2000-06-13 Applied Materials, Inc. Method manifesting a wide process window and using hexafluoropropane or other hydrofluoropropanes to selectively etch oxide
US6174451B1 (en) * 1998-03-27 2001-01-16 Applied Materials, Inc. Oxide etch process using hexafluorobutadiene and related unsaturated hydrofluorocarbons
US6387287B1 (en) * 1998-03-27 2002-05-14 Applied Materials, Inc. Process for etching oxide using a hexafluorobutadiene and manifesting a wide process window
US6602434B1 (en) * 1998-03-27 2003-08-05 Applied Materials, Inc. Process for etching oxide using hexafluorobutadiene or related fluorocarbons and manifesting a wide process window
US6239011B1 (en) * 1998-06-03 2001-05-29 Vanguard International Semiconductor Corporation Method of self-aligned contact hole etching by fluorine-containing discharges
US6211092B1 (en) 1998-07-09 2001-04-03 Applied Materials, Inc. Counterbore dielectric plasma etch process particularly useful for dual damascene
US6380096B2 (en) * 1998-07-09 2002-04-30 Applied Materials, Inc. In-situ integrated oxide etch process particularly useful for copper dual damascene
JP2000058513A (en) * 1998-08-03 2000-02-25 Hitachi Ltd Semiconductor device and its manufacture
US6168726B1 (en) 1998-11-25 2001-01-02 Applied Materials, Inc. Etching an oxidized organo-silane film
US6849193B2 (en) 1999-03-25 2005-02-01 Hoiman Hung Highly selective process for etching oxide over nitride using hexafluorobutadiene
US6797189B2 (en) 1999-03-25 2004-09-28 Hoiman (Raymond) Hung Enhancement of silicon oxide etch rate and nitride selectivity using hexafluorobutadiene or other heavy perfluorocarbon
JP2000307001A (en) 1999-04-22 2000-11-02 Sony Corp Manufacture of semiconductor device
KR100327346B1 (en) * 1999-07-20 2002-03-06 윤종용 Plasma etching method using selective polymer deposition and method for forming contact hole using the plasma etching method
US6337285B1 (en) 2000-03-21 2002-01-08 Micron Technology, Inc. Self-aligned contact (SAC) etch with dual-chemistry process
JP4852213B2 (en) 2000-05-12 2012-01-11 東京エレクトロン株式会社 Method for etching highly selective SAC
JP2002025979A (en) * 2000-07-03 2002-01-25 Hitachi Ltd Method of manufacturing semiconductor integrated circuit device
US6803318B1 (en) * 2000-09-14 2004-10-12 Cypress Semiconductor Corp. Method of forming self aligned contacts
US6867145B2 (en) 2001-12-17 2005-03-15 Hynix Semiconductor Inc. Method for fabricating semiconductor device using photoresist pattern formed with argon fluoride laser
US6716766B2 (en) * 2002-08-22 2004-04-06 Micron Technology, Inc. Process variation resistant self aligned contact etch
US7056830B2 (en) * 2003-09-03 2006-06-06 Applied Materials, Inc. Method for plasma etching a dielectric layer
US7708859B2 (en) 2004-04-30 2010-05-04 Lam Research Corporation Gas distribution system having fast gas switching capabilities
JP2006165246A (en) * 2004-12-07 2006-06-22 Tokyo Electron Ltd Plasma etching method
JP4849875B2 (en) * 2005-11-17 2012-01-11 東京エレクトロン株式会社 Plasma etching method
US9257300B2 (en) 2013-07-09 2016-02-09 Lam Research Corporation Fluorocarbon based aspect-ratio independent etching
JP6396699B2 (en) * 2014-02-24 2018-09-26 東京エレクトロン株式会社 Etching method
JP6230954B2 (en) * 2014-05-09 2017-11-15 東京エレクトロン株式会社 Etching method
JP6235981B2 (en) * 2014-07-01 2017-11-22 東京エレクトロン株式会社 Method for processing an object
CN105810581B (en) * 2015-01-16 2019-12-10 东京毅力科创株式会社 Etching method
CN105810579B (en) * 2015-01-16 2019-12-06 东京毅力科创株式会社 Etching method
JP6550278B2 (en) * 2015-06-24 2019-07-24 東京エレクトロン株式会社 Etching method
JP6578145B2 (en) * 2015-07-07 2019-09-18 東京エレクトロン株式会社 Etching method

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2367199A2 (en) * 2010-03-12 2011-09-21 Tokyo Electron Limited Plasma etching method, plasma etching apparatus, and computer-readable storage medium
US20110250761A1 (en) * 2010-03-12 2011-10-13 Tokyo Electron Limited Plasma etching method, plasma etching apparatus, and computer-readable storage medium
US20140256147A1 (en) * 2011-09-26 2014-09-11 Tokyo Electron Limited Plasma processing apparatus and plasma processing method
US20150056808A1 (en) * 2013-08-20 2015-02-26 Tokyo Electron Limited Method of etching silicon oxide film
US20150170932A1 (en) * 2013-12-13 2015-06-18 Tokyo Electron Limited Etching method
US20200161138A1 (en) * 2015-01-16 2020-05-21 Tokyo Electron Limited Plasma etching method for selectively etching silicon oxide with respect to silicon nitride
US20220181162A1 (en) * 2016-05-19 2022-06-09 Tokyo Electron Limited Etching apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220181162A1 (en) * 2016-05-19 2022-06-09 Tokyo Electron Limited Etching apparatus

Also Published As

Publication number Publication date
TW201705265A (en) 2017-02-01
EP3062338A1 (en) 2016-08-31
CN105914144B (en) 2019-12-10
JP2016157793A (en) 2016-09-01
KR102363778B1 (en) 2022-02-15
US20160247691A1 (en) 2016-08-25
US20180190505A1 (en) 2018-07-05
CN105914144A (en) 2016-08-31
TWI716378B (en) 2021-01-21
KR20160103531A (en) 2016-09-01
US11205577B2 (en) 2021-12-21

Similar Documents

Publication Publication Date Title
US20220051904A1 (en) Etching method
US20210134604A1 (en) Etching method
US20220181162A1 (en) Etching apparatus
US9735027B2 (en) Method for etching organic film
KR102513051B1 (en) Etching method
US9805945B2 (en) Etching method
US11264246B2 (en) Plasma etching method for selectively etching silicon oxide with respect to silicon nitride
JP6521848B2 (en) Etching method
US20200111679A1 (en) Etching method
WO2017199958A1 (en) Etching method
US9754797B2 (en) Etching method for selectively etching silicon oxide with respect to silicon nitride
US9633864B2 (en) Etching method

Legal Events

Date Code Title Description
STPP Information on status: patent application and granting procedure in general

Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: FINAL REJECTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: ADVISORY ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER