TWI818350B - Analog switch circuit and control circuit and control method thereof - Google Patents

Abstract

An analog switch circuit includes a switch unit and a control circuit, wherein the control circuit includes a sensor circuit and a gate-source voltage adjustment circuit. The switch unit operates a first switch therein according to a first gate-source voltage, to convert an input signal of an input terminal to an output signal of an output terminal. The sensor circuit is coupled between the input terminal and the output terminal, and generates a sense signal according to a voltage difference of the input signal and the output signal. The gate-source voltage adjustment circuit is coupled to the sensor circuit, and adaptively adjusts the first gate-source voltage according to the sense signal, to maintain a conduction resistance of the switch unit at a constant while the voltage difference changes.

Description

Analog switching circuit and its control circuit and control method

The present invention relates to an analog switching circuit, and in particular to an analog switching circuit that can improve harmonic distortion. The present invention also relates to a control method for an analog switching circuit.

FIG. 1 shows a schematic diagram of a prior art analog switching circuit 10 . The analog switch circuit 10 includes a first switch Q1 and a second switch Q2 connected in series between the input signal Vin and the output signal Vout. The first switch Q1 and the second switch Q2 have a channel resistance R0, and when the first switch Q1 and the second switch Q2 operate to convert the input signal Vin into the output signal Vout, the channel resistance changes ΔR. Among them, the change in channel resistance ΔR is related to changes in the input signal Vin and the output signal Vout, as well as changes in ambient temperature, etc. In addition, the analog switching circuit 10 has a parasitic resistance Rp. The output signal Vout is applied to the load resistor RL electrically connected to the ground potential. The output signal Vout can be simply expressed as:

Through Fourier expansion, we can get:

,

in

,

When the input signal Vin is a sinusoidal wave V _in = sin ( 2πft ), we can get:

Therefore, it can be seen that the smaller △R / RL , the gentler the harmonic distortion, and the lower the load resistance RL, the more serious _the harmonic distortion will be. Therefore, under low load (low load resistance RL) conditions, reducing harmonic distortion is a challenging task.

FIG. 2A shows a schematic diagram of an analog switching circuit 20 composed of PMOS/NMOS components. FIG. 2B shows the harmonic distortion of the output signal Vout of the analog switching circuit 20 . In the analog switch circuit 20, since the gate voltages of the PMOS and NMOS devices are both fixed voltages Vg, the gate source voltages of the PMOS and NMOS devices will change as the input signal Vin changes. According to the characteristics of the PMOS/NMOS devices, This also causes the channel resistance of the analog switch circuit 20 to change accordingly, and the change in the channel resistance directly causes the harmonic distortion of the output signal Vout to become serious. The harmonic distortion of the analog switching circuit 20 is shown in FIG. 2B. It can be seen from FIG. 2B that the analog switch circuit 20 composed of PMOS/NMOS components shown in FIG. 2A can only provide low harmonic distortion performance of about -90dB.

FIG. 3A shows a circuit schematic diagram of the analog switch circuit 30 of the prior art. FIG. 3B shows an electrical simulation diagram of the analog switch circuit 30 of the prior art. Figure 3C shows the analog switching circuit The harmonic distortion of the output signal Vout of path 30. As shown in FIG. 3A , a fixed voltage Vgs is provided as the gate-source voltage of the MOS element in the analog switching circuit 30 so that the gate-source voltage of the MOS element does not change as the input voltage Vin changes. However, as shown in Figure 3B, when the gate-source voltage is a fixed voltage Vgs, as the input signal Vin changes, the channel voltage VRon, channel resistance Ron, and load current ILoad will still change greatly. This directly affects the performance of harmonic distortion. As shown in Figure 3C, although the analog switching circuit 30 can provide better harmonic distortion performance (about -110dB) than the analog switching circuit 20 and the analog switching circuit 10, this This architecture still cannot meet current application needs.

It should be noted that the gate-source voltage refers to the voltage difference between the gate and the source, the drain-source voltage refers to the voltage difference between the drain and the source, and the drain-source current refers to the voltage flowing through the drain and source. The current between , the same below.

Compared with the aforementioned prior art, the present invention proposes an analog switching circuit and a control method thereof that adaptively adjust the gate-source voltage through feedback according to changes in channel voltage, so that the channel resistance remains at a fixed value when the channel voltage changes.

From one of the viewpoints, the present invention provides an analog switch circuit, including: a switch unit, including a first switch, coupled to a current path between an input terminal and an output terminal, for controlling the switching operation according to a first gate. a source voltage to convert an input signal of the input terminal into an output signal of the output terminal; and a control circuit including: a sensing circuit coupled between the input terminal and the output terminal, the sensor a sensing circuit for generating a sensing signal based on a voltage difference between the output signal and the input signal; and a gate-source voltage adjustment circuit coupled with the sensing circuit for generating a sensing signal based on the sensing signal The first gate-source voltage is adaptively adjusted so that the on-resistance of the switch unit remains at a fixed value when the voltage difference changes.

From another point of view, the present invention also provides a control circuit for an analog switch circuit, including: a sensing circuit coupled between an input terminal and an output terminal for outputting a signal according to the output terminal. A voltage difference with an input signal at the input terminal generates a sensing signal; and a gate-source voltage adjustment circuit coupled with the sensing circuit for generating and adaptively adjusting according to the sensing signal A first gate source voltage is used to operate a first switch of a switching unit of the analog switching circuit, convert the input signal into the output signal, and cause an on-resistance of the switching unit to change when the voltage difference changes. Still maintained at a fixed value; wherein, the first switch is coupled to the current path between the input terminal and the output terminal.

From another point of view, the present invention also provides a control method for an analog switching circuit, including: operating a first switch of an analog switching circuit according to a first gate source voltage to switch one of the input terminals The input signal is converted into an output signal at an output terminal; a sensing signal is generated according to a voltage difference between the output signal and the input signal; and the first gate source voltage is adaptively adjusted according to the sensing signal, So that the on-resistance of the switch unit is maintained at a fixed value when the voltage difference changes; wherein, the first switch is coupled to the current path between the input terminal and the output terminal.

In a preferred embodiment, the control circuit further includes a voltage dividing circuit coupled between the input terminal and the output terminal for providing a base-source voltage division of the voltage difference, so that the gate source The gate voltage adjustment circuit further adaptively adjusts the first gate-source voltage according to the base-source voltage division.

In a preferred embodiment, the switch unit further includes a second switch, and the first switch and the second switch are coupled in series between the input terminal and the output terminal.

In a preferred embodiment, the relationship between the first gate source voltage and the voltage difference is as follows: Vgs=Vgs1+K×Vdif

Among them, Vgs is the first gate source voltage, Vgs1 is a fixed voltage, Vdif is the voltage difference, and K is a parameter; where the parameter is a real number greater than 1.

In a preferred embodiment, the gate-source voltage adjustment circuit further generates a second gate-source voltage according to the sensing signal to control the second switch, so that the on-resistance remains unchanged when the voltage difference changes. maintained at this fixed value.

In a preferred embodiment, the control circuit further includes a voltage dividing circuit coupled between the input terminal and the output terminal for providing a base-source voltage division of the voltage difference, so that the gate source The gate voltage adjustment circuit further adaptively adjusts the first gate-source voltage according to the base-source voltage division.

In a preferred embodiment, the sensing circuit includes: an amplifying circuit having a first input terminal and a second input terminal respectively coupled to the input terminal and the output terminal, the amplifying circuit uses negative feedback Control to adjust the voltages of the first input terminal and the second input terminal to the same level; a first resistor, coupled between the first input terminal and the input terminal; and a second resistor, coupled Between the second input terminal and the output terminal; the amplification circuit generates an amplification current, and the sensing signal is proportional to the amplification current.

In a preferred embodiment, the sensing circuit further includes a current mirror circuit for replicating and amplifying the amplified current to generate the sensing signal.

In a preferred embodiment, the amplifier circuit includes a first super source follower.

In a preferred embodiment, the gate-source voltage adjustment circuit includes a first impedance circuit coupled between a first gate of the first switch and a first source to adjust the voltage according to the sensing signal to adaptively adjust the first gate source voltage.

In a preferred embodiment, the gate-source voltage adjustment circuit further includes: a second super source follower, coupled between the sensing circuit and the first impedance circuit, for controlling the One of the sensing signals is a sensing current and a fixed current to generate a sum of two currents; and a second An impedance circuit is coupled to the second super source follower; wherein the two summed currents flow through the first impedance circuit and the second impedance circuit respectively to adaptively adjust the first gate source voltage.

In a preferred embodiment, the first switch includes a first metal oxide semiconductor (MOS) device, and the voltage difference is related to the source-drain voltage of the first MOS device, and the on-resistance is related to The channel resistance when the first MOS element is turned on; wherein the sensing signal is proportional to the source-drain current when the first MOS element is turned on; wherein the gate-source voltage adjustment circuit adaptively adjusts the third gate-source voltage adjustment circuit according to changes in the voltage difference. A gate source voltage is used to maintain the channel resistance at the fixed value when the first MOS element is turned on.

In a preferred embodiment, the first switch includes a first metal oxide semiconductor (MOS) device, the second switch includes another MOS device, and the voltage difference is related to the voltage difference between the first MOS device and the first MOS device. The sum of the source-drain voltage and the source-drain voltage of the second MOS element; wherein, the on-resistance is related to the sum of the channel resistance when the first MOS element is turned on and the channel resistance when the second MOS element is turned on; where The sensing signal is proportional to the source-drain current when the first MOS element is turned on; wherein the gate-source voltage adjustment circuit adaptively adjusts the first gate-source voltage according to the voltage difference change to maintain the channel resistance. summed to this fixed value.

It will be easier to understand the purpose, technical content, characteristics and achieved effects of the present invention through detailed description of specific embodiments below.

10,20,40,50,60,70,80,90,100: Analog switching circuit

41,81,101: Switch unit

42,52,62,82,102:Control circuit

43,63,83,103: Sensing circuit

45,65,85,105: Gate-source voltage adjustment circuit

57,77,97,107: Voltage dividing circuit

631,1031: Amplification circuit

633,1033,1034: Current mirror circuit

651: Adjustment signal generation circuit

852: Second adjustment circuit

1051:Super source follower

1053: First impedance circuit

1055: Second impedance circuit

Ib: fixed current

ILoad: load current

Isen: sensing current

K, K1: parameters

M1, M2, M3, M6, M7, M8: switching elements

M4, M5, M9, M10: Resistive elements

N1: first input terminal

N2: second input terminal

N3: The third input terminal

N4: The fourth input terminal

Q1: First switch

Q2: Second switch

Q11, Q12, Q21, Q22: switch

R0: channel resistance

R1: first resistor

R2: second resistor

R3, R4, Rbs, Rbs’, Rfod: resistance

RL: load resistance

Ron: channel resistance

Rp: parasitic resistance

Ssen: sensing signal

T1: input terminal

T2: Output terminal

V1, V2, V3, V4: voltage

Vc1: fixed voltage

Vdif: voltage difference

Vg, Vgs: voltage

Vg1: first gate voltage

Vg2: second gate voltage

Vgs1: first gate source voltage

Vgs2: second gate source voltage

Vin: input signal

Vout: output signal

VRon: channel voltage

VS: voltage source

△R: Channel resistance change

FIG. 1 shows a schematic diagram of a prior art analog switching circuit 10 .

FIG. 2A shows a schematic diagram of a prior art analog switching circuit 20 composed of PMOS/NMOS components.

FIG. 2B shows the harmonic distortion of the output signal Vout of the analog switching circuit 20 .

FIG. 3A shows a schematic diagram of a prior art analog switching circuit 30 .

FIG. 3B shows an electrical simulation diagram of the analog switch circuit 30 of the prior art.

FIG. 3C shows the harmonic distortion of the output signal Vout of the analog switching circuit 30 of the prior art.

FIG. 4A shows a schematic diagram of an analog switching circuit 40 according to the present invention.

FIG. 4B shows the simulation results of the harmonic distortion of the output signal Vout of the analog switching circuit according to the present invention.

FIG. 5 shows a schematic diagram of an analog switching circuit 50 according to the present invention.

FIG. 6 shows a schematic diagram of a more specific embodiment of the analog switch circuit 60 according to the present invention.

FIG. 7 shows a schematic diagram of an analog switching circuit 70 according to the present invention.

FIG. 8 shows a schematic diagram of an analog switching circuit 80 according to the present invention.

FIG. 9 shows a schematic diagram of an analog switching circuit 90 according to the present invention.

FIG. 10 shows a schematic diagram of an analog switching circuit 100 according to the present invention.

FIG. 11 shows a schematic diagram of a more specific embodiment of the sensing circuit 103 according to the present invention.

12A-12E show Fast Fourier Transform (FFT) simulation results of the harmonic distortion of the output signal Vout of the analog switching circuit according to the present invention.

The diagrams in the present invention are schematic and are mainly intended to represent the coupling relationship between circuits and the relationship between signal waveforms. The circuits, signal waveforms and frequencies are not drawn to scale.

FIG. 4A shows a schematic diagram of an analog switching circuit 40 according to the present invention. FIG. 4B shows the simulation results of the harmonic distortion of the output signal Vout of the analog switching circuit according to the present invention. The analog switch circuit 40 includes a switch unit 41 and a control circuit 42 . The control circuit 42 includes a sensing circuit 43 and a gate-source voltage adjustment circuit 45 . As shown in FIG. 4A , the switch unit 41 is used to operate the first switch Q1 according to the first gate-source voltage Vgs1 to convert the input signal Vin of the input terminal T1 into the output signal Vout of the output terminal T2 . The sensing circuit 43 is coupled between the input terminal T1 and the output terminal T2. The sensing circuit 43 is used to generate the sensing signal Ssen according to the voltage difference between the input signal Vin and the output signal Vout. The gate-source voltage adjustment circuit 45 is coupled to the sensing circuit 43 for adaptively adjusting the first gate-source voltage Vgs1 according to the sensing signal Ssen, so that the on-resistance of the switching unit 41 is maintained at the value when the voltage difference changes. Fixed value.

In this embodiment, the first switch Q1 is, for example, an N-type metal oxide semiconductor (MOS) device. Wherein, the aforementioned voltage difference is related to the source-drain voltage of the N-type MOS element, and the aforementioned on-resistance is related to the channel resistance when the N-type MOS element is turned on. In one embodiment, the voltage difference is equal to the source-drain voltage of the N-type MOS element, and the on-resistance is equal to the channel resistance of the N-type MOS element when it is turned on. Among them, the sensing signal Ssen is proportional to the source-drain current when the MOS element is turned on. Among them, the gate-source voltage adjustment circuit 45 adaptively adjusts the first gate-source voltage Vgs1 according to the aforementioned voltage difference change, that is, the change in the source-drain voltage of the N-type MOS element, so as to maintain the conduction of the N-type MOS element. When the channel resistance is at a fixed value. For example, as shown in Figure 4A, the first gate source voltage Vgs1 is equal to the fixed voltage Vc1 plus the parameter K multiplied by the sensing signal Ssen, where the parameter K can be a fixed constant or an adjustable variable. Set or adjust according to user needs or harmonic distortion conditions.

It should be noted that, in addition to being coupled to the sensing circuit 43 , the gate-source voltage adjustment circuit 45 has an output coupled between the gate and the source of the MOS element in the first switch Q1 . For N-type MOS devices, when the voltage difference between the voltage level of the input signal Vin minus the voltage level of the output signal Vout is positive, as shown in FIG. 4A , the gate-source voltage adjustment circuit 45 is coupled to the MOS between the gate of the component and the output terminal T2; and when the voltage difference between the voltage level of the input signal Vin minus the voltage level of the output signal Vout is negative, the gate-source voltage adjustment circuit 45 is coupled to the MOS component between the gate and input terminal T1 (not shown). A selection switch can also be coupled between an output terminal of the gate-source voltage adjustment circuit 45 and the output terminal T2 and the input terminal T1, depending on the voltage level of the input signal Vin minus the voltage level of the output signal Vout. The positive and negative voltage difference is switched, so that the output of the gate-source voltage adjustment circuit 45 is coupled between the gate and the source of the MOS device.

In an analog switch circuit using a MOS element as the first switch Q1, in order to improve the previous technology, because the on-resistance, that is, the channel resistance when the MOS element is turned on, when the input signal and the output signal change, the channel resistance changes △ R also changes accordingly, resulting in harmonic distortion. The present invention achieves the goal of maintaining the channel resistance unchanged by sensing the change in voltage difference between the input end and the output end, and feedback adjusting the gate-source voltage of the MOS element. This embodiment achieves the goal of controlling the channel resistance by changing the voltage between the gate and the source of the MOS device (the first gate-source voltage Vgs1). As shown in FIG. 4A , this embodiment uses feedback to control the gate-source voltage of the MOS device (the first gate-source voltage Vgs1 ) through the voltage difference between the input terminal T1 and the output terminal T2 to reduce changes in channel resistance. The voltage difference between the gate and the source (in this embodiment, the first gate-source voltage Vgs1) can be determined by the fixed voltage Vc1 and the sensing signal Ssen to adaptively adjust the voltage between the gate and the source. difference (the first gate source voltage Vgs1), thereby achieving the goal. The sensing signal Ssen is related to the voltage difference between the output signal Vin and the input signal Vout. In this embodiment, the sensing signal Ssen is related to the voltage change between the drain and the source of the MOS element. The simulation results are shown in Figure 4B As shown, according to the simulation results of this embodiment, high-order harmonic distortion can be greatly reduced if correctly compensated.

FIG. 5 shows a schematic diagram of an analog switching circuit 50 according to the present invention. In this embodiment, the difference between the analog switch circuit 50 and the analog switch circuit 40 shown in FIG. 4A is that in the analog switch circuit 50, the control circuit 52, in addition to the sensing circuit 43 and the gate-source voltage adjustment circuit 45, It also includes a voltage dividing circuit 57. The voltage dividing circuit 57 is coupled between the input terminal T1 and the output terminal T2 and is used to divide the voltage difference between the output signal Vin and the input signal Vout to generate a base-source voltage division of the first switch Q1 so that the gate The source voltage adjustment circuit 45 further adaptively adjusts the first gate source voltage Vgs1 according to the base-source voltage division. The base-source divided voltage refers to the divided voltage provided by the resistor Rbs between the bulk and the source of the MOS element in the first switch Q1 in the voltage dividing circuit 57 . As shown in FIG. 5 , the gate-source voltage adjustment circuit 45 can be coupled between the substrate and the gate. In this way, regardless of the voltage level of the input signal Vin minus the voltage level of the output signal Vout, the voltage difference Is positive or negative, the gate-source voltage adjustment circuit 45 does not need to change the electrical connection to the input terminal T1 or the output terminal T2, and can adaptively adjust the first gate-source voltage Vgs1 so that the on-resistance of the switch unit 41 is equal to the voltage When the difference changes, it remains at a fixed value, thereby improving harmonic distortion.

As shown in Figure 5, in this embodiment, the first gate source voltage Vgs1 is equal to the fixed voltage Vc1 plus the parameter K multiplied by the sensing signal Ssen and the aforementioned base-source voltage division: Vgs1=Vc1+(K×Ssen) +V3-Vout (in this embodiment, the base-source voltage divider is V3-Vout)

Consider that the sensing signal Ssen is equal to the input signal Vin minus the output signal Vout, and is derived as follows: Vgs1=Vc1+(K×Ssen)+V3-Vout

Vgs1=Vc1+(K×Ssen)+D×(Vin-Vout)

Among them, D=Rbs/(Rbs+Rbs'), the resistance Rbs' is the resistance Rbs' between the substrate electrode and the drain electrode of the MOS element in the first switch Q1, that is to say, D is Rbs and the entire voltage dividing resistor String ratio.

The voltage V3 is the substrate electrode voltage of the first switch Q1.

Vgs1=Vc1+K×(Vin-Vout)+D×(Vin-Vout)=Vc1+K ' ×(Vin-Vout)=Vc1+K ' ×Vdif

where K' = K + D

Vdif=Vin-Vout

That is to say, in this embodiment, the gate-source voltage adjustment circuit 45 generates the sensing signal Ssen based on the voltage difference between the output signal Vin and the input signal Vout (in one embodiment, the sensing signal Ssen is equal to the input signal Vin minus the output signal Vout), a feedback control method is used to generate and adaptively adjust the first gate source voltage Vgs1, so that the on-resistance of the switch unit 41 remains at a fixed value when the voltage difference changes.

In one embodiment, parameter K is a real number greater than 1. The advantage of the parameter K being greater than 1 is that the gate-source voltage adjustment circuit 45 is not limited to a voltage dividing circuit composed of passive components such as resistors, and is divided by the voltage difference Vdif between the input voltage Vin and the output voltage Vout. Adjust the first gate source voltage Vgs1; according to the embodiment of the present invention, the first gate source voltage Vgs1 can be adjusted through active feedback control by sensing the voltage difference Vdif, thereby more accurately maintaining the on-resistance of the switching unit 41 at a fixed value.

FIG. 6 shows a schematic diagram of a more specific embodiment of the analog switch circuit 60 according to the present invention. In this embodiment, the analog switch circuit 60 includes a switch unit 41 and a control circuit 62 . The control circuit 62 includes: a sensing circuit 63 and a gate-source voltage adjustment circuit 65 . As shown in Figure 6 As shown, the switch unit 41 is used to operate the first switch Q1 according to the first gate-source voltage Vgs1 to convert the input signal Vin of the input terminal T1 into the output signal Vout of the output terminal T2. The sensing circuit 63 is coupled between the input terminal T1 and the output terminal T2. The sensing circuit 63 is used to generate the sensing signal Ssen according to the voltage difference Vdif between the input signal Vin and the output signal Vout. As shown in FIG. 6 , the sensing signal Ssen is, for example, the current K1*Isen. The gate-source voltage adjustment circuit 65 is coupled to the sensing circuit 63 for adaptively adjusting the first gate-source voltage Vgs1 according to the sensing signal Ssen, so that the on-resistance of the switching unit 41 is maintained when the voltage difference Vdif changes. at a fixed value. As shown in FIG. 6 , in one embodiment, considering that the value of parameter K1 is 1, the sensing signal Ssen is, for example, the sensing current Isen. The adjustment signal generation circuit 651 receives the sensing current Isen and generates the current K*Isen flow. Through resistor R3, a voltage difference K*Isen*R3 is generated. Then Vgs1=Vc1+K*Isen*R3.

This embodiment shows a more specific embodiment of the sensing circuit 63 . As shown in FIG. 6 , the sensing circuit 63 includes an amplifier circuit 631 , a current mirror circuit 633 , a first resistor R1 and a second resistor R2 . The amplifier circuit 631 has a first input terminal N1 and a second input terminal N2, which are coupled to the input terminal T1 and the output terminal T2 respectively. The amplifier circuit 631 uses negative feedback control to adjust the voltages of the first input terminal N1 and the second input terminal N2 to the same level. The first resistor R1 is coupled between the first input terminal T1 and the input terminal N1. The second resistor R2 is coupled between the second input terminal N2 and the output terminal T2. The amplifier circuit 631 generates the sensing current Isen, and the sensing signal Ssen is proportional to the sensing current Isen. The current mirror circuit 633 is used to copy the sensing current Isen to generate a sensing signal. In this embodiment, the current mirror circuit 633 amplifies the parameter K1 times according to the sensing current Isen, and generates the current K1*Isen, which is used as the sensing signal Ssen. Among them, the amplifier A1 in the amplifier circuit 631 can be implemented in various ways, and its specific embodiments will be described in detail later.

The gate source voltage adjustment circuit 65 is coupled to the sensing circuit 63 for adaptively adjusting the first gate source voltage Vgs1 according to the current K1*Isen as the sensing signal Ssen, so that the on-resistance of the switching unit 41 is equal to the voltage The difference Vdif remains at a fixed value when changing.

In this embodiment, the gate-source voltage adjustment circuit 65 includes an adjustment signal generation circuit 651, a voltage source VS and a resistor R3. In this embodiment, the adjustment signal generating circuit 651 generates a current K*Isen flowing through the resistor R3 according to the current K1*Isen, thereby generating a voltage difference K*Isen*R3. Therefore, the first gate source voltage Vgs1 is equal to the fixed voltage Vc1 plus the voltage difference K*Isen*R3. The current K*Isen is related to the voltage difference Vdif between the input signal Vin and the output signal Vout. Therefore, the adjustment signal generation circuit 651 can adaptively adjust the first gate source voltage Vgs1 according to the voltage difference Vdif, so that the on-resistance of the switching unit 41 is within The voltage difference Vdif remains at a fixed value when changing. The resistor R3 is coupled between the gate and the source of the first switch Q1 to adaptively adjust the first gate-source voltage Vgs1 according to the sensing signal.

As shown in FIG. 6 , the two current sources each provide a fixed current Ib, and the two fixed currents Ib flow through the first resistor R1 and the second resistor R2 respectively. The voltage difference across the first resistor R1 is voltage V1; the voltage difference across the second resistor R2 is voltage V2. The amplifier circuit 631 uses negative feedback control to adjust the voltages of the first input terminal N1 and the second input terminal N2 to the same level, and considers the channel resistance Ron of the first switch Q1 and the voltage flowing through the first switch Q1. The output current Iout, and considering that R1 is equal to R2, the negative feedback control of the amplifier circuit 631 is as follows: V1+Iout×Ron=V2

Ib×R1+Iout×Ron=Isen×R2+Ib×R2

Ib×R1+Iout×Ron=Isen×R1+Ib×R1

Therefore, the first gate source voltage Vgs is as follows:

Considering that R3 is equal to R1, the first gate source voltage Vgs1 is as follows:

Vgs1=Vc1+K×Iout×Ron

Vgs1=Vc1+K×Vdif

The results show that the sensing circuit 63 of this embodiment adjusts the voltages of the first input terminal N1 and the second input terminal N2 to the same level through negative feedback control to generate a sensing current Isen; where the sensing current Isen Correlated to the voltage difference Vdif between the input signal Vin and the output signal Vout; the gate-source voltage adjustment circuit 65 adaptively adjusts the first gate-source voltage Vgs1 according to the sensing current Isen, so that the on-resistance of the switching unit 41 changes with the voltage difference. The effect is still maintained at a fixed value.

In a preferred embodiment, as shown in FIG. 6 , the amplifying circuit 631 includes a super source follower. In a preferred embodiment, parameter K is a real number greater than 1.

FIG. 7 shows a schematic diagram of an analog switching circuit 70 according to the present invention. In this embodiment, the difference between the analog switch circuit 70 and the analog switch circuit 60 shown in FIG. 6 is that in the analog switch circuit 70, in addition to the sensing circuit 63 and the gate-source voltage adjustment circuit 65, the control circuit 62 also has It also includes a voltage dividing circuit 77. The voltage dividing circuit 77 is coupled between the input terminal T1 and the output terminal T2, and is used to provide base-source voltage division of the first switch Q1 by the voltage difference Vdif between the output signal Vin and the input signal Vout, so that the gate-source voltage is adjusted. The circuit 65 further adaptively adjusts the first gate-source voltage Vgs1 according to the base-source voltage division. In addition, as shown in FIG. 7 , the gate-source voltage adjustment circuit 65 can be coupled between the substrate and the gate. In this way, regardless of the voltage level of the input signal Vin minus the voltage level of the output signal Vout The difference is positive or negative, the gate-source voltage adjustment circuit 65 does not need to change the electrical connection to the input terminal T1 or the output terminal T2, and can adaptively adjust the first gate-source voltage Vgs1, so that the on-resistance of the switch unit 41 is within The voltage difference remains at a fixed value when changing, thereby improving harmonic distortion.

FIG. 8 shows a schematic diagram of an analog switching circuit 80 according to the present invention. The analog switch circuit 80 includes a switch unit 81 and a control circuit 82 . The control circuit 82 includes: a sensing circuit 83 and a gate-source voltage adjustment circuit 85 . As shown in Figure 8, the switch unit 81 is used to control the first gate source The voltage Vgs1 and the second gate-source voltage Vgs2 operate the first switch Q1 and the second switch Q2 correspondingly to convert the input signal Vin of the input terminal T1 into an output signal Vout of the output terminal T2. The sensing circuit 83 is coupled between the input terminal T1 and the output terminal T2. The sensing circuit 83 is used to generate the sensing signal Ssen according to the voltage difference between the output signal Vin and the input signal Vout. The gate-source voltage adjustment circuit 85 is coupled to the sensing circuit 83 and is used to adaptively adjust the first gate-source voltage Vgs1 according to the sensing signal Ssen, so that the on-resistance of the switching unit 81 remains constant when the voltage difference changes. Fixed value.

In this embodiment, the difference between the analog switch circuit 80 and the analog switch circuit 40 shown in FIG. 4A is that in the analog switch circuit 80 , the switch unit 81 further includes a second switch Q2 in addition to the first switch Q1. The first switch Q1 and the second switch Q2 are coupled in series between the input terminal T1 and the output terminal T2.

In one embodiment, as shown in FIG. 8 , the gate-source voltage adjustment circuit 85 may further include a second adjustment circuit 852 . The second adjustment circuit 852 generates the second gate-source voltage Vgs2 according to the sensing signal Ssen (indicated by the dotted arrow in Figure 8) to control the second switch Q2, so that the on-resistance remains constant when the voltage difference changes. Fixed value. In one embodiment, the second gate source voltage Vgs2 is a fixed value.

In this embodiment, as shown in FIG. 8 , the first switch Q1 includes, for example, a first metal oxide semiconductor (MOS) element, which is an N-type MOS element, for example; the second switch Q2 includes a second MOS element, It is an N-type MOS element, for example. Wherein, the aforementioned voltage difference is related to the sum of the source-drain voltage of the first MOS element and the source-drain voltage of the second MOS element; the aforementioned on-resistance is related to the channel resistance when the first MOS element is turned on and when the second MOS element is turned on. The sum of channel resistances.

In one embodiment, the voltage difference is equal to the sum of the source-drain voltage of the first MOS element and the source-drain voltage of the second MOS element; the on-resistance is equal to the channel resistance of the first MOS element when it is turned on and the channel resistance of the second MOS element. The total channel resistance when turned on. Among them, feeling The measurement signal Ssen is proportional to the source-drain current when both the first MOS element and the second MOS element are turned on. Among them, the gate-source voltage adjustment circuit 85 adaptively adjusts the first gate source according to the aforementioned voltage difference change, that is, the change in the sum of the source-drain voltage of the first MOS element and the source-drain voltage of the second MOS element. pole voltage Vgs1 to maintain the on-resistance at a fixed value. For example, as shown in Figure 8, the first gate source voltage Vgs1 is equal to the fixed voltage Vc1 plus the parameter K multiplied by the sensing signal Ssen, where the parameter K can be a fixed constant or an adjustable variable. Set or adjust according to user needs or harmonic distortion conditions.

FIG. 9 shows a schematic diagram of an analog switching circuit 90 according to the present invention. The analog switch circuit 90 includes a switch unit 81 and a control circuit 92 . Among them, the control circuit 92 includes: a sensing circuit 83, a gate-source voltage adjustment circuit 85 and a voltage dividing circuit 97. As shown in FIG. 9 , the switch unit 81 is used to operate the first switch Q1 and the second switch Q2 correspondingly according to the first gate source voltage Vgs1 and the second gate source voltage Vgs2 to switch the input of the input terminal T1 The signal Vin is converted into the output signal Vout of the output terminal T2. The sensing circuit 83 is coupled between the input terminal T1 and the output terminal T2. The sensing circuit 83 is used to generate the sensing signal Ssen according to the voltage difference between the output signal Vin and the input signal Vout. The gate-source voltage adjustment circuit 85 is coupled to the sensing circuit 83 and is used to adaptively adjust the first gate-source voltage Vgs1 according to the sensing signal Ssen, so that the on-resistance of the switching unit 81 remains constant when the voltage difference changes. Fixed value. The voltage dividing circuit 97 is coupled between the input terminal T1 and the output terminal T2, and is used to divide the voltage difference between the output signal Vin and the input signal Vout to generate a base-source voltage division of the first switch Q1, so that the gate The source voltage adjustment circuit 85 further adaptively adjusts the first gate source voltage Vgs1 according to the base-source voltage division. In this embodiment, the second gate source voltage Vgs2 may be a certain value, for example.

FIG. 10 shows a schematic diagram of an analog switching circuit 100 according to the present invention. The analog switch circuit 100 includes a switch unit 101 and a control circuit 102 . Among them, the control circuit 102 includes: a sensing circuit 103, a gate-source voltage adjustment circuit 105 and a voltage dividing circuit 107. As shown in FIG. 10 , the switch unit 101 is used to operate its corresponding operation according to the first gate source voltage Vgs1 and the second gate source voltage Vgs2. The first switch Q1 and the second switch Q2 are used to convert the input signal Vin of the input terminal T1 into the output signal Vout of the output terminal T2. The sensing circuit 103 is coupled between the input terminal T1 and the output terminal T2. The sensing circuit 103 is used to generate the sensing signal Ssen according to the voltage difference Vdif between the output signal Vin and the input signal Vout. The gate-source voltage adjustment circuit 105 is coupled to the sensing circuit 103 for adaptively adjusting the first gate-source voltage Vgs1 according to the sensing signal Ssen, so that the on-resistance of the switching unit 101 is maintained when the voltage difference Vdif changes. at a fixed value.

It should be noted that the first gate voltage Vg1 shown in Figure 10 is the voltage difference between the gate of the first switch Q1 (an N-type MOS element in this embodiment) and the ground potential; the second gate voltage Vg2 is the voltage difference between the gate of the second switch Q2 (an N-type MOS device in this embodiment) and the ground potential. As shown in Figure 10, the input voltage Vin and the output voltage Vout are relative to the ground potential.

In this embodiment, the switch unit 101 includes a first switch Q1 and a second switch Q2. The first switch Q1 and the second switch Q2 are coupled in series between the input terminal T1 and the output terminal T2. As shown in Figure 10, in one embodiment, the second switch Q2 is an N-type MOS device and is operated by the second gate voltage Vg2. The first switch Q1 is an N-type MOS component and is operated by the first gate voltage Vg1.

In one embodiment, considering Vin>Vout, the sources of the first switch Q1 and the second switch Q2 are both on the right, close to the output voltage Vout side.

Among them, the gate-source voltage Vgs2 of the second switch Q2 is: Vgs2=2Ib×2Rfod+VR5

Among them, the gate-source voltage Vgs1 of the first switch Q1 is: Vgs1=(2Ib+Isen)×2Rfod+VR7

When the resistance values of R4~R7 are equal

Among them, |Vds2|+|Vds1|=|Vout-Vin|, the absolute value is the case where Vin<Vout and Vin>Vout are considered at the same time.

Among them, VR5 is the voltage difference across the resistor R5; VR7 is the voltage difference across the resistor R7; Vds1 is the drain-source voltage of the first switch Q1, and Vds2 is the drain-source voltage of the second switch Q2.

The second gate source voltage Vgs2 is the voltage drop of the two resistors Rfod plus the base-source voltage division of the second switch Q2 (assuming Vin>Vout, the source is on the right side close to the output voltage Vout side, and the base-source voltage division is the resistor The voltage drop on R5, and the positive terminal is at the base; if Vin<Vout, the source will be on the left side close to the input voltage Vin, and the base-source voltage divider is the voltage drop on resistor R4, and the positive terminal is at the base).

The gate-source voltage Vgs2 of the second switch Q2 is the second gate voltage Vg2 minus the input voltage Vin (when the input voltage Vin < the output voltage Vout); or the second gate voltage Vg2 minus the voltage V4 (where the voltage V4 is The voltage of the contact point between resistors R5 and R6) (when the input voltage Vin>the output voltage Vout).

The gate-source voltage Vgs1 of the first switch Q1 is the first gate voltage Vg1 minus the voltage V4 (when the input voltage Vin<the output voltage Vout); or the first gate voltage Vg1 minus the output voltage Vout (when the input voltage Vin> output voltage Vout).

But if R4~R7 are all equal, it will be as shown in the above formula with absolute value.

As shown in Figure 10, in addition to the four resistors R4 connected in series between the input terminal T1 and the output terminal T2, the voltage dividing circuit 107 also includes switches Q11, Q12, Q21 and Q22 for controlling the switches Q1 and Q2. When it is non-conductive, the current path of the input signal Vin electrically connected to the output signal Vout through the voltage dividing resistors R4~R7 is also turned off. The switch Q11 is coupled between the source and the base of the first switch Q1; the switch Q12 is coupled between the drain and the base of the first switch Q1; the switch Q21 is coupled between the source and the base of the second switch Q2. between the poles; the switch Q22 is coupled between the drain and the base of the second switch Q2. The switches Q11 and Q12 are controlled by the first gate voltage Vg1; the switches Q21 and Q22 are controlled by the second gate voltage Vg2. The switches Q11, Q12, Q21 and Q22 are used to prevent the first gate voltage Vg1 and the second gate voltage Vg2 from switching to the level of the non-conducting switches Q1 and Q2. The input signal Vin of the input terminal T1 is converted to The output signal Vout of the output terminal T2.

This embodiment shows a more specific embodiment of the gate-source voltage adjustment circuit 105. As shown in FIG. 10 , the gate-source voltage adjustment circuit 105 includes a super source follower 1051 , a first impedance circuit 1053 , and a second impedance circuit 1055 . The super source follower 1051 is coupled between the sensing circuit 103 and the first impedance circuit 1053 for generating two sums according to the sensing current Isen and the fixed currents Ib and 2Ib related to the sensing signal Ssen. Current 2Ib+Isen. The first impedance circuit 1053 is coupled between the gate and the source of the first switch Q1 and is used to adaptively adjust the first gate-source voltage Vgs1 according to the sensing signal Isen. The second impedance circuit 1055 is coupled to the super source follower 1051 . Among them, the sum of two currents 2Ib+Isen flows through the first impedance circuit 1053 and the second impedance circuit 1055 respectively, and the first gate source voltage Vgs1 is adaptively adjusted.

In this embodiment, the super source follower 1051 is on the lower side in FIG. 10 , and the two transistors whose gates are coupled to each other can correspond to the amplifiers in the amplifying circuits of FIGS. 6 and 7 .

FIG. 11 shows a schematic diagram of a more specific embodiment of the sensing circuit 103 according to the present invention. As shown in Figure 11, in this embodiment, the switching elements M1, M2, and M3 are used to form a super source follower as an amplifier circuit 1031 with feedback control (please refer to the amplifier circuit 631 in Figure 6) . Among them, through the negative feedback path provided by the switching element M3, the source of the switching element M1 (the first input terminal N1) and the source of the switching element M2 (the second input terminal N2) are adjusted to the same voltage. The resistive elements M4 and M5 are, for example, field oxide devices, used as resistors (please refer to the first resistor R1 and the second resistor R2 in FIG. 6 ). In this embodiment, the channel resistance Ron is used to represent the on-resistance of the switch unit. Therefore, the amplifier circuit 1031 generates the sensing current Isen according to the voltage difference Vdif generated by the output current Iout flowing through the channel resistor Ron.

The switching elements M6, M7, and M8 are used to form another super source follower as an amplifier circuit 1032 with feedback control. Among them, through the negative feedback path provided by the switching element M8, the source of the switching element M6 (the third input terminal N3) and the source of the switching element M7 (the fourth input terminal N4) are adjusted to the same voltage. The resistive elements M9 and M10 are, for example, field oxidation elements and are used as resistive elements. The amplifying circuit 1032 is used as an amplifying circuit with feedback control when the input signal Vin is smaller than the output signal Vout, so that the sensing circuit 103 can operate regardless of whether the input signal Vin is not smaller than or smaller than the output signal Vout. Specifically, when the input signal Vin is not less than the output signal Vout, the amplifying circuit 1031 generates the sensing current Isen according to the voltage difference Vdif generated by the output current Iout flowing through the channel resistor Ron. When the input signal Vin is smaller than the output signal Vout, the amplifying circuit 1032 generates a sensing current Isen according to the voltage difference Vdif generated by the output current Iout flowing through the channel resistor Ron.

In addition to the amplifying circuits 1031 and 1032 and the resistive elements M4, M5, M9, and M10, the sensing circuit 103 further includes current mirror circuits 1033 and 1034. For example, but not limited to, the current mirror circuits 1033 and 1034 amplify the sensing current Isen by one time and generate the same sensing current Isen as the sensing signal Ssen. Of course, the magnification ratio of the current mirror circuits 1033 and 1034 is not limited to 1:1, and may also be K times other than 1.

Considering that the magnification of the current mirror circuits 1033 and 1034 is 1, and the resistance values of the resistor elements M4, M5, M9, and M10 are all resistors Rfod, the sensing current Isen is derived as follows: Rfod ×2 Ib + Ron | Iout |= Rfod × Isen + Rfod ×2 Ib

Therefore, the sensing current Isen used to represent the sensing signal Ssen is proportional to the voltage difference Vdif generated by the output current Iout of the channel resistor Ron.

12A-12E show Fast Fourier Transform (FFT) simulation results of the harmonic distortion of the output signal Vout of the analog switching circuit according to the present invention. As shown in Figures 12A-12E, the harmonic distortion above the second order (inclusive) of the FFT according to the embodiment of the present invention can be lower than -110dB, which is better than the prior art. In Figures 12A-12E, the horizontal axis represents the frequency of the input signal Vin and the output signal Vout. As shown in Figures 12A-12E, the harmonic distortion of the second order (inclusive) and above of the FFT according to the embodiment of the present invention is at the signal frequency of 1KHz, 3KHz, 5KHz, 10KHz, and 0.1KHz. The harmonic distortion according to the embodiment of the present invention is Wave distortion can be lower than -110dB.

The present invention has been described above with reference to the preferred embodiments. However, the above description is only to make it easy for those familiar with the art to understand the content of the present invention, and is not intended to limit the scope of rights of the present invention. The various embodiments described are not limited to single application, but can also be used in combination. For example, two or more embodiments can be used in combination, and part of the components in one embodiment can also be used to replace those in another embodiment. Corresponding components. For example, the gate-source voltage adjustment circuit 105 shown in FIG. 10 can also be applied to the embodiments shown in FIGS. 4A, 5, 6, 7, 8, and 9. In addition, under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations. For example, the present invention refers to "processing or computing according to a certain signal or generating a certain output result", which is not limited to Depending on the signal itself, it also includes performing voltage-to-current conversion, current-to-voltage conversion, and/or ratio conversion on the signal when necessary, and then processing or calculating the converted signal to produce an output result. It can be seen from this that under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations. There are many combinations, and they are not listed here. Accordingly, the scope of the present invention is intended to cover the above and all other equivalent changes.

40: Analog switching circuit

41:Switch unit

42:Control circuit

43: Sensing circuit

45: Gate-source voltage adjustment circuit

K: parameter

Q1: First switch

Ssen: sensing signal

T1: input terminal

T2: Output terminal

Vgs1: first gate source voltage

Vc1: fixed voltage

Vin: input signal

Vout: output signal

Claims (29)

An analog switching circuit includes: a switching unit, including a first switch, coupled on the current path of an input terminal and an output terminal, for switching the input terminal according to a first gate source voltage. An input signal is converted into an output signal of the output terminal; and a control circuit includes: a sensing circuit coupled between the input terminal and the output terminal, the sensing circuit is used to interact with the output signal according to the output signal. A voltage difference of the input signal generates a sensing signal; and a gate source voltage adjustment circuit is coupled to the sensing circuit to generate and adaptively adjust the first gate source according to the sensing signal. voltage, so that the on-resistance of the switch unit remains at a fixed value when the voltage difference changes; wherein the gate-source voltage adjustment circuit includes a first impedance circuit coupled to a first resistance of the first switch. Between the gate and a first source, it is used to adaptively adjust the first gate source voltage according to the sensing signal; wherein the sensing circuit includes: an amplifier circuit having a first input terminal and a first Two input terminals; a first resistor coupled between the first input terminal and the input terminal; and a second resistor coupled between the second input terminal and the output terminal; wherein the amplifier circuit is Negative feedback control regulates the voltages of the first input terminal and the second input terminal at the same level; the amplification circuit generates an amplification current, and the sensing signal is proportional to the amplification current. The analog switching circuit as claimed in claim 1, wherein the control circuit further includes a voltage dividing circuit coupled between the input terminal and the output terminal for providing a base-source voltage division of the voltage difference, The gate-source voltage adjustment circuit further adaptively adjusts the first gate-source voltage according to the base-source voltage division. The analog switch circuit of claim 1, wherein the switch unit further includes a second switch, the first switch and the second switch are coupled in series between the input terminal and the output terminal. The analog switching circuit as described in claim 1, wherein the relationship between the first gate source voltage and the voltage difference is as follows: Vgs1=Vc1+α×Vdif, where the first gate source voltage Vgs1 is equal to a fixed voltage Vc1 and The voltage difference Vdif is multiplied by the sum of a coefficient α ; where the coefficient α is a real number greater than 1. The analog switching circuit as described in claim 3, wherein the gate-source voltage adjustment circuit further generates a second gate-source voltage according to the sensing signal to control the second switch so that the on-resistance is at the voltage It remains at this fixed value when the difference changes. The analog switching circuit as described in claim 5, wherein the second gate source voltage is a fixed value. The analog switching circuit as described in claim 3, wherein the control circuit further includes a voltage dividing circuit coupled between the input terminal and the output terminal to provide a base-source voltage division of the voltage difference, The gate-source voltage adjustment circuit further adaptively adjusts the first gate-source voltage according to the base-source voltage division. The analog switch circuit as claimed in claim 1, wherein the sensing circuit further includes a current mirror circuit for replicating and amplifying the amplified current to generate the sensing signal. The analog switching circuit of claim 1, wherein the amplifying circuit includes a first super source follower. The analog switching circuit of claim 1, wherein the gate-source voltage adjustment circuit further includes: a second super source follower coupled between the sensing circuit and the first impedance circuit for Generate a sum-of-two current based on a sensing current and a fixed current related to the sensing signal; and a second impedance circuit coupled to the second super source follower; wherein the sum-of-two current respectively flow through the first impedance circuit and the second impedance circuit to adaptively adjust the first gate source voltage. The analog switch circuit of claim 1, wherein the first switch includes a first metal oxide semiconductor (MOS) element, and the voltage difference is related to the source-drain voltage of the first MOS element, and the The on-resistance is related to the channel resistance when the first MOS element is turned on; the sensing signal is proportional to the source-drain current when the first MOS element is turned on; and the gate-source voltage adjustment circuit adapts according to the voltage difference change. The first gate source voltage is permanently adjusted to maintain the channel resistance at the fixed value when the first MOS element is turned on. The analog switch circuit of claim 3, wherein the first switch includes a first metal oxide semiconductor (MOS) element, the second switch includes another MOS element, and the voltage difference is related to the third The sum of the source-drain voltage of a MOS element and the source-drain voltage of the second MOS element; wherein, the on-resistance is related to the channel resistance when the first MOS element is turned on and the channel resistance when the second MOS element is turned on The sum of The channel resistance sums to this fixed value. A control circuit for an analog switching circuit includes: a sensing circuit coupled between an input terminal and an output terminal for controlling a voltage of an output signal of the output terminal and an input signal of the input terminal. difference to generate a sensing signal; and a gate source voltage adjustment circuit coupled to the sensing circuit for generating and adaptively adjusting a first gate source voltage according to the sensing signal to operate the A first switch of a switching unit of the analog switching circuit converts the input signal into the output signal, and maintains an on-resistance of the switching unit at a fixed value when the voltage difference changes; wherein, the first A switch is coupled on the current path between the input terminal and the output terminal; wherein the gate-source voltage adjustment circuit includes a first impedance circuit coupled to a first gate of the first switch and a first source between the poles to adaptively adjust the first gate-source voltage according to the sensing signal; wherein the sensing circuit includes: an amplifier circuit having a first input terminal and a second input terminal; a first A resistor is coupled between the first input terminal and the input terminal; and a second resistor is coupled between the second input terminal and the output terminal; wherein the amplifier circuit uses negative feedback control to control the The voltages of the first input terminal and the second input terminal are adjusted to the same level; the amplification circuit generates an amplification current, and the sensing signal is proportional to the amplification current. The control circuit analogous to the switching circuit as described in claim 13 further includes a voltage dividing circuit coupled between the input terminal and the output terminal for providing a base-source voltage division of the voltage difference, so that The gate-source voltage adjustment circuit further adaptively adjusts the first gate-source voltage according to the base-source voltage division. The control circuit analogous to the switch circuit of claim 13, wherein the switch unit further includes a second switch, the first switch and the second switch are coupled in series between the input terminal and the output terminal. The control circuit of the analog switching circuit as described in claim 13, wherein the relationship between the first gate source voltage and the voltage difference is as follows: Vgs1=Vc1+α×Vdif, where the first gate source voltage Vgs1 is equal to The sum of the fixed voltage Vc1 and the voltage difference Vdif multiplied by a coefficient α ; where the coefficient α is a real number greater than 1. The control circuit of the analog switch circuit as described in claim 15, wherein the gate-source voltage adjustment circuit further generates a second gate-source voltage according to the sensing signal to control the second switch so that the on-resistance When the voltage difference changes, it remains at the fixed value. The control circuit of the analog switching circuit as claimed in claim 17, wherein the second gate source voltage is a fixed value. The control circuit analogous to the switching circuit of claim 15, wherein the control circuit further includes a voltage dividing circuit coupled between the input terminal and the output terminal for providing a base source of the voltage difference. The voltage is divided so that the gate-source voltage adjustment circuit further adaptively adjusts the first gate-source voltage according to the base-source voltage division. The control circuit analogous to the switching circuit of claim 21, wherein the sensing circuit further includes a current mirror circuit for replicating and amplifying the amplified current to generate the sensing signal. The control circuit of the analog switching circuit as claimed in claim 13, wherein the amplifying circuit includes a first super source follower. The control circuit analogous to the switching circuit as described in claim 13, wherein the gate-source voltage adjustment circuit further includes: a second super source follower coupled between the sensing circuit and the first impedance circuit for generating a sum of two based on a sensing current related to the sensing signal and a fixed current current; and a second impedance circuit coupled to the second super source follower; wherein the two summed currents flow through the first impedance circuit and the second impedance circuit respectively, and adaptively adjust the first Gate source voltage. The control circuit of the analog switch circuit as claimed in claim 14, wherein the first switch includes a first metal oxide semiconductor (MOS) element, and the voltage difference is related to the source and drain of the first MOS element. voltage, the on-resistance is related to the channel resistance when the first MOS element is turned on; wherein the sensing signal is proportional to the source-drain current when the first MOS element is turned on; wherein the gate-source voltage adjustment circuit is based on the voltage difference The first gate-source voltage is changed and adaptively adjusted to maintain the channel resistance at the fixed value when the first MOS element is turned on. The control circuit of the analog switch circuit as claimed in claim 15, wherein the first switch includes a first metal oxide semiconductor (MOS) element, the second switch includes another MOS element, and the voltage difference is related to The sum of the source-drain voltage of the first MOS element and the source-drain voltage of the second MOS element; wherein, the on-resistance is related to the channel resistance when the first MOS element is turned on and when the second MOS element is turned on The sum of the channel resistances; wherein the sensing signal is proportional to the source-drain current when the first MOS element is turned on; wherein the gate-source voltage adjustment circuit adaptively adjusts the first gate-source voltage according to changes in the voltage difference , to maintain the sum of the channel resistances at the fixed value. A control method for an analog switching circuit, including: operating a first switch of an analog switching circuit according to a first gate source voltage to convert an input signal at an input terminal into an output signal at an output terminal ; A sensing signal is generated according to the voltage difference between the output signal and the input signal; and a first impedance circuit is coupled between a first gate of the first switch and a first source, It is used to adaptively adjust the first gate source voltage according to the sensing signal, so that the on-resistance of the switch unit remains at a fixed value when the voltage difference changes; wherein, the first switch is coupled to On the current path between the input end and the output end; wherein the step of generating a sensing signal based on the voltage difference between the output signal and the input signal includes: providing a first resistor coupled to a first between the input terminal and the input terminal; providing a second resistor coupled between a second input terminal and the output terminal; using negative feedback control to adjust the voltages of the first input terminal and the second input terminal at the same level; and generating a first amplified current, and the sensing signal is proportional to the first amplified current. The control method of the analog switching circuit as described in claim 25 further includes: providing a base-source voltage division of the voltage difference to adaptively adjust the first gate-source voltage according to the base-source voltage division, and The on-resistance is maintained at the fixed value when the voltage difference changes. The control method of the analog switch circuit as described in claim 25 further includes: more adaptively adjusting a second gate source voltage according to the sensing signal to control a second switch, so that the on-resistance is at the voltage The difference remains at the fixed value when the difference changes: the first switch and the second switch are coupled in series between the input terminal and the output terminal. The control method of an analog switch circuit as claimed in claim 25, wherein the first switch includes a first metal oxide semiconductor (MOS) element, and the voltage difference is related to the source and drain of the first MOS element. voltage, the on-resistance is related to the channel resistance when the first MOS element is turned on; wherein the sensing signal is proportional to the first MOS element being turned on The source-drain current at the time; the step of adaptively adjusting the first gate-source voltage according to the voltage difference change is used to maintain the channel resistance at the fixed value when the first MOS element is turned on. The control method of an analog switch circuit as claimed in claim 27, wherein the first switch includes a first metal oxide semiconductor (MOS) element, the second switch includes another MOS element, and the voltage difference is related to The sum of the source-drain voltage of the first MOS element and the source-drain voltage of the second MOS element; wherein, the on-resistance is related to the channel resistance when the first MOS element is turned on and when the second MOS element is turned on The sum of the channel resistances; wherein the sensing signal is proportional to the source-drain current when the first MOS element is turned on; wherein the step of adaptively adjusting the first gate-source voltage according to the voltage difference change is used to maintain the The sum of the channel resistances is this fixed value.