TWI805069B - High-frequency component test device and method thereof - Google Patents
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本發明是有關於一種測試裝置,且特別是有關於一種高頻元件測試裝置及其測試方法。 The present invention relates to a testing device, and in particular to a high-frequency component testing device and a testing method thereof.
傳統的高頻元件量測及校正方式多以SOLT、TRL為主,SOLT需要短路(Short)、開路(Open)、負載(Load)、直通(Thru)四個校正模塊(calibration kits),而TRL則需直通(Thru)、反射(Reflect)、線路(Line)三種測試鍵。此外,在上述校正技術中,通常又針對特定的量測要求(如寬帶頻率或晶圓上探測)分成不同的校正方法,造成校正時步驟較為繁瑣。 Traditional high-frequency component measurement and calibration methods are mostly based on SOLT and TRL. SOLT requires four calibration kits (Short), Open, Load, and Thru, while TRL Three test keys are required: Thru, Reflect, and Line. In addition, in the above calibration techniques, different calibration methods are usually divided into different calibration methods for specific measurement requirements (such as broadband frequency or on-wafer detection), resulting in cumbersome calibration steps.
另外,以SOLT、TRL為主的校正方法,容易因為每一次的量測而產生誤差,例如下針深度不同或是下針的位置偏移,都會影響校正結果,為了避免因校正誤差而導致待測物的量測失準,有必要提出改善之道。 In addition, SOLT and TRL-based calibration methods are prone to errors due to each measurement, such as different needle depths or position offsets, which will affect the calibration results. It is necessary to propose a way to improve the measurement inaccuracy of the measured object.
本發明係有關於一種高頻元件測試裝置及其測試方法,用以減少校正誤差。 The invention relates to a high-frequency component testing device and a testing method thereof, which are used to reduce correction errors.
根據本發明之一方面,提出一種高頻元件測試裝置,包括測試鍵以及一測試模組。測試鍵包括對稱排列的一前級鍵及一後級鍵,其具有一致的電氣長度及特性阻抗。測試模組用以量測該前級鍵與該後級鍵直通連接的S參數及加入一待測物於該前級鍵與該後級鍵之間的結構的S參數。 According to one aspect of the present invention, a high-frequency component testing device is provided, including a test key and a test module. The test keys include a front-stage key and a rear-stage key arranged symmetrically, which have the same electrical length and characteristic impedance. The test module is used to measure the S parameters of the direct connection between the previous key and the subsequent key and the S parameter of the structure with an object to be tested between the previous key and the subsequent key.
根據本發明之一方面,提出一種高頻元件測試方法,包括下列步驟。提供測試鍵,該測試鍵包括對稱排列的一前級鍵及一後級鍵,其具有前後一致的電氣長度及特性阻抗。量測該前級鍵與該後級鍵直通連接的S參數及加入一待測物於該前級鍵與該後級鍵之間的結構的S參數。以頻域計算並將該S參數轉換成ABCD參數矩陣,再以開根運算得到該前級鍵與該後級鍵的ABCD參數矩陣。根據該前級鍵與該後級鍵的ABCD參數矩陣的反矩陣計算一去嵌入的該待測物的ABCD參數。 According to one aspect of the present invention, a high-frequency component testing method is provided, including the following steps. The test key is provided, and the test key includes a front-stage key and a rear-stage key arranged symmetrically, which have consistent electrical length and characteristic impedance. Measuring the S-parameters of the direct connection between the preceding key and the subsequent key and the S-parameters of the structure in which an analyte is added between the preceding key and the subsequent key. Calculate in the frequency domain and convert the S parameter into an ABCD parameter matrix, and then obtain the ABCD parameter matrix of the previous key and the subsequent key through root operation. A de-embedded ABCD parameter of the analyte is calculated according to the inverse matrix of the ABCD parameter matrix of the previous key and the subsequent key.
為了對本發明之上述及其他方面有更佳的瞭解,下文特舉實施例,並配合所附圖式詳細說明如下: In order to have a better understanding of the above-mentioned and other aspects of the present invention, the following specific examples are given in detail with the accompanying drawings as follows:
100:高頻元件測試裝置 100: High-frequency component testing device
101:去嵌入平面 101: De-embedding planes
102:待測物 102: The object to be tested
105:測試鍵 105: Test key
110:前級鍵 110: front key
120:後級鍵 120: Back stage key
112:第一傳輸線 112: The first transmission line
122:第二傳輸線 122: Second transmission line
130:測試模組 130: Test module
第1及2圖分別繪示依照本發明一實施例之高頻元件測試裝置的示意圖;第3圖繪示依照本發明一實施例之高頻元件測試方法的流程圖;及第4A至4D圖分別繪示依照本發明一實施例之高頻元件測試裝置 的特性驗證的示意圖。 Figures 1 and 2 are schematic diagrams of a high-frequency component testing device according to an embodiment of the present invention; Figure 3 is a flow chart of a high-frequency component testing method according to an embodiment of the present invention; and Figures 4A to 4D Respectively show a high-frequency component testing device according to an embodiment of the present invention Schematic diagram of the feature verification.
下面將結合本申請實施例中的附圖,對本申請實施例中的技術方案進行清楚、完整地描述,顯然,所描述的實施例是本申請一部分實施例,而不是全部的實施例。此外,所描述的特徵、結構或特性可以以任何合適的方式結合在一個或更多實施例中。在下面的描述中,提供許多具體細節從而給出對本申請的實施例的充分理解。然而,本領域具有通常知識者將意識到,可以實踐本申請的技術方案而沒有特定細節中的一個或更多,或者可以採用其它的方法、裝置、步驟等。在其它情況下,不詳細示出或描述公知方法、裝置、實現或者操作以避免模糊本申請的各方面。 The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of them. Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided in order to give a thorough understanding of the embodiments of the application. However, those skilled in the art will appreciate that the technical solutions of the present application can be practiced without one or more of the specific details, or other methods, devices, steps, etc. can be used. In other instances, well-known methods, apparatus, implementations, or operations have not been shown or described in detail to avoid obscuring aspects of the application.
在本實施例中,散射參數(S參數)用以表示射頻發射器、微波器等元件的高頻性能。目前的S參數測試裝置會產生很大的寄生效應,使得對高頻元件進行測試所直接獲取的S參數無法準確表示該高頻元件的性能。因此,在本實施例中的測試裝置設置測試鍵來定義高頻元件的去嵌入平面101,即定義本徵元件(待測物102)與寄生元件(測試裝置100)之間的平面,如第2圖所示,通過去除測試裝置在高頻工作狀態下帶來的寄生效應,從而得到準確的本徵傳輸參數。
In this embodiment, the scattering parameters (S parameters) are used to represent the high frequency performance of components such as radio frequency transmitters and microwaves. The current S-parameter test device will produce a large parasitic effect, so that the S-parameters directly obtained by testing the high-frequency component cannot accurately represent the performance of the high-frequency component. Therefore, the testing device in this embodiment sets the test key to define the
請參照第1及2圖,其分別繪示依照本發明一實施例之高頻元件測試裝置100的示意圖。在第1圖中,高頻元件測試裝
置100包括測試鍵105以及一測試模組130,此測試鍵105包括對稱的一前級鍵110及一後級鍵120,前級鍵110與後級鍵120具有一致的電氣長度及特性阻抗。在一實施例中,前級鍵110與後級鍵120的特性阻抗例如為50歐姆,但不以此為限。前級鍵110與後級鍵120例如以接地-信號線-接地(ground-signal-ground,GSG)組態設置。在另一實施例中,前級鍵110與後級鍵120例如以接地-信號線(GS)、接地-信號線-接地-信號線-接地(GSGSG)或其他合適的測試組態設置。測試模組130例如為網路分析儀(network analyzer)。
Please refer to FIG. 1 and FIG. 2 , which respectively illustrate a schematic view of a high-frequency
前級鍵110包括第一傳輸線112,後級鍵120包括第二傳輸線122。第一傳輸線112與第二傳輸線122具有相同的電氣長度及材料,使前後兩側的傳輸參數大致上相等。在第2圖中,待測物102連接於二傳輸線112、122之間。待測物102與第一傳輸線112及第二傳輸線122之間分別形成一去嵌入平面101(垂直於紙面),使待測物102連接於兩個去嵌入平面101之間,去嵌入平面101的左側結構和右側結構均具有一本徵傳輸參數(intrinsic transmission parameter),透過本徵傳輸參數以及受測結構的傳輸參數,用以推導待測物102的本徵傳輸參數。在一實施例中,本徵傳輸參數例如以ABCD參數表示。
The
在本實施例中,透過參數轉換模組將S參數轉換為ABCD參數,其中前級鍵110與後級鍵120直通連接時S參數可用ABCD參數表示,以參數矩陣表示。例如在前級鍵110與後
級鍵120直通連接時,在二端口網路的一端輸入總電壓V1及總電流I1,在二端口網路的另一端輸出總電壓V2及總電流I2,其中V1=AV2+BI2,I1=CV2+DI2,以公式表示,其中A、B、C和D用以表示輸入電壓V1、輸出電壓V2、輸入電流I1和輸出電流I2的關係。
In this embodiment, the S parameters are converted into ABCD parameters through the parameter conversion module. When the
本實施例的測試模組130可根據ABCD參數矩陣的開根運算以得到前級鍵110與後級鍵120的ABCD參數,計算公式(1)如下:[Dem]=[PAD][PAD],其中[PAD]為前級鍵110與後級鍵120的ABCD參數矩陣,[Dem]為前級鍵110與後級鍵120直通連接時的ABCD參數矩陣。由於本實施例的前級鍵110與後級鍵120具有一致的電氣長度及特性阻抗,前級鍵110與後級鍵120的ABCD參數矩陣相同,因此只要對二測試鍵110、120直通連接時的ABCD參數矩陣[Dem]進行開根運算,即可得到前級鍵110與後級鍵120的ABCD參數矩陣[PAD],由公式(1)可得知:[PAD]=
另外,請參照第2圖,當加入一待測物102於前級鍵110與後級鍵120之間時,測試模組130量測加入待測物102於該前級鍵110與後級鍵120之間的受測結構的S參數,之後將S參數轉換為ABCD參數,並根據反矩陣得到一去嵌入的待測物102的ABCD參數。計算公式(2)如下:[DUT]=[PAD][Golden][PAD],其中[Golden]為去嵌化的待測物102的ABCD參數矩陣,而[DUT]為前級鍵110與後級鍵120與待測物102直通連接時的
ABCD參數矩陣。由公式(2)可得知[Golden]=[PAD]-1[DUT][PAD]-1,其中[PAD]-1為前級鍵110與後級鍵120的ABCD參數矩陣的反矩陣,即[PAD]-1=
在本實施例中,高頻元件測試裝置100僅需一組去嵌入之測試鍵,即可將由於量測而額外增加之佈局及走線的寄生效應去除,可加速去嵌入的檢測速度,並減少下針誤差以提升精準度。
In this embodiment, the high-frequency
請參照第1至3圖,其中第3圖繪示依照本發明一實施例之高頻元件測試方法的流程圖。首先,在步驟S30中,提供測試鍵105,其包括對稱排列的前級鍵110及後級鍵120,前級鍵110與後級鍵120具有前後一致的電氣長度及特性阻抗。在步驟S32中,量測前級鍵110與後級鍵120直通連接的S參數及加入一待測物102於前級鍵110與後級鍵120之間的結構的S參數。在步驟S34中,以頻域計算並將S參數轉換成ABCD參數矩陣,再以開根運算得到前級鍵110與後級鍵120的ABCD參數矩陣。在步驟S36中,根據前級鍵110與後級鍵120的ABCD參數矩陣的反矩陣計算一去嵌入的待測物102的ABCD參數。
Please refer to FIGS. 1 to 3 , wherein FIG. 3 shows a flow chart of a method for testing high-frequency components according to an embodiment of the present invention. First, in step S30 , a
請參照第4A至4D圖,其分別繪示依照本發明一實施例之高頻元件測試裝置100的S參數特性驗證的示意圖。在第4A圖中,S(1,1)參數為輸入反射係數,也就是輸入回波損耗。在第4B圖中,S(1,2)參數為反向傳輸係數,也就是隔離。在第4C
圖中,S(2,1)參數為正向傳輸係數,也就是增益。在第4D圖中,S(2,2)參數為輸出反射係數,也就是輸出回波損耗。在本實施例中以模擬驗證方式來進行S參數可行性及特性驗證,經比對圖中的模擬的模型曲線、DUT模型曲線及去嵌化的曲線的數據可發現,使用本實施例之去嵌入程序可以得到與待測物102的本徵傳輸參數非常接近的結果。模擬驗證至100GHz小信號曲線擬合(curve fitting)誤差小於10%。在另一實施例中,若採傳輸鍵測試鍵驗證至67GHz小信號相位的特性阻抗Z0及傳輸線長度βL誤差可小於8%。
Please refer to FIGS. 4A to 4D , which are respectively schematic diagrams illustrating the S-parameter characteristic verification of the high-frequency
本發明上述實施例的高頻元件測試裝置及其測試方法,僅需一種測試鍵做為校正模塊,此測試鍵具有前後一致的電氣長度及特性阻抗的前級鍵與後級鍵,特性阻抗例如為50歐姆與探針的阻抗一致,避免因校正誤差而導致待測物的量測失準。相對於傳統高頻元件量測及校正方式以SOLT、TRL為主,本實施例可減少校正步驟,並能去除S參數測試在高頻工作狀態下帶來的寄生效應,從而得到準確的S參數。 The high-frequency component testing device and testing method thereof in the above-mentioned embodiments of the present invention only need a test key as a calibration module, and the test key has a front-stage key and a back-stage key with consistent electrical length and characteristic impedance, and the characteristic impedance is, for example, It is 50 ohms consistent with the impedance of the probe to avoid measurement inaccuracy of the object to be measured due to calibration errors. Compared with the traditional high-frequency component measurement and calibration methods based on SOLT and TRL, this embodiment can reduce the calibration steps and remove the parasitic effects of S-parameter testing under high-frequency working conditions, thereby obtaining accurate S-parameters .
綜上所述,雖然本發明已以實施例揭露如上,然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾。因此,本發明之保護範圍當視後附之申請專利範圍所界定者為準。 To sum up, although the present invention has been disclosed by the above embodiments, it is not intended to limit the present invention. Those skilled in the art of the present invention can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the scope of the appended patent application.
100:高頻元件測試裝置 100: High-frequency component testing device
105:測試鍵 105: Test key
110:前級鍵 110: front key
120:後級鍵 120: Back stage key
112:第一傳輸線 112: The first transmission line
122:第二傳輸線 122: Second transmission line
130:測試模組 130: Test module
G:接地 G: ground
S:信號線 S: signal line
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CN111929558A (en) * | 2020-09-28 | 2020-11-13 | 浙江铖昌科技有限公司 | Self-calibration-based de-embedding method, system, storage medium and terminal |
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