TWI845345B - Type-c physical interface based data transfer method and electronic device - Google Patents

Abstract

The present disclosure provides a Type-C physical interface based data transfer method and an electronic device. The data transmission method determines whether positive and negative plugging states of Type-C physical interfaces of two electronic devices are the same by a received data packets. In case that inconsistency, permutes data to be sent at a transmitter side before sending it out through a corresponding differential signal transmission channel, or permutes received data at a receiver side before operating it. Such processing simplifies an identification process of the positive and negative plugging states of two electronic devices.

Description

Data transmission method and electronic device based on Type-C physical interface

The present invention belongs to the field of computer technology, and in particular relates to a data transmission method and electronic device based on a Type-C physical interface.

In order to meet the needs of high-speed and stable data transmission and adapt to the miniaturization of interfaces, different electronic devices have gradually transitioned from using network cables to communicate to using Type-C interfaces for differential signal transmission. The Type-C interface uses a symmetrical design, so it can support forward and reverse insertion. However, this also means that in order for the differential signals sent through the Type-C interface to be correctly received and analyzed, it is necessary to identify and process the forward and reverse insertion status of the sender and receiver.

In view of this, the present invention provides a data transmission method and electronic device based on the Type-C physical interface.

In a first aspect, a data transmission method is provided, which is applied to a sending module of a first electronic device, wherein the first electronic device includes a first Type-C physical interface, and a second electronic device includes a second Type-C physical interface, wherein the first Type-C physical interface is connected to the second Type-C physical interface through a Type-C cable, thereby forming a plurality of pairs of differential signal transmission channels, and the method comprises: receiving the second pair of differential signal transmission channels from a first pair of differential signal transmission channels among the plurality of pairs of differential signal transmission channels; data packets sent by the electronic device; determining whether the forward and reverse plugging states of the first Type-C physical interface and the second Type-C physical interface are consistent according to the change of the data packets; if the forward and reverse plugging states of the first Type-C physical interface and the second Type-C physical interface are inconsistent, then the positive and negative differential signals of the first data to the Nth data are transposed and sent through the second pair of differential signal transmission channels to the N+1th pair of differential data transmission channels, where N is greater than or equal to 2.

In some embodiments, determining whether the forward and reverse insertion states of the first Type-C physical interface and the second Type-C physical interface are consistent according to the change of the data packet includes: for the data packet, if the received bit sequence is opposite to the sent bit sequence, then determining that the forward and reverse insertion states of the first Type-C physical interface and the second Type-C physical interface are inconsistent.

In some embodiments, the method further includes: transmitting configuration data through the first pair of differential signal transmission channels, and the configuration data is inverted and used when the forward and reverse insertion states of the first Type-C physical interface and the second Type-C physical interface are inconsistent.

In some embodiments, it also includes: using the N+2th pair of differential signal transmission channels and the N+3th pair of differential signal transmission channels to respectively send the same clock signal, and the pins of the N+2th pair of differential signal transmission channels and the N+3th pair of differential signal transmission channels are two pairs of differential pins located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical.

In some embodiments, the pins of the first pair of differential signal transmission channels are (A8, B8).

In some embodiments, in high-speed mode, the pins from the second pair of differential signal transmission channels to the N+1th pair of differential data transmission channels are two pairs of differential pins (A2, A3), (B2, B3), (A11, A10), and (B11, B10) located on both sides of the Type-C physical interface and rotated 180 degrees symmetrically.

In some embodiments, in high-speed mode, the pins of the N+2nd pair of differential signal transmission channels and the N+3rd pair of differential signal transmission channels are two pairs of differential pins (A2, A3), (B2, B3), (A11, A10) and (B11, B10) located on both sides of the Type-C physical interface and rotated 180 degrees symmetrically.

In some embodiments, in low-speed mode, the pins from the second pair of differential signal transmission channels to the N+1th pair of differential signal transmission channels are (A2, A3), (B2, B3), (A11, A10), (B11, B10), (A6, A7) and (B6, B7), where (A6, A7) and (B6, B7) are bound for use.

In some embodiments, two pairs of differential pins (A2, A3), (B2, B3), (A11, A10), (B11, B10), (A6, A7) and (B6, B7) located on both sides of the Type-C physical interface and rotated 180 degrees symmetrically, (A6, A7) and (B6, B7) are bound for use.

In a second aspect, a data transmission method is provided, which is applied to a receiving module of a second electronic device, wherein the first electronic device includes a first Type-C physical interface, and the second electronic device includes a second Type-C physical interface, wherein the first Type-C physical interface is connected to the second Type-C physical interface through a Type-C cable, thereby forming multiple pairs of differential signal transmission channels, and the method includes: receiving a data packet sent by the first electronic device from a first pair of differential signal transmission channels among the multiple pairs of differential signal transmission channels; determining whether the forward and reverse insertion states of the first Type-C physical interface and the second Type-C physical interface are consistent according to the change of the data packet; if the forward and reverse insertion states of the first Type-C physical interface and the second Type-C physical interface are inconsistent, transposing the first data to the Nth data received through the second pair of differential signal transmission channels to the N+1th pair of differential data transmission channels, where N is greater than or equal to 2.

In some embodiments, determining whether the forward and reverse insertion states of the first Type-C physical interface and the second Type-C physical interface are consistent according to the change of the data packet includes: for the data packet, if the received bit sequence is opposite to the sent bit sequence, then determining that the forward and reverse insertion states of the first Type-C physical interface and the second Type-C physical interface are inconsistent.

In some embodiments, it also includes: using the N+2th pair of differential signal transmission channels and the N+3th pair of differential signal transmission channels to respectively send the same clock signal, and the pins of the N+2th pair of differential signal transmission channels and the N+3th pair of differential signal transmission channels are two pairs of differential pins located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical.

In a third aspect, an electronic device is provided, the electronic device comprising a first Type-C physical interface, the first Type-C physical interface is connected to a second Type-C physical interface of another electronic device through a Type-C cable, thereby forming multiple pairs of differential signal transmission channels, the electronic device comprises a sending module, the sending module comprises: a forward and reverse plug consistency judgment unit, used to receive a data packet from the other electronic device, and determine whether the forward and reverse plug states of the electronic device and the other electronic device are consistent according to the change of the data packet; a data rearrangement unit, used to, when the forward and reverse plug states of the electronic device and the other electronic device are inconsistent, transpose the first data to the Nth data and send them through the second pair of differential signal transmission channels to the N+1th pair of differential signal transmission channels, where N is greater than or equal to 2.

In some embodiments, the forward and reverse insertion consistency judgment unit includes: for the data packet, if the received bit sequence is opposite to the sent bit sequence, it is determined that the forward and reverse insertion status of the electronic device and another electronic device are inconsistent.

In some embodiments, it also includes: using the N+2th pair of differential signal transmission channels and the N+3th pair of differential signal transmission channels to respectively send the same clock signal, and the pins of the N+2th pair of differential signal transmission channels and the N+3th pair of differential signal transmission channels are two pairs of differential pins located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical.

In some embodiments, the pins of the first pair of differential signal transmission channels are (A8, B8).

In some embodiments, in high-speed mode, the pins from the second pair of differential signal transmission channels to the N+1th pair of differential data transmission channels are two pairs of differential pins (A2, A3), (B2, B3), (A11, A10), and (B11, B10) located on both sides of the Type-C physical interface and rotated 180 degrees symmetrically.

In some embodiments, in high-speed mode, the pins of the N+2nd pair of differential signal transmission channels and the N+3rd pair of differential signal transmission channels are two pairs of differential pins (A2, A3), (B2, B3), (A11, A10) and (B11, B10) located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical.

In some embodiments, (A2, A3), (B2, B3), (A11, A10), (B11, B10), (A6, A7) and (B6, B7), among which (A6, A7) and (B6, B7) must be used in a bound manner.

In some embodiments, in low-speed mode, two pairs of differential pins (A2, A3), (B2, B3), (A11, A10), (B11, B10), (A6, A7) and (B6, B7) located on both sides of the Type-C physical interface and rotated 180 degrees symmetrically, (A6, A7) and (B6, B7) are bound for use.

In a fourth aspect, an electronic device is provided, the electronic device comprising a first Type-C physical interface, the first Type-C physical interface is connected to a second Type-C physical interface of another electronic device through a Type-C cable, thereby forming multiple pairs of differential signal transmission channels, the electronic device comprises a receiving module, the receiving module comprises: a forward and reverse insertion consistency judgment unit, for receiving a first pair of differential signals from the multiple pairs of differential signal transmission channels The transmission channel receives the data packet of the other electronic device, and determines whether the forward and reverse plugging states of the electronic device and the other electronic device are consistent according to the change of the data packet; the data rearrangement unit is used to perform a transposition process on the first data to the Nth data received through the second pair of differential signal transmission channels to the N+1th pair of differential data transmission channels when the forward and reverse plugging states of the electronic device and the other electronic device are inconsistent, where N is greater than or equal to 2.

In a fifth aspect, a system is provided, which is formed by cascading any of the electronic devices described above.

The data transmission method provided by the embodiment of the present invention determines whether the forward and reverse plug-in states of the Type-C physical interfaces of two electronic devices are consistent through the received data packets, and in the case of inconsistency, the differential signal to be sent is transposed at the transmitting end and then sent through the corresponding differential signal transmission channel, or the received differential signal is transposed at the receiving end before being used. Such processing simplifies the process of identifying the forward and reverse plug-in states of two electronic devices. The embodiment of the present invention also provides a plurality of pin signal allocation schemes for Type-C physical interfaces to improve data transmission efficiency.

(Aux+, Aux-): Channel for transmitting configuration data

(Clk+,Clk-): Channel for sending clock signals

(D0+,D0-),...,(Dn+,Dn-): Channel for transmitting data from D0 to Dn

100:First Electronic Equipment

101,201: Type-C interface

110,210: Send module

1101: Data reordering unit

1102: Forward and reverse insertion consistency judgment unit

120,220: receiving module

200: Second electronic equipment

300: Type-C cable

A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,CC,CC1,CC2,RX1-,RX1+,RX2-,RX2+,SBU1,SBU2 TX1-,TX1+,TX2-,TX2+,VBUS,VCONN: Pins

Aux: configuration data

Ch: Manchester code

Clk,Clock: clock signal

D-,D+: channel

D, D0, D1, D0/1, Dn: data

GND: ground pin

R1, R2, R3, R4: Pull-down resistors

Rd, Rp: resistance

RX: pin (receiving circuit)

S701, S702, S703, S704: Steps

TX: pin (transmitter circuit)

Vbias: voltage

The above and other purposes, features and advantages of the present invention will become clearer through the description of the embodiments of the present invention with reference to the following drawings, in which:

Figures 1a and 1b are schematic diagrams of the signal pin assignments of the Type-C interface plug and socket;

Figure 2 shows the schematic diagram of the channel configuration pins when they are inserted forward and reverse;

Figure 3 is a schematic diagram of the application scenario of an embodiment of the present invention;

Figure 4 is a structural diagram of a data transmission system based on a Type-C physical interface in an embodiment of the present invention;

Figures 5a and 5b are schematic diagrams of signal pin allocation of the Type-C physical interface in high-speed mode of an embodiment of the present invention;

Figures 5c and 5d are schematic diagrams of signal pin allocation of the Type-C physical interface in low-speed mode of an embodiment of the present invention;

Figure 5e is a schematic diagram of signal pin allocation of another Type-C physical interface in low-speed mode of an embodiment of the present invention;

Figure 6 is a schematic diagram of a differential bidirectional half-duplex connection method for a channel for transmitting configuration data in an embodiment of the present invention;

Figure 7 is a flow chart of a data transmission method based on a Type-C physical interface provided by an embodiment of the present invention;

Figure 8 is an example of Manchester coded data.

The present invention will be described in more detail below with reference to the drawings. In each of the drawings, the same elements are represented by similar drawing marks. For the sake of clarity, the various parts in the drawings are not drawn to scale. In addition, some well-known parts may not be shown.

Before introducing the various embodiments of the present invention, we first introduce the relevant knowledge of Type-C. The full name of Type-C is USB Type-C. USB is a serial bus standard and also a technical specification for input and output interfaces. There are currently three physical specifications of USB interfaces, namely USB Type-A, USB Type-B and USB Type-C.

As shown in Figures 1a and 1b, the Type-C interface specification specifies 24 symmetrically arranged pins, including 8 pairs of differential transmission line pins, of which (A2, A3), (B2, B3), (A11, A10) and (B11, B10) support high-speed differential signal transmission (less than 10Gbps); (A6, A7) and (B6, B7) are compatible with USB2.0. Designed to support low-speed differential signal transmission (speed is 480Mbps), and (B6, B7) must be used in conjunction with (A6, A7), but (A6, A7) can be used alone; (A8, B8) is an auxiliary pin specified in USB and can be used to transmit other information (such as configuration information). Since it also supports low-speed differential signal transmission, it is also classified as a differential transmission line pin here. In the following text, the communication channels composed of the differential transmission line pins of the transmitter and the receiver are collectively referred to as differential signal transmission channels, and the differential signal transmission channels composed of high-speed differential transmission line pins are collectively referred to as high-speed differential signal transmission channels, namely (A2, A3), (B2, B3), (A11, A10) and (B11, B10), and the communication channels composed of low-speed differential transmission line pins are collectively referred to as low-speed differential signal transmission channels, namely (A6, A7), (B6, B7) and (A8, B8).

Type-C also includes 2 channel configuration pins, which correspond to A5 (CC), B5 (VCONN) in the plug shown in Figure 1a and A5 (CC1) and B5 (CC2) in the socket shown in Figure 1b. The A5 (CC) channel configuration pin is used for functional negotiation, for example, to determine the insertion direction of the device, that is, forward or reverse insertion. Figure 2 shows a schematic diagram of the channel configuration pins when inserted forward and reverse. As shown in the figure, when inserted forward, the CC pin of the Type-C interface of the plug is electrically connected to the CC1 pin of the socket, and the VCONN pin of the plug is electrically connected to the CC2 pin of the Type-C interface of the socket. When inserted reversely, the CC pin of the plug is electrically connected to the CC2 pin of the socket, and the VCONN pin of the plug is electrically connected to the CC1 pin of the socket. Therefore, the forward and reverse insertion status of the Type-C interface can be determined by detecting the pin to which the CC pin is connected.

The Type-C interface also includes other pins, such as the ground (GND) pins (A1, B1, A12, B12) and power (VBUS) pins (A9, B9, A4, B4) in the figure. These pins are less relevant to the present invention and will not be introduced in detail here.

However, the data transmission system and method provided by the embodiment of the present invention is not to simply follow the USB Type-C specification, but to flexibly use the physical characteristics of the physical part of the USB Type-C interface (including pins, transmitting and receiving circuits, etc.) to reallocate various signals to the various pins of the Type-C interface and adjust the transmitting module or receiving module according to actual needs, in order to improve the data transmission efficiency between physical devices connected through the Type-C physical interface. Therefore, the data transmission system and method provided by the embodiment of the present invention are named as a data transmission system and method based on the Type-C physical interface.

FIG3 is a schematic diagram of an application scenario of an embodiment of the present invention. As shown in the figure, the data transmission system includes a first electronic device 100 and a second electronic device 200. The first electronic device 100 and the second electronic device 200 can be various terminals, such as mobile phones, notebooks, desktop computers, virtual reality (VR), etc., and the two terminals are connected to the Type-C interfaces 101 and 201 through the Type-C cable 300 for communication. The first electronic device 100 and the second electronic device 200 can also be two single-chip systems (System on a Chip, SoC) located in the same electronic device, and the two single-chip systems are connected to their respective Type-C interfaces 101 and 201 through the Type-C cable 300 for communication.

The Type-C interface 101 of the first electronic device 100 and the Type-C interface 201 of the second electronic device 200 both support forward and reverse insertion of the cable 300. Therefore, when the first electronic device 100 and the second electronic device 200 are communicating, they need to adjust data transmission according to the forward and reverse insertion status of themselves and the other party. According to the prior art, the first electronic device 100 or the second electronic device 200 needs to obtain the forward and reverse insertion status of itself and the other party at the same time (the forward and reverse insertion status can be determined by detecting the pin connected to the CC pin), and then adjust the sent or received data when the forward and reverse insertion status of the two is inconsistent, but this processing method is relatively cumbersome. In view of this, the present invention provides a data transmission system based on the Type-C physical interface, and its structure diagram is shown in Figure 4.

As shown in FIG4 , the first electronic device 100 includes a transmitting module 110 and a receiving module 120, and the second electronic device 200 includes a receiving module 220 and a transmitting module 210. The transmitting module 110 includes a data rearrangement unit 1101 and a forward and reverse insertion consistency judgment unit 1102.

The forward and reverse plug consistency judgment unit 1102 receives the data packet of the second electronic device 200 from the receiving module 220, determines whether the forward and reverse plug states of the first electronic device 100 and the second electronic device 200 are consistent according to the change of the data packet, and feeds back the result of whether they are consistent to the data rearrangement unit 1101. When the forward and reverse plug states of the first electronic device 100 and the second electronic device 200 are inconsistent, the data rearrangement unit 1101 transposes the first data to the Nth data to be sent and then sends them out through the differential data transmission channel, where N is greater than or equal to 2.

In some embodiments, the forward and reverse insertion consistency judgment unit 1102 and the data reordering unit 1101 are both set in the sending module (for example, the sending module 110 and the sending module 210 in Figure 4). At this time, the forward and reverse insertion consistency judgment unit 1102 sends a request to the receiving module of the receiving end, and the receiving module of the receiving end returns a data packet according to the request. The forward and reverse insertion consistency judgment unit 1102 determines whether the forward and reverse insertion status of the sending end and the receiving end are consistent according to the changes of the data packet. In other embodiments, the forward and reverse insertion consistency judgment unit 1102 and the data reordering unit 1101 are both arranged in a receiving module (such as the receiving module 120 and the receiving module 220 shown in FIG. 4 ). At this time, the forward and reverse insertion consistency judgment unit 1102 receives a data packet from the sending module of the sending end, and determines whether the forward and reverse insertion states of the sending end and the receiving end are consistent according to the data packet.

The data packet used to identify whether the forward and reverse insertion states are consistent can adopt a specific coding method. In one embodiment, the Manchester coding method is selected to send the data packet to the receiving end. Manchester coding is a coding method that uses level jumps to represent 1 or 0, and each of its code elements is represented by two level signals. For example, as shown in Figure 8, ch is an example of Manchester coded data, and Clock represents the corresponding clock signal. As shown in FIG8 , the transmitter first sends at least 16 HLs (H and L represent high level and low level respectively, and 16 HLs represent 16 zeros), followed by 4 bits of HHHHLLLL. The forward and reverse insertion consistency judgment unit 1102 judges the received data. If it is judged that more than 16 HLs are received followed by HHHHLLLL, it means that the forward and reverse insertion states of the transmitter and the receiver are consistent; if more than 16 LHs are received followed by LLLLHHHH, it means that the forward and reverse insertion states of the transmitter and the receiver are inconsistent. After sending the data packet used to identify whether the forward and reverse insertion states are consistent, the configuration data can be sent. After the configuration data is sent, 4 bits of HHHHLLLL can be sent as the end.

Continue to refer to Figure 4. The transmission module 110 and the receiving module 220 are connected by Type-C cables to form multiple differential signal transmission channels. Among them, (Aux+, Aux-) represents the channel for transmitting configuration data. The data packet used to identify whether the forward and reverse plug-in status is consistent and the subsequent configuration data mentioned in the above embodiment can use the (Aux+, Aux-) channel. The receiving end will determine whether the forward and reverse plug-in status of the transmitting end and the receiving end is consistent based on the data packet. If it is consistent, the received configuration data can be used directly. If it is inconsistent, the received configuration data needs to be inverted before use. (D0+, D0-) to (Dn+, Dn-) represent the channels for transmitting data D0 to Dn. When the forward and reverse insertion states of the transmitting and receiving ends are consistent, the data rearrangement unit 1101 normally sends the differential signal of data D0 to Dn, for example, the D0+ channel is used to send the D0+ signal, and the D0- channel is used to send the D0- signal. In the case of inconsistency, D0 and D1 are sent after being swapped, that is, the D0- channel sends the D1- signal, the D0+ channel sends the D1+ signal, the D1- channel sends the D0- signal, and the D1+ channel sends the D0+ signal. (Clk+, Clk-) indicates the channel for sending the clock signal. The clock signal is transmitted using two pairs of differential signal transmission channels on opposite sides rotated 180 degrees, so that the receiving end can get the correct clock signal regardless of the forward or reverse insertion status.

Figures 5a and 5b are schematic diagrams of signal pin allocation of the Type-C physical interface in high-speed mode provided by an embodiment of the present invention. Figures 5c and 5d are schematic diagrams of signal pin allocation of the Type-C physical interface in low-speed mode provided by an embodiment of the present invention. Figure 5e is a schematic diagram of signal pin allocation of another Type-C physical interface in low-speed mode provided by an embodiment of the present invention.

In high-speed mode, service data and clock signals can only be transmitted using differential high-speed transmission channels, while configuration data can be transmitted using differential low-speed transmission channels. Accordingly, referring to Figure 5a, (A2, A3) and (B2, B3) are assigned to transmit the same clock signal Clk, corresponding to (Clk+, Clk-) above, (A8, B8) transmit configuration data, corresponding to (Aux+, Aux-) above, (A11, A10) and (B11, B10) transmit service data D0 and D1, corresponding to (D0+, D0-) to (D1+, D1-) above. In Figure 5b, (A11, A10) and (B11, B10) are assigned to transmit the same clock signal Clk respectively, (A8, B8) still transmits configuration data, (A2, A3) and (B2, B3) transmit business data D1 and D0.

In low-speed mode, business data, clock signals and configuration data can arbitrarily select low-speed transmission channels for transmission. Accordingly, referring to Figure 5c, (A2, A3), (B2, B3), (A11, A10) and (B11, B10) are allocated to transmit business data D1, D3, D2 and D0, (A6, A7) and (B6, B7) transmit clock signals Clk, (A8, B8) transmit configuration data, and in Figure 5d, (A6, A7) and (B6, B7) can only transmit one type of business data D1, while (A2, A3) and (B2, B3) transmit clock signals Clk.

FIG5e is a schematic diagram of signal pin allocation of another Type-C physical interface in low-speed mode of an embodiment of the present invention. In FIG5e, (A10, A11) and (B10, B11) both send the same business data D0, and (A2, A3) and (B2, B2) both send the same business data D1. The advantage of adopting this signal pin allocation scheme is that even if the forward and reverse insertion states of the sending end and the receiving end are inconsistent, the sending end can directly send business data D0 and D1 without transposing D0 and D1; or the receiving end can directly use the received data D0 and D1 without transposing the received data D0 and D1. As shown in FIG4, that is, in this case, the data reordering unit 1101 can be removed.

FIG6 is a schematic diagram of a differential bidirectional half-duplex connection mode for transmitting configuration data provided by an embodiment of the present invention. TX represents a transmitting circuit, RX represents a receiving circuit, and R1 to R4 are pull-down resistors. The difference from conventional bidirectional differential is that the configuration differential signal line uses a pull-down resistor to pull the electrical signal down to a low level to reduce the impact of forward and reverse insertion on the signal, and the forward and reverse insertion status is subsequently identified through the communication protocol (rather than the electrical signal).

Correspondingly, the embodiment of the present invention also provides a system, which is formed by cascading the electronic devices provided by the above embodiments. In addition, the embodiment of the present invention also provides a data transmission method based on the Type-C physical interface, which is applied to the transmission module of the first electronic device in Figure 4, for example, the first electronic device includes a first Type-C physical interface, the second electronic device includes a second Type-C physical interface, the first Type-C physical interface is connected to the second Type-C physical interface through a Type-C cable, and thus multiple pairs of differential signal transmission channels are formed, and the flow chart is shown in Figure 7.

In step S701, a data packet sent by a second electronic device is received from a first pair of differential signal transmission channels among multiple pairs of differential signal transmission channels.

In step S702, the forward and reverse insertion states of the first Type-C physical interface and the second Type-C physical interface are determined to be consistent through the change of the data packet. If they are inconsistent, step S703 is executed; if they are consistent, step S704 is executed.

In step S703, the positive and negative differential signals of the first data to the Nth data are transposed and sent out through the second pair of differential signal transmission channels to the N+1th pair of differential data transmission channels, where N is greater than or equal to 2.

In step S704, the data is sent through the second pair of differential signal transmission channels to the N+1th pair of differential data transmission channels, where N is greater than or equal to 2.

In some embodiments, each codeword of the data packet is represented by two level signals, and determining whether the forward and reverse insertion states of the first Type-C physical interface and the second Type-C physical interface are consistent according to the change of the data packet includes: for the data packet, if the received level sequence is opposite to the sent level sequence, then determining that the forward and reverse insertion states of the first Type-C physical interface and the second Type-C physical interface are inconsistent.

In some embodiments, the data transmission method further includes: using the N+2 pair of differential signal transmission channels and the N+3 pair of differential signal transmission channels to respectively send the same clock signal, and the pins of the N+2 pair of differential signal transmission channels and the N+3 pair of differential signal transmission channels are two pairs of differential pins located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical.

Referring to the description of FIG. 5a to FIG. 5d above, for the above embodiment, the pins of the first pair of differential signal transmission channels may be (A8, B8), and in high-speed mode, the pins of the second pair of differential signal transmission channels to the N+1 pair of differential data transmission channels may be two pairs of differential pins (A2, A3), (B2, B3), (A11, A10) and (B11, B10) located on both sides of the Type-C physical interface and rotated 180 degrees symmetrically, and the pins of the N+2 pair of differential signal transmission channels and the N+3 pair of differential signal transmission channels may be There are two pairs of differential pins (A2, A3), (B2, B3), (A11, A10) and (B11, B10) located on both sides of the Type-C physical interface and rotated 180 degrees symmetrically; in low-speed mode, the pins from the second pair of differential signal transmission channels to the N+1 pair of differential data transmission channels are (A2, A3), (B2, B3), (A11, A10) and (B11, B10), and the pins for the N+2 pair of differential signal transmission channels and the N+3 pair of differential signal transmission channels are (A6, A7) and (B6, B7).

In summary, the data transmission method provided by the embodiment of the present invention determines whether the forward and reverse plug-in states of the Type-C physical interfaces of two electronic devices are consistent through the received data packets, and in the case of inconsistency, the differential signal to be sent is transposed at the transmitting end and then sent through the corresponding differential signal transmission channel, or the received differential signal is transposed at the receiving end before being used. Such processing simplifies the process of identifying the forward and reverse plug-in states of two electronic devices. In addition, the embodiment of the present invention also provides a variety of pin signal allocation schemes for Type-C interfaces.

Although the embodiments of the present invention are disclosed as the preferred embodiments above, they are not used to limit the claims. Any technician in this field can make possible changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims of the present invention.

For technicians in this field, the present invention can be modified and changed in various ways. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

(Aux+, Aux-): Channel for transmitting configuration data

(Clk+,Clk-): Channel for sending clock signals

(D0+, D0-),…, (Dn+, Dn-): Channel for transmitting data from D0 to Dn

100:First Electronic Equipment

110,210: Send module

1101: Data reordering unit

1102: Forward and reverse insertion consistency judgment unit

120,220: receiving module

200: Second electronic equipment

Aux: configuration data

Clk: clock signal

D, D0, D1, D0/1, Dn: data

Claims (19)

A data transmission method based on a Type-C physical interface is applied to a sending module of a first electronic device, wherein the first electronic device includes a first Type-C physical interface, and a second electronic device includes a second Type-C physical interface, wherein the first Type-C physical interface is connected to the second Type-C physical interface through a Type-C cable, thereby forming multiple pairs of differential signal transmission channels, and the data transmission method includes: receiving a data packet sent by the second electronic device from a first pair of differential signal transmission channels among the multiple pairs of differential signal transmission channels; determining the positive and negative positions of the first Type-C physical interface and the second Type-C physical interface according to the change of the data packet; If the forward and reverse plug-in states of the first Type-C physical interface and the second Type-C physical interface are inconsistent, the first data to the Nth data are transposed and sent through the second pair of differential signal transmission channels to the N+1th pair of differential signal transmission channels, where N is an integer greater than or equal to 2, wherein determining whether the forward and reverse plug-in states of the first Type-C physical interface and the second Type-C physical interface are consistent according to the change of the data packet includes: for the data packet, if the received bit sequence is opposite to the sent bit sequence, then determining that the forward and reverse plug-in states of the first Type-C physical interface and the second Type-C physical interface are inconsistent. The data transmission method as described in claim 1 further includes: transmitting configuration data through the first pair of differential signal transmission channels, and the configuration data is inverted and used when the forward and reverse insertion states of the first Type-C physical interface and the second Type-C physical interface are inconsistent. The data transmission method as described in claim 1 further includes: using the N+2 pair of differential signal transmission channels and the N+3 pair of differential signal transmission channels to respectively send the same clock signal, and the pins of the N+2 pair of differential signal transmission channels and the N+3 pair of differential signal transmission channels are two pairs of differential pins located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical. The data transmission method as described in claim 1, wherein the pins of the first pair of differential signal transmission channels are (A8, B8). The data transmission method as described in claim 1, wherein, in high-speed mode, the pins from the second pair of differential signal transmission channels to the N+1th pair of differential data transmission channels are two pairs of differential pins (A2, A3), (B2, B3), (A11, A10) and (B11, B10) located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical. The data transmission method as described in claim 3, wherein, in high-speed mode, the pins of the N+2th pair of differential signal transmission channels and the N+3th pair of differential signal transmission channels are two pairs of differential pins (A2, A3), (B2, B3), (A11, A10) and (B11, B10) located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical. The data transmission method as described in claim 1, wherein, in low-speed mode, the pins from the second pair of differential signal transmission channels to the N+1th pair of differential data transmission channels are (A2, A3), (B2, B3), (A11, A10), (B11, B10), (A6, A7) and (B6, B7), wherein (A6, A7) and (B6, B7) are bound for use. The data transmission method as described in claim 3, wherein, in low-speed mode, the pins of the N+2 pair of differential signal transmission channels and the N+3 pair of differential signal transmission channels are two pairs of differential pins located on both sides of the Type-C physical interface and rotated 180 degrees symmetrically among (A2, A3), (B2, B3), (A11, A10), (B11, B10), (A6, A7) and (B6, B7), and (A6, A7) and (B6, B7) are bound for use. A data transmission method based on a Type-C physical interface is applied to a receiving module of a second electronic device. The first electronic device includes a first Type-C physical interface, and the second electronic device includes a second Type-C physical interface. The first Type-C physical interface is connected to the second Type-C physical interface through a Type-C cable, thereby forming multiple pairs of differential signal transmission channels. The method includes: receiving a data packet sent by the first electronic device from a first pair of differential signal transmission channels among the multiple pairs of differential signal transmission channels; and determining the forward and reverse insertion status of the first Type-C physical interface and the second Type-C physical interface according to the change of the data packet. If the forward and reverse plugging states of the first Type-C physical interface and the second Type-C physical interface are inconsistent, the first data to the Nth data received through the second pair of differential signal transmission channels to the N+1th pair of differential data transmission channels are transposed, where N is an integer greater than or equal to 2, wherein determining whether the forward and reverse plugging states of the first Type-C physical interface and the second Type-C physical interface are consistent according to the change of the data packet includes: for the data packet, if the received bit sequence is opposite to the sent bit sequence, then determining that the forward and reverse plugging states of the first Type-C physical interface and the second Type-C physical interface are inconsistent. The data transmission method as described in claim 9 further includes: using the N+2 pair of differential signal transmission channels and the N+3 pair of differential signal transmission channels to respectively send the same clock signal, and the pins of the N+2 pair of differential signal transmission channels and the N+3 pair of differential signal transmission channels are two pairs of differential pins located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical. An electronic device, comprising a first Type-C physical interface, wherein the first Type-C physical interface is connected to a second Type-C physical interface of another electronic device through a Type-C cable, thereby forming multiple pairs of differential signal transmission channels, wherein the electronic device comprises a sending module, wherein the sending module comprises: a forward and reverse insertion consistency judgment unit, configured to receive the first pair of differential signal transmission channels of the multiple pairs of differential signal transmission channels from the second pair of differential signal transmission channels of the other electronic device; A data packet of an electronic device, for which, if the received bit sequence is opposite to the sent bit sequence, it is determined that the forward and reverse plugging states of the electronic device and another electronic device are inconsistent; a data rearrangement unit, for, when the forward and reverse plugging states of the electronic device and another electronic device are inconsistent, transposing the first data to the Nth data and sending them out through the second pair of differential signal transmission channels to the N+1th pair of differential signal transmission channels, where N is an integer greater than or equal to 2. The electronic device as described in claim 11 further includes: using the N+2 pair of differential signal transmission channels and the N+3 pair of differential signal transmission channels to respectively send the same clock signal, and the pins of the N+2 pair of differential signal transmission channels and the N+3 pair of differential signal transmission channels are two pairs of differential pins located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical. An electronic device as described in claim 11, wherein the pins of the first pair of differential signal transmission channels are (A8, B8). An electronic device as described in claim 11, wherein, in high-speed mode, the pins from the second pair of differential signal transmission channels to the N+1th pair of differential signal transmission channels are two pairs of differential pins (A2, A3), (B2, B3), (A11, A10) and (B11, B10) located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical. An electronic device as described in claim 12, wherein, in high-speed mode, the pins of the N+2nd pair of differential signal transmission channels and the N+3rd pair of differential signal transmission channels are two pairs of differential pins (A2, A3), (B2, B3), (A11, A10) and (B11, B10) located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical. An electronic device as claimed in claim 11, wherein, in low-speed mode, the pins from the second pair of differential signal transmission channels to the N+1th pair of differential signal transmission channels are (A2, A3), (B2, B3), (A11, A10), (B11, B10), (A6, A7) and (B6, B7), wherein (A6, A7) and (B6, B7) must be bound for use. An electronic device as described in claim 12, wherein, in low-speed mode, the pins of the N+2nd pair of differential signal transmission channels and the N+3rd pair of differential signal transmission channels are two pairs of differential pins located on both sides of the Type-C physical interface and rotated 180 degrees to be symmetrical, among (A2, A3), (B2, B3), (A11, A10), (B11, B10), (A6, A7) and (B6, B7). An electronic device, comprising a first Type-C physical interface, the first Type-C physical interface is connected to a second Type-C physical interface of another electronic device through a Type-C cable, thereby forming multiple pairs of differential signal transmission channels, the electronic device comprises a receiving module, the receiving module comprises: a forward and reverse insertion consistency judgment unit, used to receive the first pair of differential signal transmission channels of the multiple pairs of differential signal transmission channels from the other electronic device The electronic device receives a data packet of the device, and if the received bit sequence is opposite to the sent bit sequence for the data packet, it is determined that the forward and reverse insertion states of the electronic device and the other electronic device are inconsistent; the data reordering unit is used to perform bit-swapping processing on the first data to the Nth data received through the second pair of differential signal transmission channels to the N+1th pair of differential data transmission channels when the forward and reverse insertion states of the electronic device and the other electronic device are inconsistent, where N is an integer greater than or equal to 2. A data transmission system, wherein the data transmission system is formed by cascading the electronic devices described in any one of claims 11 to 18.

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