TWI724909B - Ac impedance measurement circuit with calibration function - Google Patents
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本發明關於一種交流阻抗測量電路,且特別是一種具有校正功能, 並且計算開關電路的等效阻抗,進而補償測量結果,提高測量精密度的測量電路。 The present invention relates to an AC impedance measurement circuit, and in particular to a correction function, And calculate the equivalent impedance of the switch circuit, and then compensate the measurement result, improve the measurement accuracy of the measurement circuit.
交流阻抗測量電路廣泛應用在人體阻抗測量中,讓使用者關注自 身人體脂肪的含量,進而更準確的把握自身的健康狀況。和直流阻抗測量電路相比,雖然直流阻抗測量電路較簡單,但缺點是測量結果包含人體皮膚阻抗,讓人體總阻抗測量結果的準確度變差。交流阻抗測量電路可以降低皮膚阻抗對測量結果的影響,並且準確分析人體等效交流阻抗以及相位特徵。 AC impedance measurement circuit is widely used in human body impedance measurement, allowing users to pay attention to self Body fat content, and then more accurately grasp one's own health status. Compared with the DC impedance measurement circuit, although the DC impedance measurement circuit is simpler, the disadvantage is that the measurement result includes the impedance of the human skin, and the accuracy of the measurement result of the total impedance of the human body becomes worse. The AC impedance measurement circuit can reduce the influence of skin impedance on the measurement results, and accurately analyze the equivalent AC impedance and phase characteristics of the human body.
中國專利第105662411號發明專利中,揭露了一種交流阻抗測 量電路,其中利用正弦電流發生器產生正弦激勵電流,用於施加在待測人體兩端,待測人體兩端產生一正弦電壓信號,經由整流濾波電路的輸出判斷人體等效阻抗。 In Chinese Patent No. 105662411 Invention Patent, an AC impedance measurement is disclosed A measurement circuit in which a sinusoidal current generator is used to generate a sinusoidal excitation current, which is applied to both ends of the human body to be measured, and a sinusoidal voltage signal is generated at both ends of the human body to be measured, and the equivalent impedance of the human body is judged through the output of the rectifier filter circuit.
美國專利第US10,551,469號發明專利中,揭露一種交流阻抗 測量電路以及校正電路,設計兩個校正阻抗和待測物並聯,並且可以用開關切換選擇測量校正阻抗或者待測物的阻抗,又利用校正阻抗的測量結果進行校正,校正測量結果後可提高交流阻抗測量的精確度。 U.S. Patent No. US10,551,469 discloses an AC impedance The measuring circuit and the correction circuit are designed to connect two correction impedances in parallel with the object to be measured, and the switch can be used to select the measurement correction impedance or the impedance of the object to be measured, and the measurement results of the corrected impedance are used for correction. After the measurement results are corrected, the AC can be improved. The accuracy of impedance measurement.
上述之現有技術,交流阻抗測量電路進行校正時,都需要外接2 個校正阻抗,實際應用上並不方便。此外,和待測物串聯之開關本身也具有阻抗,會影響到測量結果的精確度。因此需要更便利的校正電路與校正方法,並且補償開關電路的等效阻抗值,提升實際應用的便利性以及測量的精確度。 In the above-mentioned prior art, when the AC impedance measurement circuit is calibrated, an external connection is required. A correction impedance is not convenient in practical applications. In addition, the switch connected in series with the DUT also has impedance, which will affect the accuracy of the measurement result. Therefore, a more convenient correction circuit and correction method are needed, and the equivalent impedance value of the switching circuit is compensated, so as to improve the convenience of practical application and the accuracy of measurement.
本發明揭露一種具有校正功能之交流阻抗測量電路,包含一波形 產生電路,包含一弦波信號輸出端用來輸出一弦波信號,以及一時脈信號輸出端用來輸出一時脈信號;一第一放大器,該第一放大器之正輸入端連接至該弦波信號輸出端;一開關電路,與該第一放大器之負輸入端以及該第一放大器之輸出端相連接;一待測阻抗及一校正阻抗,連接至該開關電路;一第二放大器,該第二放大器之正輸入端連接至一參考電壓,該第二放大器之負輸入端連接至該待測阻抗或該校正阻抗;一參考阻抗,連接於該第二放大器之負輸入端以及該第二放大器之輸出端之間;以及一取樣電路,接收該波形產生電路之該時脈信號,並且連接至該參考阻抗之兩端;其中該開關電路包含複數個開關,藉由控制該些開關,使得該第一放大器和該第二放大器之間連接該待測阻抗或該校正阻抗,或者使該校正阻抗多連接一開關。 The present invention discloses an AC impedance measurement circuit with correction function, including a waveform The generating circuit includes a sine wave signal output terminal for outputting a sine wave signal, and a clock signal output terminal for outputting a clock signal; a first amplifier, the positive input terminal of the first amplifier is connected to the sine wave signal Output terminal; a switch circuit connected to the negative input terminal of the first amplifier and the output terminal of the first amplifier; an impedance to be measured and a correction impedance connected to the switch circuit; a second amplifier, the second The positive input terminal of the amplifier is connected to a reference voltage, the negative input terminal of the second amplifier is connected to the impedance to be measured or the correction impedance; a reference impedance is connected to the negative input terminal of the second amplifier and the second amplifier Between the output terminals; and a sampling circuit that receives the clock signal of the waveform generating circuit and is connected to both ends of the reference impedance; wherein the switch circuit includes a plurality of switches, and by controlling the switches, the first The impedance to be measured or the corrected impedance is connected between an amplifier and the second amplifier, or an additional switch is connected to the corrected impedance.
上述之交流阻抗測量電路,其中該開關電路包含:一第一開關, 連接於該第一放大器之負輸入端以及該校正阻抗之間;一第二開關,連接於該第一放大器之負輸入端以及該第一放大器之輸出端之間;一第三開關,連接於該第一放大器之輸出端以及該待測阻抗之間;以及一第四開關,連接於該第一放大器之輸出端以及該校正阻抗之間。 The AC impedance measurement circuit described above, wherein the switch circuit includes: a first switch, Connected between the negative input terminal of the first amplifier and the correction impedance; a second switch connected between the negative input terminal of the first amplifier and the output terminal of the first amplifier; a third switch connected to Between the output terminal of the first amplifier and the impedance to be measured; and a fourth switch connected between the output terminal of the first amplifier and the correction impedance.
本發明揭露另一種交流阻抗測量電路架構,包含一波形產生電 路,包含一弦波信號輸出端,用來輸出一弦波信號,以及一時脈信號輸出端,用來輸出一時脈信號;一參考阻抗,直接連接至該弦波信號輸出端,或者透過一第一放大器和該弦波信號輸出端連接,其中該第一放大器之正輸入端連接至該弦波信號輸出端,該第一放大器之負輸入端以及該第一放大器之輸出端都連接至該參考阻抗;一第二放大器,該第二放大器之正輸入端連接至一參考電壓,該第二放大器之負輸入端連接至該參考阻抗;一開關電路、一待測阻抗以及一校正阻抗,連接於該第二放大器之負輸入端以及輸出端之間;以及一取樣電路,接收該波形產生電路產生之時脈信號,並且連接至該第二放大器之輸出端,該第二放大器之負輸入端或者該開關電路之內部端點;其中該開關電路包含複數個開關,藉由控制該些開關,使得該第二放大器之負輸入端和該第二放大器之輸出端之間連接該待測阻抗或該校正阻抗,或者使該校正阻抗多連接一開關。 The present invention discloses another AC impedance measurement circuit architecture, including a waveform generating circuit Circuit, including a sine wave signal output terminal, used to output a sine wave signal, and a clock signal output terminal, used to output a clock signal; a reference impedance, directly connected to the sine wave signal output terminal, or through a first An amplifier is connected to the sine wave signal output terminal, wherein the positive input terminal of the first amplifier is connected to the sine wave signal output terminal, the negative input terminal of the first amplifier and the output terminal of the first amplifier are both connected to the reference Impedance; a second amplifier, the positive input of the second amplifier is connected to a reference voltage, the negative input of the second amplifier is connected to the reference impedance; a switch circuit, an impedance to be measured and a correction impedance, connected to Between the negative input terminal and the output terminal of the second amplifier; and a sampling circuit that receives the clock signal generated by the waveform generating circuit and is connected to the output terminal of the second amplifier, the negative input terminal of the second amplifier or The internal terminal of the switch circuit; wherein the switch circuit includes a plurality of switches, and by controlling the switches, the negative input terminal of the second amplifier and the output terminal of the second amplifier are connected to the impedance to be measured or the Correct the impedance, or connect an additional switch to the corrected impedance.
上述之交流阻抗測量電路,其中該開關電路包含:一第一開關, 其中一端連接至該第二放大器之負輸入端或輸出端,另一端連接至該校正阻抗;一第二開關,其中一端連接至該第二放大器之負輸入端或輸出端;一第三開關,連接於該待測阻抗與該第二開關的另一端之間;以及一第四開關,其中一端連接至該校正阻抗,另一端連接至該第二開關與該第三開關之共同接點。 The AC impedance measurement circuit described above, wherein the switch circuit includes: a first switch, One end is connected to the negative input or output end of the second amplifier, and the other end is connected to the correction impedance; a second switch, one end of which is connected to the negative input or output end of the second amplifier; a third switch, It is connected between the impedance to be measured and the other end of the second switch; and a fourth switch, one end of which is connected to the correction impedance, and the other end is connected to the common contact of the second switch and the third switch.
本發明揭露另一種交流阻抗測量電路架構,包含一波形產生電 路,包含一弦波信號輸出端,用來輸出一弦波信號,以及一時脈信號輸出端,用來輸出一時脈信號;一參考阻抗,直接連接至該弦波信號輸出端,或者透過一第一放大器和該弦波信號輸出端連接,其中該第一放大器之正輸入端連接至該弦波信號輸出端,該第一放大器之負輸入端以及該第一放大器之輸出端都連接至該參考阻抗;一第二放大器,該第二放大器之正輸入端連接至一參考電壓,該第二放大器之負輸入端連接至該參考阻抗;一待測阻抗及一校正阻抗,連接至該第二放大器之負輸入端;一開關電路,連接於該待測阻抗或該校正阻抗以及該第二放大器之輸出端之間;以及一取樣電路,接收該波形產生電路之該時脈信號,並且連接至該第二放大器之負輸入端,又連接至該第二放大器之輸出端或者該開關電路之內部端點;其中該開關電路包含複數個開關,藉由控制該些開關,使得該第二放大器之負輸入端和該第二放大器之輸出端之間連接該待測阻抗或該校正阻抗,或者使該校正阻抗多連接一開關。 The present invention discloses another AC impedance measurement circuit architecture, including a waveform generating circuit Circuit, including a sine wave signal output terminal, used to output a sine wave signal, and a clock signal output terminal, used to output a clock signal; a reference impedance, directly connected to the sine wave signal output terminal, or through a first An amplifier is connected to the sine wave signal output terminal, wherein the positive input terminal of the first amplifier is connected to the sine wave signal output terminal, the negative input terminal of the first amplifier and the output terminal of the first amplifier are both connected to the reference Impedance; a second amplifier, the positive input of the second amplifier is connected to a reference voltage, the negative input of the second amplifier is connected to the reference impedance; an impedance to be measured and a correction impedance, connected to the second amplifier The negative input terminal; a switch circuit connected between the impedance to be measured or the corrected impedance and the output terminal of the second amplifier; and a sampling circuit that receives the clock signal of the waveform generating circuit and is connected to the The negative input terminal of the second amplifier is connected to the output terminal of the second amplifier or the internal terminal of the switch circuit; wherein the switch circuit includes a plurality of switches, and by controlling the switches, the negative input of the second amplifier The input terminal and the output terminal of the second amplifier are connected to the impedance to be measured or the corrected impedance, or the corrected impedance is connected to a switch.
上述之交流阻抗測量電路,其中該開關電路包含:一第一開關, 連接於該第二放大器之輸出端以及該校正阻抗之間;一第二開關,其中一端連接至該第二放大器之輸出端;一第三開關,連接於該待測阻抗與該第二開關的另一端之間;以及一第四開關,其中一端連接至該校正阻抗,另一端連接至該第二開關與該第三開關之共同接點。 The AC impedance measurement circuit described above, wherein the switch circuit includes: a first switch, Connected between the output terminal of the second amplifier and the correction impedance; a second switch, one end of which is connected to the output terminal of the second amplifier; a third switch, connected to the impedance to be measured and the second switch Between the other end; and a fourth switch, one end of which is connected to the correction impedance, and the other end is connected to the common contact of the second switch and the third switch.
本發明之各種交流阻抗測量電路,其中該開關電路包含一第一 校正模式,導通該第二開關以及該第四開關;一第二校正模式,導通該第一開關以及該第四開關;以及一測量模式,導通該第二開關以及該第三開關;另外對於該取樣電路連接至該第二放大器之負輸入端以及輸出端之架構,該第二校正模式可以不用導通該第四開關。 Various AC impedance measurement circuits of the present invention, wherein the switch circuit includes a first In a calibration mode, the second switch and the fourth switch are turned on; in a second calibration mode, the first switch and the fourth switch are turned on; and in a measurement mode, the second switch and the third switch are turned on; The sampling circuit is connected to the structure of the negative input terminal and the output terminal of the second amplifier, and the second calibration mode does not need to turn on the fourth switch.
本發明之各種交流阻抗測量電路,其中該波形產生電路包含:一 數位波形合成電路,用來輸出一數位形式弦波信號,以及一數位類比轉換電路,把該數位形式弦波信號轉換成類比形式的該弦波信號。 Various AC impedance measurement circuits of the present invention, wherein the waveform generating circuit includes: a The digital waveform synthesis circuit is used to output a digital form of sine wave signal, and a digital analog conversion circuit to convert the digital form of the sine wave signal into the analog form of the sine wave signal.
本發明之各種交流阻抗測量電路,其中該取樣電路包含一數位量 化電路,把類比形式的取樣信號轉換成數位形式的信號。 Various AC impedance measurement circuits of the present invention, wherein the sampling circuit includes a digital quantity The conversion circuit converts the sampled signal in analog form into a signal in digital form.
本發明之各種交流阻抗測量電路,其中藉由調整該弦波信號以及 該時脈信號之相位差,控制該取樣電路之取樣時間點,進而針對該第二放大器之輸出端之信號,取得無相位差異之同相位取樣或積分結果,稱為同相位數值,並且取得相位差90度之正交相位取樣或積分結果,稱為正交相位數值;其中上述之積分結果,可以是針對該時脈信號的一個週期進行積分的結果,或者是針對該時脈信號的前半週期積分數值,再減去針對該時脈信號的後半週期積分數值的結果;並且計算交流電導數值的方式為同相位數值以及正交相位數值之平方和的二分之一次方,以及計算交流電導相位值的方式為正交相位數值除以同相位數值,再代入反正切函數之計算結果。 In the various AC impedance measurement circuits of the present invention, by adjusting the sine wave signal and The phase difference of the clock signal controls the sampling time point of the sampling circuit, and then obtains the same-phase sampling or integration result without phase difference for the signal at the output of the second amplifier, which is called the same-phase value, and obtains the phase The quadrature phase sampling or integration result with a difference of 90 degrees is called the quadrature phase value; the above-mentioned integration result can be the result of integrating for one cycle of the clock signal, or for the first half cycle of the clock signal The integral value is subtracted from the result of the second half-period integral value for the clock signal; and the method of calculating the AC conductance value is the square sum of the in-phase value and the quadrature phase value, and the AC conductance is calculated The phase value is divided by the quadrature phase value by the in-phase value, and then substituted into the calculation result of the arctangent function.
本發明之各種交流阻抗測量電路,其中藉由調整該弦波信號以及 該時脈信號之相位差,調整該取樣電路之取樣時間點,進而針對該第二放大器之輸出端之信號,取得無相位差異以及相位差180度的取樣或積分結果,兩個積分結果相減取得同相位取樣或積分結果,稱為同相位數值,並且另外取得相位差90度以及相位差270度的取樣或積分結果,兩個積分結果相減取得正交相位取樣或積分結果,稱為正交相位數值;其中上述之積分結果,可以是針對該弦波信號的一個週期進行積分的結果,或者是針對該弦波信號的前半週期積分數值,再減去針對該弦波信號的後半週期積分數值的結果;並且計算交流電導數值的方式為同相位數值以及正交相位數值之平方和的二分之一次方,以及計算交流電導相位值的方式為正交相位數值除以同相位數值,再代入反正切函數之計算結果。 In the various AC impedance measurement circuits of the present invention, by adjusting the sine wave signal and For the phase difference of the clock signal, adjust the sampling time point of the sampling circuit, and then obtain the sampling or integration result with no phase difference and a phase difference of 180 degrees for the signal at the output of the second amplifier, and the two integration results are subtracted Obtain in-phase sampling or integration results, which are called in-phase values, and additionally obtain sampling or integration results with a phase difference of 90 degrees and a phase difference of 270 degrees. The two integration results are subtracted to obtain a quadrature phase sampling or integration result, which is called positive Cross-phase value; the above-mentioned integration result can be the result of integrating for one cycle of the sine wave signal, or the value of the integration for the first half cycle of the sine wave signal, minus the integration for the second half cycle of the sine wave signal The result of the numerical value; and the method of calculating the AC conductance value is the in-phase value and the quadrature phase value to the square of the square, and the method of calculating the AC conductance phase value is the quadrature phase value divided by the in-phase value, Then substitute the calculation result of the arctangent function.
本發明之各種交流阻抗測量電路,更包含利用該第一校正模式以 及該第二校正模式分別取得之交流電導數值的數值差異,以及該校正阻抗之阻抗值,計算該第四開關之等效阻抗值;或者利用該校正阻抗之阻抗值或者該第四開關之等效阻抗值與交流電導數值的比例推算增益;或者該交流阻抗測量電路之相位延遲,即為該第一校正模式取得之交流電導相位值或者該第二校正模式之交流電導相位值;另外該測量模式之交流阻抗測量結果,可以扣掉和該待測阻抗串聯之開關之等效阻抗值,推算精確之該待測阻抗之阻抗值。 The various AC impedance measurement circuits of the present invention further include using the first calibration mode to And the value difference between the AC conductance values obtained in the second calibration mode, and the impedance value of the calibration impedance, calculate the equivalent impedance value of the fourth switch; or use the impedance value of the calibration impedance or the fourth switch, etc. The gain is calculated by the ratio of the effective impedance value to the AC conductance value; or the phase delay of the AC impedance measurement circuit is the AC conductance phase value obtained in the first calibration mode or the AC conductance phase value in the second calibration mode; in addition, the measurement For the AC impedance measurement result of the mode, the equivalent impedance value of the switch connected in series with the impedance to be measured can be deducted to calculate the accurate impedance value of the impedance to be measured.
本發明之各種交流阻抗測量電路,其中該第四開關之等效阻抗, 其計算方式為該第二校正模式之交流電導數值除以該第一校正模式之交流電導數值,減去1之後再乘以該校正阻抗之電阻值,或者該交流阻抗測量電路之增益為該第二校正模式之電導測量結果乘以該校正阻抗之電阻值;另外對於該取樣電路連接至該第二放大器之負輸入端以及輸出端之架構,該第四開關之等效阻抗之計算方式,為「該第二校正模式之交流電導數值減去該第一校正模式之交流電導數值」,除以「該第一校正模式之交流電導數值乘以2再減去該第二校正模式之交流電導數值」,再乘以該校正阻抗之電阻值,或者該交流阻抗測量電路之增益為該第二校正模式之電導測量結果乘以「該校正阻抗之電阻值加上該第四開關之等效阻抗值」。 In the various AC impedance measurement circuits of the present invention, the equivalent impedance of the fourth switch is The calculation method is that the AC conductance value of the second calibration mode is divided by the AC conductance value of the first calibration mode, subtracted by 1, and then multiplied by the resistance value of the calibration impedance, or the gain of the AC impedance measurement circuit is the first The conductance measurement result of the second calibration mode is multiplied by the resistance value of the calibration impedance; in addition, for the configuration where the sampling circuit is connected to the negative input terminal and output terminal of the second amplifier, the equivalent impedance of the fourth switch is calculated as "The AC conductance value of the second calibration mode minus the AC conductance value of the first calibration mode", divided by "The AC conductance value of the first calibration mode multiplied by 2 and minus the AC conductance value of the second calibration mode ", multiplied by the resistance value of the correction impedance, or the gain of the AC impedance measurement circuit is the conductance measurement result of the second correction mode multiplied by "the resistance value of the correction impedance plus the equivalent impedance value of the fourth switch ".
本發明之交流阻抗測量電路,如果該第三開關的等效阻抗值和該 第三開關的等效阻抗值越匹配,校正效果越精準。 In the AC impedance measurement circuit of the present invention, if the equivalent impedance value of the third switch and the The more matched the equivalent impedance value of the third switch is, the more accurate the correction effect is.
本段文字提取和編譯本發明的部分特色;其他特色將被描述 於後續段落裏。它的目的是涵蓋包含於其後專利範圍的精神與範圍中,不同的潤飾與相似的安排方式。 This paragraph text extracts and compiles some features of the present invention; other features will be described In the subsequent paragraphs. Its purpose is to cover the spirit and scope included in the subsequent patent scope, different modifications and similar arrangements.
本發明將參照下述實施例而更明確地描述。請注意本發明的實 施例的以下描述,僅止於描述用途;這不意味為本發明已詳盡的描述或限制於該揭露之形式。 The present invention will be more specifically described with reference to the following examples. Please note the practicality of the present invention The following description of the embodiments is only for the purpose of description; this does not mean that the present invention has been described in detail or is limited to the form of the disclosure.
本發明之第一實施例請參閱第1圖,其顯示一種交流阻抗測量
電路,包含一波形產生電路10,包含一弦波信號輸出端用來輸出一弦波信號,以及一時脈信號輸出端用來輸出一時脈信號;一第一放大器20,該第一放大器20之正輸入端連接至該弦波信號輸出端;一開關電路30,與該第一放大器20之負輸入端以及該第一放大器20之輸出端相連接;一待測阻抗401以及一校正阻抗402,連接至該開關電路30;一第二放大器50,該第二放大器50之正輸入端連接至一參考電壓,該第二放大器50之負輸入端連接至該待測阻抗401以及該校正阻抗402;一參考阻抗403,連接於該第二放大器50之負輸入端以及該第二放大器50之輸出端之間;以及一類比數位轉換電路60,連接至該波形產生電路10之時脈信號輸出端以及該參考阻抗403之兩端。
Please refer to Figure 1 for the first embodiment of the present invention, which shows an AC impedance measurement
The circuit includes a
上述之交流阻抗測量電路,其中該開關電路30包含:一第一開關
SW1,連接於該第一放大器20之負輸入端以及該校正阻抗402之間;一第二開關SW2,連接於該第一放大器20之負輸入端以及該第一放大器20之輸出端之間;一第三開關SW3,連接於該第一放大器20之輸出端以及該待測阻抗401之間;以及一第四開關SW4,連接於該第一放大器20之輸出端以及該校正阻抗402之間。藉由控制該些開關(SW1~SW4),使得該第一放大器20和該第二放大器50之間連接該待測阻抗401或該校正阻抗402,或者使該校正阻抗多連接一開關(SW1~SW4)。
The aforementioned AC impedance measurement circuit, wherein the
上述之交流阻抗測量電路,其中該開關電路30包含一第一校正模
式,導通該第二開關SW2以及該第四開關SW4;一第二校正模式,導通該第一開關SW1以及該第四開關SW4;以及一測量模式,導通該第二開關SW2以及該第三開關SW3。
The AC impedance measurement circuit described above, wherein the
上述之該第一校正模式,請參閱第2圖,導通該第二開關SW2以
及該第四開關SW4,讓該第一放大器20之負輸入端透過該第二開關SW2連接至該第一放大器20之輸出端,並且讓該校正阻抗402透過該第四開關SW4連接至該第一放大器20之輸出端。在該第一校正模式中,該第一放大器20之輸出端和該第二放大器50之負輸入端連接該第四開關SW4以及該校正阻抗402,讓該交流阻抗測量電路針對該第四開關SW4之等效阻抗和該校正阻抗402串聯之阻抗值進行測量。
For the above-mentioned first calibration mode, please refer to Fig. 2, turning on the second switch SW2 to
And the fourth switch SW4, allowing the negative input terminal of the
上述之該第二校正模式,請參閱第3圖,導通該第一開關SW1以
及該第四開關SW4,讓該第一放大器20之負輸入端透過該第一開關SW1以及該第四開關SW4連接至該第一放大器20之輸出端,並且讓該校正阻抗402透過該第四開關SW4連接至該第一放大器20之輸出端。在該第二校正模式中,該第一開關SW1以及該第四開關SW4可以視為該第一放大器20的開關電路,因此讓該交流阻抗測量電路針對該校正阻抗402之阻抗值進行測量。
For the above-mentioned second calibration mode, please refer to Figure 3, turning on the first switch SW1 to
And the fourth switch SW4, allowing the negative input end of the
上述之該測量模式,請參閱第4圖,導通該第二開關SW2以及該
第三開關SW3,讓該第一放大器20之負輸入端透過該第二開關SW2連接至該第一放大器20之輸出端,並且讓該待測阻抗401透過該第三開關SW3連接至該第一放大器20之輸出端。在該測量模式中,該交流阻抗測量電路針對該第三開關SW3之等效阻抗和該待測阻抗401串聯之阻抗值進行測量。
For the above-mentioned measurement mode, please refer to Figure 4, turning on the second switch SW2 and the
The third switch SW3 allows the negative input terminal of the
上述之交流阻抗測量電路,藉由調整該波形產生電路10之該弦波
信號以及該時脈信號之相位差,控制該類比數位轉換器60的取樣電路601之取樣時間點,進而針對該第二放大器50之輸出端之信號,取得無相位差異之同相位取樣或積分結果,稱為同相位數值,並且取得相位差90度之正交相位取樣或積分結果,稱為正交相位數值。該波形產生電路10產生的弦波信號經過該第一放大器20、該開關電路30、該待測阻抗401或該校正阻抗402、該參考阻抗403以及該第二放大器20之後,該取樣電路601接收信號時會有相位延遲假設為Θ,如果該波形產生電路10輸出的該弦波信號和該時脈信號沒有相位差,則該取樣電路601之取樣時間點和該弦波信號同步,並且和該第二放大器50之輸出端的信號存在相位延遲Θ。該取樣電路601可以在該時間點取樣或者進行一個完整弦波信號周期的積分,如圖5A所示,在無相位差異的狀況下取得之同相位取樣或積分結果,在此稱為ADC1。
The AC impedance measurement circuit mentioned above, by adjusting the sine wave of the waveform generating
上述之交流阻抗測量電路,如果該波形產生電路10的該弦波信號
和該時脈信號存在90度之相位差,則該取樣電路601和該弦波信號相比,取樣時間點會延遲90度的相位,並且和該第二放大器50之輸出端的信號存在相位延遲為Θ+90度。該取樣電路601可以在該時間點取樣或者進行一個完整弦波信號周期的積分,如圖5B所示,在相位差90度的狀況下取得之正交相位取樣或積分結果,在此稱為ADC2。
The AC impedance measurement circuit mentioned above, if the sine wave signal of the waveform generating
上述之交流阻抗測量電路,在計算同相位的取樣或積分結果時,
另外可以讓該波形產生電路10輸出的該弦波信號和該時脈信號存在180度之相位差,則該取樣電路601和該弦波信號相比,時序上會延遲180度操作,並且和該第二放大器50之輸出端的信號存在相位延遲Θ+180度。讓該取樣電路601瞬間取樣或者進行一個完整周期的積分,如圖5C所示,該取樣或積分的結果簡稱為ADC3,可以利用「(ADC1-ADC3)/2」之算式計算同相位的取樣或積分結果;同理也可以讓該波形產生電路10輸出的該弦波信號和該時脈信號存在270度之相位差,並且和該第二放大器50之輸出端的信號存在相位延遲Θ+270度。讓該取樣電路601瞬間取樣或者進行一個完整周期的積分,如圖5D所示,該取樣或積分的結果簡稱為ADC4,可以利用「(ADC2-ADC4)/2」之算式計算正交相位的取樣或積分結果。
The AC impedance measurement circuit mentioned above, when calculating the sampling or integration results of the same phase,
In addition, the sine wave signal output by the waveform generating
上述之同相位的取樣或積分結果簡稱為「同相位數值(I)」,正交 相位的取樣或積分結果簡稱為「正交相位數值(Q)」,則計算交流電導數值(Y)的方式為同相位數值I以及正交相位數值Q之平方和的二分之一次方,數學式為「Y=(I 2+Q 2) 0.5」;並且計算交流電導相位值(Θ)的方式為正交相位數值除以同相位數值,再代入反正切函數之計算結果,數學式為「Θ=tan -1(Q/I)」。 The above-mentioned in-phase sampling or integration result is referred to as "in-phase value (I)", and quadrature-phase sampling or integration result is referred to as "quadrature phase value (Q)", the method of calculating AC conductance value (Y) It is the one-half power of the sum of the squares of the in-phase value I and the quadrature-phase value Q, the mathematical formula is "Y=(I 2 +Q 2 ) 0.5 "; and the way to calculate the AC conductance phase value (Θ) is The quadrature phase value is divided by the in-phase value, and then substituted into the calculation result of the arctangent function. The mathematical formula is "Θ=tan -1 (Q/I)".
上述之積分結果,係針對該弦波信號的一個週期進行積分的結果, 也可以是針對該弦波信號的前半週期積分數值,再減去針對該弦波信號的後半週期積分數值的結果。 The above integration result is the result of integrating for one period of the sine wave signal, It can also be the result of subtracting the integral value for the first half period of the sine wave signal and subtracting the integral value for the second half period of the sine wave signal.
上述之交流阻抗測量電路,該第一校正模式的計算結果命名為Y1
以及Θ1,對應於該校正阻抗402以及該第四開關SW4之等效阻抗(簡稱為Rs)並聯的等效電導數值以及電導相位值;該第二校正模式的計算結果命名為Y2以及Θ2,對應於該校正阻抗402的等效電導數值以及電導相位值。該實施例中設該校正阻抗402之阻抗值為5.1K歐姆,則推算該第四開關SW4之等效阻抗Rs之數學式為「Rs=5.1K*((Y2/Y1)-1)」。並且增益G之數學式為「G=5.1K*Y2」。
For the AC impedance measurement circuit mentioned above, the calculation result of the first correction mode is named Y1
And Θ1, the equivalent conductance value and conductance phase value in parallel corresponding to the
上述之交流阻抗測量電路,該測量模式的計算結果命名為Y3以及
Θ3,對應於該待測阻抗401以及該第三開關SW3之等效阻抗(簡稱為Rs)並聯的等效電導數值以及電導相位值。在該第三開關SW3和該第四開關SW4的等效阻抗值匹配的情況下,該測量模式的測量結果只要扣掉Rs的阻抗值,就能精確計算該待測阻抗401之阻抗值。因此該待測阻抗之等效阻抗之同相位數值為「I3=Y3*cos(Θ3-Θ1)-Rs」,其中cos()函數代表三角函數中的餘弦函數,至於正交相位數值為「Q3=Y3*sin(Θ3)」,其中sin()函數代表三角函數中的正弦函數;該待測阻抗401之等效串聯電阻值之數學式為「R3=I3=Y3*cos(Θ3)-Rs」,該待測阻抗401之等效串聯電容值之數學式為「C3=1/(2*π*fs*Q3)」,其中fs代表該波形產生電路10輸出的該弦波信號之頻率。
For the AC impedance measurement circuit mentioned above, the calculation result of this measurement mode is named Y3 and
Θ3 corresponds to the parallel equivalent conductance value and conductance phase value of the impedance to be measured 401 and the equivalent impedance of the third switch SW3 (referred to as Rs). When the equivalent impedance values of the third switch SW3 and the fourth switch SW4 match, the measurement result of the measurement mode only needs to subtract the impedance value of Rs to accurately calculate the impedance value of the
上述之交流阻抗測量電路,也可推算該待測阻抗401之等效並聯
電阻值和電容值,其等效電導值為「Y4=(I3
2+Q3
2)
0.5」,其等效阻抗相位值為「Θ4= tan-1(Q3/I3)」,其同相位數值為「I4=Y4*cos(Θ4)」,其正交相位數值為「Q4=Y4*sin(Θ4)」。該待測阻抗401之等效串聯電容值為「C4=Q4/(2*π*fs)」,等效串聯電阻值為「R4=1/I4」。
The aforementioned AC impedance measurement circuit can also calculate the equivalent parallel resistance value and capacitance value of the
本發明之第二實施例請參閱第6圖,其顯示另一種交流阻抗測
量電路,包含一波形產生電路10,用來輸出一弦波信號以及一時脈信號;一第一放大器20,該第一放大器20之正輸入端連接至該波形產生電路10之弦波信號輸出端,該第一放大器20之負輸入端以及該第一放大器20之輸出端皆連接至一參考阻抗403;該參考阻抗403之另一端連接至一開關電路30以及一第二放大器50之負輸入端;該第二放大器50之正輸入端連接至一參考電壓;一待測阻抗以及一校正阻抗,連接於該開關電路30以及該第二放大器50之輸出端之間;以及一類比數位轉換器60,接收該波形產生電路10之時脈信號、該第二放大器50之輸出端以及該第二放大器50之負輸入端之電壓。
For the second embodiment of the present invention, please refer to Figure 6, which shows another AC impedance measurement
The quantity circuit includes a
上述之交流阻抗測量電路,其中該開關電路30包含:一第一開關
SW1,連接於該第二放大器50之負輸入端以及該校正阻抗402之間;一第二開關SW2,一端連接於該第二放大器50之負輸入端,另一端和一第三開關SW3以及一第四開關SW4相連接;該第三開關SW3之另一端連接於該待測阻抗401;以及該第四開關SW4之另一端連接於該校正阻抗402。藉由控制該些開關(SW1~SW4),使得該第二放大器50之負輸入端和該第二放大器50之輸出端之間連接該待測阻抗401或該校正阻抗402,或者使該校正阻抗多連接一開關(SW1~SW4)。
The aforementioned AC impedance measurement circuit, wherein the
上述之交流阻抗測量電路,其中該開關電路30包含一第一校正模
式,導通該第二開關SW2以及該第四開關SW4;一第二校正模式,導通該第一開關SW1;以及一測量模式,導通該第二開關SW2以及該第三開關SW3。
The AC impedance measurement circuit described above, wherein the
上述之該第一校正模式,導通該第二開關SW2以及該第四開關
SW4,讓該第二放大器50之負輸入端透過該第二開關SW2以及該第四開關SW4連接至該校正阻抗402。在該第一校正模式中,該第二放大器50之輸出端和該第二放大器50之負輸入端連接該第二開關SW2、該第四開關SW4以及該校正阻抗402,讓該交流阻抗測量電路針對該第二開關SW2和該第四開關SW4之等效阻抗以及該校正阻抗402串聯之阻抗值進行測量。
The above-mentioned first calibration mode turns on the second switch SW2 and the fourth switch
SW4 allows the negative input terminal of the
上述之該第二校正模式,只需導通該第一開關SW1,讓該第二放
大器50之負輸入端透過該第一開關SW1連接至該校正阻抗402。在該第二校正模式中,該交流阻抗測量電路針對該第一開關SW1之等效阻抗以及該校正阻抗402串聯之阻抗值進行測量。
In the above-mentioned second calibration mode, only the first switch SW1 needs to be turned on, so that the second amplifier
The negative input terminal of the
上述之該測量模式,導通該第二開關SW2以及該第三開關SW3,
讓該第二放大器50之負輸入端透過該第二開關SW2以及該第三開關SW3連接至該待測阻抗401。在該測量模式中,該交流阻抗測量電路針對該第二開關SW2和該第三開關SW3之等效阻抗以及該校正阻抗402串聯之阻抗值進行測量。
In the above-mentioned measurement mode, the second switch SW2 and the third switch SW3 are turned on,
The negative input terminal of the
上述之交流阻抗測量電路,計算同相位以及正交相位的取樣或積 分結果的方法和第一實施例的描述相同。計算交流電導數值(Y)以及交流電導相位值(Θ)的方式也和第一實施例的描述相同。 The AC impedance measurement circuit mentioned above calculates the sampling or product of the same phase and quadrature phase The method of dividing the results is the same as that described in the first embodiment. The method of calculating the AC conductance value (Y) and the AC conductance phase value (Θ) is also the same as that described in the first embodiment.
上述之交流阻抗測量電路,該第一校正模式的計算結果命名為Y1
以及Θ1,對應於該校正阻抗402、該第二開關SW2以及該第四開關SW4之等效阻抗並聯的等效電導數值以及電導相位值;該第二校正模式的計算結果命名為Y2以及Θ2,對應於該校正阻抗402以及該第一開關SW1之等效阻抗並聯的等效電導數值以及電導相位值。和第一實施例相比,該第一校正模式和該第二校正模式在測量該校正電阻402時,皆多串聯了一個開關(SW1或SW2),因此計算式調整如下。該第二實施例中,設該校正阻抗402之阻抗值為5.1K歐姆,並假設該第二開關SW2以及該第四開關SW4之等效阻抗皆為Rs,則數學式為「Rs=5.1K*(Y2-Y1)/(2Y1-Y2)」。並且增益G之數學式為「G=(5.1K+Rs)*Y2」。
For the AC impedance measurement circuit mentioned above, the calculation result of the first correction mode is named Y1
And Θ1, the equivalent conductance value and conductance phase value corresponding to the parallel connection of the
第二實施例中,該測量模式的計算結果Y3以及Θ3,對應於該待測
阻抗401、該第二開關SW2以及該第三開關SW3之等效阻抗並聯的等效電導數值以及電導相位值。在該些開關(SW1~SW4)的等效阻抗值匹配的情況下(皆簡稱為Rs),該測量模式的測量結果只要扣掉2*Rs,就能精確計算該待測阻抗401之阻抗值。因此該待測阻抗之等效阻抗之同相位數值為「I3=Y3*cos(Θ3-Θ1)-2*Rs」,至於正交相位數值為「Q3=Y3*sin(Θ3)」;該待測阻抗401之等效串聯電阻值之數學式為「R3=I3=Y3*cos(Θ3)-2*Rs」,該待測阻抗401之等效串聯電容值之數學式為「C3=1/(2*π*fs*Q3)」。
In the second embodiment, the calculation results Y3 and Θ3 of the measurement mode correspond to the measurement
The equivalent conductance value and conductance phase value of the
第二實施例中也可推算該待測阻抗401之等效並聯電阻值和電
容值,以及等效串聯電阻值和電容值,數學式和第一實施例相同。
In the second embodiment, the equivalent parallel resistance and electrical resistance of the
本發明之第三實施例請參閱第7圖,其顯示另一種交流阻抗測
量電路,包含一波形產生電路10,用來輸出一弦波信號以及一時脈信號;一參考阻抗403,其中一端連接至該波形產生電路10之弦波信號輸出端,另一端連接至一開關電路30以及一第二放大器50之負輸入端;該第二放大器50之正輸入端連接至一參考電壓;一待測阻抗以及一校正阻抗,連接於該開關電路30以及該第二放大器50之輸出端之間;以及一類比數位轉換器60,接收該波形產生電路10之時脈信號、該第二放大器50之輸出端以及該開關電路30之一內部端點之電壓。
The third embodiment of the present invention, please refer to Figure 7, which shows another AC impedance measurement
The measurement circuit includes a
上述之交流阻抗測量電路,其中該開關電路30包含:一第一開關
SW1,連接於該第二放大器50之負輸入端以及該校正阻抗402之間;一第二開關SW2,一端連接於該第二放大器50之負輸入端,另一端和一第三開關SW3以及一第四開關SW4相連接;該第三開關SW3之另一端連接於該待測阻抗401;以及該第四開關SW4之另一端連接於該校正阻抗402。其中該類比數位轉換器60和該第二開關SW2、該第三開關SW3以及該第四開關SW4之共同接點相連接。藉由控制該些開關(SW1~SW4),使得該第二放大器50之負輸入端和該第二放大器50之輸出端之間連接該待測阻抗401或該校正阻抗402,或者使該校正阻抗多連接一開關(SW1~SW4)。
The aforementioned AC impedance measurement circuit, wherein the
上述之交流阻抗測量電路,其中該開關電路30包含一第一校正模
式,導通該第二開關SW2以及該第四開關SW4;一第二校正模式,導通該第一開關SW1;以及一測量模式,導通該第二開關SW2以及該第三開關SW3。
The AC impedance measurement circuit described above, wherein the
上述之該第一校正模式,導通該第二開關SW2以及該第四開關
SW4,讓該第二放大器50之負輸入端透過該第二開關SW2以及該第四開關SW4連接至該校正阻抗402。在該第一校正模式中,該交流阻抗測量電路針對該第四開關SW4之等效阻抗和該校正阻抗402串聯之阻抗值進行測量。
The above-mentioned first calibration mode turns on the second switch SW2 and the fourth switch
SW4 allows the negative input terminal of the
上述之該第二校正模式,導通該第一開關SW1以及該第四開關
SW4,讓該第二放大器50之負輸入端透過該第一開關SW1連接至該校正阻抗402。在該第二校正模式中,該交流阻抗測量電路針對該第一開關SW1之等效阻抗以及該校正阻抗402串聯之阻抗值進行測量,至於該第四開關SW4只是一個讓該類比數位轉換器60接收電壓的路徑,其本身的等效阻抗理論上不會影響測量結果。
The above-mentioned second calibration mode turns on the first switch SW1 and the fourth switch
SW4 allows the negative input terminal of the
上述之該測量模式,導通該第二開關SW2以及該第三開關SW3,
讓該第二放大器50之負輸入端透過該第二開關SW2以及該第三開關SW3連接至該待測阻抗401。在該測量模式中,該交流阻抗測量電路針對該第三開關SW3之等效阻抗和該校正阻抗402串聯之阻抗值進行測量。
In the above-mentioned measurement mode, the second switch SW2 and the third switch SW3 are turned on,
The negative input terminal of the
第三實施例中,計算同相位數值(I)、正交相位數值(Q)、交流電導
數值(Y)、交流電導相位值(Θ)、等效阻抗Rs、增益G,以及該待測阻抗401之等效阻抗的同相位數值(I3)、正交相位數值(Q3)、等效串聯電阻值(R3)、等效串聯電容值(C3)、等效並聯電阻值(R4)、等效並聯電容值(C4)的數學式皆和第一實施例相同。
In the third embodiment, the in-phase value (I), quadrature-phase value (Q), AC conductance are calculated
Value (Y), AC conductance phase value (Θ), equivalent impedance Rs, gain G, and the in-phase value (I3), quadrature phase value (Q3), equivalent series of the equivalent impedance of the
本發明之第四實施例請參閱第8圖,其顯示另一種交流阻抗測
量電路,包含一波形產生電路10,用來輸出一弦波信號以及一時脈信號;一參考阻抗403,其中一端連接至該波形產生電路10之弦波信號輸出端,另一端連接至一第二放大器50之負輸入端,並且和一待測阻抗401以及一校正阻抗402相連接;該第二放大器50之正輸入端連接至一參考電壓;該待測阻抗401以及該校正阻抗402之另一端分別連接於一開關電路30;該開關電路30也和該第二放大器50之輸出端相連接;以及一類比數位轉換器60,接收該波形產生電路10之時脈信號、該第二放大器50之輸出端以及該第二放大器50之負輸入端之電壓。
The fourth embodiment of the present invention, please refer to Figure 8, which shows another AC impedance measurement
The measurement circuit includes a
上述之交流阻抗測量電路,其中該開關電路30包含:一第一開關
SW1,連接於該第二放大器50之輸出端以及該校正阻抗402之間;一第二開關SW2,一端連接於該第二放大器50之輸出端,另一端和一第三開關SW3以及一第四開關SW4相連接;該第三開關SW3之另一端連接於該待測阻抗401;以及該第四開關SW4之另一端連接於該校正阻抗402。藉由控制該些開關(SW1~SW4),使得該第二放大器50之負輸入端和該第二放大器50之輸出端之間連接該待測阻抗401或該校正阻抗402,或者更包含至少一開關(SW1~SW4)。
The aforementioned AC impedance measurement circuit, wherein the
上述之交流阻抗測量電路,其中該開關電路30包含一第一校正模
式,導通該第二開關SW2以及該第四開關SW4;一第二校正模式,導通該第一開關SW1;以及一測量模式,導通該第二開關SW2以及該第三開關SW3。
The AC impedance measurement circuit described above, wherein the
上述之該第一校正模式,導通該第二開關SW2以及該第四開關
SW4,讓該第二放大器50之輸出端透過該第二開關SW2以及該第四開關SW4連接至該校正阻抗402。在該第一校正模式中,該交流阻抗測量電路針對該第二開關SW2之等效阻抗、該第四開關SW4之等效阻抗和該校正阻抗402串聯之阻抗值進行測量。
The above-mentioned first calibration mode turns on the second switch SW2 and the fourth switch
SW4 allows the output terminal of the
上述之該第二校正模式,導通該第一開關SW1,讓該第二放大器
50之輸出端透過該第一開關SW1連接至該校正阻抗402。在該第二校正模式中,該交流阻抗測量電路針對該第一開關SW1之等效阻抗以及該校正阻抗402串聯之阻抗值進行測量。
In the above-mentioned second calibration mode, the first switch SW1 is turned on, so that the second amplifier
The output terminal of 50 is connected to the
上述之該測量模式,導通該第二開關SW2以及該第三開關SW3,
讓該第二放大器50之輸出端透過該第二開關SW2以及該第三開關SW3連接至該待測阻抗401。在該測量模式中,該交流阻抗測量電路針對該第二開關SW3之等效阻抗、該第三開關SW3之等效阻抗和該校正阻抗402串聯之阻抗值進行測量。
In the above-mentioned measurement mode, the second switch SW2 and the third switch SW3 are turned on,
The output terminal of the
第四實施例中,計算同相位數值(I)、正交相位數值(Q)、交流電導
數值(Y)、交流電導相位值(Θ)、等效阻抗Rs、增益G,以及該待測阻抗401之等效阻抗的同相位數值(I3)、正交相位數值(Q3)、等效串聯電阻值(R3)、等效串聯電容值(C3)、等效並聯電阻值(R4)、等效並聯電容值(C4)的數學式皆和第二實施例相同。
In the fourth embodiment, the in-phase value (I), quadrature-phase value (Q), AC conductance are calculated
Value (Y), AC conductance phase value (Θ), equivalent impedance Rs, gain G, and the in-phase value (I3), quadrature phase value (Q3), equivalent series of the equivalent impedance of the
本發明之第五實施例請參閱第9圖,其顯示另一種交流阻抗測
量電路,該電路架構和第四實施例近似,差別在於第四實施例中該第二放大器50之輸出端連接至該類比數位轉換器60,第五實施例中改為該開關電路30中,該第二開關SW2、該第三開關SW3以及該第四開關SW4之共同接點連接至該類比數位轉換器60。至於計算同相位數值(I)、正交相位數值(Q)等數值的計算方式皆和第三實施例相同。
Please refer to Figure 9 for the fifth embodiment of the present invention, which shows another AC impedance measurement
The circuit structure is similar to that of the fourth embodiment. The difference is that the output terminal of the
上述之各種交流阻抗測量電路,其中該波形產生電路10包含一數
位波形合成電路101,用來輸出一數位形式弦波信號;以及一數位類比轉換電路102,把該數位形式弦波信號轉換成一類比形式弦波信號。
The above-mentioned various AC impedance measurement circuits, wherein the
上述之各種交流阻抗測量電路,其中該類比數位轉換器60更包含
一數位量化電路602,把類比形式的取樣或積分結果轉換成數位信號,用來進行上述各數學式之計算。
The above-mentioned various AC impedance measurement circuits, wherein the analog-to-
上述之各種交流阻抗測量電路,其中該第二放大器50之負輸入端
連接的該參考電壓,其電壓值和該波形產生電路之該弦波信號的平均電壓值相同。例如該弦波信號是介於0V到5V之間的交流信號,則該參考電壓的電壓值為2.5V。
The above-mentioned various AC impedance measurement circuits, wherein the negative input terminal of the
雖然本發明已以實施例揭露如上,然其並非用以限定本發明, 任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be subject to the definition of the appended patent scope.
10:波形產生電路10: Waveform generating circuit
101:數位弦波產生器101: Digital Sine Wave Generator
102:數位類比轉換器102: Digital Analog Converter
20:第一放大器20: The first amplifier
30:開關電路30: Switching circuit
SW1:第一開關SW1: The first switch
SW2:第二開關SW2: second switch
SW3:第三開關SW3: third switch
SW4:第四開關SW4: fourth switch
401:待測阻抗401: Impedance to be measured
402:校正阻抗402: Correction impedance
403:參考阻抗403: Reference impedance
50:第二放大器50: second amplifier
60:類比數位轉換器60: Analog-to-digital converter
601:取樣電路601: sampling circuit
602:數位量化電路602: Digital quantization circuit
第1圖繪示一交流阻抗測量電路之架構。 第2圖繪示第1圖之交流阻抗測量電路之第一校正模式的開關導通方式。 第3圖繪示第1圖之交流阻抗測量電路之第二校正模式的開關導通方式。 第4圖繪示第1圖之交流阻抗測量電路之測量模式的開關導通方式。 第5圖繪示交流阻抗測量電路中,藉由控制該時脈信號調整該取樣電路之 取樣時間點之示意圖。 第6圖繪示第二種交流阻抗測量電路之架構。 第7圖繪示第三種交流阻抗測量電路之架構。 第8圖繪示第四種交流阻抗測量電路之架構。 第9圖繪示第五種交流阻抗測量電路之架構。 Figure 1 shows the structure of an AC impedance measurement circuit. Figure 2 shows the switch conduction mode of the first calibration mode of the AC impedance measurement circuit in Figure 1. Figure 3 shows the switch-on mode of the second calibration mode of the AC impedance measurement circuit in Figure 1. Figure 4 shows the switch conduction mode of the measurement mode of the AC impedance measurement circuit in Figure 1. Figure 5 shows the AC impedance measurement circuit, by controlling the clock signal to adjust the sampling circuit Schematic diagram of sampling time points. Figure 6 shows the architecture of the second AC impedance measurement circuit. Figure 7 shows the structure of the third AC impedance measurement circuit. Figure 8 shows the structure of the fourth AC impedance measurement circuit. Figure 9 shows the architecture of the fifth AC impedance measurement circuit.
10:波形產生電路 10: Waveform generating circuit
101:數位弦波產生器 101: Digital Sine Wave Generator
102:數位類比轉換器 102: Digital Analog Converter
20:第一放大器 20: The first amplifier
30:開關電路 30: Switching circuit
401:待測阻抗 401: Impedance to be measured
402:校正阻抗 402: Correction impedance
403:參考阻抗 403: Reference impedance
50:第二放大器 50: second amplifier
60:類比數位轉換器 60: Analog-to-digital converter
601:取樣電路 601: sampling circuit
602:數位量化電路 602: Digital quantization circuit
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