第一實施例The first embodiment
第1A圖至第1I圖係分別為依本發明第一實施例之製程方法於各步驟之對應結構示意圖。請參閱第1A圖以及第1B圖,其中第1A圖為第1B圖中虛線AA’的剖面圖。根據本發明所揭露的光電半導體元件製程,提供一黏結基板101具有一表面1011,形成一黏著結構2在表面1011上,黏著結構2具有一厚度t,於本實施例中,厚度t的範圍介於1μm到10μm之間,較佳的是介於2μm到6μm之間。黏著結構2包含一黏結層202及一犧牲層201,黏結層202與犧牲層201並列在表面1011上與表面1011相接,如第1B圖所示之黏著結構2的上視圖,黏結層202與犧牲層201各具有特定的形狀。Fig. 1A to Fig. 1I are schematic diagrams of the corresponding structure in each step of the manufacturing method according to the first embodiment of the present invention. Please refer to Figure 1A and Figure 1B, where Figure 1A is a cross-sectional view of the dashed line AA' in Figure 1B. According to the photoelectric semiconductor device manufacturing process disclosed in the present invention, a bonding substrate 101 is provided with a surface 1011, and an adhesive structure 2 is formed on the surface 1011. The adhesive structure 2 has a thickness t. In this embodiment, the range of the thickness t is between It is between 1 μm and 10 μm, preferably between 2 μm and 6 μm. The adhesive structure 2 includes an adhesive layer 202 and a sacrificial layer 201. The adhesive layer 202 and the sacrificial layer 201 are juxtaposed on the surface 1011 and connected to the surface 1011. As shown in the top view of the adhesive structure 2 in FIG. The sacrificial layers 201 each have a specific shape.
黏結基板101的材料包含電絕緣基板或導電基板,電絕緣基板的材料包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)、壓克力(Acryl)、氧化鋅(ZnO)、氮化鋁(AlN)、氧化二鋁鋰( LiAlO2)或陶瓷基板等;導電基板的材料包含矽(Si)、砷化鎵( GaAs )、碳化矽( SiC )、氧化鋅( ZnO )、氮化鎵( GaN )、氮化鋁 ( AlN )或金屬材料之一種或其組合。在本實施例中,黏結層202的材質與犧牲層201不同,黏結層202的材料包含苯并環丁烯(BCB);犧牲層201的材料包含有機材料,例如紫外光(UV)解離膠,包含丙烯酸(Acrylic acid)、不飽和聚酯環氧樹脂(Unsaturated polyester)、環氧樹脂(Epoxy)、氧雜環丁烷(Oxetane)、乙烯醚(Vinyl ether)等;熱塑性塑膠,包含尼龍(Nylon)、聚丙烯(PP)、聚對苯二甲酸丁二醇酯(PBT)、聚苯醚(PPO)、聚碳酸酯(PC)、丙烯腈-丁二烯-苯乙烯(ABS)、聚氯乙烯(PVC)等;或者無機材料,例如金屬包含鈦(Ti)、金(Au)、鈹(Be)、鎢(W)、鋁(Al)、鍺(Ge)或其組合,氧化物包含SiOx,或者氮化物包含SiNx等。The material of the bonding substrate 101 includes an electrically insulating substrate or a conductive substrate, and the material of the electrically insulating substrate includes Sapphire, Diamond, Glass, Quartz, Acrylic, and Zinc Oxide (ZnO). ), aluminum nitride (AlN), lithium aluminum oxide (LiAlO2) or ceramic substrates, etc.; conductive substrate materials include silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC), zinc oxide (ZnO), One or a combination of gallium nitride (GaN), aluminum nitride (AlN) or metal materials. In this embodiment, the material of the bonding layer 202 is different from that of the sacrificial layer 201. The material of the bonding layer 202 includes benzocyclobutene (BCB); the material of the sacrificial layer 201 includes organic materials, such as ultraviolet (UV) dissociation glue. Contains acrylic acid (Acrylic acid), unsaturated polyester epoxy resin (Unsaturated polyester), epoxy resin (Epoxy), oxetane (Oxetane), vinyl ether (Vinyl ether), etc.; thermoplastic plastic, including nylon (Nylon) ), polypropylene (PP), polybutylene terephthalate (PBT), polyphenylene ether (PPO), polycarbonate (PC), acrylonitrile-butadiene-styrene (ABS), polychlorine Ethylene (PVC), etc.; or inorganic materials, such as metals containing titanium (Ti), gold (Au), beryllium (Be), tungsten (W), aluminum (Al), germanium (Ge) or combinations thereof, and oxides containing SiOx , Or the nitride contains SiNx and the like.
接續如圖1C所示,提供一成長基板102,在成長基板102上具有以磊晶方式成長的一半導體磊晶疊層3,接著藉由黏著結構2將成長基板102及半導體磊晶疊層3,以加熱、加壓的方式黏結至表面1011上與黏結基板101黏合,其中黏結層202與犧牲層201皆與半導體磊晶疊層3相接。由於黏結層202的材質選擇不同於犧牲層201的材質,用以造成半導體磊晶疊層3與黏結層202之間的黏著力不同於半導體磊晶疊層3與犧牲層201之間的黏著力,在本實施例中,半導體磊晶疊層3與黏結層202之間的黏著力大於半導體磊晶疊層3與犧牲層201之間的黏著力。Next, as shown in FIG. 1C, a growth substrate 102 is provided. On the growth substrate 102 there is a semiconductor epitaxial stack 3 grown in an epitaxial manner, and then the growth substrate 102 and the semiconductor epitaxial stack 3 are bonded by the adhesive structure 2 , It is bonded to the surface 1011 and bonded to the bonding substrate 101 by heating and pressing, wherein the bonding layer 202 and the sacrificial layer 201 are both connected to the semiconductor epitaxial stack 3. Since the material of the bonding layer 202 is different from that of the sacrificial layer 201, the adhesive force between the semiconductor epitaxial stack 3 and the bonding layer 202 is different from the adhesive force between the semiconductor epitaxial stack 3 and the sacrificial layer 201 In this embodiment, the adhesive force between the semiconductor epitaxial stack 3 and the bonding layer 202 is greater than the adhesive force between the semiconductor epitaxial stack 3 and the sacrificial layer 201.
其中,半導體磊晶疊層3包括至少一第一半導體層301具有第一導電型態,一轉換單元302以及一第二半導體層303具有第二導電型態,依序形成於成長基板102之上。第一半導體層301和第二半導體層303可為兩個單層結構或兩個多層結構(多層結構係指兩層或兩層以上)。第一半導體層301和第二半導體層303具有不同的導電型態、電性、極性或依摻雜的元素以提供電子或電洞。當第一半導體層301為p型半導體,第二半導體層303可為相異電性的n型半導體,反之,當第一半導體層301為n型半導體,第二半導體層303可為相異電性的p型半導體。轉換單元302形成在第一半導體層301和第二半導體層303之間,轉換單元302係將光能和電能相互轉換或導致轉換。半導體磊晶疊層3可進一步加工應用於一半導體元件、設備、產品、電路,以進行或導致光能和電能相互轉換。具體而言,半導體磊晶疊層3可進一步加工成為一發光二極體(LED)、一雷射二極體(LD)、一太陽能電池或一液晶顯示器其中之一。以發光二極體為例,可以藉由改變半導體磊晶疊層3裡的其中一層或多層的物理及化學組成,調整發出的光波長。常用的材料為磷化鋁鎵銦(aluminum gallium indium phosphide, AlGaInP)系列、氮化鋁鎵銦(aluminum gallium indium nitride, AlGaInN) 系列、氧化鋅系列(zinc oxide, ZnO)。轉換單元302可為單異質結構(single heterostructure, SH ),雙異質結構(double heterostructure, DH ),雙側雙異質結( double-side double heterostructure, DDH ),多層量子井(multi-quantum well, MWQ ) 。具體來說,轉換單元302可為中性、p型或n型電性的半導體。施以電流通過半導體磊晶疊層3時,轉換單元302會發光。當轉換單元302以磷化鋁銦鎵(AlGaInP)為基礎的材料時,會發出紅、橙、黃光之琥珀色系的光;當以氮化鋁鎵銦(AlGaInN)為基礎的材料時,會發出藍或綠光。The semiconductor epitaxial stack 3 includes at least one first semiconductor layer 301 having a first conductivity type, a conversion unit 302 and a second semiconductor layer 303 having a second conductivity type, which are sequentially formed on the growth substrate 102 . The first semiconductor layer 301 and the second semiconductor layer 303 may have two single-layer structures or two multi-layer structures (a multi-layer structure refers to two or more layers). The first semiconductor layer 301 and the second semiconductor layer 303 have different conductivity types, electrical properties, polarities or doped elements to provide electrons or holes. When the first semiconductor layer 301 is a p-type semiconductor, the second semiconductor layer 303 can be an n-type semiconductor with different electrical properties. Conversely, when the first semiconductor layer 301 is an n-type semiconductor, the second semiconductor layer 303 can be a different electrical semiconductor. Sexual p-type semiconductor. The conversion unit 302 is formed between the first semiconductor layer 301 and the second semiconductor layer 303, and the conversion unit 302 converts or causes conversion between light energy and electric energy. The semiconductor epitaxial stack 3 can be further processed and applied to a semiconductor element, device, product, or circuit to perform or cause the mutual conversion of light energy and electric energy. Specifically, the semiconductor epitaxial stack 3 can be further processed into one of a light emitting diode (LED), a laser diode (LD), a solar cell or a liquid crystal display. Taking a light emitting diode as an example, the wavelength of the emitted light can be adjusted by changing the physical and chemical composition of one or more layers of the semiconductor epitaxial stack 3. Commonly used materials are aluminum gallium indium phosphide (AlGaInP) series, aluminum gallium indium nitride (AlGaInN) series, and zinc oxide (ZnO) series. The conversion unit 302 can be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MWQ). ). Specifically, the conversion unit 302 can be a neutral, p-type or n-type semiconductor. When a current is applied to the semiconductor epitaxial stack 3, the conversion unit 302 emits light. When the conversion unit 302 is based on aluminum indium gallium phosphide (AlGaInP), it will emit red, orange, and yellow amber light; when it is based on aluminum gallium indium nitride (AlGaInN), it will emit Blue or green light.
接續如圖1D所示,將成長基板102與半導體磊晶疊層3分離並露出半導體磊晶疊層3之一表面3011。分離成長基板102的方法包括利用光照法,使用雷射光穿透成長基板102照射成長基板102與半導體磊晶疊層3之間的界面,來達到分離半導體磊晶疊層3與成長基板102的目的。另外,也可以利用濕式蝕刻法直接移除成長基板102,或移除成長基板102與半導體磊晶疊層3之間的介面層(未顯示),進而分離成長基板102與半導體磊晶疊層3。除此之外,還可以於高溫下利用蒸氣蝕刻直接移除成長基板102與半導體磊晶疊層3之間的介面層(未顯示),達到成長基板102與半導體磊晶疊層3分離之目的。As shown in FIG. 1D, the growth substrate 102 is separated from the semiconductor epitaxial stack 3 and one surface 3011 of the semiconductor epitaxial stack 3 is exposed. The method of separating the growth substrate 102 includes using the illumination method to illuminate the interface between the growth substrate 102 and the semiconductor epitaxial stack 3 with laser light penetrating the growth substrate 102 to achieve the purpose of separating the semiconductor epitaxial stack 3 and the growth substrate 102 . In addition, the growth substrate 102 can also be directly removed by wet etching, or the interface layer (not shown) between the growth substrate 102 and the semiconductor epitaxial stack 3 can be removed to separate the growth substrate 102 and the semiconductor epitaxial stack 3 3. In addition, vapor etching can be used to directly remove the interface layer (not shown) between the growth substrate 102 and the semiconductor epitaxial stack 3 at high temperature to achieve the purpose of separating the growth substrate 102 and the semiconductor epitaxial stack 3 .
如圖1E所示,在半導體磊晶疊層3之表面3011上形成一圖形化的黏著介質4對應犧牲層201,其中形成圖形化的黏著介質4的方式包含先形成一整層的黏著介質4在表面3011上,接著利用黃光微影製程或者圖形化蝕刻的方式,形成圖形化的黏著介質4,黃光微影製程及圖形化蝕刻係為一般習知的半導體製程。黏著介質4的材料包含有機材料,例如丙烯酸(Acrylic acid)、不飽和聚酯環氧樹脂(Unsaturated polyester)、環氧樹脂(Epoxy)、氧雜環丁烷(Oxetane)、乙烯醚(Vinyl ether)、尼龍(Nylon)、聚丙烯(PP)、聚對苯二甲酸丁二醇酯(PBT)、聚苯醚(PPO)、聚碳酸酯(PC)、丙烯腈-丁二烯-苯乙烯(ABS)、聚氯乙烯(PVC)、苯并環丁烯(BCB)等;或者無機材料,例如金屬包含鈦(Ti)、金(Au)、鈹(Be)、鎢(W)、鋁(Al)、鍺(Ge)、銅(Cu)或其組合,氧化物包含銦錫氧化物(ITO)、鎘錫氧化物(CTO)、銻氧化錫、氧化銦鋅、氧化鋅鋁、及鋅錫氧化物、氧化鋅(ZnO)、氧化矽(SiOx),或者氮化物包含氮化矽(SiNx)等。As shown in FIG. 1E, a patterned adhesive medium 4 corresponding to the sacrificial layer 201 is formed on the surface 3011 of the semiconductor epitaxial stack 3, wherein the method of forming the patterned adhesive medium 4 includes first forming a whole layer of the adhesive medium 4 On the surface 3011, a patterned adhesive medium 4 is formed by yellow light lithography process or patterned etching. The yellow light lithography process and patterned etching are generally known semiconductor processes. The material of the adhesive medium 4 includes organic materials, such as Acrylic acid, Unsaturated polyester, Epoxy, Oxetane, Vinyl ether , Nylon (Nylon), polypropylene (PP), polybutylene terephthalate (PBT), polyphenylene ether (PPO), polycarbonate (PC), acrylonitrile-butadiene-styrene (ABS) ), polyvinyl chloride (PVC), benzocyclobutene (BCB), etc.; or inorganic materials, such as metals including titanium (Ti), gold (Au), beryllium (Be), tungsten (W), aluminum (Al) , Germanium (Ge), copper (Cu) or a combination thereof, the oxides include indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide, indium zinc oxide, zinc aluminum oxide, and zinc tin oxide , Zinc oxide (ZnO), silicon oxide (SiOx), or nitride containing silicon nitride (SiNx), etc.
接續如第1F圖所示,圖形化半導體磊晶疊層3及黏著結構2並露出表面1011以形成互相隔開的複數個半導體磊晶疊層,其中複數個半導體磊晶疊層包含至少一個第一半導體磊晶疊層31及至少一個第二半導體磊晶疊層32,在每一個第一半導體磊晶疊層31上具有黏著介質4,而每一個第二半導體磊晶疊層32的表面3011上則無黏著介質4。圖形化半導體磊晶疊層3及黏著結構2的方法包含乾蝕刻或濕蝕刻,在本實施例中,使用乾蝕刻製程使第一半導體磊晶疊層31及第二半導體磊晶疊層32之間的間隔寬度w盡量縮小,以避免蝕刻過多的半導體磊晶疊層3造成浪費,本實施例的間隔寬度w介於1μm及10μm,較佳的為5μm。As shown in FIG. 1F, the semiconductor epitaxial stack 3 and the adhesive structure 2 are patterned and the surface 1011 is exposed to form a plurality of semiconductor epitaxial stacks separated from each other, wherein the plurality of semiconductor epitaxial stacks includes at least one first A semiconductor epitaxial stack 31 and at least one second semiconductor epitaxial stack 32 have an adhesive medium 4 on each first semiconductor epitaxial stack 31, and a surface 3011 of each second semiconductor epitaxial stack 32 There is no adhesive medium 4 on the top. The method of patterning the semiconductor epitaxial stack 3 and the adhesive structure 2 includes dry etching or wet etching. In this embodiment, a dry etching process is used to make the first semiconductor epitaxial stack 31 and the second semiconductor epitaxial stack 32 The gap width w between the gaps is as small as possible to avoid waste due to excessive etching of the semiconductor epitaxial stack 3. The gap width w in this embodiment is between 1 μm and 10 μm, and preferably 5 μm.
接續如第1G圖所示,提供一擷取元件103藉由加溫、加壓或者利用擷取元件103本身具有之黏性,與黏著介質4黏結。擷取元件103包含導電材料,例如導電基板或印刷電路板,其中導電基板的材料包含矽(Si)、砷化鎵( GaAs )、碳化矽( SiC )、氧化鋅( ZnO )、氮化鎵( GaN )、氮化鋁 ( AlN )或金屬材料之一種或其組合;印刷電路板包含單面印刷電路板、雙面印刷電路板、多層印刷電路板或軟性電路板;或非導電材料,例如包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)、壓克力(Acryl)、氧化鋅(ZnO)、氮化鋁(AlN)、氧化二鋁鋰( LiAlO2)、陶瓷基板或發泡聚苯乙烯(EPS)膠帶等,其中當以發泡聚苯乙烯(EPS)膠帶形成擷取元件103時,可提供一硬質基板與發泡聚苯乙烯(EPS)膠帶黏合,用以支撐發泡聚苯乙烯(EPS)膠帶,以避免發泡聚苯乙烯(EPS)膠帶沾黏第二半導體磊晶疊層32的表面3011。在另一實施例中,如第11A圖所示,擷取元件103可進一步包含一軟性基板1032及一支撐結構1031,其中軟性基板1032的材料包含聚酯樹脂(polyester resin; PET)、聚萘二甲酸乙二醇酯(polyethylene naphthalate; PEN) 或聚醯亞胺(polyimide; PI),支撐結構的材料包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)或壓克力(Acryl)等硬質的基板,用以支撐軟性基板1032。Next, as shown in FIG. 1G, a capturing element 103 is provided to bond with the adhesive medium 4 by heating, pressing, or using the viscosity of the capturing element 103 itself. The extraction element 103 includes a conductive material, such as a conductive substrate or a printed circuit board. The material of the conductive substrate includes silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC), zinc oxide (ZnO), gallium nitride ( GaN), aluminum nitride (AlN) or one or a combination of metal materials; printed circuit boards include single-sided printed circuit boards, double-sided printed circuit boards, multilayer printed circuit boards or flexible circuit boards; or non-conductive materials, such as Sapphire, Diamond, Glass, Quartz, Acrylic, Zinc Oxide (ZnO), Aluminum Nitride (AlN), Lithium Aluminum Oxide (LiAlO2), Ceramic Substrate Or expanded polystyrene (EPS) tape, etc., when the extraction element 103 is formed with expanded polystyrene (EPS) tape, a rigid substrate can be provided for bonding with the expanded polystyrene (EPS) tape to Support the expanded polystyrene (EPS) tape to prevent the expanded polystyrene (EPS) tape from sticking to the surface 3011 of the second semiconductor epitaxial laminate 32. In another embodiment, as shown in FIG. 11A, the capturing element 103 may further include a flexible substrate 1032 and a supporting structure 1031, wherein the material of the flexible substrate 1032 includes polyester resin (PET), polynaphthalene Polyethylene naphthalate (PEN) or polyimide (PI), the material of the support structure includes sapphire (Sapphire), diamond (Diamond), glass (Glass), quartz (Quartz) or acrylic A hard substrate such as Acryl is used to support the flexible substrate 1032.
在另一實施例中,可以先將圖形化的黏著介質4形成在擷取元件103上,使用對位黏合的技術,將黏著介質4與第一半導體磊晶疊層31對齊後,藉由加溫及加壓的方式,使黏著介質4與第一半導體磊晶疊層31黏結。In another embodiment, a patterned adhesive medium 4 may be formed on the extraction element 103 first, and the adhesive medium 4 may be aligned with the first semiconductor epitaxial stack 31 by using an alignment bonding technique. The bonding medium 4 and the first semiconductor epitaxial stack 31 are bonded by a gentle pressure method.
接續如第1H圖所示,若犧牲層201與第一半導體磊晶疊層31的黏著力小於黏著介質4與第一半導體磊晶疊層31的黏著力的時候,可直接分別施以反方向的力量於擷取元件103及黏結基板101,使第一半導體磊晶疊層31與犧牲層201分離而不會傷害到第一半導體磊晶疊層31的結構,例如當犧牲層201的材質為紫外光(UV)解離材料包含丙烯酸(Acrylic acid)、不飽和聚酯環氧樹脂(Unsaturated polyester)、環氧樹脂(Epoxy)、氧雜環丁烷(Oxetane)、乙烯醚(Vinyl ether)等,使用紫外光(UV)照射犧牲層201可使犧牲層201的黏著力降低或消失,再分別施以反方向的力量於擷取元件103及黏結基板101,使得第一半導體磊晶疊層31與犧牲層201分離;或者,當犧牲層201的材質為熱塑性塑膠包含尼龍(Nylon)、聚丙烯(PP)、聚對苯二甲酸丁二醇酯(PBT)、聚苯醚(PPO)、聚碳酸酯(PC)、丙烯腈-丁二烯-苯乙烯(ABS)、聚氯乙烯(PVC)等,加熱犧牲層201可使犧牲層201之間的黏著力降低或消失,再分別施以反方向的力量於擷取元件103及黏結基板101,使得第一半導體磊晶疊層31與犧牲層201分離;或者當黏著介質4係為苯并環丁烯(BCB)等具有高黏著力的材料構成,犧牲層201的材質係為黏著力較低的材料所構成時,可不需將犧牲層201施以光照射或者加熱等方式進行改質,直接分別施以反方向的力量於擷取元件103及黏結基板101,使得第一半導體磊晶疊層31與犧牲層201分離,其中黏著力較低的材料包含金屬材料,例如鈦(Ti)、鋁(Al)、鈦鎢合金(TiW)等、氧化物,例如氧化矽(SiOx)、或者氮化物,例如氮化矽(SiNx)。As shown in Figure 1H, if the adhesion between the sacrificial layer 201 and the first semiconductor epitaxial stack 31 is less than the adhesion between the adhesive medium 4 and the first semiconductor epitaxial stack 31, the opposite directions can be directly applied. The force of the capture device 103 and the bonding substrate 101 separates the first semiconductor epitaxial stack 31 from the sacrificial layer 201 without damaging the structure of the first semiconductor epitaxial stack 31. For example, when the material of the sacrificial layer 201 is Ultraviolet light (UV) dissociation materials include Acrylic acid, Unsaturated polyester, Epoxy, Oxetane, Vinyl ether, etc., Using ultraviolet light (UV) to irradiate the sacrificial layer 201 can reduce or disappear the adhesive force of the sacrificial layer 201, and then apply forces in opposite directions to the capture element 103 and the bonding substrate 101, so that the first semiconductor epitaxial stack 31 and The sacrificial layer 201 is separated; or, when the material of the sacrificial layer 201 is thermoplastic, including nylon (Nylon), polypropylene (PP), polybutylene terephthalate (PBT), polyphenylene ether (PPO), polycarbonate Ester (PC), acrylonitrile-butadiene-styrene (ABS), polyvinyl chloride (PVC), etc., heating the sacrificial layer 201 can reduce or disappear the adhesion between the sacrificial layers 201, and then apply the opposite directions respectively The force of the capture element 103 and the bonding substrate 101 separates the first semiconductor epitaxial stack 31 from the sacrificial layer 201; or when the adhesion medium 4 is made of a material with high adhesion such as benzocyclobutene (BCB) When the material of the sacrificial layer 201 is made of a material with low adhesion, it is not necessary to apply light irradiation or heating to the sacrificial layer 201 for modification, and directly apply forces in opposite directions to the capture element 103 and the bonding substrate. 101. Separate the first semiconductor epitaxial stack 31 from the sacrificial layer 201, where the material with lower adhesion includes metal materials, such as titanium (Ti), aluminum (Al), titanium tungsten alloy (TiW), etc., oxides, For example, silicon oxide (SiOx), or nitride, such as silicon nitride (SiNx).
此外,如第1I圖所示,當犧牲層201的材質為金屬材料,例如鈦(Ti)、鋁(Al)、鈦鎢(TiW)、銀(Ag)等,或者含矽的材料,例如氧化矽(SiOx)、氮化矽(SiNx)或者多晶矽(poly-Si)等材料,可使用濕蝕刻或者蒸氣蝕刻的方式,移除犧牲層201,再分別施以反方向的力量於擷取元件103及黏結基板101,使得第一半導體磊晶疊層31與犧牲層201分離,本實施例中,濕蝕刻使用的蝕刻液包含氫氟酸,蒸氣蝕刻使用的化學材料包含氟化氫(HF)蒸氣。In addition, as shown in Figure 11, when the material of the sacrificial layer 201 is a metal material, such as titanium (Ti), aluminum (Al), titanium tungsten (TiW), silver (Ag), etc., or a material containing silicon, such as oxide For materials such as silicon (SiOx), silicon nitride (SiNx), or polysilicon (poly-Si), wet etching or vapor etching can be used to remove the sacrificial layer 201, and then apply forces in opposite directions to the extraction element 103. And the bonding substrate 101 to separate the first semiconductor epitaxial stack 31 and the sacrificial layer 201. In this embodiment, the etching solution used for wet etching includes hydrofluoric acid, and the chemical material used for vapor etching includes hydrogen fluoride (HF) vapor.
在另一實施例中,如前述擷取元件103包含一軟性基板1032及一支撐結構1031,當第一半導體磊晶疊層31與犧牲層201分離後,接續如第11B圖所示,可將軟性基板1032與支撐結構1031分離,進一步製作成軟性顯示器。In another embodiment, as the aforementioned capturing element 103 includes a flexible substrate 1032 and a supporting structure 1031, after the first semiconductor epitaxial stack 31 is separated from the sacrificial layer 201, as shown in FIG. 11B, the The flexible substrate 1032 is separated from the supporting structure 1031, and is further fabricated into a flexible display.
第二實施例Second embodiment
第2A圖至第2H圖係分別為依本發明第二實施例之製程方法於各步驟之對應結構示意圖。如第2A圖所示,本實施例與前述第一實施例的差異在於黏著結構2的結構不同。本實施例中,犧牲層201位於黏結基板101的表面1011與黏結層202之間。後續的製程如第2B圖至第2H圖所示,皆與前述第一實施相同,其中,經由本實施例所揭露之製程所形成的每一個第一半導體磊晶疊層31的表面311上,都有黏結層202。Figures 2A to 2H are schematic diagrams of the corresponding structures in each step of the manufacturing method according to the second embodiment of the present invention. As shown in FIG. 2A, the difference between this embodiment and the aforementioned first embodiment lies in the structure of the adhesive structure 2. In this embodiment, the sacrificial layer 201 is located between the surface 1011 of the bonding substrate 101 and the bonding layer 202. Subsequent manufacturing processes are shown in FIGS. 2B to 2H, which are the same as the foregoing first embodiment, in which, on the surface 311 of each first semiconductor epitaxial stack 31 formed by the process disclosed in this embodiment, All have an adhesive layer 202.
第三實施例The third embodiment
第3A圖至第3H圖係分別為依本發明第三實施例之製程方法於各步驟之對應結構示意圖。如第3A圖所示,本實施例中,先將犧牲層201與黏結層202分別形成在半導體磊晶疊層3的表面311及黏結基板101的表面1011上,接續如第3B圖所示,藉由黏結層202及犧牲層201,以加熱、加壓的方式將半導體磊晶疊層3與黏結基板101黏合,由於黏結層202的材料包含苯并環丁烯(BCB),在上述黏合過程中犧牲層201會將犧牲層201與黏結基板101之間的黏結層202材料推開,使得犧牲層201與黏結基板101之間的黏結層202厚度小於半導體磊晶疊層3與黏結基板101之間的黏結層202厚度,以形成圖中黏著結構2。本實施例與前述第一實施例的差異在於黏著結構2的結構不同,犧牲層201位於黏結層202之上,不與黏結基板101的表面1011相接。後續的製程如第3B圖至第3H圖所示,皆與前述第一實施相同。Figures 3A to 3H are schematic diagrams of the corresponding structures in each step of the manufacturing method according to the third embodiment of the present invention. As shown in FIG. 3A, in this embodiment, the sacrificial layer 201 and the bonding layer 202 are first formed on the surface 311 of the semiconductor epitaxial stack 3 and the surface 1011 of the bonding substrate 101, respectively, as shown in FIG. 3B. Through the bonding layer 202 and the sacrificial layer 201, the semiconductor epitaxial stack 3 and the bonding substrate 101 are bonded by heating and pressing. Since the material of the bonding layer 202 includes benzocyclobutene (BCB), during the above bonding process The middle sacrificial layer 201 pushes away the material of the bonding layer 202 between the sacrificial layer 201 and the bonding substrate 101, so that the thickness of the bonding layer 202 between the sacrificial layer 201 and the bonding substrate 101 is smaller than that between the semiconductor epitaxial stack 3 and the bonding substrate 101 The thickness of the bonding layer 202 between them is to form the bonding structure 2 in the figure. The difference between this embodiment and the foregoing first embodiment is that the structure of the adhesive structure 2 is different. The sacrificial layer 201 is located on the adhesive layer 202 and does not contact the surface 1011 of the adhesive substrate 101. The subsequent manufacturing process as shown in FIG. 3B to FIG. 3H is the same as the foregoing first embodiment.
第四實施例Fourth embodiment
第4A圖至第4C圖為依本發明第四實施例之結構示意圖。如第4A圖所示,本實施例與前述第三實施例的差異在於每一個第一半導體磊晶疊層31的表面311,都與圖形化的犧牲層201及黏結層202相接。或者,如第4B圖所示,本實施例與前述第一實施例的差異在於每一個第一半導體磊晶疊層31的表面311,都與圖形化的犧牲層201及黏結層202相接。或者,如第4C圖所示,本實施例與前述第¬二實施例的差異在於每一個第一半導體磊晶疊層31所對應的圖形化的犧牲層201被黏結層202所覆蓋,並且與黏結基板101黏結。4A to 4C are schematic diagrams of the structure according to the fourth embodiment of the present invention. As shown in FIG. 4A, the difference between this embodiment and the foregoing third embodiment is that the surface 311 of each first semiconductor epitaxial stack 31 is in contact with the patterned sacrificial layer 201 and the bonding layer 202. Or, as shown in FIG. 4B, the difference between this embodiment and the foregoing first embodiment is that the surface 311 of each first semiconductor epitaxial stack 31 is in contact with the patterned sacrificial layer 201 and the bonding layer 202. Or, as shown in FIG. 4C, the difference between this embodiment and the foregoing second embodiment is that the patterned sacrificial layer 201 corresponding to each first semiconductor epitaxial stack 31 is covered by the adhesion layer 202 and is different from The bonding substrate 101 is bonded.
第五實施例Fifth embodiment
第5A圖至第5G圖為依本發明第五實施例之結構示意圖。如第5A圖所示,根據本發明所揭露的光電半導體元件製程,提供一黏結基板101具有一表面1011,形成一黏著結構2在表面1011上,黏著結構2具有一厚度t,厚度t的範圍介於1μm到10μm之間,較佳的是介於2μm到6μm之間。黏結基板101的材料包含電絕緣基板或導電基板,電絕緣基板的材料包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)、壓克力(Acryl)、氧化鋅(ZnO)、氮化鋁(AlN)、氧化二鋁鋰( LiAlO2)或陶瓷基板等;導電基板的材料包含矽(Si)、砷化鎵( GaAs )、碳化矽( SiC )、氧化鋅( ZnO )、氮化鎵( GaN )、氮化鋁 ( AlN )或金屬材料之一種或其組合。黏著結構2的材料包含有機材料,例如丙烯酸(Acrylic acid)、不飽和聚酯環氧樹脂(Unsaturated polyester)、環氧樹脂(Epoxy)、氧雜環丁烷(Oxetane)、乙烯醚(Vinyl ether)、尼龍(Nylon)、聚丙烯(PP)、聚對苯二甲酸丁二醇酯(PBT)、聚苯醚(PPO)、聚碳酸酯(PC)、丙烯腈-丁二烯-苯乙烯(ABS)、聚氯乙烯(PVC)、苯并環丁烯(BCB)等;或者無機材料,例如金屬包含鈦(Ti)、金(Au)、鈹(Be)、鎢(W)、鋁(Al)、鍺(Ge)、銅(Cu)或其組合,氧化物包含銦錫氧化物(ITO)、鎘錫氧化物(CTO)、銻氧化錫、氧化銦鋅、氧化鋅鋁、及鋅錫氧化物、氧化鋅(ZnO)、氧化矽(SiOx),或者氮化物包含氮化矽(SiNx)等。提供一成長基板102,在成長基板102上具有以磊晶方式成長的一半導體磊晶疊層3,接著藉由黏著結構2將成長基板102及半導體磊晶疊層3黏結至表面1011上與黏結基板101黏合。其中,半導體磊晶疊層3包括至少一第一半導體層301具有第一導電型態,一轉換單元302以及一第二半導體層303具有第二導電型態,依序形成於成長基板102之上。第一半導體層301和第二半導體層303可為兩個單層結構或兩個多層結構(多層結構係指兩層或兩層以上)。第一半導體層301和第二半導體層303具有不同的導電型態、電性、極性或依摻雜的元素以提供電子或電洞。當第一半導體層301為p型半導體,第二半導體層303可為相異電性的n型半導體,反之,當第一半導體層301為n型半導體,第二半導體層303可為相異電性的p型半導體。轉換單元302形成在第一半導體層301和第二半導體層303之間,轉換單元302係將光能和電能相互轉換或導致轉換。半導體磊晶疊層3可進一步加工應用於一半導體元件、設備、產品、電路,以進行或導致光能和電能相互轉換。具體而言,半導體磊晶疊層3可進一步加工成為一發光二極體(LED)、一雷射二極體(LD)、一太陽能電池或一液晶顯示器其中之一。以發光二極體為例,可以藉由改變半導體磊晶疊層3裡的其中一層或多層的物理及化學組成,調整發出的光波長。常用的材料為磷化鋁鎵銦(aluminum gallium indium phosphide, AlGaInP)系列、氮化鋁鎵銦(aluminum gallium indium nitride, AlGaInN) 系列、氧化鋅系列(zinc oxide, ZnO)。轉換單元302可為單異質結構(single heterostructure, SH ),雙異質結構(double heterostructure, DH ),雙側雙異質結( double-side double heterostructure, DDH ),多層量子井(multi-quantum well, MWQ ) 。具體來說,轉換單元302可為中性、p型或n型電性的半導體。施以電流通過半導體磊晶疊層3時,轉換單元302會發光。當轉換單元302以磷化鋁銦鎵(AlGaInP)為基礎的材料時,會發出紅、橙、黃光之琥珀色系的光;當以氮化鋁鎵銦(AlGaInN)為基礎的材料時,會發出藍或綠光。5A to 5G are schematic diagrams of the structure of the fifth embodiment of the present invention. As shown in FIG. 5A, according to the optoelectronic semiconductor device manufacturing process disclosed in the present invention, an adhesive substrate 101 is provided with a surface 1011, and an adhesive structure 2 is formed on the surface 1011. The adhesive structure 2 has a thickness t and a range of thickness t It is between 1 μm and 10 μm, preferably between 2 μm and 6 μm. The material of the bonding substrate 101 includes an electrically insulating substrate or a conductive substrate, and the material of the electrically insulating substrate includes Sapphire, Diamond, Glass, Quartz, Acrylic, and Zinc Oxide (ZnO). ), aluminum nitride (AlN), lithium aluminum oxide (LiAlO2) or ceramic substrates, etc.; conductive substrate materials include silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC), zinc oxide (ZnO), One or a combination of gallium nitride (GaN), aluminum nitride (AlN) or metal materials. The material of the adhesive structure 2 includes organic materials, such as Acrylic acid, Unsaturated polyester, Epoxy, Oxetane, Vinyl ether , Nylon (Nylon), polypropylene (PP), polybutylene terephthalate (PBT), polyphenylene ether (PPO), polycarbonate (PC), acrylonitrile-butadiene-styrene (ABS) ), polyvinyl chloride (PVC), benzocyclobutene (BCB), etc.; or inorganic materials, such as metals including titanium (Ti), gold (Au), beryllium (Be), tungsten (W), aluminum (Al) , Germanium (Ge), copper (Cu) or a combination thereof, the oxides include indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide, indium zinc oxide, zinc aluminum oxide, and zinc tin oxide , Zinc oxide (ZnO), silicon oxide (SiOx), or nitride containing silicon nitride (SiNx), etc. A growth substrate 102 is provided. On the growth substrate 102 there is a semiconductor epitaxial stack 3 grown epitaxially, and then the growth substrate 102 and the semiconductor epitaxial stack 3 are bonded to the surface 1011 and bonded by the adhesive structure 2 The substrate 101 is bonded. The semiconductor epitaxial stack 3 includes at least one first semiconductor layer 301 having a first conductivity type, a conversion unit 302 and a second semiconductor layer 303 having a second conductivity type, which are sequentially formed on the growth substrate 102 . The first semiconductor layer 301 and the second semiconductor layer 303 may have two single-layer structures or two multi-layer structures (a multi-layer structure refers to two or more layers). The first semiconductor layer 301 and the second semiconductor layer 303 have different conductivity types, electrical properties, polarities or doped elements to provide electrons or holes. When the first semiconductor layer 301 is a p-type semiconductor, the second semiconductor layer 303 can be an n-type semiconductor with different electrical properties. Conversely, when the first semiconductor layer 301 is an n-type semiconductor, the second semiconductor layer 303 can be a different electrical semiconductor. Sexual p-type semiconductor. The conversion unit 302 is formed between the first semiconductor layer 301 and the second semiconductor layer 303, and the conversion unit 302 converts or causes conversion between light energy and electric energy. The semiconductor epitaxial stack 3 can be further processed and applied to a semiconductor element, device, product, or circuit to perform or cause the mutual conversion of light energy and electric energy. Specifically, the semiconductor epitaxial stack 3 can be further processed into one of a light emitting diode (LED), a laser diode (LD), a solar cell or a liquid crystal display. Taking a light emitting diode as an example, the wavelength of the emitted light can be adjusted by changing the physical and chemical composition of one or more layers of the semiconductor epitaxial stack 3. Commonly used materials are aluminum gallium indium phosphide (AlGaInP) series, aluminum gallium indium nitride (AlGaInN) series, and zinc oxide (ZnO) series. The conversion unit 302 can be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MWQ). ). Specifically, the conversion unit 302 can be a neutral, p-type or n-type semiconductor. When a current is applied to the semiconductor epitaxial stack 3, the conversion unit 302 emits light. When the conversion unit 302 is based on aluminum indium gallium phosphide (AlGaInP), it will emit red, orange, and yellow amber light; when it is based on aluminum gallium indium nitride (AlGaInN), it will emit Blue or green light.
在另一實施例中,黏著結構2可先形成在半導體磊晶疊層3的表面3012上,接著藉由黏著結構2將成長基板102及半導體磊晶疊層3黏結至黏結基板101的表面1011上與黏結基板101黏合。In another embodiment, the adhesive structure 2 may be formed on the surface 3012 of the semiconductor epitaxial stack 3 first, and then the growth substrate 102 and the semiconductor epitaxial stack 3 are bonded to the surface 1011 of the bonded substrate 101 by the adhesive structure 2 The upper is bonded to the bonding substrate 101.
接續如圖5B所示,將成長基板102與半導體磊晶疊層3分離並露出半導體磊晶疊層3之一表面3011。分離成長基板102的方法包括利用光照法,使用雷射光穿透成長基板102照射成長基板102與半導體磊晶疊層3之間的界面,來達到分離半導體磊晶疊層3與成長基板102的目的。另外,也可以利用濕式蝕刻法直接移除成長基板102,或移除成長基板102與半導體磊晶疊層3之間的介面層(未顯示),進而分離成長基板102與半導體磊晶疊層3。除此之外,還可以於高溫下利用蒸氣蝕刻直接移除成長基板102與半導體磊晶疊層3之間的介面層(未顯示),達到成長基板102與半導體磊晶疊層3分離之目的。Next, as shown in FIG. 5B, the growth substrate 102 is separated from the semiconductor epitaxial stack 3 and one surface 3011 of the semiconductor epitaxial stack 3 is exposed. The method of separating the growth substrate 102 includes using the illumination method to illuminate the interface between the growth substrate 102 and the semiconductor epitaxial stack 3 with laser light penetrating the growth substrate 102 to achieve the purpose of separating the semiconductor epitaxial stack 3 and the growth substrate 102 . In addition, the growth substrate 102 can also be directly removed by wet etching, or the interface layer (not shown) between the growth substrate 102 and the semiconductor epitaxial stack 3 can be removed to separate the growth substrate 102 and the semiconductor epitaxial stack 3 3. In addition, vapor etching can be used to directly remove the interface layer (not shown) between the growth substrate 102 and the semiconductor epitaxial stack 3 at high temperature to achieve the purpose of separating the growth substrate 102 and the semiconductor epitaxial stack 3 .
接續如圖5C所示,在半導體磊晶疊層3之表面3011上形成一圖形化的黏著介質4,其中形成圖形化的黏著介質4的方式包含先形成一整層的黏著介質4在表面3011上,接著利用黃光微影製程或者圖形化蝕刻的方式,形成圖形化的黏著介質4,黃光微影製程及圖形化蝕刻係為一般習知的半導體製程。黏著介質4的材料包含有機材料,例如丙烯酸(Acrylic acid)、不飽和聚酯環氧樹脂(Unsaturated polyester)、環氧樹脂(Epoxy)、氧雜環丁烷(Oxetane)、乙烯醚(Vinyl ether)、尼龍(Nylon)、聚丙烯(PP)、聚對苯二甲酸丁二醇酯(PBT)、聚苯醚(PPO)、聚碳酸酯(PC)、丙烯腈-丁二烯-苯乙烯(ABS)、聚氯乙烯(PVC)、 苯并環丁烯(BCB)等;或者無機材料,例如金屬包含鈦(Ti)、金(Au)、鈹(Be)、鎢(W)、鋁(Al)、鍺(Ge)、銅(Cu)或其組合,氧化物包含銦錫氧化物(ITO)、鎘錫氧化物(CTO)、銻氧化錫、氧化銦鋅、氧化鋅鋁、及鋅錫氧化物、氧化鋅(ZnO)、氧化矽(SiOx),或者氮化物包含氮化矽(SiNx)等。Next, as shown in FIG. 5C, a patterned adhesive medium 4 is formed on the surface 3011 of the semiconductor epitaxial stack 3. The method of forming the patterned adhesive medium 4 includes first forming a whole layer of the adhesive medium 4 on the surface 3011 Above, the patterned adhesive medium 4 is formed by the yellow light lithography process or patterned etching. The yellow light lithography process and patterned etching are generally known semiconductor manufacturing processes. The material of the adhesive medium 4 includes organic materials, such as Acrylic acid, Unsaturated polyester, Epoxy, Oxetane, Vinyl ether , Nylon (Nylon), polypropylene (PP), polybutylene terephthalate (PBT), polyphenylene ether (PPO), polycarbonate (PC), acrylonitrile-butadiene-styrene (ABS) ), polyvinyl chloride (PVC), benzocyclobutene (BCB), etc.; or inorganic materials, such as metals including titanium (Ti), gold (Au), beryllium (Be), tungsten (W), aluminum (Al) , Germanium (Ge), copper (Cu) or a combination thereof, the oxides include indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide, indium zinc oxide, zinc aluminum oxide, and zinc tin oxide , Zinc oxide (ZnO), silicon oxide (SiOx), or nitride containing silicon nitride (SiNx), etc.
接續如第5D圖所示,圖形化半導體磊晶疊層3及黏著結構2以露出表面1011,形成互相隔開的複數個半導體磊晶疊層,其中複數個半導體磊晶疊層包含至少一個第一半導體磊晶疊層31及至少一個第二半導體磊晶疊層32,本實施例中,如第5E圖所示第5D圖之上視圖,第一半導體磊晶疊層31的面積較第二半導體磊晶疊層32的面積小,且在每一個第一半導體磊晶疊層31上具有黏著介質4,而每一個第二半導體磊晶疊層31的表面3011上則無黏著介質4。圖形化半導體磊晶疊層3及黏著結構2的方法可包含乾蝕刻或濕蝕刻,在本實施例中使用屬於乾蝕刻的ICP蝕刻方式圖形化半導體磊晶疊層3及黏著結構2,使第一半導體磊晶疊層31及第二半導體磊晶疊層32之間的間隔寬度w盡量縮小,以避免蝕刻過多的半導體磊晶疊層3造成浪費,本實施例的間隔寬度w介於1μm及10μm,較佳的為5μm。As shown in FIG. 5D, the semiconductor epitaxial stack 3 and the adhesive structure 2 are patterned to expose the surface 1011 to form a plurality of semiconductor epitaxial stacks separated from each other, wherein the plurality of semiconductor epitaxial stacks includes at least one first One semiconductor epitaxial stack 31 and at least one second semiconductor epitaxial stack 32. In this embodiment, as shown in the top view of Figure 5D in Figure 5E, the area of the first semiconductor epitaxial stack 31 is larger than that of the second semiconductor epitaxial stack. The area of the semiconductor epitaxial stack 32 is small, and there is an adhesive medium 4 on each first semiconductor epitaxial stack 31, and there is no adhesive medium 4 on the surface 3011 of each second semiconductor epitaxial stack 31. The method of patterning the semiconductor epitaxial stack 3 and the adhesive structure 2 may include dry etching or wet etching. In this embodiment, the ICP etching method belonging to dry etching is used to pattern the semiconductor epitaxial stack 3 and the adhesive structure 2 to make the first The gap width w between the semiconductor epitaxial stack 31 and the second semiconductor epitaxial stack 32 is as small as possible to avoid waste caused by etching the semiconductor epitaxial stack 3 too much. The gap width w in this embodiment is between 1 μm and 10 μm, preferably 5 μm.
接續如第5F圖所示,提供一擷取元件103藉由加溫、加壓或者利用擷取元件103本身具有之黏性,與黏著介質4黏結。擷取元件103包含導電材料,例如導電基板或印刷電路板,其中導電基板的材料包含矽(Si)、砷化鎵( GaAs )、碳化矽( SiC )、氧化鋅( ZnO )、氮化鎵( GaN )、氮化鋁 ( AlN )或金屬材料之一種或其組合;印刷電路板包含單面印刷電路板、雙面印刷電路板、多層印刷電路板或軟性電路板;或非導電材料,例如包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)、壓克力(Acryl)、氧化鋅(ZnO)、氮化鋁(AlN)、氧化二鋁鋰( LiAlO2)、陶瓷基板或發泡聚苯乙烯(EPS)膠帶等,其中當以發泡聚苯乙烯(EPS)膠帶形成擷取元件103時,可提供一硬質基板與發泡聚苯乙烯(EPS)膠帶黏合,用以支撐發泡聚苯乙烯(EPS)膠帶,以避免發泡聚苯乙烯(EPS)膠帶沾黏第二半導體磊晶疊層32的表面3011。Next, as shown in FIG. 5F, a capturing element 103 is provided to bond with the adhesive medium 4 by heating, pressing, or using the viscosity of the capturing element 103 itself. The extraction element 103 includes a conductive material, such as a conductive substrate or a printed circuit board. The material of the conductive substrate includes silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC), zinc oxide (ZnO), gallium nitride ( GaN), aluminum nitride (AlN) or one or a combination of metal materials; printed circuit boards include single-sided printed circuit boards, double-sided printed circuit boards, multilayer printed circuit boards or flexible circuit boards; or non-conductive materials, such as Sapphire, Diamond, Glass, Quartz, Acrylic, Zinc Oxide (ZnO), Aluminum Nitride (AlN), Lithium Aluminum Oxide (LiAlO2), Ceramic Substrate Or expanded polystyrene (EPS) tape, etc., when the extraction element 103 is formed with expanded polystyrene (EPS) tape, a rigid substrate can be provided for bonding with the expanded polystyrene (EPS) tape to Support the expanded polystyrene (EPS) tape to prevent the expanded polystyrene (EPS) tape from sticking to the surface 3011 of the second semiconductor epitaxial laminate 32.
在另一實施例中,如第11A圖所示,擷取元件103可進一步包含一軟性基板1032及一支撐結構1031,其中軟性基板1032的材料包含聚酯樹脂(polyester resin; PET)、聚萘二甲酸乙二醇酯(polyethylene naphthalate; PEN) 或聚醯亞胺(polyimide; PI),支撐結構1031的材料包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)或壓克力(Acryl)等硬質的基板,用以支撐軟性基板1032。In another embodiment, as shown in FIG. 11A, the capturing element 103 may further include a flexible substrate 1032 and a supporting structure 1031, wherein the material of the flexible substrate 1032 includes polyester resin (PET), polynaphthalene Dicarboxylate (polyethylene naphthalate; PEN) or polyimide (polyimide; PI), the material of the support structure 1031 includes sapphire (Sapphire), diamond (Diamond), glass (Glass), quartz (Quartz) or pressure A hard substrate such as Acryl is used to support the flexible substrate 1032.
在另一實施例中,可以先將圖形化的黏著介質4形成在擷取元件103上,使用對位黏合的技術,將黏著介質4與第一半導體磊晶疊層31對齊後,藉由加溫及加壓的方式,使黏著介質4與第一半導體磊晶疊層31黏結,以形成如第5F圖所示之結構。In another embodiment, a patterned adhesive medium 4 may be formed on the extraction element 103 first, and the adhesive medium 4 may be aligned with the first semiconductor epitaxial stack 31 by using an alignment bonding technique. The bonding medium 4 and the first semiconductor epitaxial stack 31 are bonded by a gentle pressure method to form a structure as shown in FIG. 5F.
接續如第5G圖所示,使用濕蝕刻製程或蒸氣蝕刻製程蝕刻黏著結構2,並控制濕蝕刻製程或蒸氣蝕刻製程的時間,使第一半導體磊晶疊層31與黏結基板101完全分離,而第二半導體磊晶疊層32與黏結基板101之間留下部分的黏著結構2以支撐第二半導體磊晶疊層32。Next, as shown in FIG. 5G, the adhesive structure 2 is etched using a wet etching process or a vapor etching process, and the time of the wet etching process or vapor etching process is controlled to completely separate the first semiconductor epitaxial stack 31 from the bonding substrate 101, and A part of the adhesive structure 2 is left between the second semiconductor epitaxial stack 32 and the bonding substrate 101 to support the second semiconductor epitaxial stack 32.
在另一實施例中,如前述擷取元件103包含一軟性基板1032及一支撐結構1031,當第一半導體磊晶疊層31與犧牲層201分離後,接續如第11B圖所示,可將軟性基板1032與支撐結構1031分離,進一步製作成軟性顯示器。In another embodiment, as the aforementioned capturing element 103 includes a flexible substrate 1032 and a supporting structure 1031, after the first semiconductor epitaxial stack 31 is separated from the sacrificial layer 201, as shown in FIG. 11B, the The flexible substrate 1032 is separated from the supporting structure 1031, and is further fabricated into a flexible display.
第六實施例Sixth embodiment
第6A圖至第6H圖為依本發明第六實施例之結構示意圖。如第6A圖所示,根據本發明所揭露的光電半導體元件製程,提供一黏結基板101具有一表面1011及一表面1012對應表面1011,黏結基板101具有至少一孔洞110從表面1011穿透到表面1012,黏結基板101的上視圖如第6B圖所示,其中第6A圖為第6B圖中虛線CC’的剖面圖。黏結基板101的材料包含電絕緣基板或導電基板,電絕緣基板的材料包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)、壓克力(Acryl)、氧化鋅(ZnO)、氮化鋁(AlN)、氧化二鋁鋰( LiAlO2)或陶瓷基板等;導電基板的材料包含矽(Si)、砷化鎵( GaAs )、碳化矽( SiC )、氧化鋅( ZnO )、氮化鎵( GaN )、氮化鋁 ( AlN )或金屬材料之一種或其組合。6A to 6H are schematic diagrams of the structure of the sixth embodiment of the present invention. As shown in FIG. 6A, according to the optoelectronic semiconductor device manufacturing process disclosed in the present invention, a bonding substrate 101 has a surface 1011 and a surface 1012 corresponding to the surface 1011, and the bonding substrate 101 has at least one hole 110 penetrating from the surface 1011 to the surface 1012. The top view of the bonding substrate 101 is shown in FIG. 6B, where FIG. 6A is a cross-sectional view of the dotted line CC' in FIG. 6B. The material of the bonding substrate 101 includes an electrically insulating substrate or a conductive substrate, and the material of the electrically insulating substrate includes Sapphire, Diamond, Glass, Quartz, Acrylic, and Zinc Oxide (ZnO). ), aluminum nitride (AlN), lithium aluminum oxide (LiAlO2) or ceramic substrates, etc.; conductive substrate materials include silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC), zinc oxide (ZnO), One or a combination of gallium nitride (GaN), aluminum nitride (AlN) or metal materials.
接續如第7C圖所示,提供一成長基板102,在成長基板102上具有以磊晶方式成長的一半導體磊晶疊層3,接著藉由一黏著結構2將半導體磊晶疊層3黏結至黏結基板101的表面1011上與黏結基板101黏合,孔洞110露出部分的黏著結構2。在本實施例中,黏著結構2可先形成在半導體磊晶疊層3的表面3012上,接著藉由黏著結構2將成長基板102及半導體磊晶疊層3黏結至黏結基板101的表面1011上與黏結基板101黏合。Next, as shown in FIG. 7C, a growth substrate 102 is provided, on the growth substrate 102 there is a semiconductor epitaxial stack 3 grown epitaxially, and then the semiconductor epitaxial stack 3 is bonded to the growth substrate 102 by an adhesive structure 2 The surface 1011 of the bonding substrate 101 is bonded to the bonding substrate 101, and the hole 110 exposes a part of the bonding structure 2. In this embodiment, the adhesive structure 2 can be first formed on the surface 3012 of the semiconductor epitaxial stack 3, and then the growth substrate 102 and the semiconductor epitaxial stack 3 are bonded to the surface 1011 of the bonded substrate 101 by the adhesive structure 2 Bonded with the bonding substrate 101.
黏著結構2具有一厚度t,厚度t的範圍介於1μm到10μm之間,較佳的是介於2μm到6μm之間。黏著結構2的材料包含有機材料,例如丙烯酸(Acrylic acid)、不飽和聚酯環氧樹脂(Unsaturated polyester)、環氧樹脂(Epoxy)、氧雜環丁烷(Oxetane)、乙烯醚(Vinyl ether)、尼龍(Nylon)、聚丙烯(PP)、聚對苯二甲酸丁二醇酯(PBT)、聚苯醚(PPO)、聚碳酸酯(PC)、丙烯腈-丁二烯-苯乙烯(ABS)、聚氯乙烯(PVC)、苯并環丁烯(BCB)等;或者無機材料,例如金屬包含鈦(Ti)、金(Au)、鈹(Be)、鎢(W)、鋁(Al)、鍺(Ge)、銅(Cu)或其組合,氧化物包含銦錫氧化物(ITO)、鎘錫氧化物(CTO)、銻氧化錫、氧化銦鋅、氧化鋅鋁、及鋅錫氧化物、氧化鋅(ZnO)、氧化矽(SiOx),或者氮化物包含氮化矽(SiNx)等。半導體磊晶疊層3包括至少一第一半導體層301具有第一導電型態,一轉換單元302以及一第二半導體層303具有第二導電型態,依序形成於成長基板102之上。第一半導體層301和第二半導體層303可為兩個單層結構或兩個多層結構(多層結構係指兩層或兩層以上)。第一半導體層301和第二半導體層303具有不同的導電型態、電性、極性或依摻雜的元素以提供電子或電洞。當第一半導體層301為p型半導體,第二半導體層303可為相異電性的n型半導體,反之,當第一半導體層301為n型半導體,第二半導體層303可為相異電性的p型半導體。轉換單元302形成在第一半導體層301和第二半導體層303之間,轉換單元302係將光能和電能相互轉換或導致轉換。半導體磊晶疊層3可進一步加工應用於一半導體元件、設備、產品、電路,以進行或導致光能和電能相互轉換。具體而言,半導體磊晶疊層3可進一步加工成為一發光二極體(LED)、一雷射二極體(LD)、一太陽能電池或一液晶顯示器其中之一。以發光二極體為例,可以藉由改變半導體磊晶疊層3裡的其中一層或多層的物理及化學組成,調整發出的光波長。常用的材料為磷化鋁鎵銦(aluminum gallium indium phosphide, AlGaInP)系列、氮化鋁鎵銦(aluminum gallium indium nitride, AlGaInN) 系列、氧化鋅系列(zinc oxide, ZnO)。轉換單元302可為單異質結構(single heterostructure, SH ),雙異質結構(double heterostructure, DH ),雙側雙異質結( double-side double heterostructure, DDH ),多層量子井(multi-quantum well, MWQ ) 。具體來說,轉換單元302可為中性、p型或n型電性的半導體。施以電流通過半導體磊晶疊層3時,轉換單元302會發光。當轉換單元302以磷化鋁銦鎵(AlGaInP)為基礎的材料時,會發出紅、橙、黃光之琥珀色系的光;當以氮化鋁鎵銦(AlGaInN)為基礎的材料時,會發出藍或綠光。The adhesive structure 2 has a thickness t, and the thickness t ranges from 1 μm to 10 μm, preferably between 2 μm to 6 μm. The material of the adhesive structure 2 includes organic materials, such as Acrylic acid, Unsaturated polyester, Epoxy, Oxetane, Vinyl ether , Nylon (Nylon), polypropylene (PP), polybutylene terephthalate (PBT), polyphenylene ether (PPO), polycarbonate (PC), acrylonitrile-butadiene-styrene (ABS) ), polyvinyl chloride (PVC), benzocyclobutene (BCB), etc.; or inorganic materials, such as metals including titanium (Ti), gold (Au), beryllium (Be), tungsten (W), aluminum (Al) , Germanium (Ge), copper (Cu) or a combination thereof, the oxides include indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide, indium zinc oxide, zinc aluminum oxide, and zinc tin oxide , Zinc oxide (ZnO), silicon oxide (SiOx), or nitride containing silicon nitride (SiNx), etc. The semiconductor epitaxial stack 3 includes at least a first semiconductor layer 301 having a first conductivity type, a conversion unit 302 and a second semiconductor layer 303 having a second conductivity type, which are sequentially formed on the growth substrate 102. The first semiconductor layer 301 and the second semiconductor layer 303 may have two single-layer structures or two multi-layer structures (a multi-layer structure refers to two or more layers). The first semiconductor layer 301 and the second semiconductor layer 303 have different conductivity types, electrical properties, polarities or doped elements to provide electrons or holes. When the first semiconductor layer 301 is a p-type semiconductor, the second semiconductor layer 303 can be an n-type semiconductor with different electrical properties. Conversely, when the first semiconductor layer 301 is an n-type semiconductor, the second semiconductor layer 303 can be a different electrical semiconductor. Sexual p-type semiconductor. The conversion unit 302 is formed between the first semiconductor layer 301 and the second semiconductor layer 303, and the conversion unit 302 converts or causes conversion between light energy and electric energy. The semiconductor epitaxial stack 3 can be further processed and applied to a semiconductor element, device, product, or circuit to perform or cause the mutual conversion of light energy and electric energy. Specifically, the semiconductor epitaxial stack 3 can be further processed into one of a light emitting diode (LED), a laser diode (LD), a solar cell or a liquid crystal display. Taking a light emitting diode as an example, the wavelength of the emitted light can be adjusted by changing the physical and chemical composition of one or more layers of the semiconductor epitaxial stack 3. Commonly used materials are aluminum gallium indium phosphide (AlGaInP) series, aluminum gallium indium nitride (AlGaInN) series, and zinc oxide (ZnO) series. The conversion unit 302 can be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MWQ). ). Specifically, the conversion unit 302 can be a neutral, p-type or n-type semiconductor. When a current is applied to the semiconductor epitaxial stack 3, the conversion unit 302 emits light. When the conversion unit 302 is based on aluminum indium gallium phosphide (AlGaInP), it will emit red, orange, and yellow amber light; when it is based on aluminum gallium indium nitride (AlGaInN), it will emit Blue or green light.
接續如圖6D所示,將成長基板102與半導體磊晶疊層3分離並露出半導體磊晶疊層3之表面3011,以及形成一支撐結構5於黏結基板101的表面1012上、孔洞110的壁面1101上、以及從孔洞110顯露出的部分黏著結構2上。其中,分離成長基板102的方法可包含前述第一實施例中所描述之方法。支撐結構5的材料包含有機材料,例如紫外光(UV)解離膠,像是丙烯酸(Acrylic acid)、不飽和聚酯環氧樹脂(Unsaturated polyester)、環氧樹脂(Epoxy)、氧雜環丁烷(Oxetane)、乙烯醚(Vinyl ether)等;熱塑性塑膠,像是尼龍(Nylon)、聚丙烯(PP)、聚對苯二甲酸丁二醇酯(PBT)、聚苯醚(PPO)、聚碳酸酯(PC)、丙烯腈-丁二烯-苯乙烯(ABS)、聚氯乙烯(PVC)等;或者無機材料,例如金屬包含鈦(Ti)、金(Au)、鈹(Be)、鎢(W)、鋁(Al)、鍺(Ge)或其組合,氧化物包含氧化矽(SiOx),或者氮化物包含氮化矽(SiNx)等。As shown in FIG. 6D, the growth substrate 102 is separated from the semiconductor epitaxial stack 3 and the surface 3011 of the semiconductor epitaxial stack 3 is exposed, and a support structure 5 is formed on the surface 1012 of the bonding substrate 101 and the wall surface of the hole 110 1101 and part of the adhesive structure 2 exposed from the hole 110. The method of separating the growth substrate 102 may include the method described in the aforementioned first embodiment. The material of the support structure 5 includes organic materials, such as ultraviolet light (UV) dissociation glue, such as acrylic acid, unsaturated polyester epoxy resin, epoxy resin, and oxetane (Oxetane), vinyl ether (Vinyl ether), etc.; thermoplastic plastics, such as nylon (Nylon), polypropylene (PP), polybutylene terephthalate (PBT), polyphenylene ether (PPO), polycarbonate Ester (PC), acrylonitrile-butadiene-styrene (ABS), polyvinyl chloride (PVC), etc.; or inorganic materials, such as metals including titanium (Ti), gold (Au), beryllium (Be), tungsten ( W), aluminum (Al), germanium (Ge), or a combination thereof, the oxide includes silicon oxide (SiOx), or the nitride includes silicon nitride (SiNx).
接續如第6E圖所示,在半導體磊晶疊層3之表面3011上形成一圖形化的黏著介質4對應孔洞110,其中形成圖形化的黏著介質4的方式包含先形成一整層的黏著介質4在表面3011上,接著利用黃光微影製程或者圖形化蝕刻的方式,形成圖形化的黏著介質4,黃光微影製程及圖形化蝕刻係為一般習知的半導體製程。黏著介質4的材料包含有機材料,例如丙烯酸(Acrylic acid)、不飽和聚酯環氧樹脂(Unsaturated polyester)、環氧樹脂(Epoxy)、氧雜環丁烷(Oxetane)、乙烯醚(Vinyl ether)、尼龍(Nylon)、聚丙烯(PP)、聚對苯二甲酸丁二醇酯(PBT)、聚苯醚(PPO)、聚碳酸酯(PC)、丙烯腈-丁二烯-苯乙烯(ABS)、聚氯乙烯(PVC)等;或者無機材料,例如金屬包含鈦(Ti)、金(Au)、鈹(Be)、鎢(W)、鋁(Al)、鍺(Ge)、銅(Cu)或其組合,氧化物包含銦錫氧化物(ITO)、鎘錫氧化物(CTO)、銻氧化錫、氧化銦鋅、氧化鋅鋁、及鋅錫氧化物、氧化鋅(ZnO)、氧化矽(SiOx),或者氮化物包含氮化矽(SiNx)等。As shown in FIG. 6E, a patterned adhesive medium 4 corresponding to the hole 110 is formed on the surface 3011 of the semiconductor epitaxial stack 3, and the method of forming the patterned adhesive medium 4 includes first forming a whole layer of the adhesive medium 4 On the surface 3011, a patterned adhesive medium 4 is formed by a yellow light lithography process or patterned etching. The yellow light lithography process and patterned etching are generally known semiconductor manufacturing processes. The material of the adhesive medium 4 includes organic materials, such as Acrylic acid, Unsaturated polyester, Epoxy, Oxetane, Vinyl ether , Nylon (Nylon), polypropylene (PP), polybutylene terephthalate (PBT), polyphenylene ether (PPO), polycarbonate (PC), acrylonitrile-butadiene-styrene (ABS) ), polyvinyl chloride (PVC), etc.; or inorganic materials, such as metals including titanium (Ti), gold (Au), beryllium (Be), tungsten (W), aluminum (Al), germanium (Ge), copper (Cu) ) Or a combination thereof, the oxide includes indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide, indium zinc oxide, zinc aluminum oxide, and zinc tin oxide, zinc oxide (ZnO), silicon oxide (SiOx), or the nitride contains silicon nitride (SiNx), etc.
接續如第6F圖所示,圖形化半導體磊晶疊層3及黏著結構2並露出表面1011以形成互相隔開的複數個半導體磊晶疊層,其中複數個半導體磊晶疊層包含至少一個第一半導體磊晶疊層31及至少一個第二半導體磊晶疊層32,在每一個第一半導體磊晶疊層31上具有黏著介質4,而每一個第二半導體磊晶疊層32的表面3011上則無黏著介質4,其中,第一半導體磊晶疊層31在孔洞110上,因此第一半導體磊晶疊層31與黏結基板101之間的黏著力小於第二半導體磊晶疊層32與黏結基板101之間的黏著力。圖形化半導體磊晶疊層3及黏著結構2的方法包含乾蝕刻或濕蝕刻,在本實施例中使用乾蝕刻製成使第一半導體磊晶疊層31及第二半導體磊晶疊層32之間的間隔寬度w盡量縮小,以避免蝕刻過多的半導體磊晶疊層3造成浪費,本實施例的間隔寬度w介於1μm及10μm,較佳的為5μm。As shown in FIG. 6F, the semiconductor epitaxial stack 3 and the adhesive structure 2 are patterned and the surface 1011 is exposed to form a plurality of semiconductor epitaxial stacks separated from each other, wherein the plurality of semiconductor epitaxial stacks includes at least one first A semiconductor epitaxial stack 31 and at least one second semiconductor epitaxial stack 32 have an adhesive medium 4 on each first semiconductor epitaxial stack 31, and a surface 3011 of each second semiconductor epitaxial stack 32 There is no adhesive medium 4 on the top, where the first semiconductor epitaxial stack 31 is on the hole 110, so the adhesive force between the first semiconductor epitaxial stack 31 and the bonding substrate 101 is less than that between the second semiconductor epitaxial stack 32 and the second semiconductor epitaxial stack. Adhesion between the bonding substrates 101. The method of patterning the semiconductor epitaxial stack 3 and the adhesive structure 2 includes dry etching or wet etching. In this embodiment, dry etching is used to make the first semiconductor epitaxial stack 31 and the second semiconductor epitaxial stack 32 The gap width w between the gaps is as small as possible to avoid waste due to excessive etching of the semiconductor epitaxial stack 3. The gap width w in this embodiment is between 1 μm and 10 μm, and preferably 5 μm.
接續如第6G圖所示提供一擷取元件103藉由加溫、加壓或者利用擷取元件103本身具有之黏性,與黏著介質4黏結。擷取元件103包含導電材料,例如導電基板或印刷電路板,其中導電基板的材料包含矽(Si)、砷化鎵( GaAs )、碳化矽( SiC )、氧化鋅( ZnO )、氮化鎵( GaN )、氮化鋁 ( AlN )或金屬材料之一種或其組合;印刷電路板包含單面印刷電路板、雙面印刷電路板、多層印刷電路板或軟性電路板;或非導電材料,例如包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)、壓克力(Acryl)、氧化鋅(ZnO)、氮化鋁(AlN)、氧化二鋁鋰( LiAlO2)、陶瓷基板或發泡聚苯乙烯(EPS)膠帶等,其中當以發泡聚苯乙烯(EPS)膠帶形成擷取元件103時,可提供一硬質基板與發泡聚苯乙烯(EPS)膠帶黏合,用以支撐發泡聚苯乙烯(EPS)膠帶,以避免發泡聚苯乙烯(EPS)膠帶沾黏第二半導體磊晶疊層32的表面3011。Next, as shown in FIG. 6G, a capturing element 103 is provided to bond with the adhesive medium 4 by heating, pressing, or using the viscosity of the capturing element 103 itself. The extraction element 103 includes a conductive material, such as a conductive substrate or a printed circuit board. The material of the conductive substrate includes silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC), zinc oxide (ZnO), gallium nitride ( GaN), aluminum nitride (AlN) or one or a combination of metal materials; printed circuit boards include single-sided printed circuit boards, double-sided printed circuit boards, multilayer printed circuit boards or flexible circuit boards; or non-conductive materials, such as Sapphire, Diamond, Glass, Quartz, Acrylic, Zinc Oxide (ZnO), Aluminum Nitride (AlN), Lithium Aluminum Oxide (LiAlO2), Ceramic Substrate Or expanded polystyrene (EPS) tape, etc., when the extraction element 103 is formed with expanded polystyrene (EPS) tape, a rigid substrate can be provided for bonding with the expanded polystyrene (EPS) tape to Support the expanded polystyrene (EPS) tape to prevent the expanded polystyrene (EPS) tape from sticking to the surface 3011 of the second semiconductor epitaxial laminate 32.
在另一實施例中,如第11A圖所示,擷取元件103可進一步包含一軟性基板1032及一支撐結構1031,其中軟性基板1032的材料包含聚酯樹脂(polyester resin; PET)、聚萘二甲酸乙二醇酯(polyethylene naphthalate; PEN) 或聚醯亞胺(polyimide; PI),支撐結構的材料包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)或壓克力(Acryl)等硬質的基板,用以支撐軟性基板1032。In another embodiment, as shown in FIG. 11A, the capturing element 103 may further include a flexible substrate 1032 and a supporting structure 1031, wherein the material of the flexible substrate 1032 includes polyester resin (PET), polynaphthalene Polyethylene naphthalate (PEN) or polyimide (PI), the material of the support structure includes sapphire (Sapphire), diamond (Diamond), glass (Glass), quartz (Quartz) or acrylic A hard substrate such as Acryl is used to support the flexible substrate 1032.
在另一實施例中,可以先將圖形化的黏著介質4形成在擷取元件103上,使用對位黏合的技術,將黏著介質4與第一半導體磊晶疊層31對齊後,藉由加溫及加壓的方式,使黏著介質4與第一半導體磊晶疊層31黏結。In another embodiment, a patterned adhesive medium 4 may be formed on the extraction element 103 first, and the adhesive medium 4 may be aligned with the first semiconductor epitaxial stack 31 by using an alignment bonding technique. The bonding medium 4 and the first semiconductor epitaxial stack 31 are bonded by a gentle pressure method.
接續如第6H圖所示,當支撐結構5的材質為金屬材料,例如鈦(Ti)、鋁(Al)、鈦鎢(TiW)、銀(Ag)等,或者含矽的材料,例如氧化矽(SiOx)、氮化矽(SiNx)或者多晶矽(poly-Si)等材料,可使用濕蝕刻或者蒸氣蝕刻的方式,移除支撐結構5,再分別施以反方向的力量於擷取元件103及黏結基板101,使得第一半導體磊晶疊層31與犧牲層201分離,本實施例中,濕蝕刻使用的蝕刻液包含氫氟酸,蒸氣蝕刻使用的化學材料包含氟化氫(HF)蒸氣。若支撐結構5的材質為紫外光(UV)解離材料,像是丙烯酸(Acrylic acid)、不飽和聚酯環氧樹脂(Unsaturated polyester)、環氧樹脂(Epoxy)、氧雜環丁烷(Oxetane)、乙烯醚(Vinyl ether)等,使用紫外光(UV)照射支撐結構5可使支撐結構5與黏著結構2之間的黏著力降低或消失,再分別施以反方向的力量於擷取元件103及黏結基板101,使得第一半導體磊晶疊層31與支撐結構5分離;若支撐結構5的材質為熱塑性塑膠,像是尼龍(Nylon)、聚丙烯(PP)、聚對苯二甲酸丁二醇酯(PBT)、聚苯醚(PPO)、聚碳酸酯(PC)、丙烯腈-丁二烯-苯乙烯(ABS)、聚氯乙烯(PVC)等,加熱支撐結構5可使支撐結構5與黏著結構2之間的黏著力降低或消失,再分別施以反方向的力量於擷取元件103及黏結基板101,使得第一半導體磊晶疊層31與支撐結構5分離。As shown in Figure 6H, when the material of the support structure 5 is a metal material, such as titanium (Ti), aluminum (Al), titanium tungsten (TiW), silver (Ag), etc., or a material containing silicon, such as silicon oxide (SiOx), silicon nitride (SiNx) or poly-Si (poly-Si), etc., can be wet etching or vapor etching to remove the support structure 5, and then apply forces in opposite directions to the extraction element 103 and The substrate 101 is bonded to separate the first semiconductor epitaxial stack 31 and the sacrificial layer 201. In this embodiment, the etching solution used for wet etching includes hydrofluoric acid, and the chemical material used for vapor etching includes hydrogen fluoride (HF) vapor. If the material of the support structure 5 is ultraviolet light (UV) dissociative material, such as acrylic acid, unsaturated polyester, epoxy, and oxetane , Vinyl ether, etc., using ultraviolet light (UV) to irradiate the support structure 5 can reduce or disappear the adhesion between the support structure 5 and the adhesive structure 2, and then apply forces in the opposite direction to the capture element 103 And the bonding substrate 101 to separate the first semiconductor epitaxial stack 31 from the support structure 5; if the material of the support structure 5 is thermoplastic, such as nylon (Nylon), polypropylene (PP), polybutylene terephthalate Alcohol ester (PBT), polyphenylene ether (PPO), polycarbonate (PC), acrylonitrile-butadiene-styrene (ABS), polyvinyl chloride (PVC), etc., heating the support structure 5 can make the support structure 5 The adhesive force with the adhesive structure 2 decreases or disappears, and then forces in opposite directions are applied to the capture element 103 and the bonding substrate 101 respectively, so that the first semiconductor epitaxial stack 31 and the support structure 5 are separated.
在另一實施例中,如前述擷取元件103包含一軟性基板1032及一支撐結構1031,當第一半導體磊晶疊層31與犧牲層201分離後,接續如第11B圖所示,可將軟性基板1032與支撐結構1031分離,進一步製作成軟性顯示器。In another embodiment, as the aforementioned capturing element 103 includes a flexible substrate 1032 and a supporting structure 1031, after the first semiconductor epitaxial stack 31 is separated from the sacrificial layer 201, as shown in FIG. 11B, the The flexible substrate 1032 is separated from the supporting structure 1031, and is further fabricated into a flexible display.
第七實施例Seventh embodiment
第7A圖至第7F圖係分別為依本發明第七實施例之製程方法於各步驟之對應結構示意圖。本實施例與前述第二實施例的差異在於黏結基板101具有複數個孔洞120對應每一個第一半導體磊晶疊層31,使第一半導體磊晶疊層31與黏結基板101之間的黏著力比第二實施例中第一半導體磊晶疊層31與黏結基板101之間的黏著力還低,以增加使用機械力分離第一半導體磊晶疊層31與黏結基板101的成功機率;或者,利用濕蝕刻或蒸氣蝕刻去除犧牲層201時,蝕刻液包含氫氟酸或者蒸氣蝕刻使用的化學材料包含氟化氫(HF)蒸氣,可經由複數個孔洞120蝕刻犧牲層201,以減少蝕刻所需的時間。FIG. 7A to FIG. 7F are schematic diagrams of the corresponding structure in each step of the manufacturing method according to the seventh embodiment of the present invention. The difference between this embodiment and the foregoing second embodiment is that the bonding substrate 101 has a plurality of holes 120 corresponding to each first semiconductor epitaxial stack 31, so that the adhesion between the first semiconductor epitaxial stack 31 and the bonding substrate 101 Compared with the second embodiment, the adhesion force between the first semiconductor epitaxial stack 31 and the bonding substrate 101 is lower, so as to increase the probability of using mechanical force to separate the first semiconductor epitaxial stack 31 and the bonding substrate 101; or, When the sacrificial layer 201 is removed by wet etching or vapor etching, the etching solution contains hydrofluoric acid or the chemical material used for vapor etching contains hydrogen fluoride (HF) vapor. The sacrificial layer 201 can be etched through a plurality of holes 120 to reduce the time required for etching .
第八實施例Eighth embodiment
第8A圖至第8F圖係分別為依本發明第八實施例之製程方法於各步驟之對應結構示意圖。本實施例與前述第七實施例的差異在黏著結構2不包含犧牲層,於黏結基板101具有複數個孔洞120對應每一個第一半導體磊晶疊層31,使第一半導體磊晶疊層31與黏結基板101之間的黏著力比第二半導體磊晶疊層32與黏結基板101之間的黏著力還低,使用機械力即可分離第一半導體磊晶疊層31與黏結基板101。Fig. 8A to Fig. 8F are schematic diagrams of the corresponding structure in each step of the manufacturing method according to the eighth embodiment of the present invention. The difference between this embodiment and the aforementioned seventh embodiment is that the adhesive structure 2 does not include a sacrificial layer, and the adhesive substrate 101 has a plurality of holes 120 corresponding to each first semiconductor epitaxial stack 31, so that the first semiconductor epitaxial stack 31 The adhesion with the bonding substrate 101 is lower than the adhesion between the second semiconductor epitaxial stack 32 and the bonding substrate 101, and mechanical force can be used to separate the first semiconductor epitaxial stack 31 and the bonding substrate 101.
第九實施例Ninth embodiment
第9A圖至第9I圖係分別為依本發明第九實施例之製程方法於各步驟之對應結構示意圖。參閱第9A圖,提供一成長基板102具有一表面1021用以後續成長半導體疊層,構成成長基板102的材料包含但不限於鍺( Ge )、砷化鎵( GaAs )、磷化銦( InP )、磷化鎵 (GaP)、藍寶石(sapphire)、碳化矽( SiC )、矽 ( Si )、氧化二鋁鋰( LiAlO2 )、氧化鋅( ZnO )、氮化鎵( GaN )、氮化鋁 ( AlN )之一種或其組合。在成長基板102的表面1021上形成一圖形化的犧牲層601,犧牲層601的材料包含半導體材料,例如砷化鋁(AlAs)或氮化鋁(AlN),或者氧化物,例如氧化矽(SiOx),其中,若圖形化的犧牲層601的材料為砷化鋁(AlAs)或氮化鋁(AlN),形成的方式包含以有機金屬化學氣相沉積(MOCVD)的方法成長後,再以圖形化蝕刻的方式形成;若圖形化的犧牲層601的材料為氧化矽(SiOx),形成的方式包含以物理氣相沈積法(PVD)或化學氣相沈積法(CVD)的方式形成在成長基板102上,再施以圖形化蝕刻的方式形成。9A to 9I are schematic diagrams of the corresponding structure in each step of the manufacturing method according to the ninth embodiment of the present invention. Referring to FIG. 9A, a growth substrate 102 is provided with a surface 1021 for subsequent growth of a semiconductor stack. The materials constituting the growth substrate 102 include but are not limited to germanium (Ge), gallium arsenide (GaAs), and indium phosphide (InP) , Gallium phosphide (GaP), sapphire (sapphire), silicon carbide (SiC), silicon (Si), lithium aluminum oxide (LiAlO2), zinc oxide (ZnO), gallium nitride (GaN), aluminum nitride (AlN) ) Or a combination thereof. A patterned sacrificial layer 601 is formed on the surface 1021 of the growth substrate 102. The material of the sacrificial layer 601 includes semiconductor materials, such as aluminum arsenide (AlAs) or aluminum nitride (AlN), or oxides, such as silicon oxide (SiOx). ), where, if the material of the patterned sacrificial layer 601 is aluminum arsenide (AlAs) or aluminum nitride (AlN), the method of formation includes growing by a metal organic chemical vapor deposition (MOCVD) method, and then patterning Formed by chemical etching; if the material of the patterned sacrificial layer 601 is silicon oxide (SiOx), the method of formation includes physical vapor deposition (PVD) or chemical vapor deposition (CVD) on the growth substrate On 102, it is formed by patterning etching.
接續如第9B圖所示,在成長基板102的表面1021上形成一半導體層304並覆蓋圖形化的犧牲層601,其中半導體層304的材料有別於犧牲層601。半導體層304可包含一過渡層(未顯示)或一窗口層 (未顯示)。所述之過渡層可當作一緩衝層介於成長基板102及窗口層之間,或介於成長基板102及後續形成的半導體磊晶疊層3。在發光二極體的結構中,所述之過渡層係為了減少二層材料間的晶格不匹配。另一方面,所述之過渡層可以為單層、多層、二種材料的結合或二分開的結構,其中所述之過渡層的材料可為有機金屬、無機金屬或半導體中的任一種。所述之過渡層也可作為反射層、熱傳導層、電傳導層、歐姆接觸層、抗形變層、應力釋放層、應力調整層、接合層、波長轉換層或固定結構等。所述之窗口層係為一厚度較大的半導體層,可提升半導體磊晶疊層3的出光效率,以及增加電流橫向散佈的效果,其材料係包含至少一元素選自於鋁(Al)、鎵(Ga)、銦(In)、砷(As)、磷(P)及氮(N) 所構成之群組,或為其組合,例如為GaN或AlGaInP之半導體化合物。As shown in FIG. 9B, a semiconductor layer 304 is formed on the surface 1021 of the growth substrate 102 and covers the patterned sacrificial layer 601. The material of the semiconductor layer 304 is different from the sacrificial layer 601. The semiconductor layer 304 may include a transition layer (not shown) or a window layer (not shown). The transition layer can be used as a buffer layer between the growth substrate 102 and the window layer, or between the growth substrate 102 and the semiconductor epitaxial stack 3 formed later. In the structure of the light-emitting diode, the transition layer is to reduce the lattice mismatch between the two layers of materials. On the other hand, the transition layer can be a single layer, a multilayer, a combination of two materials, or a two-separated structure, and the material of the transition layer can be any one of an organic metal, an inorganic metal, or a semiconductor. The transition layer can also be used as a reflective layer, a heat conduction layer, an electrical conduction layer, an ohmic contact layer, an anti-deformation layer, a stress release layer, a stress adjustment layer, a bonding layer, a wavelength conversion layer, or a fixed structure. The window layer is a semiconductor layer with a large thickness, which can improve the light extraction efficiency of the semiconductor epitaxial stack 3 and increase the effect of lateral current spreading. The material includes at least one element selected from aluminum (Al), The group consisting of gallium (Ga), indium (In), arsenic (As), phosphorus (P) and nitrogen (N), or a combination thereof, such as a semiconductor compound of GaN or AlGaInP.
接續如第9C圖所示,在半導體層304上繼續形成半導體磊晶疊層3,其中,半導體磊晶疊層3包括至少一第一半導體層301具有第一導電型態,一轉換單元302以及一第二半導體層303具有第二導電型態,依序形成於成長基板102之上。第一半導體層301和第二半導體層303可為兩個單層結構或兩個多層結構(多層結構係指兩層或兩層以上)。第一半導體層301和第二半導體層303具有不同的導電型態、電性、極性或依摻雜的元素以提供電子或電洞。當第一半導體層301為p型半導體,第二半導體層303可為相異電性的n型半導體,反之,當第一半導體層301為n型半導體,第二半導體層303可為相異電性的p型半導體。轉換單元302形成在第一半導體層301和第二半導體層303之間,轉換單元302係將光能和電能相互轉換或導致轉換。半導體磊晶疊層3可進一步加工應用於一半導體元件、設備、產品、電路,以進行或導致光能和電能相互轉換。具體而言,半導體磊晶疊層3可進一步加工成為一發光二極體(LED)、一雷射二極體(LD)、一太陽能電池或一液晶顯示器其中之一。以發光二極體為例,可以藉由改變半導體磊晶疊層3裡的其中一層或多層的物理及化學組成,調整發出的光波長。常用的材料為磷化鋁鎵銦(aluminum gallium indium phosphide, AlGaInP)系列、氮化鋁鎵銦(aluminum gallium indium nitride, AlGaInN) 系列、氧化鋅系列(zinc oxide, ZnO)。轉換單元302可為單異質結構(single heterostructure, SH ),雙異質結構(double heterostructure, DH ),雙側雙異質結( double-side double heterostructure, DDH ),多層量子井(multi-quantum well, MWQ ) 。具體來說,轉換單元302可為中性、p型或n型電性的半導體。施以電流通過半導體磊晶疊層3時,轉換單元302會發光。當轉換單元302以磷化鋁銦鎵(AlGaInP)為基礎的材料時,會發出紅、橙、黃光之琥珀色系的光;當以氮化鋁鎵銦(AlGaInN)為基礎的材料時,會發出藍或綠光。As shown in FIG. 9C, the semiconductor epitaxial stack 3 is continuously formed on the semiconductor layer 304. The semiconductor epitaxial stack 3 includes at least one first semiconductor layer 301 having a first conductivity type, a conversion unit 302, and A second semiconductor layer 303 has the second conductivity type and is sequentially formed on the growth substrate 102. The first semiconductor layer 301 and the second semiconductor layer 303 may have two single-layer structures or two multi-layer structures (a multi-layer structure refers to two or more layers). The first semiconductor layer 301 and the second semiconductor layer 303 have different conductivity types, electrical properties, polarities or doped elements to provide electrons or holes. When the first semiconductor layer 301 is a p-type semiconductor, the second semiconductor layer 303 can be an n-type semiconductor with different electrical properties. Conversely, when the first semiconductor layer 301 is an n-type semiconductor, the second semiconductor layer 303 can be a different electrical semiconductor. Sexual p-type semiconductor. The conversion unit 302 is formed between the first semiconductor layer 301 and the second semiconductor layer 303, and the conversion unit 302 converts or causes conversion between light energy and electric energy. The semiconductor epitaxial stack 3 can be further processed and applied to a semiconductor element, device, product, or circuit to perform or cause the mutual conversion of light energy and electric energy. Specifically, the semiconductor epitaxial stack 3 can be further processed into one of a light emitting diode (LED), a laser diode (LD), a solar cell or a liquid crystal display. Taking a light emitting diode as an example, the wavelength of the emitted light can be adjusted by changing the physical and chemical composition of one or more layers of the semiconductor epitaxial stack 3. Commonly used materials are aluminum gallium indium phosphide (AlGaInP) series, aluminum gallium indium nitride (AlGaInN) series, and zinc oxide (ZnO) series. The conversion unit 302 can be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MWQ). ). Specifically, the conversion unit 302 can be a neutral, p-type or n-type semiconductor. When a current is applied to the semiconductor epitaxial stack 3, the conversion unit 302 emits light. When the conversion unit 302 is based on aluminum indium gallium phosphide (AlGaInP), it will emit red, orange, and yellow amber light; when it is based on aluminum gallium indium nitride (AlGaInN), it will emit Blue or green light.
接續如第9D圖所示,在半導體磊晶疊層3之表面3011上形成一圖形化的黏著介質4對應圖形化的犧牲層601,其中形成圖形化的黏著介質4的方式包含先形成一整層的黏著介質4在表面3011上,接著利用黃光微影製程或者圖形化蝕刻的方式,形成圖形化的黏著介質4,黃光微影製程及圖形化蝕刻係為一般習知的半導體製程。黏著介質4的材料包含有機材料,例如丙烯酸(Acrylic acid)、不飽和聚酯環氧樹脂(Unsaturated polyester)、環氧樹脂(Epoxy)、氧雜環丁烷(Oxetane)、乙烯醚(Vinyl ether)、尼龍(Nylon)、聚丙烯(PP)、聚對苯二甲酸丁二醇酯(PBT)、聚苯醚(PPO)、聚碳酸酯(PC)、丙烯腈-丁二烯-苯乙烯(ABS)、聚氯乙烯(PVC)、苯并環丁烯(BCB)等;或者無機材料,例如金屬包含鈦(Ti)、金(Au)、鈹(Be)、鎢(W)、鋁(Al)、鍺(Ge)、銅(Cu)或其組合,氧化物包含銦錫氧化物(ITO)、鎘錫氧化物(CTO)、銻氧化錫、氧化銦鋅、氧化鋅鋁、及鋅錫氧化物、氧化鋅(ZnO)、氧化矽(SiOx),或者氮化物包含氮化矽(SiNx)等。Next, as shown in FIG. 9D, a patterned adhesive medium 4 corresponding to the patterned sacrificial layer 601 is formed on the surface 3011 of the semiconductor epitaxial stack 3, wherein the method of forming the patterned adhesive medium 4 includes first forming a whole The adhesive medium 4 of the layer is on the surface 3011, and then a patterned adhesive medium 4 is formed by a yellow light lithography process or patterned etching. The yellow light lithography process and patterned etching are generally known semiconductor processes. The material of the adhesive medium 4 includes organic materials, such as Acrylic acid, Unsaturated polyester, Epoxy, Oxetane, Vinyl ether , Nylon (Nylon), polypropylene (PP), polybutylene terephthalate (PBT), polyphenylene ether (PPO), polycarbonate (PC), acrylonitrile-butadiene-styrene (ABS) ), polyvinyl chloride (PVC), benzocyclobutene (BCB), etc.; or inorganic materials, such as metals including titanium (Ti), gold (Au), beryllium (Be), tungsten (W), aluminum (Al) , Germanium (Ge), copper (Cu) or a combination thereof, the oxides include indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide, indium zinc oxide, zinc aluminum oxide, and zinc tin oxide , Zinc oxide (ZnO), silicon oxide (SiOx), or nitride containing silicon nitride (SiNx), etc.
接續如第9E圖所示,圖形化半導體磊晶疊層3及半導體層304並露出成長基板102的表面1021以形成互相隔開的複數個半導體磊晶疊層,其中複數個半導體磊晶疊層包含至少一個第一半導體磊晶疊層31及至少一個第二半導體磊晶疊層32,在每一個第一半導體磊晶疊層31上具有黏著介質4,而每一個第二半導體磊晶疊層32的表面3011上則無黏著介質4。圖形化半導體磊晶疊層3及黏著結構2的方法包含乾蝕刻或濕蝕刻,在本實施例中使用乾蝕刻製成使第一半導體磊晶疊層31及第二半導體磊晶疊層32之間的間隔寬度w盡量縮小,以避免蝕刻過多的半導體磊晶疊層3造成浪費,本實施例的間隔寬度w介於1μm及10μm,較佳的為5μm。在本實施例中,由於第一半導體磊晶疊層31與成長基板102之間具有犧牲層601,而第二半導體磊晶疊層32係直接成長在成長基板102上,因此控制半導體層304磊晶製程的參數條件,或利用犧牲層601材料與半導體層304材料性質的差異,例如犧牲層601的材料為氧化物,使半導體層304與犧牲層601之間的附著力小於半導體層304與成長基板102之間的附著力。Next, as shown in FIG. 9E, the semiconductor epitaxial stack 3 and the semiconductor layer 304 are patterned and the surface 1021 of the growth substrate 102 is exposed to form a plurality of semiconductor epitaxial stacks spaced apart from each other, wherein a plurality of semiconductor epitaxial stacks It includes at least one first semiconductor epitaxial stack 31 and at least one second semiconductor epitaxial stack 32, each first semiconductor epitaxial stack 31 has an adhesive medium 4, and each second semiconductor epitaxial stack There is no adhesive medium 4 on the surface 3011 of 32. The method of patterning the semiconductor epitaxial stack 3 and the adhesive structure 2 includes dry etching or wet etching. In this embodiment, dry etching is used to make the first semiconductor epitaxial stack 31 and the second semiconductor epitaxial stack 32 The gap width w between the gaps is as small as possible to avoid waste due to excessive etching of the semiconductor epitaxial stack 3. The gap width w in this embodiment is between 1 μm and 10 μm, and preferably 5 μm. In this embodiment, since there is a sacrificial layer 601 between the first semiconductor epitaxial stack 31 and the growth substrate 102, and the second semiconductor epitaxial stack 32 is directly grown on the growth substrate 102, the epitaxy of the semiconductor layer 304 is controlled. The parameter conditions of the crystallization process, or the use of the material properties of the sacrificial layer 601 and the semiconductor layer 304, for example, the material of the sacrificial layer 601 is oxide, so that the adhesion between the semiconductor layer 304 and the sacrificial layer 601 is smaller than the semiconductor layer 304 and the growth Adhesion between the substrates 102.
接續如第9F圖所示,所示提供一擷取元件103藉由加溫、加壓或者利用擷取元件103本身具有之黏性,與黏著介質4黏結。擷取元件103包含導電材料,例如導電基板或印刷電路板,其中導電基板的材料包含矽(Si)、砷化鎵( GaAs )、碳化矽( SiC )、氧化鋅( ZnO )、氮化鎵( GaN )、氮化鋁 ( AlN )或金屬材料之一種或其組合;印刷電路板包含單面印刷電路板、雙面印刷電路板、多層印刷電路板或軟性電路板;或非導電材料,例如包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)、壓克力(Acryl)、氧化鋅(ZnO)、氮化鋁(AlN)、氧化二鋁鋰( LiAlO2)、陶瓷基板或發泡聚苯乙烯(EPS)膠帶等。Next, as shown in FIG. 9F, a capturing element 103 is provided to bond with the adhesive medium 4 by heating, pressurizing, or using the viscosity of the capturing element 103 itself. The extraction element 103 includes a conductive material, such as a conductive substrate or a printed circuit board. The material of the conductive substrate includes silicon (Si), gallium arsenide (GaAs), silicon carbide (SiC), zinc oxide (ZnO), gallium nitride ( GaN), aluminum nitride (AlN) or one or a combination of metal materials; printed circuit boards include single-sided printed circuit boards, double-sided printed circuit boards, multilayer printed circuit boards or flexible circuit boards; or non-conductive materials, such as Sapphire, Diamond, Glass, Quartz, Acrylic, Zinc Oxide (ZnO), Aluminum Nitride (AlN), Lithium Aluminum Oxide (LiAlO2), Ceramic Substrate Or expanded polystyrene (EPS) tape, etc.
在另一實施例中,如第11A圖所示,擷取元件103可進一步包含一軟性基板1032及一支撐結構1031,其中軟性基板1032的材料包含聚酯樹脂(polyester resin; PET)、聚萘二甲酸乙二醇酯(polyethylene naphthalate; PEN) 或聚醯亞胺(polyimide; PI),支撐結構的材料包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)或壓克力(Acryl)等硬質的基板,用以支撐軟性基板1032。In another embodiment, as shown in FIG. 11A, the capturing element 103 may further include a flexible substrate 1032 and a supporting structure 1031, wherein the material of the flexible substrate 1032 includes polyester resin (PET), polynaphthalene Polyethylene naphthalate (PEN) or polyimide (PI), the material of the support structure includes sapphire (Sapphire), diamond (Diamond), glass (Glass), quartz (Quartz) or acrylic A hard substrate such as Acryl is used to support the flexible substrate 1032.
在另一實施例中,可以先將圖形化的黏著介質4形成在擷取元件103上,使用對位黏合的技術,將黏著介質4與第一半導體磊晶疊層31對齊後,藉由加溫及加壓的方式,使黏著介質4與第一半導體磊晶疊層31黏結。In another embodiment, a patterned adhesive medium 4 may be formed on the extraction element 103 first, and the adhesive medium 4 may be aligned with the first semiconductor epitaxial stack 31 by using an alignment bonding technique. The bonding medium 4 and the first semiconductor epitaxial stack 31 are bonded by a gentle pressure method.
接續如第9G圖所示,若犧牲層601為氧化物(SiOx)或者砷化鋁(AlAs),可使用濕蝕刻或者蒸氣蝕刻的方式,移除犧牲層601,再分別施以反方向的力量於擷取元件103及成長基板102,使得第一半導體磊晶疊層31與犧牲層601分離,本實施例中,濕蝕刻使用的蝕刻液包含氫氟酸,蒸氣蝕刻使用的化學材料包含氟化氫(HF)蒸氣。或者如第9H圖及第9I圖所示,當犧牲層601的材料為非半導體材料,例如氧化物(SiOx)時,控制半導體層304磊晶製程中橫向磊晶階段的溫度與壓力,例如控制溫度介於1000℃與1100℃之間及壓力介於400mbr與600mbar之間,在半導體層304與犧牲層601之間形成一孔隙602,使半導體層304與犧牲層601之間的接觸面積減少,此時即可施以反方向的力量於擷取元件103及成長基板102,直接分離第一半導體磊晶疊層31與犧牲層601。As shown in Figure 9G, if the sacrificial layer 601 is oxide (SiOx) or aluminum arsenide (AlAs), wet etching or vapor etching can be used to remove the sacrificial layer 601, and then apply forces in the opposite direction. In the extraction element 103 and the growth substrate 102, the first semiconductor epitaxial stack 31 is separated from the sacrificial layer 601. In this embodiment, the etching solution used for wet etching includes hydrofluoric acid, and the chemical material used for vapor etching includes hydrogen fluoride ( HF) Steam. Or as shown in FIG. 9H and FIG. 9I, when the material of the sacrificial layer 601 is a non-semiconductor material, such as oxide (SiOx), the temperature and pressure in the lateral epitaxial phase of the semiconductor layer 304 epitaxial process are controlled, such as controlling The temperature is between 1000°C and 1100°C and the pressure is between 400mbr and 600mbar. A void 602 is formed between the semiconductor layer 304 and the sacrificial layer 601, so that the contact area between the semiconductor layer 304 and the sacrificial layer 601 is reduced. At this time, a force in the opposite direction can be applied to the extraction device 103 and the growth substrate 102 to directly separate the first semiconductor epitaxial stack 31 and the sacrificial layer 601.
在另一實施例中,如第11A圖所示,擷取元件103可進一步包含一軟性基板1032及一支撐結構1031,其中軟性基板1032的材料包含聚酯樹脂(polyester resin; PET)、聚萘二甲酸乙二醇酯(polyethylene naphthalate; PEN) 或聚醯亞胺(polyimide; PI),支撐結構的材料包含藍寶石(Sapphire)、鑽石(Diamond)、玻璃(Glass)、石英(Quartz)或壓克力(Acryl)等硬質的基板,用以支撐軟性基板1032。In another embodiment, as shown in FIG. 11A, the capturing element 103 may further include a flexible substrate 1032 and a supporting structure 1031, wherein the material of the flexible substrate 1032 includes polyester resin (PET), polynaphthalene Polyethylene naphthalate (PEN) or polyimide (PI), the material of the support structure includes sapphire (Sapphire), diamond (Diamond), glass (Glass), quartz (Quartz) or acrylic A hard substrate such as Acryl is used to support the flexible substrate 1032.
第十實施例Tenth embodiment
第10A圖至第10C圖係分別為依本發明第十實施例之製程方法於各步驟之對應結構示意圖。如第10A圖至第10C圖所示,第十實施例與前述第九實施例差異在於黏著介質4位於第二半導體磊晶疊層32上,而第一半導體磊晶疊層31露出表面3011。如第10C圖所示,當半導體層304的材料為氮化鎵(GaN),犧牲層601的材料為氮化鋁(AlN),且成長基板102為透明基板時,可使用一雷射光7從成長基板102的另一表面1022射入用以照射半導體層304及犧牲層601,其中雷射光7的能量大於氮化鎵(GaN)的能隙且小於氮化鋁(AlN)的能隙,用以分離每一個第二半導體磊晶疊層32中的半導體層304與成長基板102,接著再施以反方向的力量於擷取元件103及成長基板102,分離第二半導體磊晶疊層32與成長基板102。FIG. 10A to FIG. 10C are schematic diagrams of the corresponding structure in each step of the manufacturing method according to the tenth embodiment of the present invention. As shown in FIGS. 10A to 10C, the difference between the tenth embodiment and the aforementioned ninth embodiment is that the adhesive medium 4 is located on the second semiconductor epitaxial stack 32, and the first semiconductor epitaxial stack 31 exposes the surface 3011. As shown in FIG. 10C, when the material of the semiconductor layer 304 is gallium nitride (GaN), the material of the sacrificial layer 601 is aluminum nitride (AlN), and the growth substrate 102 is a transparent substrate, a laser light 7 can be used from The other surface 1022 of the growth substrate 102 is incident to illuminate the semiconductor layer 304 and the sacrificial layer 601, in which the energy of the laser light 7 is greater than the energy gap of gallium nitride (GaN) and less than the energy gap of aluminum nitride (AlN). To separate the semiconductor layer 304 and the growth substrate 102 in each second semiconductor epitaxial stack 32, and then apply a force in the opposite direction to the capture element 103 and the growth substrate 102 to separate the second semiconductor epitaxial stack 32 and the growth substrate 102. Growth substrate 102.