TWI772931B - Electronic device housings with chamfered edges - Google Patents

Abstract

In one example, a method for manufacturing an electronic device housing may include forming an oxide layer on a surface of a metal substrate. Further, an edge region of the metal substrate may be chamfered to form an exposed surface portion of the metal substrate. The exposed surface portion of the metal substrate may be electrocleaned. Upon electrocleaning the exposed surface portion, a transparent protective passivation layer may be formed on the exposed surface portion. Furthermore, an electrophoretic deposition layer may be formed on the transparent protective passivation layer.

Description

Electronic device enclosure with chamfered edges

The present invention relates to electronic device housings with chamfered edges.

As portable electronic products have been developed to be lighter and smaller, metal casings with light weight and high robustness properties have become popular. In these cases, metal substrates such as magnesium alloys, aluminum alloys, etc. can be used to manufacture metal casings, which can have low density, high specific strength, good heat dissipation, electromagnetic interference resistance, and good shock absorption.

In one aspect of the present invention, a method for fabricating an electronic device casing is disclosed, the method comprising: forming an oxide layer on a surface of a metal substrate; chamfering an edge region of the metal substrate to form An exposed surface portion of the metal substrate; electro-cleaning the exposed surface portion of the metal substrate; after electro-cleaning the exposed surface portion, a transparent protective passivation layer is formed on the exposed surface portion; and on the transparent protective passivation layer An electrophoretic deposition layer is formed.

Housings for electronic devices such as mobile phones, laptops, music players, personal digital assistants, and global positioning system devices may be formed of metal. For example, magnesium alloys may be suitable for use in the electronic device housing due to their light weight and high mechanical strength. However, magnesium alloys may have poor color stability, hardness and chemical resistance. Therefore, it may be difficult to create a metallic luster on the chamfered surface of the magnesium alloy shell, after all, the magnesium alloy is oxidized on the surface. Furthermore, for example, it may be difficult to obtain multiple colors or different brightness levels on the chamfered surfaces of magnesium alloy housings using spraying procedures.

Examples described herein may provide methods of manufacturing electronic device housings. In one example, an oxide layer may be formed on a surface of a metal substrate. Additionally, an edge region of the metal substrate may be chamfered to form an exposed surface portion of the metal substrate. The exposed surface portion of the metal substrate may be electrocleaned. After electrocleaning the exposed surface portion, a transparent protective passivation layer can be formed on the exposed surface portion. In addition, an electrophoretic deposition layer can be formed on the transparent protective passivation layer.

The examples described herein may provide a metallic luster chamfered surface (eg, a glossy or natural metallic luster surface) in the edge region of the electronic device housing. Furthermore, the examples described herein can enhance the aesthetic appearance of the electronic device housing by providing different colors in the chamfered edge regions of the metal surfaces. In addition, the exemplary transparent protective passivation layers and electrodeposited layers described herein can prevent or resolve stain and corrosion problems of metal substrates partially exposed through the exposed surface and provide a durable coating.

In the following description, for purposes of explanation, numerous specific details are set forth to provide a thorough understanding of the present technology. However, the exemplary apparatus, devices, and systems may be practiced without these specific details. Reference in the specification to "an example" or similar terms means that a particular feature, structure, or characteristic described is included in at least that example, but may not be included in other examples.

Referring now to the drawings, FIG. 1 is a flow chart illustrating an exemplary method 100 for fabricating an electronic device housing with chamfered edges. Exemplary electronic device housings may be smartphone housings, tablet or notebook PC housings, digital camera housings, and the like. Furthermore, exemplary electronic device housings may be display housings housing a display, keyboard housings housing a keyboard, or combinations thereof.

In step 102, an oxide layer may be formed on the surface of a metal substrate. The metal matrix may include: aluminum, magnesium, lithium, zinc, titanium, aluminum alloys, magnesium alloys, lithium alloys, zinc alloys, titanium alloys, or combinations thereof. In one example, the oxide layer may be formed by applying one of a micro-arc oxidation treatment and a first passivation treatment on the surface of the metal substrate. For example, the micro-arc oxidation treatment and the first passivation treatment may be electrochemical surface treatment procedures for producing oxide coatings on metal substrates.

In one example, the micro-arc oxidation procedure may refer to a procedure for producing an oxide coating on a metal substrate. During the micro-arc oxidation procedure, the metal substrate can be placed in an electrolyte solution comprising an electrolyte selected from the group consisting of: sodium silicate, sodium phosphate, potassium fluoride, hydrogen Potassium oxide, sodium hydroxide, fluorozirconate, sodium hexametaphosphate, sodium fluoride, alumina, silica, ferric ammonium oxalate, phosphonates and polyoxyethylene alkanol ethers. The electrolyte may be present at a concentration of 0.05 to 15% by weight, based on the total weight of the electrolyte solution, and a voltage in the range of 200 to 600 volts may be passed through the electrolyte by placing the metal matrix (eg, a magnesium alloy matrix) in the electrolyte solution solution to form a micro-arc oxide layer (ie, the oxide layer). In one example, the voltage may be applied for about 3 to 20 minutes and the micro-arc oxidation process may be performed at a temperature between room temperature and 450°C. The thickness of the micro-arc oxide layer may be in the range of 3 to 15 µm. The micro-arc oxidation properties may include wear resistance, corrosion resistance, high hardness, and electrical insulation.

Similarly, the first passivation treatment may refer to a procedure of treating or coating the metal substrate to reduce the chemical reactivity of the surface of the metal substrate. For example, the passivation process may involve creating an outer layer of shielding material around the metal substrate to "passivate" the metal substrate, ie, be less susceptible to environmental influences or corrosion. In one example, the passivation layer (ie, the oxide layer) formed by applying the first passivation treatment may include molybdate, vanadate, phosphate, chromate, stannate, manganese salt, or a combination thereof . Furthermore, the thickness of the passivation layer may be in the range of 1-5 µm.

In step 104, an edge region of the metal substrate may be chamfered to form an exposed surface portion of the metal substrate. In one example, the edge region may include an outer perimeter of the metal substrate, an inner perimeter of the metal substrate, or a combination thereof. The outer perimeter may refer to a boundary region or a sidewall of the metal matrix, and the inner perimeter may refer to the edge surface that defines the opening in the metal matrix. For example, the opening may correspond to a touchpad, keyboard, fingerprint scanner, or the like.

At step 106, the exposed surface portion of the metal substrate may be electrocleaned. In one example, electrocleaning removes organic chemicals, residual cutting agents from the exposed surface portion by pretreating the exposed surface portion of the metal substrate and then subjecting the metal substrate to current as an electrode in an electrolyte solution. liquid, magnesium alloy chips and other contaminants. In one example, electrocleaning the exposed surface portion may include alkaline electrocleaning the exposed surface portion with an alkaline electrolyte solution. For example, the electrolyte solution may include about 2 to 10 weight percent of an aqueous sodium hydroxide solution, an aqueous potassium hydroxide solution, or a combination thereof. Thus, the exemplary electrocleaning can significantly enhance the production yield of the electronic device housing.

In step 108, after the exposed surface portion is electro-cleaned, a transparent protective passivation layer can be formed on the exposed surface portion. In one example, the transparent protective passivation layer may be formed by applying a second passivation process on the exposed surface portion. In one example, the chemistry of the second passivation treatment can be different from the chemistry of the first passivation treatment. An exemplary second passivation treatment can include treating the exposed surface portion with a complex of a metal ion, an organic acid, and a chelating agent. Exemplary chelating agents may include: ethylenediaminetetraacetic acid (EDTA), ethylenediamine, nitrotriacetic acid (NTA), diethylenetriaminepenta(methylenephosphonic acid) (DTPPH), nitroparaffin ( methylenephosphonic acid) (NTMP), 1-hydroxyethane-1,1-diphosphonic acid (HEDP), sulfuric acid, phosphoric acid, or any combination thereof. Exemplary metal ions may be: aluminum ions, nickel ions, tin ions, indium ions, chromium ions, zinc ions, or any combination thereof. Exemplary organic acids can include lactic acid, acetic acid, formic acid, oxalic acid, and the like. In one example, the transparent protective passivation layer may have a thickness in the range of 30 nm to 3 μm. Additionally, the transparent protective passivation layer may have a pH of about 3 to 5.

In step 110, an electrophoretic deposition layer may be formed on the transparent protective passivation layer. In one example, the electrophoretically deposited layer can be used to impart a desired property to the metal substrate, such as hardness or toughness, or a desired appearance. Therefore, the transparent protective passivation layer and the electrophoretic deposition layer on the chamfered edge region can provide a shiny, flat and smooth metallic appearance. Thereby, the chamfered edge region can provide an aesthetically attractive appearance to the electronic device housing.

FIG. 2 is a flow chart illustrating another exemplary method 200 for fabricating an electronic device housing with chamfered edges. Exemplary electronic device housings can be a display housing housing a display, a keyboard housing housing a keyboard, or a combination thereof. In step 202, an oxide layer may be formed on the surface of a metal substrate.

At step 204, a coating may be applied over the oxide layer. In one example, applying the coating layer on the oxide layer may include applying a primer coating on the metal substrate including the oxide layer. Exemplary primer coatings may include: polyurethane, epoxy, epoxy-polyester, polyester, or combinations thereof. In one example, the primer coating may have a thickness in the range of 5 to 20 μm. Additionally, applying the finish can include applying a base coat over the primer coat. Exemplary base coats may include polyurethane, polyester and/or polyacrylic in combination with at least one pigment selected from the group consisting of carbon black, titanium dioxide, clay, mica, talc, barium sulfate, carbonic acid The group consisting of calcium, synthetic pigments, metal powders, alumina, an organic powder, an inorganic powder, plastic beads, colored pigments and dyes. In one example, the base coating may have a thickness in the range of 10 to 20 μm.

Additionally, applying the finish can include applying one of a UV topcoat and a thermally cured polyester, acrylic, and polyurethane topcoat over the basecoat. Exemplary UV topcoats can include: polyacrylic, polyurethane, urethane acrylate, acrylic acrylate, epoxy acrylate, or any combination thereof. In one example, the UV topcoat can have a thickness in the range of 10 to 25 μm. Exemplary thermally cured polyurethane topcoats can include hydroxy-functional acrylic polymers used to formulate urethane coatings. In one example, the finish layer can include any combination of the primer coat, the base coat, and the top coat.

At step 206, an edge region of the metal substrate may be chamfered by applying an aqueous anti-corrosion cutting fluid to form an exposed surface portion of the metal substrate. Exemplary aqueous anti-corrosion cutting fluids may include (eg, by weight) such as about 5-40% alcohol reagents (eg, phosphates, etc.), about 3-15% organic amines (eg, diethanolamine, diethylene glycol) amine, ethylenediamine, triethanolamine, etc.), about 5-30% of carboxylate (such as acetate, oxalate, etc.), about 1-5% of surfactant, and about 55-85% of water, etc. Component. In one example, the edge region may be chamfered using a computer numerical control (CNC) cutting (eg, a CNC diamond cutting program), a laser engraving program, or the like. In this example, the edge region of the metal substrate can be chamfered by the CNC cutting, while applying or spraying the aqueous anti-corrosion cutting fluid.

In one example, chamfers may be formed on sidewalls (eg, edge regions) of the metal substrate. In addition, the chamfer may have any suitable shape (eg, chamfer, round or double bend, etc.), thereby imparting any suitable cross-sectional shape to the edge regions of the metal substrate. For example, the chamfer can provide an aesthetically and tactilely pleasing topography to the electronic device housing.

At step 208, the exposed surface portion of the metal substrate may be electrocleaned. In one example, electrocleaning the exposed surface portion may include alkaline electrocleaning the exposed surface portion with an alkaline electrolyte solution. Exemplary alkaline electrolyte solutions may include aqueous sodium hydroxide, aqueous potassium hydroxide, or combinations thereof.

In step 210, after electrocleaning the exposed surface portion, a transparent passivation treatment may be applied to the exposed surface portion to form a transparent protective passivation layer. In one example, the application of the transparent passivation treatment can be performed by applying a passivation solution on the exposed surface portion, wherein the passivation solution includes a complex that is a metal ion, an organic acid, and a chelating agent the complex. An exemplary transparent passivation process can be illustrated in FIG. 1 . At step 212, electrophoretic deposition may be applied over the transparent protective passivation layer to form an electrophoretic deposition layer. The electrophoretic deposition may be a procedure of placing the metal substrate in a fluid and applying a potential difference to deposit charged particles in the fluid on the transparent protective passivation layer.

In one example, the electrophoretically deposited layer on the chamfered edge region may include a color that is different from the color of the oxide layer formed on the surface of the metal substrate. An exemplary housing with a color layer on the chamfered edge region is depicted in FIG. 4 .

FIG. 3 is a flowchart illustrating yet another exemplary method 300 for fabricating an electronic device housing with chamfered edges. At step 302, a coating may be formed on a composite metal substrate. Exemplary composite metal substrates may include a metal-plastic composite substrate, a metal-carbon fiber composite substrate, and the like. In one example, the coating may be formed on the surface of a metal layer of the composite metal matrix. Exemplary coatings may be a micro-arc oxide layer, a passivation layer, or an electrophoretic deposition layer. Exemplary micro-arc oxide and passivation layers are depicted in FIG. 1 . Exemplary electrophoretic deposition layers can be formed by applying a first electrophoretic deposition on the surface of the metal substrate. The first electrophoretic deposition may be a procedure of placing the metal substrate in a fluid and applying a potential difference to deposit charged particles in the fluid on the metal substrate.

At step 304, an edge region of the composite metal matrix may be chamfered to form an exposed surface portion of the composite metal matrix. In one example, a coating layer may be applied to the composite metal substrate including the coating and a non-metallic layer prior to chamfering the edge region of the composite metal substrate. For example, the finish can include a powder coat, a primer coat, a base coat, a UV top coat, or any combination thereof. Exemplary paint layers are depicted in FIGS. 2 and 6 .

At step 306, the exposed surface portion of the composite metal matrix may be electrocleaned. In one example, electrocleaning the exposed surface portion may include alkaline electrocleaning the exposed surface portion with an alkaline electrolyte solution. Exemplary alkaline electrolyte solutions may include about 2 to 10 weight percent aqueous sodium hydroxide, aqueous potassium hydroxide, or a combination thereof. In step 308, after electrocleaning the exposed surface portion, a transparent protective passivation layer can be formed on the exposed surface portion.

At step 310, a sealing layer may be formed on the transparent protective passivation layer. In one example, the sealing layer may be formed using a sealing process. For example, the sealing procedure may include applying a sealing material containing about 0.1-2 weight percent surfactant at a temperature of about 25°C to 100°C. Exemplary sealing materials can be selected from the group consisting of aluminum fluoride, nickel fluoride, cerium fluoride, cerium acetate, aluminum acetate, and nickel acetate. Further, the sealing layer may have a thickness in the range of 1-3 µm. Thus, the exemplary sealing procedure can significantly enhance the corrosion resistance of the electronic device housing. At step 312, a color layer may be formed on the sealing layer by applying a second electrophoretic deposition. In one example, the color layer on the sealing layer may have a color that is different from the color of the coating formed on the surface of the composite metal substrate. An exemplary housing with different color layers on different chamfered edge regions is depicted in FIG. 4 .

4 illustrates a top view of an exemplary electronic device housing or housing 400 depicting chamfered edge regions (eg, 402, 404, and 406). In the example shown in FIG. 4, chamfered edge region 402 may correspond to the outer perimeter of metal base 408, chamfered edge region 404 may correspond to a boundary defining a fingerprint scanner within metal base 408, and chamfered edge region 406 May correspond to a boundary defining a touchpad within metal matrix 408 .

In one example, the electrophoretic deposition may provide a multi-colored metallic glossy finish on the chamfered edge regions 402 , 404 and 406 of the housing 400 . Each of the chamfered edge regions 402, 404, and 406 may have a different color layer formed using the exemplary methods described in FIGS. 1-3. For example, the electrophoretic deposition can use about 0.3 to 15.0 weight percent of red dyes (eg, Alexa Fluor 594 dyes and Texas Red) or red pigments (eg, Pigment Red 168 MF) in the formulation to create a surface corresponding to the sidewalls. A red metallic luster is formed on the chamfered edge region 402 . In another example, the electrophoretic deposition may use about 0.3-15.0 weight percent of a yellow dye (eg, Quinoline Yellow WS) or a yellow pigment (eg, Pigment Yellow 191) in the formulation, for example, in applications corresponding to fingerprint scanners. A yellow metallic luster is formed on the chamfered edge region 404 . Similarly, a transparent metallic sheen can be formed on the chamfered edge region 406 corresponding to the touchpad. Thus, multiple electrophoretic deposition processes can be applied to multiple chamfered edge regions to form transparent, translucent, shiny, and opaque colors.

FIG. 5 illustrates an exemplary process 500 for forming a transparent protective passivation layer, a sealing layer, and an electrophoretic deposition layer on the chamfered edge region of a composite metal substrate. At step 502, a metal substrate or metal alloy substrate (eg, a magnesium alloy substrate) may be preformed. For example, preforming the metal alloy matrix may include forging, die casting or CNC cutting the metal matrix into a desired shape and then cleaning the forged, die casting or CNC cutting metal alloy frame. Cleaning of the metal substrate may include a pre-cleaning procedure, such as an alkaline cleaning procedure, a degreasing cleaning procedure, an acid cleaning procedure, or any combination thereof.

At step 504, a plastic layer may be formed on one side of the metal substrate using an insert molding process. Exemplary insert molding may refer to a process in which plastic is injected into a mold containing a pre-set metal matrix. Additionally, the plastic layer can be trimmed to remove additional plastic material extending beyond the metal matrix to obtain a desired shape.

At step 506, a micro-arc oxidation or first passivation treatment may be applied to the metal substrate to form a coating on the surface of the metal substrate. In one example, the coating can be formed to reduce the chemical reactivity of the metal substrate surface. At step 508, a primer coating may be applied to the metal substrate including the coating. An exemplary primer coating can be applied over the coating and the plastic layer. At step 510, a base coat may be applied over the primer coat. At step 512, a UV topcoat and one of a thermally cured polyester, acrylic, and polyurethane topcoat may be applied over the basecoat. A coating layer is depicted in FIGS. 2 and 6 .

In step 514, an edge region of the metal substrate may be chamfered to form an exposed surface portion of the metal substrate. In one example, the edge region may be chamfered using a CNC cutting or a laser engraving procedure, or the like. In step 516, the exposed surface portion may be cleaned by an electrocleaning process (ie, an electrolytic cleaning process). An exemplary electrocleaning system is depicted in FIG. 1 . At step 518, a second transparent protective passivation layer may be formed on the exposed surface portion by applying a transparent passivation process. In one example, the transparent protective passivation layer can be formed on the exposed surface portion by applying a passivation solution that includes a complex that is a complex of a metal ion, an organic acid, and a chelating agent. compound. An exemplary transparent protective passivation layer is illustrated in FIG. 1 .

At step 520, a sealing layer may be formed on the transparent protective passivation layer. Exemplary sealing layers are illustrated in FIG. 3 . At step 522, an electrophoretic deposition layer may be formed on the sealing layer by applying electrophoretic deposition. The electrophoretic deposition may include a polymer in combination with particles selected from the group comprising inorganic and metallic particles.

FIG. 6 shows another exemplary process 600 for forming a transparent protective passivation layer, a sealing layer, and an electrophoretic deposition layer on different chamfered regions of a metal substrate. At step 602, a metal substrate or metal alloy substrate (eg, a magnesium alloy substrate) may be preformed. At step 604, an insert molding process may be used to form a plastic layer on one side of the metal substrate.

At step 606, a micro-arc oxidation treatment or a passivation treatment may be applied to the metal substrate to form a coating on the surface of the metal substrate. At step 608, a primer coat may be applied over the coating. For example, the primer coating may include resins such as acrylic polymers, polyurethanes, polyamides, fluoropolymers, polyesters, epoxy-polyesters, and epoxy resins, and the like, and it may include fillers , such as talc, clay, titanium dioxide, aluminum powder, barium sulfate, mica, graphene, dyes and colored pigments. The primer coating may have a thickness in the range of 20 to 60 µm. In one example, applying the primer coat may include applying a polyurethane mixture over the powder coat, followed by drying the polyurethane mixture at a temperature of 60 to 80° C. for about 15 to 40 minutes . The primer coating may have a thickness in the range of 5 to 20 µm.

At step 610, a base coat may be applied over the primer coat. For example, applying the base coat over the primer coat may include applying a mixture of polyurethane, polyester and/or polypropylene in combination with at least one pigment selected from the group consisting of carbon black, titanium dioxide , clay, mica, talc, barium sulfate, calcium carbonate, synthetic pigments, metal powders, alumina, an organic powder, an inorganic powder, plastic beads, colored pigments and dyes; The mixture is dried at temperature for about 15 to 40 minutes. The base coat may have a thickness in the range of 10 to 20 µm.

At step 612, a UV topcoat and one of a thermally cured polyester, acrylic, and polyurethane topcoat may be applied over the basecoat. For example, applying a UV topcoat over the basecoat may include applying a mixture selected from the group consisting of polyacrylics, polyurethanes, urethane acrylates, acrylic acrylates, and cyclic oxyacrylate; and then drying the mixture at a temperature of 50 to 60° C. for about 10 to 15 minutes, followed by UV exposure in the range of 700 to 1,200 mJ/cm ² for 10 to 30 seconds. The UV topcoat can have a thickness in the range of 10 to 25 µm. Exemplary thermally cured polyurethane topcoats can include hydroxy-functional acrylic polymers used to formulate urethane coatings.

At step 614, a first edge region of the metal substrate may be chamfered to form an exposed surface portion of the metal substrate. At step 616, the exposed surface portion may be cleaned by electrocleaning. At step 618, the transparent protective passivation layer may be formed on the exposed surface portion by applying a second transparent passivation process.

At step 620, the sealing layer may be formed on the transparent protective passivation layer. At step 622, a first color layer may be formed on the transparent protective passivation layer by applying a first electrophoretic deposition (eg, in the chamfered edge region 402 as shown in FIG. 4). At steps 624, 626, 628, 630 and 632, the procedure shown in steps 614, 616, 618, 620 and 622 may be repeated for a second edge region (eg, the chamfered edge region 404 shown in FIG. 4). A second color layer is formed. The second color layer can be different from the first color, and the formulation of the fluid used in the electrophoretic deposition at block 622 can be different from the fluid used at block 632 .

FIG. 7A shows a cross-sectional side view of an exemplary electronic device housing 700 depicting a transparent protective passivation layer 708 , a sealing layer 710 , and an electrophoretic deposition layer 712 formed on the chamfer 706 . Exemplary electronic device housings 700 may include smartphone housings, tablet or notebook PC housings, digital camera housings, and the like.

Exemplary electronic device housing 700 may include a coating 704 formed on a first surface of a composite metal substrate 702 . In one example, the coating 704 may be a micro-arc oxide layer, a passivation layer, or an electrophoretic deposition layer. The exemplary first surface may face the exterior of the electronic device housing 700 .

Additionally, the electronic device housing 700 may include a chamfer 706 formed on an edge region of the composite metal matrix 702 . Additionally, the electronic device housing 700 may include a transparent protective passivation layer 708 formed on the chamfer 706 . Additionally, the electronic device housing 700 may include a sealing layer 710 formed on the transparent protective passivation layer 708 . Exemplary sealing layer 710 may include aluminum fluoride, nickel fluoride, cerium fluoride, cerium acetate, aluminum acetate, nickel acetate, or combinations thereof.

In addition, the electronic device housing 700 may include an electrophoretic deposition layer 712 formed on the sealing layer 710 . In one example, the electrophoretically deposited layer 712 may have a different color than the color of the coating 704 .

7B depicts a cross-sectional side view of the exemplary electronic device housing 700 of FIG. 7A depicting additional features. The similarly named elements of Figure 7B may be similar in function and/or structure to the elements described in Figure 7A. As shown in FIG. 7B , the composite metal substrate 702 may include a metal substrate 752 and a non-metallic layer 754 formed on the second surface of the metal substrate 752 . For example, the second surface may face the interior of the electronic device housing 700 . Exemplary metal matrix 752 may include aluminum, magnesium, aluminum alloys, magnesium alloys, or any combination thereof. Exemplary non-metallic layers 754 may include plastic, carbon fiber composites, or combinations thereof.

In this manner, the examples described herein can provide selective surface finish layers for electronic device housings to enhance aesthetic appearance. Furthermore, the examples described herein can provide a flexible production configuration without corrosion concerns for metal substrates. Thus, the examples described herein can solve the problem of highly reactive metal surfaces by providing a dual surface finish (eg, different colors at different chamfered edges) with a metallic sheen on the metal substrate. Additionally, the examples described herein can be used to design logos on electronic device housings.

The examples described above are for illustrative purposes. Although the above examples are described in conjunction with exemplary implementations thereof, numerous modifications are possible that do not materially depart from the subject teachings described herein. Other substitutions, modifications and changes may be made without departing from the spirit of this standard. Furthermore, the features disclosed in this specification (including any accompanying scope, abstract, and drawings), and/or any methods or procedures disclosed, may be combined in any combination, except that at least some of the features interact with each other. other than incompatible combinations.

The terms "including", "having" and other variations as used herein may have the same meaning as the term "including" or suitable variations thereof. Furthermore, the term "based on" as used herein means "based at least in part on." Thus, a feature described as being based on some stimulus may be based on the stimulus or a combination of stimuli including the stimulus.

This specification has been shown and described with reference to the foregoing examples. It should be understood, however, that other forms, details and examples may be made without departing from the spirit and scope of the subject matter as defined by the appended claims.

100,200,300: Method for manufacturing electronic device enclosures with chamfered edges 102,104,106,108,110,202,204,206,208,210,212,302,304,306,308,310,312,502,504,506,508,510,512,514,516,518,520,522,602,604,606,608,610,612,614,616,618,620,622,624,626,628,630,632:步驟,方塊 400: electronic device shell, shell 402, 404, 406: Chamfered edge area 408,752: Metal matrix 500,600: Procedure 700: Electronics enclosure 702: Composite metal matrix 704: Coating 706: Chamfer 708: Transparent protective passivation layer 710: Sealing layer 712: Electrophoretic deposition layer 754: Non-metallic layer

Examples will be described with reference to the drawings in the subsequent [Embodiment], wherein:

1 is a flow chart illustrating an exemplary method for fabricating an electronic device housing with chamfered edges;

2 is a flow chart illustrating another exemplary method for fabricating an electronic device housing with chamfered edges;

3 is a flowchart illustrating yet another exemplary method for fabricating an electronic device housing with chamfered edges;

4 depicts a top view of an exemplary electronic device housing depicting a chamfered edge region;

5 and 6 illustrate exemplary procedures for forming a transparent protective passivation layer, a sealing layer, and an electrophoretic deposition layer on the chamfered edge region of a composite metal substrate;

7A depicts a cross-sectional side view of an exemplary electronic device housing depicting a transparent protective passivation layer, a sealing layer, and a color layer formed on the chamfer; and

7B depicts a cross-sectional side view of the exemplary electronic device housing of FIG. 7A depicting additional features.

100: Method for manufacturing electronic device housings with chamfered edges

102, 104, 106, 108, 110: steps, blocks

Claims (15)

A method for manufacturing an electronic device housing, the method comprising: forming an oxide layer on a surface of a metal substrate; chamfering an edge region of the metal substrate to form an exposed surface portion of the metal substrate; Electrocleaning the exposed surface portion of the metal substrate; After electrocleaning the exposed surface portion, a transparent protective passivation layer is formed on the exposed surface portion; and An electrophoretic deposition layer is formed on the transparent protective passivation layer. The method of claim 1, wherein the metal matrix comprises: aluminum, magnesium, lithium, zinc, titanium, aluminum alloys, magnesium alloys, lithium alloys, zinc alloys, titanium alloys, or combinations thereof. The method of claim 1, wherein the oxide layer is formed by applying one of a micro-arc oxidation treatment and a first passivation treatment on the surface of the metal substrate. The method of claim 1, wherein electro-cleaning the exposed surface portion comprises: The exposed surface portion is alkaline electrocleaned with an alkaline electrolyte solution. The method of claim 1, wherein the transparent protective passivation layer is formed by applying a second passivation treatment on the exposed surface portion, and wherein applying the second passivation treatment comprises a metal ion, an organic acid, and a A complex of chelating agents treats the exposed surface portion. A method for manufacturing an electronic device housing, the method comprising: forming an oxide layer on a surface of a metal substrate; applying a coating on the oxide layer; chamfering an edge region of the metal substrate by applying an aqueous anti-corrosion cutting fluid to form an exposed surface portion of the metal substrate; Electrocleaning the exposed surface portion of the metal substrate; After electrocleaning the exposed surface portion, a transparent passivation treatment is applied on the exposed surface portion to form a transparent protective passivation layer; and An electrophoretic deposition is applied on the transparent protective passivation layer to form an electrophoretic deposition layer. The method of claim 6, wherein applying the coating layer on the oxide layer comprises: applying a primer coating on the metal substrate including the oxide layer; applying a base coat over the primer coat; and A UV topcoat and one of a thermally cured polyester, acrylic, and polyurethane topcoat are applied over the basecoat. The method of claim 6, wherein the water-based anti-corrosion cutting fluid comprises the following components by weight: Alcohol reagent 5-40%; Organic amine 3-15%; Carboxylate 5-30%; Surfactant 1-5%; and Water 55-85%. The method of claim 6, wherein electro-cleaning the exposed surface portion comprises: The exposed surface portion is alkaline electrocleaned with an alkaline electrolyte solution, wherein the alkaline electrolyte solution comprises aqueous sodium hydroxide solution, aqueous potassium hydroxide solution, or a combination thereof. The method of claim 6, wherein the electrophoretic deposited layer on the transparent protective passivation layer has a color that is different from the color of the oxide layer formed on the surface of the metal substrate. An electronic device housing comprising: a coating formed on a first surface of a composite metal substrate; a chamfer formed on an edge region of the composite metal matrix; a transparent protective passivation layer formed on the chamfer; a sealing layer formed on the transparent protective passivation layer; and An electrophoretic deposition layer is formed on the sealing layer. The electronic device housing of claim 11, wherein the composite metal matrix comprises: a metal substrate; and A non-metal layer is formed on a second surface of the metal base, wherein the second surface is opposite to the first surface and faces the interior of the electronic device casing. The electronic device casing of claim 11, wherein the coating is one of a micro-arc oxide layer, a passivation layer, and an electrophoretic deposition layer. The electronic device housing of claim 11, wherein the sealing layer comprises aluminum fluoride, nickel fluoride, cerium fluoride, cerium acetate, aluminum acetate, nickel acetate, or a combination thereof. The electronic device housing of claim 11, wherein the electrophoretic deposition layer has a color different from that of the coating.

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