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TWI563608B - Package structure - Google Patents

Package structure

Info

Publication number
TWI563608B
TWI563608B TW105118898A TW105118898A TWI563608B TW I563608 B TWI563608 B TW I563608B TW 105118898 A TW105118898 A TW 105118898A TW 105118898 A TW105118898 A TW 105118898A TW I563608 B TWI563608 B TW I563608B
Authority
TW
Taiwan
Prior art keywords
package structure
package
Prior art date
Application number
TW105118898A
Other languages
Chinese (zh)
Other versions
TW201739013A (en
Inventor
Wen-Chun Liu
Original Assignee
Ibis Innotech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US15/133,244 external-priority patent/US9508634B2/en
Application filed by Ibis Innotech Inc filed Critical Ibis Innotech Inc
Application granted granted Critical
Publication of TWI563608B publication Critical patent/TWI563608B/en
Publication of TW201739013A publication Critical patent/TW201739013A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
TW105118898A 2016-04-20 2016-06-16 Package structure TWI563608B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15/133,244 US9508634B2 (en) 2014-06-24 2016-04-20 Package structure

Publications (2)

Publication Number Publication Date
TWI563608B true TWI563608B (en) 2016-12-21
TW201739013A TW201739013A (en) 2017-11-01

Family

ID=58227502

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105118898A TWI563608B (en) 2016-04-20 2016-06-16 Package structure

Country Status (2)

Country Link
CN (1) CN107305878A (en)
TW (1) TWI563608B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10256180B2 (en) 2014-06-24 2019-04-09 Ibis Innotech Inc. Package structure and manufacturing method of package structure

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5201451A (en) * 1987-03-11 1993-04-13 International Business Machines Corp. Method and apparatus for mounting a flexible film semiconductor chip carrier on a circuitized substrate
US20030111736A1 (en) * 2001-12-14 2003-06-19 Roeters Glen E. Csp chip stack with flex circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5142775A (en) * 1990-10-30 1992-09-01 International Business Machines Corporation Bondable via
CN103917061A (en) * 2013-01-07 2014-07-09 深南电路有限公司 Method for manufacturing PCB through holes with half portions coated with copper and PCB
TWI553809B (en) * 2014-06-24 2016-10-11 思鷺科技股份有限公司 Package substrate strcuture
CN204217212U (en) * 2014-11-28 2015-03-18 杭州华三通信技术有限公司 PCB board structure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5201451A (en) * 1987-03-11 1993-04-13 International Business Machines Corp. Method and apparatus for mounting a flexible film semiconductor chip carrier on a circuitized substrate
US20030111736A1 (en) * 2001-12-14 2003-06-19 Roeters Glen E. Csp chip stack with flex circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10256180B2 (en) 2014-06-24 2019-04-09 Ibis Innotech Inc. Package structure and manufacturing method of package structure

Also Published As

Publication number Publication date
TW201739013A (en) 2017-11-01
CN107305878A (en) 2017-10-31

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees