TWI555146B - A surface roughness of the chip heat sink - Google Patents
A surface roughness of the chip heat sink Download PDFInfo
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- TWI555146B TWI555146B TW103104296A TW103104296A TWI555146B TW I555146 B TWI555146 B TW I555146B TW 103104296 A TW103104296 A TW 103104296A TW 103104296 A TW103104296 A TW 103104296A TW I555146 B TWI555146 B TW I555146B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
本發明是有關一種散熱片，特別是指一種具有粗糙面之晶片封裝的散熱片。 The present invention relates to a heat sink, and more particularly to a heat sink having a roughened wafer package.
由於科技的發達，各式各樣的電子產品大量的應用於人們的日常生活，而當電子產品於運作時，會發出大量的熱量，若不將這些熱量排出，則有可能會因為熱量的堆積，進一步使得電子產品超過額定的最大負載熱量，導致電子產品產生故障或縮短其壽命。 Due to the development of technology, a wide variety of electronic products are widely used in people's daily life. When electronic products are in operation, they will emit a lot of heat. If they are not discharged, they may be accumulated due to heat. Further, the electronic product exceeds the rated maximum load heat, causing the electronic product to malfunction or shorten its life.
現有常見的技術是在電子產品容易產熱的零件(例如半導體晶片)上貼附一散熱片，藉由該散熱片的設置，有效的將晶片內部運作所產生的熱傳導出來，以維持該電子產品運作的可靠性。 A common technique is to attach a heat sink to a part of an electronic product that is prone to heat generation (for example, a semiconductor wafer). The heat sink is disposed to effectively conduct heat generated by the internal operation of the wafer to maintain the electronic product. The reliability of the operation.
參閱圖1，為一半導體晶片散熱片之剖面示意圖，其包含一基板21、一設置於該基板21上之半導體晶片22，及一貼附於該半導體晶片22上之散熱片23。在封裝時必須將該半導體晶片22以一接著劑24(例如銀膠)黏合於該散熱片23上。 1 is a schematic cross-sectional view of a semiconductor wafer heat sink including a substrate 21, a semiconductor wafer 22 disposed on the substrate 21, and a heat sink 23 attached to the semiconductor wafer 22. The semiconductor wafer 22 must be bonded to the heat sink 23 with an adhesive 24 (e.g., silver paste) during packaging.
由於該散熱片23是以金屬材料所製成，表面較為光滑，在封裝時與封裝料的附著性較差，晶片也不易接合於該散熱片23上，甚至在灌注封裝料時可能會導致該散熱片23脫落。 Since the heat sink 23 is made of a metal material, the surface is relatively smooth, and the adhesion to the package material is poor at the time of packaging, and the wafer is not easily bonded to the heat sink 23, which may cause the heat dissipation even when the package material is poured. The sheet 23 falls off.
緣是，本案發明人有感於前述散熱片23表面過於光滑而不易與該封裝料或該接著劑24貼合，致使該散熱片23有脫落之虞，於是便深入構思且積極研究而開發設計出一種可增加與該半導體晶片22黏合度，並提高附 著性的散熱片23。 The reason is that the inventor of the present invention feels that the surface of the heat sink 23 is too smooth to be easily attached to the sealing material or the adhesive 24, so that the heat sink 23 has fallen off, so that the design and development of the heat sink 23 are intensively researched and developed. A type can increase the adhesion to the semiconductor wafer 22 and improve the attachment Sexual heat sink 23.
有鑑於此，本發明之目的，是提供一種具有粗糙面之晶片散熱片，而本發明的散熱片以增加黏合附著性為主，因此，不只侷限於特定之散熱片形態，合先敘明。 In view of the above, it is an object of the present invention to provide a wafer heat sink having a rough surface, and the heat sink of the present invention is mainly for increasing adhesion and adhesion, and therefore, it is not limited to a specific heat sink shape, and will be described first.
本發明具有粗糙面之晶片散熱片，包含一散熱片，及複數第一沖壓刻痕。其中，該散熱片包括一本體，該本體具有一內表面及一相反於該內表面之外表面。而該複數第一沖壓刻痕形成於該內表面上，每一第一沖壓刻痕之剖面概呈三角形，且該三角形之兩個邊為不等長，並往同一方向傾斜，以使其所夾之內角頂點不直接顯露於外。 The present invention has a roughened wafer heat sink comprising a heat sink and a plurality of first stamping scores. Wherein, the heat sink comprises a body having an inner surface and an outer surface opposite to the inner surface. And the plurality of first stamping indentations are formed on the inner surface, each of the first stamping indentations has a triangular shape, and the two sides of the triangle are unequal lengths and are inclined in the same direction to make them The apex of the inner corner of the clip is not directly exposed.
本發明的又一技術手段，更包含複數形成於該內表面上之第二沖壓刻痕，每一第二沖壓刻痕之剖面概呈三角形，且該三角形之兩個邊互往相反方向傾斜，以使其所夾之內角頂點直接顯露於外。 A further technical means of the present invention further includes a plurality of second stamping indentations formed on the inner surface, each of the second stamping indentations having a substantially triangular cross section, and the two sides of the triangle are inclined to each other in opposite directions. So that the vertices of the inner corners of the clips are directly exposed.
本發明的再一技術手段，相鄰兩第一沖壓刻痕間排列設置有二第二沖壓刻痕。 According to still another technical means of the present invention, two second stamping indentations are arranged between adjacent two first stamping indentations.
本發明的另一技術手段，是在於該散熱片更包括有一與該本體周緣連接並向下且向外延伸的支撐壁，且該支撐壁底部形成有複數第一沖壓刻痕。 Another technical means of the present invention is that the heat sink further comprises a support wall connected to the periphery of the body and extending downwardly and outwardly, and the bottom of the support wall is formed with a plurality of first stamping indentations.
本發明的又一技術手段，是在於該支撐壁底部更形成有複數第二沖壓刻痕。 Another technical means of the present invention is that a plurality of second stamping scores are formed on the bottom of the support wall.
本發明的再一技術手段，是在於該散熱片為球閘陣列封裝(Ball Grid Array,BGA)用之散熱片。 A further technical means of the present invention is that the heat sink is a heat sink for a Ball Grid Array (BGA).
本發明的另一技術手段，是在於該散熱片為覆晶封裝(Flip Chip Package,FCP)用之散熱片。 Another technical means of the present invention is that the heat sink is a heat sink for a flip chip package (FCP).
本發明的又一技術手段，是在於該散熱片為四方扁平封裝(Quad Flat Package,QFP)用之散熱片。 Another technical means of the present invention is that the heat sink is a heat sink for a Quad Flat Package (QFP).
本發明的再一技術手段，是在於該散熱片 為四方扁平無引腳封裝(Quad Flat No-lead Package,QFN)用之散熱片。 A further technical means of the present invention lies in the heat sink It is a heat sink for Quad Flat No-lead Package (QFN).
本發明的另一技術手段，是在於該散熱片 為晶片級封裝(Chip Scale Package,CSP)用之散熱片。 Another technical means of the present invention lies in the heat sink A heat sink for the Chip Scale Package (CSP).
本發明之有益功效在於，藉由複數形成於 該內表面上之第一沖壓刻痕，可增加該散熱片與半導體晶片貼合處之內表面的接觸面積，再利用每一第一沖壓刻痕之剖面概呈三角形，且該三角形之兩個邊為不等長，並往同一方向傾斜，以使其所夾之內角頂點不直接顯露於外，當封裝料或接著劑進入該第一沖壓刻痕時，可提昇散熱片與接著劑的黏合附著性，增進半導體晶片之製造良率，降低生產成本。 The beneficial effect of the present invention is that it is formed by plural The first stamping indentation on the inner surface increases the contact area of the inner surface of the heat sink with the semiconductor wafer, and the cross section of each first stamping is substantially triangular, and the two triangles The edges are unequal lengths and are inclined in the same direction so that the vertices of the inner corners of the clips are not directly exposed. When the encapsulant or the adhesive enters the first stamping nick, the fins and the adhesive can be lifted. Adhesive adhesion improves the manufacturing yield of semiconductor wafers and reduces production costs.
3‧‧‧散熱片 3‧‧‧ Heat sink
31‧‧‧本體 31‧‧‧Ontology
311‧‧‧外表面 311‧‧‧ outer surface
312‧‧‧內表面 312‧‧‧ inner surface
32‧‧‧支撐壁 32‧‧‧Support wall
4‧‧‧第一沖壓刻痕 4‧‧‧First stamping nick
41‧‧‧第一斜邊 41‧‧‧First bevel
42‧‧‧第一內角頂點 42‧‧‧The first inner corner apex
5‧‧‧接著劑 5‧‧‧Binder
6‧‧‧半導體晶片 6‧‧‧Semiconductor wafer
7‧‧‧第二沖壓刻痕 7‧‧‧Second stamping nick
71‧‧‧第二斜邊 71‧‧‧second bevel
72‧‧‧第二內角頂點 72‧‧‧second inner corner apex
圖1是一剖面示意圖，說明習知一半導體晶片散熱片的內部黏合接著態樣；圖2是一局部剖面示意圖，說明本發明具有粗糙面之晶片散熱片的第一較佳實施例；圖3是一局部剖面示意圖，說明該第一較佳實施例之散熱片與一接著劑連接的態樣；圖4是一剖面示意圖，說明該散熱片藉由該接著劑與一半導體晶片連接的態樣；圖5是一局部剖面示意圖，說明本發明具有粗糙面之晶片散熱片的第二較佳實施例；及圖6是一剖面示意圖，說明該散熱片藉由該接著劑與該半導體晶片連接的態樣。 1 is a cross-sectional view showing the internal bonding of a conventional semiconductor wafer heat sink; FIG. 2 is a partial cross-sectional view showing a first preferred embodiment of the wafer heat sink having a rough surface according to the present invention; Is a partial cross-sectional view showing the aspect of the heat sink of the first preferred embodiment connected to an adhesive; FIG. 4 is a schematic cross-sectional view showing the aspect of the heat sink connected to a semiconductor wafer by the adhesive. 5 is a partial cross-sectional view showing a second preferred embodiment of the wafer fin having a rough surface according to the present invention; and FIG. 6 is a cross-sectional view showing the heat sink being connected to the semiconductor wafer by the adhesive. Aspect.
有關本發明之相關申請專利特色與技術內 容，在以下配合參考圖式之較佳實施例的詳細說明中，將可清楚的呈現。 Relevant patent applications and technologies related to the present invention The detailed description of the preferred embodiments with reference to the drawings will be clearly described below.
參閱圖2，為本發明具有粗糙面之晶片散熱 片的第一較佳實施例，該第一較佳實施例包含一散熱片3，及複數第一沖壓刻痕4。其中，該散熱片3包括一本體31，該本體具有一外表面311及一相反於該外表面311之內表面312。 Referring to FIG. 2, the chip has a rough surface for heat dissipation. In a first preferred embodiment of the sheet, the first preferred embodiment includes a heat sink 3 and a plurality of first stamping scores 4. The heat sink 3 includes a body 31 having an outer surface 311 and an inner surface 312 opposite to the outer surface 311.
而該複數第一沖壓刻痕4是形成於該內表 面312上，每一第一沖壓刻痕4之剖面概呈三角形，且該三角形之兩個第一斜邊41為不等長，並往同一方向傾斜(在該第一較佳實施例中是往左邊傾斜)，以使該二第一斜邊41所夾之第一內角頂點42不直接顯露於外。 And the plurality of first stamping scores 4 are formed on the inner surface On the face 312, each first stamping score 4 has a substantially triangular cross section, and the two first oblique sides 41 of the triangle are unequal lengths and are inclined in the same direction (in the first preferred embodiment Tilt to the left so that the first inner corner apex 42 sandwiched by the two first oblique sides 41 is not directly exposed.
除此之外，在該第一較佳實施例中是以用 於覆晶封裝(Flip-Chip Package,FCP)形式的散熱片3作說明，當然也能選擇用於錫球陣列封裝(Ball Grid Array,BGA)、四方扁平封裝(Quad Flat Package,QFP)、四方扁平無引腳封裝(Quad Flat No-lead Package,QFN)、晶片級封裝(Chip Scale Package,CSP)或其它形式的散熱片3，而各種規格的散熱片3製造方式為所屬技術領域者所熟知，本案是著重於所形成之粗糙面的結構，所以不針對該散熱片3的製造方法及規格多加描述。 In addition to this, in the first preferred embodiment, For the description of the heat sink 3 in the form of a Flip-Chip Package (FCP), it is of course also possible to select a Ball Grid Array (BGA), a Quad Flat Package (QFP), and a square. A Flat Flat No-lead Package (QFN), a Chip Scale Package (CSP) or other form of heat sink 3, and a variety of heat sink 3 manufacturing methods are well known to those skilled in the art. In this case, the structure is focused on the rough surface formed, so the manufacturing method and specifications of the heat sink 3 are not described.
該散熱片3更包括有一與該本體3i周緣連 接並向下且向外延伸的支撐壁32，且該支撐壁32底面上同樣形成有複數第一沖壓刻痕4。 The heat sink 3 further includes a peripheral edge of the body 3i A support wall 32 extending downwardly and outwardly is formed, and a plurality of first stamping scores 4 are also formed on the bottom surface of the support wall 32.
配合參閱圖3、4，實際實施時，是將該散 熱片3藉由一接著劑5(例如銀膠)與一半導體晶片6黏貼在一起。該半導體晶片6運作時所產生的熱，得以藉由該接著劑5將熱能傳導至該散熱片3上，再藉該散熱片3的導熱與散熱效果進行降溫。 Referring to Figures 3 and 4, in actual implementation, it is the same The heat sheet 3 is adhered to a semiconductor wafer 6 by an adhesive 5 such as silver paste. The heat generated during operation of the semiconductor wafer 6 is conducted by the adhesive 5 to conduct heat to the heat sink 3, and the heat dissipation and heat dissipation effects of the heat sink 3 are used to cool down.
在該第一較佳實施例中，該第一沖壓刻痕4 之剖面概呈三角形，由於該接著劑5會填滿該三角形空間，且因為該三角形之兩個第一斜邊41所夾之第一內角頂點42不直接顯露於外，所以該接著劑5會緊密地連結該散熱片3，進而形成一倒勾之拉力。 In the first preferred embodiment, the first stamping score 4 The cross section is substantially triangular, since the adhesive 5 will fill the triangular space, and since the first inner corner vertex 42 sandwiched by the two first oblique sides 41 of the triangle is not directly exposed, the adhesive 5 The heat sink 3 is tightly coupled to form a barbed pull.
以往之半導體晶片6由於其粗糙面無法提 供倒勾之拉力，僅僅能夠依靠粗糙面之摩擦力來連接該散熱片3與該半導體晶片6，一但晶片外部之拉拔力較大，即會使該散熱片3脫落，進而造成產品瑕疵。本發明藉由複數形成於該內表面312上之第一沖壓刻痕4，當該接著劑5填滿該複數第一沖壓刻痕4所構成之三角形空間時，該接著劑5會緊密地連結該散熱片3與該半導體晶片6，並形成一可克服外界拉拔力之倒勾拉力，所以能夠使該散熱片3不易脫落。 The conventional semiconductor wafer 6 cannot be mentioned due to its rough surface. The pulling force for the barb can only connect the heat sink 3 and the semiconductor wafer 6 by the frictional force of the rough surface. Once the drawing force of the outside of the wafer is large, the heat sink 3 is detached, thereby causing the product to be defective. . The present invention is formed by a plurality of first stamping indentations 4 formed on the inner surface 312. When the adhesive 5 fills the triangular space formed by the plurality of first stamping indentations 4, the adhesive 5 is closely coupled. The heat sink 3 and the semiconductor wafer 6 form a barbed pulling force that can overcome the external pulling force, so that the heat sink 3 can be prevented from falling off.
參閱圖5、6，為本發明具有粗糙面之晶片 散熱片的第二較佳實施例，該第二較佳實施例與該第一較佳實施例大致相同，相同之處於此不再贅述，不同之處在於，該第二較佳實施例中更包含複數形成於該內表面312上之第二沖壓刻痕7，每一第二沖壓刻痕7之剖面概呈三角形，且該三角形之兩個第二斜邊71互往相反方向傾斜，以使其所夾之第二內角頂點72直接顯露於外。 Referring to Figures 5 and 6, there is a wafer having a rough surface according to the present invention. The second preferred embodiment of the heat sink is substantially the same as the first preferred embodiment, and the same is not described herein again, except that the second preferred embodiment further A second stamping score 7 formed on the inner surface 312 is formed. Each second stamping score 7 has a triangular cross section, and the two second oblique sides 71 of the triangle are inclined in opposite directions to each other. The second inner corner apex 72 sandwiched by it is directly exposed.
此外，該支撐壁32底面同樣形成有複數第 二沖壓刻痕7，相鄰兩第一沖壓刻痕4間排列設置有二個第二沖壓刻痕7。 In addition, the bottom surface of the support wall 32 is also formed with a plurality of Two stamping indentations 7 are arranged, and two second stamping indentations 7 are arranged between adjacent two first stamping indentations 4.
在該第二較佳實施例中，該具有粗糙面之 晶片散熱片3同樣是採用覆晶封裝(Flip-Chip Package,FCP)形式的散熱片3來作說明，並非只限於覆晶封裝，當然也能選擇用於錫球陣列封裝(Ball Grid Array,BGA)、四方扁平封裝(Quad Flat Package,QFP)、四方扁平無引腳封裝(Quad Flat No-lead Package,QFN)、晶片級封裝(Chip Scale Package,CSP)或其它形式的散熱片3，並不以此為 限。 In the second preferred embodiment, the rough surface The chip heat sink 3 is also illustrated by a heat sink 3 in the form of a Flip-Chip Package (FCP), and is not limited to a flip chip package. Of course, it can also be selected for a Ball Grid Array (BGA). ), Quad Flat Package (QFP), Quad Flat No-lead Package (QFN), Chip Scale Package (CSP) or other forms of heat sink 3, not Take this as limit.
藉由上述設計，可於該散熱片3之內表面 312及該支撐壁32底面上同時設置複數之第一沖壓刻痕4及複數之第二沖壓刻痕7，該接著劑5會填滿該複數第一沖壓刻痕4及該複數第二沖壓刻痕7所形成之三角形空間，藉以增加該散熱片3與該接著劑5之接著力，使該散熱片3不致與該半導體晶片6脫離，提供有別於該第一較佳實施例的另外一種實施態樣。 With the above design, the inner surface of the heat sink 3 can be 312 and the bottom surface of the support wall 32 are simultaneously provided with a plurality of first stamping indentations 4 and a plurality of second stamping indentations 7, which will fill the plurality of first stamping indentations 4 and the plurality of second stamping indentations The triangular space formed by the mark 7 is used to increase the adhesion between the heat sink 3 and the adhesive 5, so that the heat sink 3 is not detached from the semiconductor wafer 6, providing another type different from the first preferred embodiment. Implementation.
依據上樹說明，本發明具有粗糙面之晶片散熱片3確實具有以下優點： According to the above tree description, the wafer fin 3 having the rough surface of the present invention does have the following advantages:
一.粗糙面增加摩擦力：本發明於該內表面312上形成有複數第一沖壓刻痕4，每一第一沖壓刻痕4之剖面概呈三角形，且該三角形之兩個第一斜邊41為不等長，並往同一方向傾斜，以使該二第一斜邊41所夾之第一內角頂點42不直接顯露於外，藉由該複數第一沖壓刻痕4可使原本平滑之散熱片3內表面312變粗糙而增加摩擦力。 A rough surface increases friction: the present invention has a plurality of first stamping scores 4 formed on the inner surface 312, each first stamping score 4 has a triangular shape, and the first two oblique sides of the triangle 41 is unequal length and inclined in the same direction, so that the first inner corner vertex 42 sandwiched by the two first oblique sides 41 is not directly exposed, and the first first stamping 4 can be smoothed. The inner surface 312 of the fin 3 is roughened to increase friction.
二.增加抗拉拔力：本發明藉由複數形成於該內表面312上之第一沖壓刻痕4，且由於該第一沖壓刻痕4之兩個第一斜邊41所夾之第一內角頂點42不直接顯露於外，所以該接著劑5會緊密地連結該散熱片3，並形成一可克服外界拉拔力之倒勾拉力，使該散熱片3不易脫落。 2. Increasing the pull-out force: the first stamping score 4 formed on the inner surface 312 by the plurality of the present invention, and the first one of the first oblique sides 41 of the first stamping score 4 is sandwiched The inner corner apex 42 is not directly exposed, so the adhesive 5 closely connects the heat sink 3 and forms a barbed pulling force that can overcome the external pulling force, so that the heat sink 3 is not easily peeled off.
三.提高半導體晶片之製造良率：因為本發明可形成一克服外界拉拔力之倒勾拉力，使該散熱片3不易自該半導體6上脫落，因此可以提高半導體晶片6之製造良率，降低生產成本，適合業界廣泛採用。 3. Improving the manufacturing yield of the semiconductor wafer: Since the present invention can form a barbed pulling force against the external pulling force, the heat sink 3 is not easily detached from the semiconductor 6, so that the manufacturing yield of the semiconductor wafer 6 can be improved. Reduce production costs and is suitable for widespread adoption in the industry.
綜上所述，本發明具有粗糙面之晶片散熱片利用複數形成於該內表面312上之第一沖壓刻痕4，可增加該散熱片3與該半導體晶片6貼合處之內表面312的 接觸面積，再利用每一第一沖壓刻痕4之剖面概呈三角形，且該三角形之兩個邊為不等長，並往同一方向傾斜，以使其所夾之內角頂點不直接顯露於外，當封裝料或接著劑5進入該第一沖壓刻痕4時，可提昇該散熱片3與該接著劑5的黏合附著性，使該散熱片3不易與該半導體晶片6脫離，達到增進該半導體晶片6之製造良率，降低生產成本，故確實可以達到本發明之目的。 In summary, the wafer fin having the rough surface of the present invention utilizes a plurality of first stamping scores 4 formed on the inner surface 312 to increase the inner surface 312 of the heat sink 3 and the semiconductor wafer 6 where they are bonded. The contact area, and the section of each of the first stamping scribes 4 is triangular, and the two sides of the triangle are unequal lengths and are inclined in the same direction so that the vertices of the inner corners of the triangle are not directly exposed. In addition, when the encapsulant or the adhesive 5 enters the first stamping scribe 4, the adhesive adhesion of the heat sink 3 to the adhesive 5 can be improved, so that the heat sink 3 is not easily detached from the semiconductor wafer 6 and is improved. The manufacturing yield of the semiconductor wafer 6 reduces the production cost, so that the object of the present invention can be achieved.
惟以上所述者，僅為本發明之二個較佳實施例而已，當不能以此限定本發明實施之範圍，即大凡依本發明申請專利範圍及發明說明內容所作之簡單的等效變化與修飾，皆仍屬本發明專利涵蓋之範圍內。 However, the above is only the two preferred embodiments of the present invention, and the scope of the present invention is not limited thereto, that is, the simple equivalent change of the patent application scope and the description of the invention is Modifications are still within the scope of the invention.
3‧‧‧散熱片 3‧‧‧ Heat sink
32‧‧‧支撐壁 32‧‧‧Support wall
4‧‧‧第一沖壓刻痕 4‧‧‧First stamping nick
5‧‧‧接著劑 5‧‧‧Binder
6‧‧‧半導體晶片 6‧‧‧Semiconductor wafer
Claims (10)
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| TW103104296A TWI555146B (en) | 2014-02-10 | 2014-02-10 | A surface roughness of the chip heat sink |
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| TW103104296A TWI555146B (en) | 2014-02-10 | 2014-02-10 | A surface roughness of the chip heat sink |
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| TW201532214A TW201532214A (en) | 2015-08-16 |
| TWI555146B true TWI555146B (en) | 2016-10-21 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI618911B (en) * | 2017-05-24 | 2018-03-21 | Excel Cell Electronic Co Ltd | Wafer packaging device and heat sink and heat sink manufacturing method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW418511B (en) * | 1998-10-12 | 2001-01-11 | Siliconware Precision Industries Co Ltd | Packaged device of exposed heat sink |
| TW200511538A (en) * | 2003-09-15 | 2005-03-16 | Siliconware Precision Industries Co Ltd | Heat dissipating structure and semiconductor package with the heat dissipating structure |
| TW201019429A (en) * | 2008-11-11 | 2010-05-16 | Siliconware Precision Industries Co Ltd | Semiconductor package having heat-dissipating structure |
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2014
- 2014-02-10 TW TW103104296A patent/TWI555146B/en active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW418511B (en) * | 1998-10-12 | 2001-01-11 | Siliconware Precision Industries Co Ltd | Packaged device of exposed heat sink |
| TW200511538A (en) * | 2003-09-15 | 2005-03-16 | Siliconware Precision Industries Co Ltd | Heat dissipating structure and semiconductor package with the heat dissipating structure |
| TW201019429A (en) * | 2008-11-11 | 2010-05-16 | Siliconware Precision Industries Co Ltd | Semiconductor package having heat-dissipating structure |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI618911B (en) * | 2017-05-24 | 2018-03-21 | Excel Cell Electronic Co Ltd | Wafer packaging device and heat sink and heat sink manufacturing method thereof |
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