TWI439981B - Display panel - Google Patents

Description

Display panel

The present invention relates to a display device, and more particularly to a display panel.

Among many flat panel displays, Thin Film Transistor Liquid Crystal Display (TFT LCD), which has high image quality, good space utilization efficiency, low power consumption, and no radiation, has become a display field. Mainstream. The thin film transistor liquid crystal display is mainly composed of an active device array substrate, a color filter substrate, and a liquid crystal layer sandwiched between the two substrates.

After the process of the active device array substrate is completed, the pixel array on the active device array substrate is usually electrically detected, or after the panel process is completed, the panel is subjected to simple lighting detection to determine the pixel array or Can the panel work properly? When the pixel array or panel is not working properly, it can be repaired for defective components (such as thin film transistors or pixel electrodes) or circuits. However, in order to detect a pixel array or a panel, an extraction circuit needs to be formed on the peripheral region of the active device array substrate. In addition, a common voltage signal line is also required to be formed on the peripheral line region of the active device array substrate for inputting the common voltage to the common electrode layer of the color filter substrate. If the detection line is placed in the plane, the common electrode wiring area will be compressed. If the common electrode layer is configured in a cross-over manner, an additional resistance-capacitance of the common voltage is added. Load (RC loading). However, when the wiring area of the common voltage signal line is insufficient, the common voltage input to the common electrode layer of the color filter substrate may be insufficient, thereby affecting the display quality of the display.

The present invention provides a display panel having better display quality.

The invention provides a display panel comprising a first substrate, a pixel array, a peripheral circuit, a second substrate, a sealant and a display medium. The first substrate has a display area and a peripheral area surrounding the display area. The pixel array is disposed in a display area of the first substrate. The peripheral circuit is disposed in a peripheral region of the first substrate and electrically connected to the pixel array. The peripheral line includes an inner conductor, an outer conductor, and a transmission conductive layer. The inner wire is electrically connected to the pixel array. The outer wire surrounds the outer periphery of the inner wire. The conductive layer is electrically connected to the inner wire and the outer wire. The outer lead is electrically connected to the pixel array by transmitting the conductive layer and the inner lead. The second substrate is disposed above the first substrate. The sealant is disposed between the first substrate and the second substrate, and the sealant is located on a portion of the peripheral line and surrounds the pixel array. The display medium is located between the first substrate and the second substrate and is surrounded by the sealant.

In an embodiment of the invention, the sealant comprises a colloid and a plurality of electrically conductive spacers distributed in the colloid. The second substrate has a common electrode layer thereon. The conductive layer is electrically connected to the common electrode layer through the conductive spacer.

In an embodiment of the invention, the material of the conductive spacer is metal.

In an embodiment of the invention, the transmission conductive layer has an opening between the inner conductor and the outer conductor. The outer wires are electrically connected to the inner wires through the conductive layers, the conductive spacers, the common electrode layers, the conductive spacers, and the conductive layers.

In an embodiment of the invention, the transmission conductive layer is a continuous film layer.

In an embodiment of the invention, the pixel array includes a plurality of pixel units arranged in an array and a plurality of signal lines. The signal line is electrically connected to the pixel unit. The inner wire is connected to a part of the signal line, and the inner wire, the outer wire and the signal wire belong to the same film layer.

In one embodiment of the present invention, the display panel further includes at least one driving chip disposed in a peripheral region of the first substrate, wherein the signal line and the inner lead are electrically connected to the driving chip.

In an embodiment of the invention, the display panel further includes a flexible circuit board disposed in a peripheral region of the first substrate and electrically connected to the outer lead and the driving chip.

In an embodiment of the invention, the material of the transmission conductive layer comprises indium tin oxide (ITO) or indium zinc oxide (IZO).

In an embodiment of the invention, the first substrate is an active device array substrate, and the second substrate is a color filter substrate.

Based on the above, the display panel of the present invention is designed to electrically connect the inner leads of the peripheral lines to the pixel array, and the outer leads of the peripheral lines are electrically connected to the pixel array by transmitting the conductive layer and the inner wires. Stable display The common voltage in the display area. In other words, compared with the prior art, the display panel of the present invention can have a large wiring area without additionally increasing the RC loading of the common voltage, thereby having better display quality.

The above described features and advantages of the present invention will be more apparent from the following description.

FIG. 1A is a schematic diagram of a display panel according to an embodiment of the invention. FIG. 1B is a top plan view of the display panel of FIG. 1A. 1C is a schematic cross-sectional view taken along line I-I of FIG. 1B. It should be noted that, for convenience of explanation, the second substrate and the partial members are omitted in FIG. 1B. Referring to FIG. 1A, FIG. 1B and FIG. 1C, in the embodiment, the display panel 100a includes a first substrate 110, a pixel array 120, a peripheral line 130a, a second substrate 140, a sealant 150, and A display medium 160.

In detail, the first substrate 110 is, for example, an active device (such as a Thin Film Transistor (TFT)) array substrate having a display area 112 and a peripheral area 114 surrounding the display area 112. The pixel array 120 is disposed in the display area 112 of the first substrate 110, wherein the pixel array 120 includes a plurality of arrayed pixel units 122 and a plurality of signal lines (including the data lines 124a and the gate lines 113), and these The data lines 124a and the gate lines 113 are electrically connected to the pixel unit 122. In this embodiment, each pixel unit 122 includes a thin film transistor. 123 and a pixel electrode 125 corresponding to the thin film transistor 123, wherein the thin film transistor 123 is composed of three parts of a gate 123a, a source 123b and a drain 123c, and a person skilled in the art should know the film. The structure of the bottom gate of the transistor 123 or the structure of the top gate is used herein for illustrative purposes only and is not intended to be limiting.

The peripheral line 130a is disposed in the peripheral region 114 of the first substrate 110, and the peripheral line 130a is electrically connected to the pixel array 120. The peripheral line 130a of the present embodiment includes an inner lead 132, an outer lead 134, and a transmission conductive layer 136a. The inner lead 132 is electrically connected to the pixel array 120, and the outer lead 134 is disposed around the outer circumference of the inner lead 132 for transmission. The conductive layer 136a is electrically connected to the inner lead 132 and the outer lead 134. In particular, in the present embodiment, the outer lead 134 can be electrically connected to the pixel array 120 by transmitting the conductive layer 136a and the inner lead 132. Here, the transmission conductive layer 136a is, for example, a continuous film layer, and the inner wires 132 are connected to the partial data lines 124a, the partial gate lines 113, and the common electrode lines 118, and the inner wires 132, the outer wires 134, and the data lines 124a are identical. Membrane layer. Further, the material of the transmission conductive layer 136a includes indium tin oxide or indium zinc oxide.

More specifically, the first substrate 110 also has the gate lines 113, a gate insulating layer 115 and a protective layer 117, wherein the gate insulating layer 115 covers the gate lines 113, and the inner wires 132 and the outer wires 134 are located. The gate insulating layer 115 is electrically insulated from the gate lines 113 through the gate insulating layer 115. In addition, the protective layer 117 has a plurality of openings 117a (only two are schematically shown in FIG. 1C), wherein the conductive conductive layer 136a is electrically connected to the inner lead 132 and the outer lead 134 through the opening 117a. Pick up.

The second substrate 140 is, for example, a color filter substrate disposed above the first substrate 110, that is, disposed opposite to the active device array substrate 110. Generally, the color filter substrate mainly includes a black matrix (BM) (not shown), a color filter film (not shown), a common electrode layer 142, and the like, wherein the black matrix layer functions as It is used for a light shield layer, and the black matrix layer must have good light shielding effect and low reflection characteristics.

The sealant 150 is disposed between the first substrate 110 and the second substrate 140, and the sealant 150 is located on a portion of the peripheral line 130a and surrounds the pixel array 120. In this embodiment, the sealant 150 includes a colloid 152 and a plurality of conductive spacers 154 distributed in the colloid 152. The transfer conductive layer 136a can pass through the conductive spacers 154 and the common electrode layer 142 of the second substrate 140. Electrical connection. In this way, the transmission conductive layer 136a on the first substrate 110 and the common electrode layer 142 on the second substrate 140 can be electrically connected to have the same common voltage. In addition, the material of the conductive spacers 154 is a polymer material that completely covers the metal layer.

The display medium 160 is located between the first substrate 110 and the second substrate 140 and is surrounded by the sealant 150. It should be noted here that the present invention does not limit the type of the display panel 100a, wherein the display panel 100a has a different mechanism of action depending on the display medium 160. For example, the display medium 160 may be a liquid crystal material, and the display panel 100a is a liquid crystal display panel.

In addition, the display panel 100a of the embodiment may further include at least one driving wafer 170 (one is shown in FIG. 1B) and a flexible circuit board 180. The driving wafers 170 are disposed on the peripheral region 114 of the first substrate 110. The data lines 124a, the gate lines 113, and the inner leads 132 are electrically connected to the driving wafer 170, respectively. The flexible circuit board 180 is disposed in the peripheral region 114 of the first substrate 110 and electrically connected to the outer lead 134 and the driving wafer 170.

The display panel 100a of the present embodiment is designed such that the inner leads 132 of the peripheral line 130a are electrically connected to the pixel array 120, and the outer leads 134 of the peripheral line 130a are connected to the pixels by transmitting the conductive layer 136a and the inner leads 132. The array 120 is electrically connected, and electrically conductively transmits the conductive layer 136a and the common electrode layer 142 on the second substrate 140 through the conductive spacers 154 in the sealant 150. Please refer to the direction of the arrow in FIG. 1C. In this way, the common voltage in the display area 112 of the display panel 100a can be stabilized without additionally increasing the RC loading of the common voltage, thereby making the display panel 100a have better display quality. Moreover, since there is no wiring under the driving wafer 170, the display panel 100a can have a large and flexible wiring area.

The design of the display panel 100b will be described again in a different embodiment. It is to be noted that the following embodiments use the same reference numerals and parts of the above-mentioned embodiments, and the same reference numerals are used to refer to the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted portions, reference may be made to the foregoing embodiments, and the following embodiments are not repeated.

2A is a top plan view of a display panel according to another embodiment of the present invention. Fig. 2B is a schematic cross-sectional view taken along line II-II of Fig. 2A. It must be noted here that, for convenience of explanation, the description is omitted in FIG. 2B. Two substrates and some components. Referring to FIG. 2A and FIG. 2B simultaneously, the display panel 100b of the present embodiment is similar to the display panel 100a of the above embodiment, except that the transmission conductive layer 136b of the peripheral line 130b in FIGS. 2A and 2B has an opening. 137, wherein the opening 137 is located between the inner lead 132 and the outer lead 134, and the outer lead 134 can sequentially transmit the conductive layer 136b, the conductive gap 154, the common electrode layer 142 on the second substrate 140, and the conductive spacers. 154. The conductive layer 136b is transferred to be electrically connected to the inner lead 132. Please refer to the direction of the arrow in FIG. 2B. In this way, the common voltage in the display area 112 of the display panel 100b can be stabilized without additionally increasing the RC loading of the common voltage, thereby making the display panel 100b have better display quality.

In summary, the display panel of the present invention is designed such that the inner leads of the peripheral lines are electrically connected to the pixel array, and the outer leads of the peripheral lines are electrically connected to the pixel array by transmitting the conductive layer and the inner wires. Therefore, the common voltage in the display area can be stabilized. In other words, compared with the prior art, the display panel of the present invention can have a large wiring area without additionally increasing the RC loading of the common voltage, thereby having better display quality.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100a, 100b‧‧‧ display panel

110‧‧‧First substrate

112‧‧‧Display area

113‧‧‧ gate line

114‧‧‧ surrounding area

115‧‧‧Brake insulation

117‧‧‧Protective layer

117a‧‧‧ openings

118‧‧‧Common electrode line

120‧‧‧ pixel array

122‧‧‧ pixel unit

123‧‧‧film transistor

123a‧‧‧ gate

123b‧‧‧ source

123c‧‧‧汲

124a‧‧‧Information line

125‧‧‧pixel electrodes

130a, 130b‧‧‧ peripheral lines

132‧‧‧Internal conductor

134‧‧‧External wire

136a, 136b‧‧‧Transmission conductive layer

137‧‧‧ openings

140‧‧‧second substrate

142‧‧‧Common electrode layer

150‧‧‧Box glue

152‧‧‧colloid

154‧‧‧ Conductive spacers

160‧‧‧Display media

170‧‧‧Drive chip

180‧‧‧Soft circuit board

FIG. 1A is a schematic diagram of a display panel according to an embodiment of the invention.

FIG. 1B is a top plan view of the display panel of FIG. 1A.

1C is a schematic cross-sectional view taken along line I-I of FIG. 1B.

2A is a top plan view of a display panel according to another embodiment of the present invention.

Fig. 2B is a schematic cross-sectional view taken along line II-II of Fig. 2A.

100a‧‧‧ display panel

110‧‧‧First substrate

113‧‧‧ gate line

115‧‧‧Brake insulation

117‧‧‧Protective layer

117a‧‧‧ openings

130a‧‧‧ Peripheral routes

132‧‧‧Internal conductor

134‧‧‧External wire

136a‧‧‧Transmission conductive layer

140‧‧‧second substrate

142‧‧‧Common electrode layer

150‧‧‧Box glue

152‧‧‧colloid

154‧‧‧ Conductive spacers

Claims (10)

A display panel includes: a first substrate having a display area and a peripheral area surrounding the display area; a pixel array disposed in the display area of the first substrate; a peripheral line disposed in the first The peripheral region of a substrate is electrically connected to the pixel array, the peripheral circuit includes: an inner wire electrically connected to the pixel array; an outer wire disposed around a periphery of the inner wire; and a transmission a conductive layer electrically connected to the inner lead and the outer lead, wherein the outer lead is electrically connected to the pixel array by the conductive layer and the inner lead; and a second substrate disposed on the first substrate An upper frame is disposed between the first substrate and the second substrate, and the sealant is located on a portion of the peripheral line and surrounds the pixel array; and a display medium is disposed on the first substrate and the first substrate Between the two substrates, and surrounded by the sealant. The display panel of claim 1, wherein the sealant comprises a colloid and a plurality of conductive spacers distributed in the colloid, the second substrate having a common electrode layer thereon, the transfer conductive layer The conductive electrode layer is electrically connected to the common electrode layer. The display panel of claim 2, wherein the material of the conductive spacer comprises a metal. The display panel of claim 2, wherein the transmission panel The conductive layer has an opening between the inner wire and the outer wire, and the outer wire sequentially passes through the transmission conductive layer, the conductive spacers, the common electrode layer, the conductive spacers, and the transmission conductive layer And electrically connected to the inner wire. The display panel of claim 2, wherein the transmission conductive layer is a continuous film layer. The display panel of claim 1, wherein the pixel array comprises: a plurality of arrayed pixel units; and a plurality of signal lines electrically connected to the pixel units, wherein the inner wires are A portion of the signal lines are connected, and the inner conductor, the outer conductor, and the signal lines belong to the same film layer. The display panel of claim 6, further comprising at least one driving chip disposed in the peripheral region of the first substrate, wherein the signal wires and the inner wires are electrically connected to the driving chip. The display panel of claim 7, further comprising a flexible circuit board disposed in the peripheral region of the first substrate and electrically connected to the outer lead and the driving chip. The display panel of claim 1, wherein the material of the transmission conductive layer comprises indium tin oxide or indium zinc oxide. The display panel of claim 1, wherein the first substrate is an active device array substrate, and the second substrate is a color filter substrate.