TWI383460B - Metal bump structure and its application in package structure - Google Patents

Description

Metal bump structure and its application to package structure

The present invention relates to a flip-chip glass (COG) fabrication technique, and more particularly to a metal bump structure and its application to a package structure.

Chip on Glass (COG) is a module assembly technology for high pin count and fine pitch flat panel displays. The technical feature of the module assembly is that there is a minimum joint between the driving IC signal source and the panel glass substrate and it does not need to use a flexible substrate, so that the tape-and-reel package (TCP) can be easily caused by bending. The phenomenon of broken feet, thereby improving the reliability of the product.

At present, the COG technology uses an anisotropic conductive film (ACF) as a medium for conductive bonding. Referring to Fig. 1, the anisotropic conductive film 10 is a polymer material which is uniformly mixed with conductive particles 11 and an adhesive and then applied to a release material. The thickness of the anisotropic conductive film 10 is selected to be related to the height of the metal bumps 12. If the height of the metal bumps 12 is 15 to 18 micrometers (μm), the film thickness of the anisotropic conductive film 10 is about 23-25μm or so.

However, in the mass-produced COG technology, there is a problem that the number of conductive particles of the joint surface anisotropic conductive film is insufficient, and this phenomenon causes the joint impedance to be too high and the reliability to be lowered (see Fig. 1). The reason why the number of conductive particles of the anisotropic conductive film is insufficient is the density of the conductive particles of the anisotropic conductive film, the roughness and surface shape of the joint interface, and the temperature increase rate of the joint interface.

Among them, if the number of conductive particles of the anisotropic conductive film is increased to improve the capturing ratio, excessive conductive particles reduce the insulation resistance between the metal bumps, resulting in an increase in the probability of short circuit between the wires. Some manufacturers of anisotropic conductive films have proposed a double layer anisotropic conductive film solution. As shown in Fig. 2, this scheme divides a conventional anisotropic conductive film into a conductive bonding layer (ACF). 20 and a non-conductive bonding layer (NCF) 21, the conductive particles 22 are confined in the conductive bonding layer 20 by the non-conductive bonding layer 21, and the conductive bonding layer 20 and The non-conductive bonding layer 21 controls the flow rate of the conductive particles 22 by the viscosity coefficient of the different rubber materials. However, the process of this solution is more complicated, not only the cost is increased, but also there is still a short circuit problem.

In addition, some driver IC manufacturers use the concave portion of the metal bump to capture the conductive particles of the anisotropic conductive film, but the Young's Modulus of the metal bump is larger than the conductive particles of the anisotropic conductive film, which may cause The phenomenon that the conductive particles of the anisotropic conductive film are poorly pressed.

In view of the above problems, the main object of the present invention is to provide a metal bump structure and a package structure thereof, wherein a metal bump surrounds a barrier layer having a height exceeding a metal bump, and the barrier layer can limit the alienation. The flow of conductive particles in the conductive layer, thereby increasing the capture rate of the conductive particles, and substantially solving the lack of prior art.

Another object of the present invention is to provide a metal bump structure and a package structure thereof, wherein a barrier layer of a polymer material has a higher thermal resistance than a metal bump, so that a difference in fluidity between the anisotropic conductive layer occurs. Further, the loss of conductive particles is reduced, and the capture rate of the conductive particles is increased.

Therefore, in order to achieve the above object, the present invention discloses a metal bump structure in which a bump bottom metal layer (UBM) is formed on a semiconductor element, and a bump metal layer is electrically connected to a connection pad of the semiconductor element, and the bump The bottom metal layer is a metal bump, and the barrier layer is formed on the semiconductor element and around the metal bump, the height of which exceeds the metal bump, so that the barrier layer surrounds the metal bump to form a half enclosed space. This metal bump structure can be applied to a packaged product as a medium for bonding two substrates.

The invention also discloses a package structure, wherein the bottom metal layer of the bump is formed on the first connection pad of the first substrate, the metal bump is formed on the bottom metal layer of the bump, and the barrier layer is formed around the first connection pad. The first protective layer is located around the metal bump, and the height of the barrier layer exceeds the height of the metal bump, so that the barrier layer forms a half enclosed space around the metal bump, and the second substrate has a second connection pad and a second a second protective layer that flips the first substrate Bonding downward to the second substrate, the barrier layer abuts against the second protective layer around the second connection pad, so that the semi-closed space is sealed to the second substrate, and the anisotropic conductive layer (ACF) is formed at the first A plurality of conductive particles are interspersed between the substrate and the second substrate. During the bonding between the first substrate and the second substrate, the conductive particles are blocked by the barrier layer to reduce the chance of being lost outside the semi-closed space.

Furthermore, the barrier layer of the present invention may be a polymer material, and its thermal resistance is higher than that of the metal bumps, so the fluidity of the anisotropic conductive layer may be reduced by the slow heat transfer of the barrier layer, thereby reducing the conductivity. The loss of particles increases the capture rate of conductive particles.

In order to further understand the purpose, features and functions of the present invention, the drawings are described in detail as follows:

Please refer to FIG. 3A and FIG. 3B , which are respectively a cross-sectional view and a plan view of a metal bump structure provided by an embodiment of the present invention. The metal bump structure mainly comprises a bump bottom metal layer (UBM) 30, a metal bump 31 and a dam structure 32, wherein the bump bottom metal layer 30 is disposed on the connection pad 41 of the semiconductor component 40. The barrier layer 32 is formed of a polymer material on the semiconductor device 40, and the barrier layer 32 is completely surrounded by the metal bumps 31. The height b of the barrier layer 32 is Exceeding the height a of the metal bump 31, b>a as shown in FIG. 3A, and the barrier layer 32 is not in contact with the metal bump 31, that is, between the barrier layer 32 and the metal bump 31. A gap, such as c>e shown in Figure 3A.

Referring to FIGS. 4A to 4F, the entire flow of the metal bump structure by the etching process in this embodiment will be described in detail below.

First, as shown in FIG. 4A, a semiconductor element 40, such as a driver IC, is provided, and then a polyimide material is coated on the substrate 42 over the protective layer 43 around the connection pad 41, and patterned. To form the barrier layer 32 of the present embodiment. Among them, the connection pad 41 is formed of a metal material such as aluminum (Al), gold (Au) or other alloy.

As shown in FIG. 4B, a bump bottom metal is sputtered over the entire substrate 42. The layer 30, wherein the bump bottom metal layer 30 is made of a metal material such as aluminum (Al), titanium (Ti), tungsten (W), gold (Au) or an alloy thereof.

As shown in FIG. 4C, a photoresist layer 44 is applied over the bump bottom metal layer 30 and patterned to expose portions of the bumped bottom metal layer 30 etched regions.

As shown in FIG. 4D, a metal layer is plated on the etched region to form a metal bump 31. The material of the metal bump 31 may be metal such as aluminum (Al), gold (Au) or alloy thereof. form.

As shown in FIG. 4E, the remaining photoresist layer 44 is etched away.

As shown in FIG. 4F, the bump bottom metal layer 30 around the metal bump 31 is etched away, and finally, the metal bump structure of this embodiment is completed.

This metal bump structure can be applied to a packaged product as a medium for bonding two substrates. Referring to FIG. 5, the metal bump structure provided by the embodiment of the present invention is applied to a package structure in which flip-chip bonding of the IC chip 50 and the TFT liquid crystal substrate 60 is performed. The bump bottom metal layer 30 is formed on the connection pad 51 of the driving IC wafer 50, the metal bump 31 is formed on the bump bottom metal layer 30, and the barrier layer 32 is formed on the protective layer 52 of the driving IC wafer 50 and located Around the metal bump 31, and the height of the barrier layer 32 exceeds the height of the metal bump 31, the barrier layer 32 is completely surrounded by the metal bump 31, and the barrier layer 32 and the metal bump 31 do not contact each other, that is, The barrier layer 32 has a gap between the metal bumps 31 and the metal bumps 31. During the flip chip bonding, the barrier layer 32 is brought into the protective layer 62 on the TFT liquid crystal substrate 60 around the connection pad 61 by flipping the driving IC wafer 50 downward and bonding to the TFT liquid crystal substrate 60, as for the anisotropy. The conductive layer (ACF) 33 is formed between the driving IC chip 50 and the TFT liquid crystal substrate 60. The plurality of conductive particles 34 are interspersed in the anisotropic conductive layer 33, and the barrier layer 32 blocks the conductive particles 34 to reduce or avoid conduction. Particles 34 are lost outside of the barrier layer 32.

Wherein, since the barrier layer 32 is a polymer material, the thermal resistance of the barrier layer 32 is higher than the thermal resistance of the metal bump 31, that is, the temperature change rate of the barrier layer 32 is lower than that of the metal bump 31, and The anisotropic conductive layer 33 is caused to have a difference in fluidity, thereby restricting the anisotropic conductive layer The loss of the conductive particles 34 of 33 further increases the capture rate of the conductive particles 34. The thermal resistance coefficient of the barrier layer 32 is approximately 0.042 to 0.488 W/m-K, and the thermal resistance coefficient of the thermal resistance of the metal bump 31 is approximately 301 W/m-K. Further, the present invention can also reduce the amount of use of the conductive particles 34 of the anisotropic conductive layer 33 and reduce the cost of purchasing the anisotropic conductive layer 33.

Further, the original diameter of the conductive particles 34 is about 3 to 4 micrometers (μm), and the diameter of the conductive particles 34 after being bonded by the two substrates is approximately in accordance with the following equation: D-1≧d≧D-2; D represents the original diameter (μm) of the conductive particles 34; and d represents the diameter (μm) of the conductive particles 34 after being bonded by the two substrates.

Furthermore, the height difference between the barrier layer 32 of the present invention and the metal bump 31 before bonding with the TFT liquid crystal substrate 60 is preferably in accordance with the following specifications: 2D≧b-a≧0.5d; wherein a represents The height of the metal bump 31; and b represents the height of the barrier layer 32.

Therefore, the height difference between the barrier layer 32 of the present invention and the metal bump 31 before bonding with the TFT liquid crystal substrate 60 is approximately 8 μm b-a ≧ 0.5 um.

Furthermore, the height difference between the barrier layer 32 of the present invention and the metal bump 31 after bonding with the TFT liquid crystal substrate 60 is preferably in accordance with the following specifications: 1.2D≧b-a≧0.5d; wherein a represents a metal bump The height of the block 31; and b represents the height of the barrier layer 32.

Therefore, the height difference between the barrier layer 32 of the present invention and the metal bump 31 after bonding to the TFT liquid crystal substrate 60 is approximately 4.8 um b-a ≧ 0.5 um.

In addition, in practical applications, the metal bumps of the present invention may be single or plural; as shown in FIGS. 6A-6C, the different arrangement of the metal bump structure of the present invention applied to the driver IC chip is illustrated. An embodiment. These metal bump structures 70 have straight rows Columns or staggered plurality of metal bumps 71, and each of the metal bumps 71 has a barrier layer 72 corresponding thereto.

In addition, as shown in FIGS. 7A to 7C, the metal bump structures 80 have a plurality of metal bumps 81 arranged linearly or staggered, and a barrier layer 82 is formed around the metal bumps 81 of each column. The barrier layer 82 can be integrally formed, and the barrier layer 82 corresponding to each of the metal bumps 81 has no gap with each other. Alternatively, as shown in FIGS. 8A to 8B, the metal bump structures 90 have a plurality of metal bumps 91 arranged in a line or staggered, and a barrier layer 92 is formed around all of the metal bumps 91.

Moreover, the barrier layer of the present invention may be a rectangular or trapezoidal cross section, and a gap may exist between the barrier layer and the metal bump. Of course, the barrier layer may also be adjacent to the metal bump as long as it can be achieved. The effect of the barrier of the conductive particles is sufficient without departing from the spirit and scope of the invention.

Although the present invention has been disclosed above in the foregoing embodiments, it is not intended to limit the invention. It is within the scope of the invention to be modified and modified without departing from the spirit and scope of the invention. Please refer to the attached patent application for the scope of protection defined by the present invention.

10‧‧‧ anisotropic conductive film

11‧‧‧Electrical particles

12‧‧‧Metal bumps

20‧‧‧ Conductive bonding layer

21‧‧‧ Non-conductive bonding layer

22‧‧‧Electrical particles

30‧‧‧Bump bottom metal layer

31‧‧‧Metal bumps

32‧‧‧Barrier layer

33‧‧‧ anisotropic conductive layer

34‧‧‧Electrical particles

40‧‧‧Semiconductor components

41‧‧‧Connecting mat

42‧‧‧Substrate

43‧‧‧Protective layer

44‧‧‧ photoresist layer

50‧‧‧Drive IC chip

51‧‧‧Connecting mat

52‧‧‧Protective layer

60‧‧‧TFT liquid crystal substrate

61‧‧‧Connecting mat

62‧‧‧Protective layer

70, 80, 90‧‧‧ metal bump structure

71, 81, 91‧‧‧ metal bumps

72, 82, 92‧‧‧ barrier layers

1 is a schematic diagram showing a phenomenon in which the number of conductive particles of the anisotropic conductive film generated by the COG product provided by the prior art is insufficient; FIG. 2 is a schematic diagram of the structure of the double-layered anisotropic conductive film provided by the prior art; 3A and 3B are respectively a cross-sectional view and a plan view of a metal bump structure provided by an embodiment of the present invention; FIGS. 4A to 4F are sequential steps of fabricating a metal by photolithography process according to an embodiment of the present invention; Schematic diagram of a bump structure; FIG. 5 is a schematic diagram of a package structure of a metal bump structure provided by an embodiment of the present invention applied to flip chip bonding of a driver IC wafer and a TFT liquid crystal substrate; FIG. 6A to FIG. 6C are diagrams The metal bump structure of the invention is applied to the difference of the driver IC chip Embodiments of the arrangement; FIGS. 7A to 7C are embodiments in which the metal bump structure of the present invention is applied to different arrangements of the driver IC wafer; and FIGS. 8A to 8B are the metal bump structures of the present invention. An embodiment applied to different arrangements of driver IC chips.

30‧‧‧Bump bottom metal layer

31‧‧‧Metal bumps

32‧‧‧Barrier layer

40‧‧‧Semiconductor components

41‧‧‧Connecting mat

Claims (30)

A metal bump structure comprising: a bump bottom metal layer (UBM) formed on a semiconductor element and electrically connected to one of the semiconductor element connection pads; a metal bump formed on the bottom metal of the bump And a dam structure formed on the semiconductor element and completely surrounding the metal bump, and the height of the barrier layer is beyond a height of the metal bump; wherein the barrier layer The height difference from the metal bump before the semiconductor element is bonded to a substrate is in accordance with the following equation: 2D≧ba≧0.5d; wherein D represents the original diameter (μm) of a conductive particle; a represents the metal bump Height; b represents the height of the barrier layer; and d represents the diameter (μm) of a conductive particle deformed by the bonding of the two substrates. The metal bump structure according to claim 1, wherein the barrier layer is a polymer material. The metal bump structure of claim 1, wherein the barrier layer has a rectangular or trapezoidal cross section. The metal bump structure of claim 1, wherein the barrier layer and the metal bump have a gap therebetween. The metal bump structure of claim 1, wherein the barrier layer is in close proximity to the metal bump. The metal bump structure of claim 1, wherein the material of the connection pad is selected from the group consisting of aluminum (Al), gold (Au) metal or alloy. The metal bump structure according to claim 1, wherein the material of the bottom metal layer of the bump is selected from the group consisting of aluminum (Al), titanium (Ti), tungsten (W), gold (Au) or alloy. The metal bump structure according to claim 1, wherein the material of the metal bump is selected from the group consisting of aluminum (Al), gold (Au) metal or alloy thereof. The metal bump structure according to claim 1, wherein the barrier layer has a thermal resistance coefficient higher than a thermal resistance coefficient of the metal bump. The metal bump structure according to claim 1, wherein the barrier layer has a thermal resistance coefficient of 0.042 to 0.488 W/m-K. A package structure comprising: a first substrate having a first connection pad and a first protection layer, the first protection layer being formed around the first connection pad; and a bump bottom metal layer (UBM), Formed on the first connection pad; a metal bump formed on the bottom metal layer of the bump; a dam structure formed on the first protective layer and completely surrounding the metal bump And the height of the barrier layer is beyond the height of the metal bump; a second substrate has a second connection pad and a second protection layer, the second protection layer is formed around the second connection pad; And an anisotropic conductive layer (ACF), which is formed by interposing a plurality of conductive particles between the first substrate and the second substrate; wherein the conductive particles are bonded to the first substrate The diameter after deformation of the two substrates conforms to the following equation: D-1≧d≧D-2; wherein D represents the original diameter (μm) of the conductive particles; and d indicates that the conductive particles are bonded to the first substrate Diameter (μm) after deformation on the second substrate The package structure of claim 11, wherein the barrier layer is a polymer material. The package structure of claim 11, wherein the barrier layer has a rectangular or trapezoidal cross section. The package structure of claim 11, wherein the barrier layer and the metal bump have a gap therebetween. The package structure of claim 11, wherein the barrier layer is adjacent to The metal bump. The package structure of claim 11, wherein the conductive particles have an original diameter of 3 to 4 micrometers (μm). The package structure of claim 11, wherein the metal bumps are plural, and each of the metal bumps corresponds to the barrier layer. The package structure of claim 17, wherein the metal bumps are linearly arranged or staggered on the first substrate. The package structure of claim 11, wherein the metal bumps are plural, and the barrier layer is formed around the metal bumps. The package structure of claim 19, wherein the metal bumps are linearly arranged or staggered on the first substrate. The package structure of claim 11, wherein the first substrate is an IC wafer. The package structure of claim 11, wherein the second substrate is a TFT liquid crystal panel. The package structure of claim 11, wherein the material of the connection pad is selected from the group consisting of aluminum (Al), gold (Au) metal or alloy. The package structure according to claim 11, wherein the material of the bottom metal layer of the bump is selected from the group consisting of aluminum (Al), titanium (Ti), tungsten (W), gold (Au) metal or alloy thereof. The package structure according to claim 11, wherein the material of the metal bump is selected from the group consisting of aluminum (Al), gold (Au) metal or alloy thereof. The package structure of claim 11, wherein the barrier layer has a thermal resistance coefficient higher than a thermal resistance coefficient of the metal bump. The package structure according to claim 11, wherein the barrier layer has a thermal resistance coefficient of 0.042 to 0.488 W/m-K. A metal bump structure comprising: a bump bottom metal layer (UBM) formed on a semiconductor component and electrically connected to the One of the semiconductor elements is connected to the pad; a metal bump is formed on the bottom metal layer of the bump; and a dam structure is formed on the semiconductor element and completely surrounds the metal bump, and the The height of the barrier layer is beyond the height of the metal bump; wherein the height difference between the barrier layer and the metal bump before the semiconductor component is bonded to a substrate is in accordance with the following equation: 8um≧ba≧0.5um; a represents the height of the metal bump; and b represents the height of the barrier layer. A package structure comprising: a first substrate having a first connection pad and a first protection layer, the first protection layer being formed around the first connection pad; and a bump bottom metal layer (UBM), Formed on the first connection pad; a metal bump formed on the bottom metal layer of the bump; a dam structure formed on the first protective layer and completely surrounding the metal bump And the height of the barrier layer is beyond the height of the metal bump; a second substrate has a second connection pad and a second protection layer, the second protection layer is formed around the second connection pad; And an anisotropic conductive layer (ACF), which is interspersed with a plurality of conductive particles, formed between the first substrate and the second substrate; wherein the barrier layer and the metal bump are in the first The height difference between the substrate and the second substrate is in accordance with the following equation: 2D≧ba≧0.5d; wherein a represents the height of the metal bump; and b represents the height of the barrier layer. A package structure comprising: a first substrate having a first connection pad and a first protection layer, the first protection layer being formed around the first connection pad; and a bump bottom metal layer (UBM), Formed on the first connection pad; a metal bump is formed on the bottom metal layer of the bump; a dam structure is formed on the first protective layer and completely surrounds the metal bump, and the height of the barrier layer Exceeding the height of the metal bump; a second substrate having a second connection pad and a second protection layer formed around the second connection pad; and an anisotropic conductive layer ( An Aisotropic Conductive Film (ACF) is formed by interposing a plurality of conductive particles between the first substrate and the second substrate; wherein the barrier layer and the metal bump are bonded to the first substrate and the second substrate The height difference is in accordance with the following equation: 4.8 um ≧ ≧ ≧ 0.5 um; where a represents the height of the metal bump; and b represents the height of the barrier layer.