TWI226808B - Circuit board structure and method fabricating the same - Google Patents

Abstract

A circuit board structure and a method for fabricating the same are proposed, wherein a core substrate formed with a metal layer on surfaces thereof and a plurality of plated through holes therein is provided. A conductive layer is formed on the surface of the terminal portions of the plated through holes, and a patterned circuit layer is formed on the core substrate by patterning the metal layer. An insulating layer is respectively formed on the surface of circuit layer with a plurality of openings, wherein at least an opening on one side of circuit board is formed to expose the terminal portion of the plated through hole and the remaining openings on the other side of circuit board are covered by a resist layer. After a metal layer is formed on the plated through hole within the opening, the resist layer is removed. By the arrangement, the metal layer can be selectively formed on the partial plated through holes for electrical connection pads.

Description

1226808 V. Description of the invention (1) --- 'Technical field to which the invention belongs] The present invention relates to a circuit board and a manufacturing method thereof, particularly a conductive connection using a through-hole structure of an electric money in a multilayer circuit board. 3. The circuit board structure of the lower circuit layer and its manufacturing method. [Previous technology] With the vigorous development of the electronics industry, electronic products have gradually entered the trend of multi-function and high-performance research and development. In order to meet the packaging requirements of high integration and miniaturization of semiconductor packages, for more active and passive components and circuits, the electrical board that carries semiconductor wafers has also gradually changed from a double layer The board has evolved into a multi-layer board. In a limited space, the interlayer connection technology (Interlayer II ο η nec 11 ο η) is used to expand the available circuit layout area on the circuit board. The integrated circuit of the two circuits is required to accommodate a larger number of circuits and components under the same unit area of the circuit board. In response to the needs of high-performance chips such as microprocessors, chip sets, and graphics chips, the circuit board also needs to improve its functions of transmitting chip signals, improving bandwidth, and controlling impedance to achieve high- / 0-number packages. development of. Without it, | conforms to the lightness and shortness of semiconductor packages, multi-functionality, high speed and high frequency ▼ In the development direction, circuit boards have been developed towards fine lines and small apertures. The existing circuit board manufacturing process has been reduced from the traditional 100 micron circuit size: including the wire width (LiM Iidt1 ^ ,,, line spacing (SpaCe), and aspect ratio (AsPect r ^ tio), etc.) to less than 30 microns, and continue to move towards more Small line accuracy _ _ i 1 _ Hi _ 'See hidden yi 11 HI In 1 · 17659 full 懋 .ptd 1226808 V. Description of the invention (2) In order to improve the precision of the wiring of the circuit board, the industry has developed a layering technology (Build-up), that is, a multi-layer insulation layer and a circuit layer are alternately stacked on a surface of a core circuit board (Core circuit boar d) by using a line increasing technology, and a conductive blind hole (C ο nductivevia) is opened in the insulation layer to Provides electrical connection between upper and lower layers of the circuit. Among them, the layer increase process is the key to affect the circuit board circuit density. According to the current technology, the industry mostly uses the layer increase process to make multilayer circuit boards. Please refer to Figures 1A to 1C , Using a method such as semi-additive (

Semi-additive process (SAP). First, a core circuit board 10 is provided, and an insulating layer 11 is formed on the surface. A laser drilling (Laserdri 1 1 ing) technology is used for the insulation. An opening 1 1 0 is formed on the layer 11 to communicate with the inner circuit layer 1 2 of the core circuit board 10 (as shown in FIG. 1A). Next, a conductive seed layer 13 is formed on the insulating layer 11 by electroless copper plating, and a patterned resist layer 14 is applied on the seed layer 13 to perform electroplating on the seed layer. 1 3 A patterned circuit layer 1 5 is formed on the surface (as shown in FIG. 1B). After that, the resist layer 14 is peeled off and etched to remove the seed layer 1 3 previously covered under the resist layer 14 (as shown in FIG. 1C). In this way, using these steps to repeatedly form the insulating layer and Adding a circuit layer is to make a circuit board with a multilayer circuit structure. However, in the conventional multi-layer circuit board produced by the build-up method, if the electronic signal is to be transmitted from the upper layer of the circuit board to the lower layer, the signal must be from the upper build-up circuit layer, the conductive blind hole between the upper circuit layers, to The core circuit board has an upper circuit layer, and then passes through a plated through hole (PTH) inside the core circuit board, the lower circuit layer of the core circuit board,

17659 Quan 懋 .ptd Page 11 1226808 V. Description of the invention (3)-The conductive blind holes between the lower build-up circuit layers and the lower build-up circuit layer arrive at the lower layer of the circuit board. The signal transmission path is too long, which may cause the increase of inductance and cause cross-talk or noise, which will damage the quality of electrical transmission. In addition, since most of the plated-through holes are formed in the core circuit board, the connection pads must be extended from the plated-through holes when the patterned circuit layer is formed in the subsequent layered circuit layer formed on the core circuit board and the lower surface. (Pad) space to form a conductive via, which not only wastes the wiring area of the circuit board, is not conducive to the trend of miniaturization packaging, but also affects the empty use of the circuit board because of the need to avoid the position of the plated-through holes in the circuit layout. flexibility. — Furthermore, there may be a way to form conductive blind vias directly on the plated vias. However, if conductive blind vias are to be formed directly on the plated vias, a surface of the entire circuit board with plated vias must first be formed. Metal layer, and in order to form conductive blind holes in the plated vias, a metal layer of sufficient thickness must be formed on the plug hole resin of the plated vias to prevent the metal layer from being subject to plug hole resin in subsequent processes It can cause cracks or even separation. However, because the metal layer is formed on the entire surface of the circuit board at the same time, often the thickness of the metal layer is too thick or the thickness is uneven, resulting in subsequent patterning by, for example, etching. In the manufacturing process, the precision of forming conductive lines and electrical connections is troubled, and a dense and fine line structure cannot be formed. " As packages that can reduce the area of integrated circuits (IC) and have high density and multi-pin characteristics have gradually become the mainstream in the packaging market, and the circuit board manufacturing process accounts for 20% to 50% of the packaging cost, Therefore, the integrated circuit manufacturing process on semiconductor wafers has been reduced to 0 · 0 9 // m and the package size has been continuously reduced to

17659 全懋 .ptd Page 12 1226808 V. Description of the invention (4) When it is almost the same size as a chip (about 1 or 2 times as large as a chip), how to develop a fine circuit (F 1 necircuit) and high The circuit board structure of the circuit density 'at the same time does not increase excessive manufacturing costs, which is undoubtedly an important R & D issue for the semiconductor industry and other related electronics industries to enter the next generation of technology. [Summary of the Invention] II. The disadvantages of the conventional techniques described above. The main purpose of the present invention is to provide a circuit board structure and a manufacturing method thereof, which can directly form an electrical connection end on a plated through hole while providing the remaining power of the circuit board. The sexual connection end and the conductive circuit have a fine and thin circuit structure. Another object of the present invention is to provide a circuit board structure and a method for manufacturing the same, thereby shortening the wiring space of a conductive blind hole, and forming a better electrical connection relationship between the conductive blind hole plating layer and the key via. Another object of the present invention is to provide a circuit board structure and a manufacturing method thereof, thereby shortening a signal transmission path to avoid crosstalk and noise, and further improve the electrical quality of the circuit board. Another object of the present invention is to provide a circuit board structure and a manufacturing method thereof, thereby increasing the circuit layout area of the circuit board, and improving the layout flexibility of interlayer circuits (Inte): layer circuits. u In order to achieve the above and other objectives, the present invention discloses a method for manufacturing a circuit board structure, which includes: providing a core board, the core board having a metal layer on the surface thereof and forming a plurality of plated through-holes; A conductive layer is formed on the end surface of the key via hole of the core board; the metal layer on the surface of the core board is patterned to form a patterned circuit structure; and an insulation layer is covered on the circuit structure to form the insulation layer. A plurality of openings, and at least one ^

17659 Think All.ptd

Page 13 1226808. — ~ ^ V. Description of the invention (5) The end of the plated through hole is exposed and a barrier layer is formed to cover the remaining openings on the other surface; the plated through hole end of the insulation layer opening is exposed outside Forming a metal layer; and removing the resist layer. In this way, a metal layer can be selectively formed directly on some of the plated through holes for subsequent use as an electrical connection terminal. After that, a metal protective layer can be formed on the surface of the circuit structure part (that is, the electrical connection terminal for the subsequent electrical connection between the circuit board and the outside) that exposes the opening of the insulation layer, so that the circuit board can be effectively used. It is electrically connected to the conductive element, and the insulating layer can be a solder resist layer. The conductive layer on the surface of the end of the plated via hole can be insulated by direct plating (DP) in the plug hole of the electric mine via—partially forming a conductive film such as palladium, or by chemical deposition to A conductive film, such as copper, is formed on the plug-hole insulation portion of the plated-through hole; afterwards, a thin metal layer may be formed on the entire surface of the core board by electroplating, which can be subsequently conducted through the electroplating through the electroplating A metal layer as an electrical connection terminal is directly formed on the end of the hole, and a metal protection can be formed on the electrical connection terminal of the patterned insulating layer (such as solder resist layer) by using electroplated wires or chemical deposition. Layer to protect the electrical connection end from the external environment and provide a good electrical connection between the electrical connection end and the conductive element (such as a wire, a solder ball, or a metal bump). In addition, after the electrical connection end is formed at the end of the plated through hole, it can also be used as a conductive blind hole in the subsequent layer buildup structure, so that a conductive blind hole can be directly formed on the plated through hole to shorten the conductivity. Approach, and effectively increase the layout space of the circuit, improve the flexibility of the layout of the circuit, and then continue to carry out the process of layer increase to form a circuit board with a multilayer circuit structure.

17659 全懋 .ptd Page 14 1226808 V. Description of Invention (6)

That is, the system of the end portion of the layer covering the hole is effectively improved by the need to plate the blind hole. In addition, it includes a number of electrical insulation layers formed through the electrical part that pass through the plurality of connection ends to the front part. Forming a fine forming metal process, and at the same time electrically connecting the wiring on the vias, through the foregoing: a core layer of the core board's conductive line is formed at the connection end of the circuit structure, the connection end; the multilayer electrical process of the mouth The layer of the process line can be entered into the density process of the formed terminals. The plate, its plating guide and the electroplating, the 'q two-star / 100 / person pi area is strictly selective for some electric ore conduction. It will not affect the layout space of the remaining circuits and apply it in a step-by-step process in the layer build-up process. The electrical connection end is used to reduce the circuit board space occupied by the conductive settings and wiring. The present invention also discloses through-holes formed on the surface. The via is electrically conductive; the insulating layer is formed and at least one opening is paired and an upper surface of the connection end of the metal protective layer. Another circuit board. Shows an electrically patterned circuit 'the patterning is conductive, and a patterning must have a plurality of contacts to the plating' formed on 'the core layer circuit board structure structure and the multi-circuit structure at least one electrical edge layer, The exposure of the exposed through-hole end outside the system port may be completed. T 'Through the circuit board structure and the manufacturing method of the present invention, the plated through-holes which are to be electrically connected to the electrical connection end can be selectively connected. conductive elements, serve to provide, ~y Wu〗 bovine (a semiconductor wafer or a circuit board) of electrically conductive connection, or will Z3 3 'is electrically connected to the end of the through hole is formed directly by layer wiring junction • Disabled "mesh holes Reduce the space for forming conductive blind holes (Conductive only) to extend the connection pad (P ad) to increase wiring

17659 全懋 .ptd Page 15 1226808 V. Description of the invention (7)-Circuit density and flexibility, and can shorten the conductive path, reduce inductance, crosstalk and noise generation; In addition, the electrical connection terminal on the plated through hole It is formed independently in the manufacturing process without affecting the manufacturing process of the conductive circuit of the circuit board, so as to avoid the need to form an electrical connection end on the plated through hole in the conventional technology, it is necessary to form an excessive thickness or thickness on the overall circuit board. The uneven metal layer causes the subsequent precision problems of forming conductive lines and electrical connection terminals in the patterning process, and the lack of a circuit board with a fine circuit structure, etc., can provide a fine circuit. And high wiring density circuit board. _Embodiment] The following is a description of specific embodiments of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied by other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the spirit of the present invention. Hereinafter, the preferred embodiments of the circuit board structure and the manufacturing method of the present invention will be described in detail with reference to FIGS. 2A to 2K. Among them, it should be noted that these drawings are simplified schematic diagrams, and only the schematic description of the circuit board rack of the present invention is shown. However, the drawings only show the elements related to the present invention. The elements shown are not the actual implementation. The number, shape, and size ratio of the elements during actual implementation are an optional design. The layout pattern may be more complicated. As shown in Figures 2A and 2B, first, a surface is provided with a thin metal

17659 Quan 懋 .ptd Page 16 1226808 V. Description of the Invention (8) The core board 20 is a layer, and the core board 20 can also be a multi-layer circuit board with pre-processing completed. In the drawing of this embodiment, the male layer board 20 is composed of a sloping edge layer 200 and a thin metal layer 201 formed on the surface of the insulating layer 200; furthermore, mechanical or lightning A plurality of through holes 2 0 2 are drilled in the core board 20 by a method such as shot drilling (as shown in FIG. 2B). Wherein, the insulating layer 2000 may be epoxy resin, Polyimide, Cyanate Ester, glass fiber, and bismaleimide diimide. / Triazine (Bismaleimide Triazine, BT) or a mixture of epoxy resin and glass fiber FR5 material, the metal thin layer 20 1 is generally mainly conductive copper (C u), as a signal transmission And the metal thin layer 201 can be first laminated or deposited on the insulating layer 200 'or made of resin-coated copper foil (Resin coated copper, RCC). This embodiment is described by using a resin laminated copper foil (RCC) as an example. As shown in Figure 2C, next, physical vapor deposition (PVD), chemical vapor deposition (CVD), electroless plating, or chemical deposition are used, such as sputtering, evaporation, and electrically isolated vapor. Arc vapor deposition, ion beam sputtering, laser fusing deposition (Lasker ab 1 at i on deposition), chemical vapor deposition where plasma is busy or no electricity, etc. A conductive layer (not shown) is formed on the surface of the core board 20 and its through holes 2. The conductive layer is used as a current conduction path to form a conductive layer on the surface of the core board 20 and the conductive layer. A metal layer 203 having a sufficient p degree is formed on the wall of the through hole 202 by electroplating. As shown in FIG. 2D, fill with a filling material 204 (such as ink resin, etc.)

17659 Quan 懋 .ptd Page 17 1226808 V. Description of the invention (9) The remaining void of the through hole 2 0 2 is filled, and a plated through hole (PTH) 2 0 5 is formed to electrically conduct the core board 2 0 Upper and lower surface metal layers 2 0 3. As shown in FIG. 2E, a conductive layer is formed on the surface of the end of the plated-through hole 20 5 where the core layer board 20 is exposed. It can first form a conductive layer (not shown) on the surface of the core board 20 through electroless plating, etc., and use the conductive layer as a current conduction path to form a conductive layer on the surface of the core board 20 (including the A conductive thin layer 21 (such as a thickness of usually 3 to 10 μm) is formed by electroplating on the end of the filling material 204 of the electric via 20 5. In addition, as shown in FIG. 2E, processes such as direct plating (DP) can also be performed on the core board 20 to form, for example, a ( P d) conductive film 203a, and then subjected to a chemical stripping process so that the concubine metal layer adheres to the end surface of the filling material 2004 of the plated through-hole 205; or a process such as chemical copper, A conductive film 203a is covered on the surface of the end of the filling material 204 of the plated-through hole 205. Among them, the conductive thin layer 21 or the conductive film 203a formed on the end surface of the filling material 20 4 of the plated through hole 20 5 is mainly used as a current conduction path, and can be selectively applied to the electric clock during the subsequent plating process. An electric ore metal layer is formed on the via hole 205. The following description of the subsequent process is mainly based on the formation of an electrical thin layer 21 such as steel (Cu) on the core layer board 20, and the surface of the filling material 204 in the plated through-holes 2 0 5 4% A conductive film 203a, which can be made of palladium or steel, is formed. The subsequent process is similar to the process steps described below, so it will not be described in detail here. As shown in FIG. 2F, a circuit patterning process is performed to form a patterned circuit structure on the metal layer on the surface of the core board. It can be in the core layer

17659 Think.ptd Page 18 1226808

V. Description of the invention (10) A resist layer (for example, dry film or photoresist) (not shown) is formed on the plate 2 Q, and the process is performed by exposing the resist layer (Deveiopment) to make the resist layer ^ ^ open = Exposing the surface metal layer of the core and laminate 20 outside, via: Bacheng to privately remove the part of the metal layer that is not covered by the resist layer, thereby forming a patterned circuit structure 22, where the pattern The circuit structure 22 may include a plurality of fine circuit structures. As shown in FIG. 2G, an insulating layer 23 is covered on the circuit structure 22, and the insulating layer 23 is formed with a plurality of openings 2 3 0, and at least one opening 2 3 0 is exposed to the power mine. End of via hole 205. Wherein, the material of the insulating layer 23 may be a solder resist layer such as green paint, and the insulating layer openings 2 3 0 are used to expose part of the conductive circuit of the circuit board that subsequently forms the electrical connection end. As shown in FIG. 2 (a), a resist layer 24 is formed to cover a part of the insulation layer opening 230 which does not expose the end of the plated-through hole 205. The resistive layer 24 can be a dry film or a photoresistor, which can be used as an electrical resistive layer in the subsequent electroplating process. As shown in Figure 2I, the plating vias of the insulating layer opening 2 3 0 are routed outside. A 205 part forms a metal layer 25. It can form a plated metal layer 25 on the plated through hole 20 5 in the part of the insulating layer opening 2 3 0 which is not covered by the resist layer 24 by means of plating wires, etc. A metal layer 25 is directly formed on a part of the plated-through hole 25 for subsequent use as an electrical connection end. Among them, since the electroplated metal layer 25 is only selectively formed on a part of the electroplated vias 205, in addition to the electrical connection ends that can be formed on the electric power vias 205, the rest of the core layer board Top = The patterned circuit can maintain a more detailed circuit structure.

17659 Quan 懋 .ptd 19 page 1226808 V. Description of the invention (11) • As shown in Figure 2J, after forming a metal layer 2 5 on the plated through hole 2 0 5, the resist layer 2 4 can be moved. In addition, the part of the patterned circuit structure on the surface of the core board that is to be used as an electrical connection terminal (including the metal layer 25 selectively formed on the plated through hole) is exposed to the insulating layer (such as a solder resist layer) ) 2 3 openings 2 3 0. As shown in Figure 2K, after that, a metal can be formed on the surface of the conductive metal (that is, the electrical connection terminal for subsequent electrical connection between the circuit board and the outside) that exposes the insulating layer opening 230. Protective layer 2 6. It can be formed on the top surface of the conductive metal by exposing the opening 2 3 0 of the insulating layer by electroplated wires. A metal protective layer such as nickel / gold 2 6 can provide electrical connection through the metal protective layer 2 6. The terminal is effectively electrically connected to a conductive element (such as a wire, a solder ball, or a metal bump, etc.). Of course, the method of forming a metal protective layer on the electrical connection end is not limited to the aforementioned electroplated wire method. It can also be formed by chemical deposition (such as chemical nickel / gold process), but the method of forming the metal protective layer , It is only for the purpose of illustration, not to limit the implementable scope of the present invention. In addition, please refer to FIG. 2K ′, which is a conductive film f such as palladium formed on the surface of the end of the filling material 204 of the plated-through hole 2 0 5 as shown in FIG. The process is to selectively form a metal layer 25 that is an electrical connection terminal on a part of the plated through-hole 25, and to expose the upper surface of the electrical connection terminal that exposes the opening 2 3 0 of the insulating layer (solder resist layer). A metal protective layer 26 is formed to make a circuit board. Therefore, the above-mentioned manufacturing process of the circuit board structure of the present invention is mainly carried out by direct mining on the end surface of the plated through-hole (Direct

17659 Quan 懋 .ptd Page 20 1226808 V. Description of the invention (12) plat ing (DP) or chemical deposition method so that the plug insulating part of the plated through hole is covered with a conductive film such as palladium or copper, or by electroplating A conductive thin layer is formed by using electroplated wires to selectively form electrical connection ends on the ends of the plated vias, and the patterned insulating layer can be exposed by electroplating wires or chemical deposition ( Such as a solder resist layer, a metal protective layer is formed on the electrical connection end to protect the electrical connection end from the external environment, and to provide it with conductive components (such as welding wires, solder balls, or metal bumps, etc.) Good electrical connection. Please refer to FIG. 2K and 2K ′. Through the foregoing process, the present invention also discloses a circuit board structure, which includes a core layer board 20, and a patterned circuit structure 22 is formed on the surface, and most of the cores run through the core. The plated-through holes 2 0 5 of the layer plate 20, wherein the patterned circuit structure 22 has most of the conductive lines and the plated-through holes electrically connected, and at least one electrical connection end is formed in the plated-through holes 2 0 5; a patterned insulating layer 23 is formed on the circuit structure 22, the insulating layer 23 is formed with a plurality of openings 2 3 0 to expose the electrical connection terminal, and at least one opening 2 3 0 is The electrical connection end corresponding to the end of the plated through hole 205; and a metal protective layer 26 is formed on the surface of the electrical connection end which exposes the opening 230 of the insulation layer. Therefore, the present invention can selectively form an electrical connection end directly on a part of the plated through-holes, and use a resistive layer to cover the fine line structure formed in the previous process in advance without affecting the remaining line layout space and the process of the fine line. That is, the electrical connection ends on the plated through-holes are made after the rest of the same layer circuit structure is formed, and the electrical connection ends can be used as subsequent connection of conductive elements on the circuit board.

17659 Quan 懋 .ptd Page 21 1226808 V. Description of the invention (13) _ In addition, if the end is formed with 3 conductive connections, the conductive connection is formed on the connection end, which effectively increases the wiring and can continuously carry the circuit board. In addition, although this process can also be a completed multi-use application, and is not limited to arbitrary use in connecting the electrons to the electrical conduction of the electrical circuit, the circuit density layer circuit was invented before the invention. There are many layers in the foregoing. By dividing the desired shape, the components (plated vias, blind holes, required and flexible) are shown in Figure 3. After throwing off the plated-through hole at the 3 05 end, it is also used as a layer 32 for the subsequent circuit, so that it can be directly used in the plated-through hole 3 05 L 32. In this way, the electrical property of the conductive blind hole can be reduced. = Wiring occupies circuit board space, shortens the conductive pathways, and deploys space to improve the flexibility of circuit layout. The process of adding layers increases the formation of a multi-layer circuit structure. 1 ^ The previous illustration uses double-layer boards as an illustration. ， 本 发 = 2 in the multi-layer board, that is, the core layer '^ multi-layer board of the previous process' can be formed according to the aforementioned process, as shown in Figures 4A and 4B. Shown is a four-layer electrical structure with a four-layer circuit structure obtained from the manufacturing process. Circuit board 40B. Of course, the application of the present invention is a two-layer, four-layer, or six-layer circuit board, which is actually a circuit board capable of supporting a layered circuit structure. The circuit board structure of the present invention and its manufacturing method can be selected to be electrical The electroplated vias of the connection end are directly formed with the electrical connection of the subsequent conductive elements to provide electrical connection between the circuit board and its semiconductor wafer or circuit board, or the electrical connection end on the subassembly can be directly formed with a line. Layer-increasing structure and reducing the formation of conductive blind holes (Conductive extends the space of the connection pad (Pad), thereby increasing the wiring, and shortening the conductive path, reducing inductance, crosstalk and

17659 Quan 懋 .ptd Page 22 1226808 V. Description of the invention Noise generation is an independent form of free know-how in the whole electro-mechanical follow-up, and the way (F i ne above defines the invention as a broadly defined entity or all the same, patent Scope (14); In addition, the electroplating without affecting the formation of a thick patterning process on the electroplated guide plate during the operation cannot form a thin line (Cir cu it) and the description by Gao Bu is only the essence of the present invention The technical content means the following application method. If it is the same as the following or the same, the conductive circuit hole is passed through to form a conductive junction junction. The plate on the hole is conductive to form a thick or thick wire. Road construction and other deficient electrical implementation, the application in the scope of this application, all will be the electrical connection line of the electrical connection of uneven electrical connection and electrical connection loss' mention circuit board. For example, in the essence, any other benefit range is considered to be in the middle of the manufacturing process. In order to avoid the end, a metal layer is required. The precision of the lead is a thin line that is not used to limit the technical content. Definitions are covered in this application

17659 Quan 懋 .ptd Page 23 1226808 Schematic illustrations _ [Schematic descriptions] Figures 1 A to 1 C are the conventional semi-additive process flow diagrams; Figures 2 A to 2 K 2E ′ and 2Γ are schematic cross-sectional views of another embodiment of the circuit board structure manufacturing method of the present invention; FIG. 3 is a circuit board structure manufacturing method of the present invention applied to A schematic cross-sectional view of the build-up structure; and FIGS. 4A and 4B are schematic cross-sectional views of the method for manufacturing a circuit board structure of the present invention applied to a multi-board. 1 0 Core circuit board 11 Insulation layer 110 Opening hole 12 Inner circuit layer 13 Seed layer 14 Resistance layer 15 Patterned circuit layer. 20 Core board • 0 0 Insulation layer 201 Thin metal layer 202 Through hole 203 Metal layer 2 0 3a Conductive film

17659 Full 懋 .ptd Page 24 1226808 Brief description of drawings 2 0 4 Filler 2 0 5 Plating vias 21 Conductive thin layer 22 Circuit structure 2 3 Insulation layer 2 3 0 Opening 2 4 Resistive layer 2 5 Metal layer 2 6 Metal Protective layer 30 core layer board 3 0 5 plated vias 31 circuit build-up structure 32 conductive blind hole 40 A four-layer circuit board 4 0 B six-layer circuit board

17659 懋 .ptd Page 25

Claims (1)

1226808 VI. Scope of patent application η. A method for manufacturing a circuit board structure includes: providing a core board, the core board having a metal layer on the surface, and the core board formed with a large number of plated through-holes; A conductive layer is formed on an end surface of the plated via hole of the core board; a metal layer on the surface of the core board is patterned to form a patterned circuit structure; an insulating layer is covered on the circuit structure, and the insulating layer is formed with A plurality of openings, and at least one of the openings exposes the end of the plated via hole; and an end of the plated via hole that exposes the opening of the insulating layer forms a metal layer as an electrical connection end. 2. The method for manufacturing a circuit board structure according to item 1 of the patent application scope, wherein the conductive layer on the surface of the end of the plated-through hole is formed by direct plating (DP). 3. The manufacturing method of the circuit board structure according to the first item of the patent application scope, wherein the inside of the plated through hole is filled with a filling material to fill its remaining gap. 4. The manufacturing method of the circuit board structure according to the first patent application scope, wherein the conductive layer on the end surface of the via hole of the key is formed by chemical deposition. 5. If the method of manufacturing a circuit board structure according to item 4 of the patent application method, wherein the material of the conductive layer on the end surface of the via hole of the key can be one of copper and copper. 6. As for the manufacturing method of the circuit board structure according to the scope of patent application item 1, wherein, the 17659 Quan 懋 .ptd Page 26 1226808 6. Scope of patent application The conductive layer on the surface of the end of the plated-through hole is formed by electroless plating. 7. If the method of manufacturing a circuit board structure according to item 4 or 6 of the application for a patent, wherein the conductive layer on the surface of the end of the plated via is used as a current conduction path to form a plated metal layer on the end of the plated via . 8. For the method of manufacturing a circuit board structure according to item 1 of the application, wherein the surface of the core board uses the conductive layer as a current conduction path to form a conductive thin layer on the surface of the core board by electroplating. 9. For the method for manufacturing a circuit board structure according to item 1 of the application, wherein the core board may be a resin-bonded copper pig (R C C). 10. If the method of manufacturing a circuit board structure according to item 1 of the scope of the patent application, the core board may be a multi-layer circuit board that has completed the previous process. 11. The method for manufacturing a circuit board structure according to item 1 of the application, wherein the insulation layer is a solder resist layer. 12. The method for manufacturing a circuit board structure according to item 1 of the scope of patent application, wherein after the end of the plated via hole is exposed with an insulating layer, a resist layer is formed to cover the remaining opening on the other surface of the circuit board. 1 3. According to the method for manufacturing a circuit board structure according to item 12 of the scope of patent application, wherein a metal layer is formed at the end of the plated through hole exposing the opening of the insulating layer as an electrical connection end, and the resist layer is removed. . 14. The method of manufacturing a circuit board structure according to item 1 of the scope of patent application, wherein a metal protective layer may be formed on the surface of the electrical connection end that exposes the opening of the insulating layer. 1 5. The manufacturing method of the circuit board structure according to item 14 of the scope of patent application, wherein: 17659 Quan 懋 .ptd Page 27 1226808 6. Scope of Patent Application-The metal protective layer is a nickel / gold metal layer. 16. The method for manufacturing a circuit board structure according to item 14 of the scope of patent application, wherein the metal protective layer can be formed by using one of an electric ore wire and a chemical deposition method. 17. According to the method for manufacturing a circuit board structure according to item 1 of the scope of patent application, wherein the metal layer on the plated through hole functions as an electrical connection end, it is selectively formed on part of the plated through hole and is used in advance. The barrier layer covers the area where the fine lines are formed. 1 8 · If the manufacturing method of the circuit board structure in item 1 or 17 of the scope of patent application, where Φ, the electrical connection end can be used as a subsequent connection of conductive elements on the circuit board. 17. The method for manufacturing a circuit board structure according to item 17, wherein the electrical connection end can be used to receive conductive blind holes in a subsequent layer build-up structure, so that conductive blind holes can be formed on the plated through holes to shorten the conductive path and increase Line layout space, and improve the flexibility of line layout. 2 0. A circuit board structure comprising: a core board with a patterned circuit structure formed on its surface and a plurality of electrical slab vias passing through the core board. The patterned circuit structure has a majority of conductive circuits and The plated via is electrically conductive, and at least one electrical connection terminal is formed on the plated via; a patterned insulating layer is formed on the circuit structure, so that the insulating layer is formed with a plurality of openings and exposed. The electrical connection terminal, and at least one opening corresponds to the electrical connection of the end of the plated through hole 17659 Quan 懋 .ptd Page 28 1226808 6. Scope of patent application, and a metal protective layer is formed on the surface of the electrical connection end which exposes the opening of the patterned insulating layer. 2 1. The circuit board structure according to item 20 of the patent application scope, wherein the core board may be a resin-bonded copper pig (RCC). 2 2. If the circuit board structure of item 20 of the patent application scope, wherein the core board can be a multi-layer circuit board that has completed the previous process. 2 3. The circuit board structure according to item 20 of the scope of patent application, wherein the insulation layer is a freshness-preventing layer. 24. For example, the circuit board structure of the 20th in the scope of patent application, wherein the electrical connection end can be used as a subsequent connection of the circuit board to conductive elements. 25. The circuit board structure according to item 20 of the scope of patent application, wherein the electrical connection ends on the plated through-holes are made after the formation of the rest of the same layer circuit structure. 2 6. If the circuit board structure of the patent application scope item 20 or 25, wherein the electrical connection end on the plated through hole is selectively formed on part of the plated through hole without affecting the remaining patterned circuit structure The process. 27. The circuit board structure according to item 20 of the patent application scope, wherein the metal protective layer is a nickel / gold metal layer. 17659 懋 .ptd Page 29