TWI222653B - Filed emission-type electron source - Google Patents

Abstract

A lower electrode (2) and surface electrode (7) composed of a layer-structured conductive carbide layer is formed on one principal surface side of the substrate (1) composed of an insulative substrate such as a glass or ceramic substrate. A non-doped polycrystalline silicon layer (3) is formed on the lower electrode (2). An electron transit layer (6) composed of an oxidized porous polycrystalline silicon is formed on the polycrystalline silicon layer (3). The electron transit layer (6) is composed of a composite nanocrystal layer including polycrystalline silicon and many nanocrystalline silicons residing adjacent to a grain boundary of the polycrystalline silicon. When voltage is applied between the lower electrode (2) and the surface electrode (7) such that the surface electrode (7) has a higher potential, electrons are injected from the lower electrode (2) toward the surface electrode (7), and emitted through the surface electrode (7) through the electron transit layer (6).

Description

1222653 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the Invention (1) Background of the Invention l Field of the Invention The present invention relates to a field emission type electron source, which emits an electron beam through a field emission phenomenon. 2. Description of Known Skills In the past, techniques such as those disclosed in Japanese Patent Publication No. 2987140 and Japanese Patent Publication No. 2001_126610 are known in the field emission type electron source (hereinafter referred to as “electron source”). The electron source disclosed in Japanese Patent Publication No. 2987140 includes a lower electrode, a surface electrode (upper electrode) composed of a metal thin film, and an electron transporting layer (strong field drift field) provided between the lower and surface electrodes. The surface electrode is arranged to be opposed to the lower electrode, and an electron transporting layer is interposed therebetween. When some voltage is applied between the lower electrode and the surface electrode, so that the surface electrode has a higher potential than the lower electrode, the electric field created between the electrodes includes the flow of electrons from the lower electrode to the surface electrode via the electron transport layer. For example, an oxidized or nitrided porous polycrystalline silicon layer is used as the electron transport layer. When the electron source is actuated, when the surface electrode is exposed to the vacuum space, the collector is disposed to face the surface electrode. Then, a DC current is applied between the surface and the lower electrode, so that the surface electrode has a higher potential than the lower electrode, and at the same time, another DC current is applied between the collector and the surface electrode ', so that the collector is higher than the surface electrode Has a higher potential. As a result of the above operations, electrons will be injected into the electron transport layer from the lower electrode. Then, the paper size of the electron transport will be in accordance with the Chinese National Standard (CNS) A4 specification (210X297 mm). Qin < Province * (Please read the note on the back first) (Fill in this page again)

-4- 1222653 A7 _ B7 V. Description of the invention (2) (Please read the precautions on the back before filling in this page) After the layer drifts, it is emitted through the surface electrode. Changes such as surface oxidation of the surface electrode can cause the efficiency of electron emission or the electron emission efficiency to deteriorate. Therefore, surface electrodes are typically made of chemically stable metals (for example, precious metals such as gold). In this case, the thickness of the surface electrode is set at about 10 nm. In the electron source, terms such as "diode current Ips" and "emission current (emission electron flow)" generally mean the current flowing between the surface and the lower electrode and the current flowing between the collector and the surface electrode, respectively. . The larger ratio of the emission current Ie to the diode current (Ie / Ips) provides a higher electron emission efficiency "(Ie / Ips) X 100 (%)". The above-mentioned electron source can emit electrons even if the DC voltage to be applied between the surface and the lower electrode is in a low range of about 10 to 20V. Therefore, the electron source can exhibit enhanced electron emission characteristics with low dependence on the degree of vacuum, and emit electrons stably without the occurrence of so-called burst phenomenon during electron emission. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the lower electrode of the electron source includes a semiconductor substrate having a resistivity close to the conductor, and an ohmic electrode formed on the back surface of the semiconductor substrate. Alternatively, the lower electrode includes an insulating substrate and a metal conductor layer formed on the insulating substrate. On the other hand, the electron source disclosed in Japanese Patent Laid-Open Publication No. 2001-126610 includes a surface electrode, and the surface electrode system partially contains a carbon region made of carbon or a carbon compound. This electron source can advantageously prevent excessive diode current Ips to provide enhanced electron emission efficiency. The conventional electron source described above is used in a vacuum-sealed state. In this regard, the assembly process of these electron sources involves the inclusion of vacuum-sealed paper standards for the application of Chinese National Standard (CNS) A4 (210X297 mm) -5- 1222653 A7 _____B7_ V. Description of the Invention (3) Process (preferably At a relatively high temperature of about 50 (TC), this process inevitably increases the resistance of the surface electrode and / or the lower electrode. The increased resistance makes it difficult to connect between the surface and the lower electrode and / or between the collector and the surface Appropriate application of voltage between the electrodes results in degraded electron emission characteristics (such as reduced emission current or electron emission efficiency). The surface electrode is a metal thin film. As in the aforementioned electron source, the thickness of the surface electrode is set to 10 nm. Usually The gold film used as a surface electrode involves sintering at 400t or higher temperature. The sintering caused will worsen the thickness uniformity and continuity of the film, thus increasing the resistance of the surface electrode and causing deteriorated electron emission characteristics. Tungsten and aluminum are known In order to sinter a metal with high resistance to this, however, if the surface electrode is made of tungsten or inscription, the surface of the electrode will suffer Oxidation, resulting in deteriorated electron emission efficiency. Similarly, the lower electrode has an increased resistance. The following factors are assumed to be the cause of the increased resistance. Metal sintering. The atoms (metal atoms) constituting the lower electrode are deposited on the lower electrode toward the lower electrode. The thickness of the lower electrode is reduced due to the thermal diffusion of the layer (for example, the electron transport layer). The film thickness of the lower electrode is reduced. The resistivity of the lower electrode is increased. In addition to the above-mentioned electron sources, there have been revealed electron sources that have been modified by field emission phenomena to emit electrons differently. For example, the 'disclosed electron source One has MIM (Metal-Absolute Paper Size Applicable to Chinese National Standard (CNS) A4 Specification (210X297mm) with Insulation Layer as Electron Transport Layer) Please read the notes on the back before filling in this page Printed by Employee Consumer Cooperatives 6-1222653 A7 B7 V. Description of the Invention (4) Marginal-metal structure. Another electron source has MIS (metal -Insulators-Semiconductors), MIS includes a semiconductor layer located between the electron transport layer and the lower electrode. When printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, it is necessary to provide increased emission current and enhance Electron emission efficiency to help reduce power consumption. In all of the above-mentioned electron sources, electrons are emitted through the surface electrode. Therefore, by reducing the energy loss caused by the electron scattering in the surface electrode, the electron emission efficiency can be increased. From then on From a viewpoint, it can be considered to reduce the thickness of the surface electrode without detrimental to the characteristics of the device. For example, Japanese Patent Laid-Open Publication No. 2001-243901 discloses an electron source that provides enhanced electron emission efficiency according to the above manner. In this electron source, the surface electrode includes a metal thin film portion having a flat surface, and a plurality of island-shaped protrusions protruding from the surface of the metal thin film portion, and the protrusions are formed continuously and integrally with the thin film portion. However, the individual metal convex portions of this electron source are connected to each other by the metal thin film portion, so the film thickness of the metal thin film portion will limit the lower resistance of the surface electrode 値. Therefore, even if an attempt is made to obtain the specific resistance of the surface electrode required for device characteristics, there are still disadvantages that the thickness of the metal thin film portion cannot be sufficiently reduced or the electron emission efficiency cannot be sufficiently enhanced. The description of the invention takes into account the problems of conventional electron sources. Therefore, an object of the present invention is to provide an electron source capable of suppressing deterioration of electron emission characteristics and obtaining enhanced thermal resistance. Another object of the present invention is to provide an electron source capable of suppressing For the resistance, please read the note on the back 2 pages. The paper size is applicable to Chinese National Standard (CNS) A4 (2ιχχ: 297 mm) 7- 1222653 A7 ___ B7 V. Description of the invention (5) Increase and obtain enhanced electron emission Characteristic electron source. To achieve the above object, according to one aspect of the present invention, an electron source (field emission type electron source) is provided, which includes a lower electrode, an electron transport layer, and a surface electrode. The electron transporting layer is formed on the lower electrode and is composed of a composite nano layer. The composite nano layer includes polycrystalline silicon and some nanocrystalline silicon adjacent to the grain boundary of the polycrystalline silicon. A surface electrode is formed on the electron transport layer. In this electron source, electrons passing through the electron transport layer are emitted through the surface electrode. At least part of the surface electrode and / or at least part of the lower electrode are made of a laminated structure conductive carbide or a laminated structure conductive nitride. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs Conductive carbides or conductive nitrides have a relatively high electrical conductivity, a relatively low work function, a melting point higher than that of precious metals, and excellent diffusion barrier properties. In addition, conductive carbides or conductive nitrides have better oxidation resistance than metals such as tungsten or aluminum. In the electron source of the present invention, at least part of the surface electrode and / or at least part of the electrode are powered down. The electrode is made of a laminated structure conductive carbide or a laminated structure conductive nitride. Therefore, compared to an electron source having a surface electrode composed of a metal thin film, the electron source of the present invention can provide enhanced surface electrode and / or lower electrode thermal resistance and suppress deterioration of electron emission characteristics. This will prevent the electron emission characteristics from being degraded by a pad process such as a vacuum sealing process. According to another aspect of the present invention, an electron source is provided, which includes a lower electrode, a surface electrode, and an electron transport layer. The electron transport layer is interposed between the lower electrode and the surface electrode to allow electrons to pass. Electrons passing through the electron transport layer are emitted through the surface electrode. The surface electrode is composed of a multilayer film containing a conductive carbide or a conductive nitride layer and a precious metal film. The surface electrode is formed with a paper size applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 1222653 A7 B7 V. Invention Note (6) The surface of some recesses to allow the multilayer film to have a locally reduced thickness. In this electron source, in a region where a surface electrode having a recess is formed, energy loss due to electron scattering is reduced compared to other regions. In addition, since the resistance of the surface electrode is substantially determined by the film thickness of a multilayer film composed of a conductive carbide layer or a conductive nitride layer and a precious metal layer, it is possible to enhance the electron emission characteristics and suppress an increase in resistance in the surface electrode. . BRIEF DESCRIPTION OF THE DRAWINGS The present invention will be more fully understood from the following detailed description in conjunction with the accompanying drawings, in which the same elements have the same reference numerals, wherein: FIG. 1 is a first embodiment according to the present invention Sectional view of the electron source. FIG. 2 is an explanatory diagram of general electron emission operations of the electron sources according to the first to fourth embodiments of the present invention. FIG. 3 is a diagram of the electron sources according to the first to fourth embodiments of the present invention. An explanatory diagram of a microelectron emission operation; FIGS. 4A to 4D are cross-sectional views of a process and a final product among the main steps in the process of manufacturing an electron source according to the first embodiment of the present invention; FIGS. 5A and 5B are respectively according to the present invention. A cross-section and an upper plan view of an electron source according to a second embodiment of the invention; FIGS. 6A to 6E are cross-sectional views during the process and finally generated in the main steps of the process of the electron source according to the second embodiment of the invention; FIG. 7 A cross-sectional view of an electron source according to a third embodiment of the present invention. The paper size is suitable for financial standards (CNS) A4 (210X297)---9- (Please read the precautions on the back before filling this page )

V1T Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed 1222263 A7 B7 V. Description of the Invention (7) »Figures 8A to 8D show the manufacturing process of an electronic source according to the third embodiment of the present invention A cross-sectional view of the main process in the process and the final product; Figure 9 is a cross-sectional view of an electron source according to a fourth embodiment of the present invention t Figures 10A to 10D are process steps of an electron source according to the fourth embodiment of the present invention A cross-sectional view of the manufacturing process and the final product in the main steps; and FIG. 11 shows the relationship between the current density and the voltage Vps before and after heat treatment in the electron source according to the fourth embodiment. Main component comparison table 1 Substrate 2 Lower electrode 3 Polycrystalline silicon layer 6 Electron transport layer 7 Surface electrode 7 a Conductive carbide or conductive nitride layer 7 b Precious metal layer 7 c Conductive nitride layer 7 d Metal layer 7 e Conductive carbide layer 7 f Precious metal layer 8 Recess 10 Electron source I Paper size Applicable to Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the notes on the back before filling this page)

-10- 1222653 A7 B7 V. Description of the invention (8) 1 0 a Electron source device 1 Ob Electron source device 2 1 Collector 5 1 Polycrystalline sand grain 5 2 Silicon oxide film 6 3 Silicon nanometer 6 4 Silicon oxide film DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT (First Embodiment) A first embodiment of the present invention will now be described. As shown in FIG. 1, an electron source 10 according to a first embodiment of the present invention includes a substrate 1 (for example, a glass substrate or a ceramic substrate) composed of an insulating substrate, a laminated conductive carbide, and a host formed on the substrate 1. Lower electrode 2 on one of the surfaces (diffusion surface). A semiconductor layer or an undoped polycrystalline silicon layer 3 is formed on the lower electrode 2. An electron transport layer 6 (strong field drift layer) composed of an oxidized porous polycrystalline silicon layer is formed on the polycrystalline silicon layer 3. Further, a surface electrode 7 made of a laminated conductive carbide is formed on the electron transporting layer 6. In the electron source 10, the surface electrode 7 and the lower electrode 2 are arranged to face each other, and an electron transporting layer 6 is interposed between the surface electrode 7 and the lower electrode 2. The thickness of the surface electrode 7 is set to 10 nm or less. Although the first embodiment uses an insulating substrate as the substrate 1 ', any other suitable semiconductor substrate such as a silicon substrate may be used as the substrate. This paper size applies to China National Standard (CNS) A4 (210X297 mm) (Please read the notes on the back before filling out this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Consumer Cooperatives -11-1222653 A7 B7 V. Invention Explanation (9) Outside 'Although in the first embodiment, the polycrystalline silicon layer 3 is inserted between the electron transport layer 6 and the lower electrode 2, the electron transport layer 6 can be directly formed on the lower electrode 2 without inserting the polycrystalline silicon layer. 3. In order to allow electrons to be emitted from the electron source 10, as shown in FIG. 2, the collector 21 may be disposed to face the surface electrode 7. Then, after the space between the surface electrode 7 and the collector 21 is evacuated to provide a vacuum space, a DC voltage Vps is applied between the surface electrode 7 and the lower electrode 2 so that the surface electrode 7 has At a higher potential, at the same time, a DC voltage is applied between the collector 21 and the surface electrode 7 so that the collector 21 has a higher potential than the surface electrode 7. By appropriately setting the DC voltages Vps and Vc, electrons are injected from the lower electrode 2 into the electron transport layer 6, and then, after drifting within the electron transport layer 6, are emitted through the surface electrode 7. The dotted chain line in FIG. 2 indicates the electron flow e_ emitted from the surface electrode 7. Electrons that reach the surface of the electron transport layer 6 can be regarded as hot electrons. Therefore, after easily tunneling the surface electrode 7, electrons will be emitted into the vacuum space. In the first embodiment, electrons pass through the electron transport layer 6 under the electric field between the lower electrode 2 and the surface electrode, and the electric field is induced when a voltage is applied between the lower and surface electrodes. The electric field caused when the surface electrode 7 has a higher potential than the lower electrode 2 causes electrons to move from the lower electrode 2 to the surface electrode 7 through the electron transport layer. In the electron source 10 according to the first embodiment, a larger proportion of the emission current Ie flowing between the collector 21 and the surface electrode 7 than the diode current Ips flowing between the surface electrode 7 and the lower electrode 2 (Ie / Ips), will provide higher electron emission efficiency. As shown in Figure 3, it can be assumed that the electronic transport layer 6 contains at least the paper size of the selected paper, which is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) (please read the precautions on the back before filling this page) V? Economy Printed by the Ministry of Intellectual Property Bureau's Consumer Cooperative Cooperative 1222653 A7 B7 V. Description of the Invention (10) A plurality of columnar polycrystalline silicon crystal grains 51 (semiconductor crystals) arranged on the main surface side of the substrate 1 taken out, each formed on the crystal grain 51 A thin silicon oxide film 52 on one surface, some nano-grade silicon nano-crystals 63 (semiconductor nano-crystals), and some silicon oxide films 64 interposed between the phase-half grains 51. Each silicon oxide film is formed on Each surface of the silicon nanocrystal 63 is composed of an insulating film having a film thickness smaller than a grain size of the silicon nanocrystal 63. That is, in the electron transport layer 6, each crystal grain has a porous surface, and the crystalline state is maintained in each central region of the crystal grains. Each of the crystal grains 51 extends in a direction perpendicular to the lower electrode 2 or a thickness direction of the lower electrode 2. In the electron source 10 according to the first embodiment, electron emission is generated according to the following model. A DC voltage Vps is applied between the surface electrode 7 and the lower electrode 2, so that the surface electrode 7 has a higher potential than the lower electrode 2, and a DC voltage Vc is applied between the collector 21 and the surface electrode 7, so that the collector 21 has a higher potential than the surface electrode 7. When the DC voltage Vps reaches a given threshold (critical threshold), electrons e · will be injected into the electron transport layer 6 from the lower electrode 2 under thermal excitation. At the same time, most of the electric field applied to the electron transport layer 6 acts on the silicon oxide film 64. Therefore, the injected electron e · is accelerated by a strong electric field acting on the silicon oxide film 64. Then, the electrons drift toward the surface electrode or in the direction of the arrow in FIG. 3, and pass through the region between the adjacent crystal grains 51 in the electron transport layer 6. After tunneling the surface electrode 7, electrons are emitted from the surface electrode 7 into the vacuum space. The electrons injected from the lower electrode 2 into the electron transport layer 6 are accelerated by the electric field acting on the silicon oxide film 64, and then, after drifting, are emitted through the surface electrode 7 with almost no scattering due to the silicon nanocrystal 63 (ballistic electrons) This paper size applies to Chinese National Standards (CNS) M specifications (210X297 mm) (Please read the precautions on the back before filling this page)-Packing. • Order printed by the Intellectual Property Bureau Staff Consumer Cooperatives of the Ministry of Economics-13-1222653 A7 B7 5. Description of the invention (彳 1) (Please read the precautions on the back before filling this page) Shooting phenomenon). In addition, the heat generated in the electron transport layer 6 can be released via the crystal grains 5 1. Therefore, during the electron emission, electrons can be stably emitted without the occurrence of a burst phenomenon. After the tunnel surface electrode 7 is easily tunneled, the electrons (thermoelectrons) reaching the surface of the electron transport layer 6 are emitted into the vacuum space. An electron source based on this principle is called a ballistic electron surface emitting device. As described above, the lower electrode 2 and the surface electrode 7 are made of a conductive carbide. In general, conductive carbides have a relatively high electrical conductivity and a relatively low work function. Conductive carbides also have higher melting points than precious metals such as gold and have good diffusion barrier properties. In addition, conductive carbides have better oxidation resistance than metals such as tungsten or aluminum. Conductive carbides having these characteristics include chromium carbide, molybdenum carbide, tungsten carbide, vanadium carbide, nickel carbide, niobium carbide, carbide, titanium carbide, hafnium carbide, and carbide. In consideration of thermal stability, work function, and reproducibility, it is preferable to use titanium carbide, zirconium carbide, or carbide. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs In the electron source 10 according to the first embodiment, the lower electrode 2 and the surface electrode 7 are made of laminated conductive carbide. Therefore, compared with an electron source having lower and surface electrons made of metal, the electron source according to the first embodiment can provide enhanced thermal resistance of the lower electrode 2 and the surface electrode 7 and suppress deterioration of electron emission characteristics. This will not only prevent the resistance of the lower electrode 2 and the surface electrode 7 from increasing due to a thermal process such as a vacuum sealing process, but also prevent sintering in the surface electrode 7, thereby avoiding unnecessary deterioration of the electron emission characteristics. In addition, the lower electrode 2 made of a conductive carbide can prevent individual atoms constituting the substrate 1 and the semiconductor layer 3 (the electron transport layer 6 in the case where the semiconductor layer 3 is omitted) from diffusing therebetween. Therefore, the substrate 1 and half of the paper size are in accordance with the Chinese National Standard (CNS) A4 specification (210X297 mm) -14-1222653 printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 5. Description of the invention (12) Conductor layer 3 ( The material of the electron transport layer 6) in the case where the semiconductor layer 3 is omitted may be selected from different substitutes. Similarly, the surface electrode 7 made of a conductive carbide can prevent individual atoms constituting the surface electrode 7 and the electron transport layer 6 from diffusing therebetween. Therefore, the materials of the surface electrode 7 and the electron transport layer 6 may be selected from different substitutes. In the first embodiment, both the lower electrode 2 and the surface electrode 7 are made entirely of a conductive carbide of a laminated structure. Alternatively, at least a part of each of the lower electrode 2 and the surface electrode 7 may be made of a laminated conductive carbide, and the remaining part may be made of, for example, Cr, W, Ti, Al, Cu, Au, Pt, or Mo Made of such metals; alloys containing this metal; or semiconductor materials such as polycrystalline silicon doped with impurities. In addition, either of the lower electrode 2 and the surface electrode 7 may lack a conductive carbide. For example, the lower electrode 2 is made by using a metal such as Cr, W, Ti, Al, Cu, Au, Pt, or Mo; an alloy containing the metal; or a semiconductor material such as polycrystalline silicon doped with impurities Or surface electrode 7. In this case, it is also possible to suppress the deterioration of the electron emission characteristics compared to the conventional electron source. When a glass substrate is used as the substrate 1, it can be selected from a quartz glass substrate, a non-alkali glass substrate, a low alkali glass substrate, or a soda lime glass depending on the process temperature. In the case of using a ceramic substrate, for example, the substrate 1 may be composed of an alumina substrate. The electron source according to the first embodiment can be used as an electron source for a display device. In this case, appropriate patterning of the lower electrode 2, the surface electrode 7, and the electron transport layer 2 can be appropriately selected. The process of the electron source 10 according to the first embodiment will be described below with reference to Figs. 4A to 4D. This paper size applies to China National Standard (CNS) A4 (210X29 * 7mm) (Please read the precautions on the back before filling this page)

-15- 1222653 A7 B7 V. Description of the invention (13) First, a lower electrode 2 composed of a conductive carbide layer is formed on one of the main surfaces of the substrate 1 by a sputtering method or other appropriate method. Then, on the main surface side of the selected substrate 1 (here, on the lower electrode 2), a semiconductor layer or an undoped polycrystalline silicon layer 3 is formed. Through the above steps, the structure shown in FIG. 4A is obtained. A method of forming a film as the conductive carbide layer of the lower electrode 2 will be described below. The polycrystalline silicon layer 3 is formed by different film forming methods such as a CVD method (for example, LPCVD method, plasma CVD method or catalyst CVD method), a sputtering method, or a CGS method (continuous grain silicon). After the undoped polycrystalline silicon layer 3 is formed, the porous region is placed through the anodizing process δ to a given depth of the polycrystalline sand layer 3. Through this step, a porous semiconductor layer or a porous polycrystalline silicon layer 4 is formed, thereby obtaining a structure as shown in FIG. 4B. In the anodizing process, the treatment solution used is an electrolytic solution composed of a mixture prepared by an aqueous solution containing 55 wt% hydrogen peroxide and ethanol at about 1: 1. The platinum electrode (not shown) and the lower electrode 2 are immersed in the treatment solution, and when the polycrystalline silicon layer 3 is irradiated with light, a voltage is applied between the platinum electrode and the lower electrode 2 with a fixed current to perform anodization to form a porous Polycrystalline silicon layer 4. The obtained porous polycrystalline silicon layer 4 includes polycrystalline silicon grains and silicon nanocrystals. Although a porous region is formed in a portion (to a given depth) of the polycrystalline silicon layer 3 in the first embodiment, the porous region may be formed in the entire polycrystalline silicon layer 3 (to a depth reaching the substrate 1). After the anodizing process is completed, the porous polycrystalline silicon layer 4 is oxidized through the anodizing process. Through this step, an electron-transporting layer composed of an oxidized porous polycrystalline silicon layer was formed, thereby obtaining a structure as shown in FIG. 4. In the oxidation process, for example, by the rapid heat treatment method, the size of the oxidized porous paper is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page) -¾ Economy Printed by the Consumer Cooperatives of the Ministry of Intellectual Property Bureau -16-1222653 A 7 B7 V. Description of the Invention (14) Polycrystalline silicon layer 4 to form an electron transport layer 6, the electron transport layer 6 includes crystal grains 51, silicon nanocrystals 63, and oxidation Silicon films 52 and 64 (refer to FIG. 3). (Please read the notes on the back before filling this page.) In the rapid heating method used for the oxidation process, a lamp annealing device is used. The furnace was kept in a 02 atmosphere. The substrate is heated from room temperature to a given oxidation temperature (for example, 90 (TC) at a specifically planned rate (for example, 8 (TC / sec)). The substrate is maintained only at the oxidation temperature for a given An oxidation time (for example, one hour) to perform a rapid thermal oxidation (RTO) process. Then, the substrate is cooled to room temperature. The oxidation process is not limited to a rapid acceleration method. For example, by using an electrolyte solution (for example, That is, 1 mole / L of H2S〇4, 1 mole / L of HN〇3, or aqua regia), and a fixed current was applied between the platinum electrode (not shown) and the lower electrode 2 to electrochemically The porous polycrystalline silicon layer 4 is oxidized to form an electron transporting layer including grain 51, silicon nanocrystals 63, and silicon oxide films 62 and 62. Printed after the formation of the electron transporting layer 6 by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economy In other words, a surface electrode 7 made of a conductive carbide layer is formed on the electron transport layer 6 by a sputtering method. Through this step, an electron source 10 as shown in FIG. 4D is obtained. The method for forming a film is described below. Film formation method for conductive carbide layer of surface electrode 7. The process of the electron source 10 according to the first embodiment can provide the electron source 10 with enhanced resistance and suppress deterioration of the electron emission characteristics. In the first embodiment, by Sputtering method to form a lower electrode 2 and a surface electrode 7 each composed of a conductive carbide layer. Usable sputtering methods include, for example, RF sputtering method, RF magnetron sputtering method, DC sputtering method, and DC magnetism. Select from different types of methods such as controlled tube sputtering method. In this case, the size of the conductive carbon paper is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) -17- 1222653 A 7 B7 V. Description of the invention ( 15) (Please read the precautions on the back before filling this page) The target made of metal oxide is formed by sputtering method to form a conductive carbide layer. These methods can provide conductive carbide with excellent stability and reproducibility, and provide High total workload, thereby reducing production costs and increasing the electron emission area of the electron source 10. In addition, existing sputtering equipment can be easily converted to equipment for forming a conductive carbide layer, which can be reduced Equipment investment and reduction of equipment cost. Therefore, an electron source 10 having enhanced thermal resistance and suppressing deterioration of electron emission characteristics can be provided at a lower cost. In addition, a conductive carbide layer can be formed at a relatively low process temperature. Ministry of Economic Affairs The film formation method for the conductive carbide layer printed by the employee property cooperative of the Intellectual Property Bureau is not limited to the above-mentioned sputtering method. For example, a vacuum evaporation method using a deposition source composed of a conductive carbide or a metal ( Pure metals) and carbon-containing gases (reactive gases) are used to form conductive carbides by reactive sputtering. Vacuum deposition or reactive sputtering can also provide excellent stability and reproducibility, and high productivity. Provide a conductive carbide layer to achieve reduced manufacturing costs and increase the electron emission area of the electron source 10. Therefore, the electron source 10 having enhanced thermal resistance and suppressing deterioration of the electron emission characteristics can be provided at a lower cost. In addition, a conductive carbide layer can be formed at a relatively low process temperature. In addition, when a conductive carbide layer is formed by a vacuum evaporation method, the existing vacuum evaporation equipment can be easily converted into a device for forming a conductive carbide layer, reducing equipment investment and reducing equipment costs. Since the conductive carbide has a high melting point, the EB (electron beam) vacuum evaporation method is one of the appropriate vacuum evaporation methods to be used. On the other hand, a reactive sputtering method using a target composed of a metal (pure metal) and a carbon-containing gas (reactive gas) can facilitate the control of the carbon concentration in the conductive material layer. That is, the paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) -18-1222653 A7 ____B7 V. Description of the invention (16) In the reactive sputtering method, the type of reaction gas or such as The mixing ratio of an inert gas such as Al * and a reaction gas containing carbon is used to control the carbon concentration in the conductive carbide layer to provide a conductive carbide layer having a desired carbon concentration. In addition, compared to carbide targets, pure metal targets with relatively high purity are readily available on the market. Therefore, compared with a sputtering method using a conductive carbide as a target, the reactive sputtering method can provide a conductive carbide layer containing a smaller amount of metal impurities, and therefore, it is possible to suppress a decrease in performance due to impurities. The film forming method for the conductive carbide layer further includes a metal film annealing method (for example, a titanium film, a chromium film, or a film) in a gas atmosphere including carbon. This method is beneficial to improve the purity and film quality of the conductive carbide layer. The film forming method for the metal film includes a CVD method, a vacuum evaporation method, and a sputtering method. Regarding productivity and film quality, it is preferable to use a DC magnetron sputtering method using Ar gas. For example, when H4 gas is used as a gas containing carbon, the metal film is annealed at a temperature of 1000 ° C to form a conductive carbide layer. Therefore, by the above-described film formation method for a conductive carbide layer, the method of annealing a metal film in a gas atmosphere containing carbon can provide a conductive carbide layer with excellent reproducibility and stability. This will enable a reduction in manufacturing costs and an increase in the electron emission area of the electron source 10. In addition, existing equipment (DC magnetron sputtering equipment or annealing equipment) can be easily transferred to equipment for forming a conductive carbide layer, thereby reducing equipment investment and equipment costs. Therefore, the electron source 10 having enhanced thermal resistance and suppressing deterioration of the electron emission characteristics can be provided at a lower cost. In addition, compared with the reactive sputtering method, defects due to electrical damage will be reduced, resulting in higher purity and film quality. This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read first Note on the back, please fill out this page again) • 1 ^^ · Order printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economy-19 · 1222653 A7 B7 V. The conductive carbide layer of the invention description (17). From the above viewpoint, the above-mentioned annealing method is particularly suitable for forming the lower electrode 2 in the ceramic substrate as the substrate 1. Alternatively, a conductive carbide layer can be formed by a CVD method. The CVD method can provide a conductive carbide layer with excellent reproducibility and stability and high productivity, reducing the manufacturing cost and increasing the electron emission area of the electron source 1 ·. Therefore, it is possible to provide an electron source 10 having enhanced thermal resistance and suppressing deterioration of electron emission characteristics at a lower cost. In addition, the CVD method is excellent in step masking performance. In the CVD method, an organic metal compound such as (C2H5) 2TiCl2 (titanium dichlorocene) can be used as a deposition source. However, in consideration of the stability of the sedimentary source itself, it is desirable to use a chloride such as titanium chloride, thallium chloride, or boron chloride. A mixed gas of hydrogen and a carbon atom-containing gas such as CH4 (methane), C3H8 (propane), C6H5CH3 (toluene), CC14 (carbon tetrachloride), or CH3OH (methanol) can be used as a reaction gas. Since the thermal CVD method involves a processing temperature of 60 ° C or higher, it is preferable to use a plasma CVD method capable of reducing the processing temperature. Multi-layer annealing composed of a metal film (for example, a titanium film) and a carbon film , Forming a conductive carbide layer. Or, annealing a film made of a mixture of metal (for example, titanium) and carbon to form a conductive carbide layer. These methods can provide conductive carbide with excellent reproducibility and stability. Layer, reducing the manufacturing cost and increasing the emission area of the electron source 10. Therefore, an electron source having enhanced thermal resistance and suppressing deterioration of the electron emission characteristics is provided at a lower cost. 10 In the first embodiment, the electron transport layer 6 is formed by It is made of oxidized porous polycrystalline sand layer. Alternatively, the electron transport layer 6 can be made of nitride porous polycrystalline silicon layer. The paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this Page) ····· Order printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs -20-1222653 A7 _____B7_ V. Description of the invention (18) It is composed of a crystalline silicon layer. In addition, the electron transport layer 6 may be composed of any other appropriate oxidized, nitrided, or oxynitride porous semiconductor layer. When the electron transport layer 6 is composed of a nitrided porous polycrystalline silicon layer, NH3 may be used. The rapid heating method of the gas is a nitriding treatment of the nitrided porous polycrystalline silicon layer 4 instead of the oxidation process using the rapid heating method of 02 gas to oxidize the layer 4. In addition, when the electron transport layer 6 is composed of an oxidized porous polycrystalline silicon layer The rapid heating method using a mixed gas of 0 2 gas and NH 3 gas can be used to oxidize the porous polycrystalline silicon layer 4 by nitrogen oxidation, instead of the rapid heating method using 0 2 gas to oxidize the layer 4 oxidation process. Here In the case, a silicon oxynitride film is formed to replace the silicon oxide films 52 and 64 ° in FIG. 3 (Second Embodiment) The second embodiment of the present invention will be described below. As shown in FIGS. 5A and 5B, according to the second embodiment, The electron source 10 of the embodiment includes a substrate 1 composed of an insulating substrate (for example, an insulating glass substrate or an insulating ceramic substrate), and an electron source device formed on one of the main surfaces of the substrate 1. 10a. The electron source device 10a includes a lower electrode 2 formed on the main surface of the selected substrate 1, a semiconductor layer or an undoped polycrystalline silicon layer 3 formed on the lower electrode 2, and a later-described electron transfer formed on the polycrystalline silicon layer 3. Layer 6, and a surface electrode 7 formed on the electron transport layer 6. Particularly, in the electron source device 10a, the surface electrode 7 and the lower electrode 2 are arranged to face each other, and the electron transport layer 6 is inserted on the surface and below Between the electrodes. The thickness of the lower electrode 2 is set to about 300nm, and the thickness of the surface electrode 7 is set to not more than 10nm. This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm)-'21 -(Please read the precautions on the back before filling this page) ·· Installation;; v * t »Printed by the Employees 'Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 1222653 Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economy A7 __B7 V. Description of the Invention (19) Although the second embodiment uses an insulating substrate as the substrate 1, any other suitable semiconductor substrate such as a silicon substrate may be used as the substrate 1, and the lower electrode 2 includes a semiconductor substrate and a semiconductor substrate. Conductive layer formed on a semiconductor substrate (for example, an ohmic electrode). In addition, although the polycrystalline silicon layer 3 is interposed between the electron transport layer 6 and the lower electrode 2 in the first embodiment, the electron transport layer 6 may be directly formed on the lower electrode 2 without inserting the polycrystalline silicon layer 3. The lower electrode 2 is made of a metal (for example, Mo, Cr, W, Ti, Ta, Ni, A1, Cu, Au, or Pt; an alloy containing the metal; or an intermetallic compound such as a metal silicide) Monolayer film. Alternatively, the lower electrode 2 may be composed of a multilayer film made of a metal. In addition, the lower electrode 2 may be made of a semiconductor material such as doped polycrystalline silicon. As described later, the polycrystalline silicon layer is subjected to an anodic treatment and an oxidation treatment to form an electron transport layer 6. Compared to the electron transport layer 6 in the first embodiment, the electron transport layer 6 in the second embodiment includes a crystal grain 51, a silicon oxide film 52, a sand nanocrystal 63, and a silicon oxide film 64 (see FIG. 3). . In the second embodiment, in regions other than the crystal grain 51, the silicon nanocrystal 63, and the silicon oxide films 52 and 64, an amorphous silicon region made of amorphous silicon or partially oxidized amorphous silicon is formed. . Therefore, the polycrystalline silicon and the nanocrystalline silicon 63 adjacent to the grain boundary of the polycrystalline silicon are mixed together in the electron transport layer 6. The surface electrode 7 is composed of a multilayer film having a conductive carbide or conductive nitride layer 7a deposited on the electron transport layer 6 and a precious metal layer 7b deposited on the conductive carbide or conductive nitride layer 7a. The surface of the multilayer film is formed with recesses 8 to allow the multilayer film to have a locally reduced thickness. Considering the thermal stability and reproducibility in the film formation process, it is better to use titanium carbide. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page. )

-22- 1222653 A7 B7 V. Description of the invention (20), chromium carbide, carbide carbide, titanium nitride, chromium titanate, nitride nitride, niobium nitride, tantalum nitride, etc. The precious metal layer 7b is made of a platinum precious metal. Although the precious metal is not limited to platinum, and the precious metal layer 7 may be made of gold or iridium, for example, it is preferable to use platinum in view of the reproducibility of the film formation process. In order to provide increased emission current and enhanced emission efficiency, it is necessary to reduce the thickness of the surface electrode 7. To achieve this, the thickness of the conductive carbide or conductive nitride layer 7a is set to not more than 4 nm, and the total thickness of the conductive carbide or conductive nitride layer 7a is set to not more than 10 nm. As described above, the surface of the surface electrode 7 is formed with some recessed portions 8. In a region having the recessed portion 8, the surface of the conductive carbide or conductive nitride layer 7a is exposed to the outside. That is, the depth of the recessed portion 8 is almost equal to the thickness of the precious metal layer 7b. However, for example, the depth of the recessed portion 8 may be less than about half the thickness of the precious metal layer 7b. In the electron source 10 or the electron source device 10a as a ballistic electron surface-emission type electron source according to the second embodiment, the steps or electron emission models of emitting electrons are the same as those of the electron source according to the first embodiment (see FIGS. 2 and 3) ). Therefore, compared with the electron source 10 according to the first embodiment, the electron source 10 according to the second embodiment exhibits an enhanced electron emission characteristic having a low degree of vacuum dependence and being free from sudden discovery phenomena, and thus can emit electrons stably. . As described above, in the electron source 10 according to the second embodiment, the surface electrode 7 is composed of a conductive carbide or conductive nitride layer 7a and a precious metal layer 7b, and a plurality of recesses 8 are formed on the surface of the multilayer film, allowing The multilayer film has a locally reduced thickness. Therefore, compared to other regions, the Chinese National Standard (CNS) A4 specification (210X297 mm) is applicable to the paper format of concave paper (please read the precautions on the back before filling this page) Printed by the Consumer Affairs Cooperative of the Property Bureau-23- 1222653 A7 B7 V. Description of the invention (21) (Please read the precautions on the back before filling this page) The area of the surface electrode 7 in Part 8 is due to the surface electrode 7 The energy loss caused by electron scattering is reduced. In addition, since the resistance of the surface electrode 7 is substantially determined by the film thickness of a multilayer film composed of a conductive carbide or conductive nitride layer 7a and a precious metal layer 7b, the electron emission characteristics can enhance and suppress the increase in the resistance of the surface electrode 7. . ~ V:; ... When using a glass-based substrate as the substrate 1, the glass substrate is appropriately selected from a quartz glass substrate, an alkali-free glass substrate, a low-alkali glass substrate, or a soda lime glass depending on the process temperature. In the case of using a ceramic substrate, for example, the substrate 1 may be composed of an alumina substrate. The electron source 10 according to the first embodiment can be used as an electron source for a display device. In this case, appropriate patterning of the lower electrode 2, the surface electrode 7, and the electron transport layer 2 can be appropriately selected. The manufacturing process of the electron source 10 according to the second embodiment will be described below with reference to Figs. 6A to 6E. The lower consumer electrode 2 composed of a metal film (for example, a molybdenum film) with a given film thickness (for example, about 300 nm) is first formed on a substrate made of a quartz glass substrate. 1 on one of the major surfaces. Then, an undoped polycrystalline silicon layer 3 having a given film thickness (for example, 1 · 5 // m) is formed on the lower electrode 2 to provide a structure as shown in FIG. 6A. For example, the lower electrode 2 is formed by a sputtering method or a CVD method. Alternatively, the lower electrode 2 may be formed by forming an undoped polycrystalline silicon layer and then doping an n-type impurity to the polycrystalline silicon layer by a thermal diffusion method, or by forming an undoped polycrystalline silicon layer and simultaneously doping A method of n-type impurities to a polycrystalline silicon layer (that is, a conductive polycrystalline silicon layer is directly formed on the substrate 1 without using an ion implantation method or a thermal diffusion method) to form the lower electrode 2. This paper size applies the Chinese National Standard (CNS) A4 specification (210 × 297 mm)-~ -24- 5 6 2 2 2 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 _ B7 V. Description of the invention (22) Use of doping The co-doping method performed simultaneously with film formation is a method for forming the lower electrode 2 without any loading and unloading operations. That is, the same film forming equipment can be used to continuously form the lower electrode 2 and the undoped polycrystalline silicon. Layer 3. The lower electrode 2 is not limited to the n-type polycrystalline silicon layer, and may be composed of a p-type polycrystalline silicon layer. In this case, a P-type impurity may be doped in undoped polycrystalline silicon. The undoped polycrystalline silicon layer 3 may be formed by, for example, a CVD method (for example, an LPCVD method, a plasma CVD method, or a catalyst CVD method), a sputtering method, a CGS method, or a method of depositing polycrystalline silicon and then annealing the non-crystalline silicon layer by laser. It is formed by different film formation methods such as crystalline silicon. After the undoped polycrystalline silicon layer 3 is formed, an anodizing process is performed to form a porous polycrystalline silicon layer 4, wherein polycrystalline silicon grains 51 (refer to FIG. 3), silicon nanocrystals 63 (refer to FIG. 3), and amorphous silicon Mix together. After this step, the structure shown in FIG. 6B is obtained. Subsequently, the procedure of performing the anodizing process will be the same as that of the first embodiment. After the anodizing process is completed, an oxidation process is performed to form an electron transporting layer 6 composed of a composite nanocrystal having a structure as shown in FIG. Through this step, the structure shown in FIG. 6C is obtained. In the oxidation process, for example, the porous polycrystalline silicon layer 4 is oxidized by a rapid heating method to form an electron transporting layer 6 (see FIG. 3) including crystal grains 51, silicon nanocrystals 63, and silicon oxide films 52 and 64. The procedure for performing the oxidation process is the same as that of the first embodiment. After the electron transport layer 6 is formed, for example, a conductive carbide or a conductive material having a given film thickness (appropriately selected in the range of 1 nm to 4 nm) is sequentially formed on the electron transport layer 6 via a sputtering method. The size of the nitrided paper is applicable to the Chinese National Standard (CNS) A4 (210X29? Mm) (Please read the precautions on the back before filling this page)

-25- 1222653 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (Z3) Physical layer 7a and precious metal layer 7b with a given film thickness (for example, 3 nm). Through this step, a multilayer composed of a conductive carbide or conductive nitride layer 7a and a precious metal layer 7b is formed, and a structure as shown in FIG. 6D is obtained. The method for forming the conductive carbide or conductive nitride layer 7a may be selected from, for example, a sputtering method (for example, RF sputtering method, RF magnetron sputtering method, DC sputtering method, DC magnetron sputtering). Method, or reactive sputtering method), vacuum deposition method, and CVD method. Alternatively, a conductive carbide or conductive nitride layer 7a is formed by a method of depositing a metal film on the electron transport layer 6 and annealing the metal film in a gas atmosphere containing carbon or nitrogen by a sputtering method or a vacuum evaporation method, Alternatively, a metal film is deposited on the electron transport layer 6 by a sputtering method or a vacuum evaporation method, and then carbon ions or nitrogen ions are implanted into the metal film to form a conductive carbide or conductive nitride layer 7a. The method for forming the precious metal layer 7b may be selected from, for example, a sputtering method (for example, RF sputtering method, RF magnetron sputtering method, DC sputtering method, or DC magnetron sputtering method), vacuum evaporation Different thin film formation methods such as plating method and CVD method. Then, through the heat treatment process, a plurality of recesses are formed on the multilayer composed of the conductive carbide or conductive nitride layer 7a and the precious metal layer 7b, and an electron source 10 having a structure as shown in FIG. 6E is obtained. In the heat treatment process, the multilayers are subjected to a temperature range of 30 in the nitrogen atmosphere (TC to 450 ° C for a period of time (for example, 15 minutes to 120 minutes). Therefore, the recess can be formed at a relatively low process temperature. Although here In the heat treatment process, the heat treatment is performed in a nitrogen atmosphere, but it can also be performed in any other appropriate inert gas atmosphere or in a vacuum. Available heat treatments include annealing using an electric furnace and annealing based on light irradiation (for example and In other words, the paper size of the paper is applicable to the Chinese National Standard (CNS) A4 specification (210'〆297 mm) (Please read the precautions on the back before filling this page)

-26- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economy 1222653 A7 _B7 V. Description of the Invention (24) Annealing) and Laser Annealing. According to the manufacturing process of the electron source 10 of the second embodiment, it is possible to facilitate the manufacture of the electron source 10 having the resistance increase in the surface electrode 7 and enhanced electron emission efficiency. In the second embodiment, as in the first embodiment, the oxidation process may be replaced by a nitriding process or a nitriding process. In the second embodiment, the electron transport layer 6 is composed of a composite nano crystal layer as shown in FIG. Alternatively, the electron transport layer 6 may be composed of an insulating layer made of, for example, Al203, SiCh, or the like. In this case, the electron source provided with the semiconductor layer can operate as an electron source having a MIS structure. On the other hand, an electron source without a semiconductor layer can operate as an electron source having a MIM structure. In any electron source, the electron emission characteristics can be improved by appropriately setting the thickness of the electron transporting layer. In addition, the process of forming the electron transport layer can be simplified. Third Embodiment As shown in FIG. 7, the electron source 10 according to the third embodiment includes a substrate 1 composed of an insulating substrate (for example, an insulating glass substrate or an insulating ceramic substrate), and a main body formed on the substrate 1. Electron source device 10a on one of the surfaces. The electron source device 10b includes a lower electrode 2 formed on the main surface of the selected substrate 1, a semiconductor layer or an undoped polycrystalline silicon layer 3 formed on the lower electrode 2, and electrons formed on the polycrystalline silicon layer 3 described later. A transport layer 6 and a surface electrode 7 formed on the electron transport layer 6. In the electron source device 10b, the surface electrode 7 and the lower electrode 2 are arranged to face each other, and the electron transfer layer 6 is in accordance with the Chinese National Standard (CNS) A4 specification (210X297 mm). (Please read the back first (Notes to fill out this page)

-27-1222653 A7 B7 V. Description of the invention (25) Between the surface and the lower electrode. The thickness of the lower electrode 2 is set to about 300 nm, and the thickness of the surface electrode 7 is set to not exceed 10 nm. Although the third embodiment uses an insulating substrate as the substrate '1, other suitable semiconductor substrates such as a silicon substrate may be used as the substrate 1, and the lower substrate 2 includes a semiconductor substrate and a conductive layer deposited on the semiconductor substrate (for example,' Ohm electrode). In addition, although the polycrystalline silicon layer 3 is interposed between the electron transport layer 6 and the lower electrode 2, the electron transport layer 6 can be directly formed on the lower electrode 2 without inserting the polycrystalline silicon layer 3. The lower electrode 2 is composed of a thin film made of the same metal as that of the lower electrode 2 of the electron source according to the second embodiment. As described later, the polycrystalline silicon layer is subjected to an anodizing treatment and an oxidation treatment to form an electron transport layer 6. Like the electron transport layer 6 in the first embodiment (refer to FIG. 3), the electron transport layer 6 in the third embodiment includes a signal 51, a silicon oxide film 52, a silicon nanocrystal 63, and a silicon oxide film 64, and Like the electron transport layer 6 in the second embodiment, the regions other than the grain 51, the silicon nanocrystal 63, and the silicon oxide films 52 and 64 are formed of amorphous silicon or partially oxidized amorphous silicon. Into an amorphous region. The surface electrode 7 is composed of a conductive nitride layer 7c deposited on the electron transport layer 6 and a metal layer 7d deposited on the conductive nitride layer 7c. The conductive nitride layer 7c is made of a conductive nitride composed of titanium nitride. In general, conductive nitrides have a relatively high electrical conductivity, a melting point higher than that of precious metals such as gold, and excellent diffusion barrier properties. In addition, conductive nitrides have better oxidation resistance than metals such as tungsten or aluminum. Can be used for the conductive nitride layer 7c with these characteristics. The size of this paper is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling out this page). Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs -28-1222653 A7 B7 V. Description of the Invention (26) Not limited to titanium nitride, and it can be chromium nitride, molybdenum nitride, tungsten nitride, vanadium nitride, Niobium nitride, giant nitride, chromium nitride, or nitrided. Considering thermal stability, work function, and reproducibility, it is preferable to use one of titanium nitride, chromium nitride, nitrided, niobium nitride, and nitride. The metal layer 7d is made of platinum, which is one of the precious metals. The material of the metal layer 7d is not limited to platinum, and the metal layer 7d may be made of other appropriate precious metals such as gold or iridium. However, platinum is particularly effective in ensuring thermal stability. In the surface electrode 7, the thickness of the conductive nitride layer 7c is set to not more than 4 nm, and the total thickness of the conductive nitride layer 7c and the metal layer 7d is set to not exceed 10 nm in order to suppress deterioration of the electron emission efficiency or Provides other advantages. In the electron source 10 or the electron source device 1 Ob, which is a ballistic electron surface-emission type electron source according to the third embodiment, the steps or electron emission model of emitting electrons are the same as those of the electron source 10 according to the first embodiment (refer to FIG. 2) And 3). Therefore, like the electron source 10 according to the first embodiment, the electron source 10 according to the third embodiment exhibits an enhanced electron emission characteristic having a low dependence on the degree of vacuum and no burst phenomenon, and thus can emit electrons stably. In the electron source 10 according to the third embodiment, the surface electrode 7 is a conductive nitride layer 7c made of a conductive nitride and deposited on the electron transport layer 6, and a metal layer 7d deposited on the conductive nitride layer 7c. Made up. As described above, the conductive nitride has a relatively high conductivity, a melting point higher than that of precious metals such as gold, excellent diffusion barrier properties, and oxidation resistance superior to metals such as tungsten or aluminum. In addition, the conductive oxide layer 7c applies the Chinese National Standard (CNS) A4 specification (210X297 mm) for the paper size of the metal layer (Please read the precautions on the back before filling this page). Printed by the Consumer Cooperative of the Property Bureau -29-1222653 A7 B7 V. Description of Invention (27) 7d has excellent adhesiveness. Therefore, the electron source 10 according to the third embodiment can provide an enhanced thermal resistance of the surface electrode 7 and suppress deterioration of the electron emission characteristics compared to an electron source having a surface electrode composed of a metal thin film. That is, according to the electron source 10 of the third embodiment, unnecessary sintering caused in the material of the surface electrode 7 in other cases can be suppressed to prevent deterioration of electron emission characteristics caused by thermal processes such as a vacuum sealing process . In addition, the surface electrode 7 composed of the conductive nitride layer 7c and the metal layer 7d can prevent individual atoms constituting the surface electrode 7 and the electron transport layer from diffusing therebetween. Therefore, the materials of the surface electrode 7 and the electron transport layer 6 may be selected from different substitutes. The surface electrode 7 may be formed of only a conductive carbide layer. Although the third embodiment uses a glass substrate as the substrate 1, the glass substrate may be replaced with any other appropriate substrate in the same manner as the second embodiment. The electron source 10 according to the third embodiment can also be used as the electron source of the display device in the same manner as the second embodiment. The process of the electron source 10 according to the third embodiment will be described below with reference to Figs. 8A to 8D. First, a lower electrode 2 made of a metal film having a given film thickness (for example, about 300 nm) is formed on one of the main surfaces of a substrate 1 made of a quartz glass substrate. Then, an undoped polycrystalline silicon layer 3 having a given film thickness (for example, 1.5 // m) is formed on the lower electrode 2 to provide a structure as shown in FIG. 8A. The procedure for forming the lower electrode 2 and the procedure for forming the undoped polycrystalline silicon layer 3 are the same as those of the second embodiment. After the formation of an undoped polycrystalline silicon layer 3, anodizing is performed. This paper is sized to the Chinese National Standard (CNS) A4 (210X297 mm) (please read the precautions on the back before filling this page). Printed by the Ministry of Intellectual Property Bureau Consumer Cooperatives -30- 5 6 2 2 2 A7 _ B7 V. Description of the invention (28) to form a porous polycrystalline silicon layer 4, of which polycrystalline silicon grains 51 (refer to Figure 3), silicon nanocrystals 63 (Refer to Figure 3) and amorphous silicon will be mixed together. Through this step, the structure shown in FIG. 8B is obtained. The procedure for performing anodizing is the same as that of the first embodiment. After the anodizing process is completed, an oxidation process is performed to form an electron transport layer 6 composed of a composite nano crystal layer having a structure shown in FIG. 3. Through this step, the structure shown in Fig. 8C is obtained. In the oxidation process, for example, the composite nanocrystal layer 4 is oxidized by a rapid heating method to form an electron transport layer 6 including a crystal grain 51, a silicon nanocrystal 63, and a silicon oxide film 52, 63 (refer to image 3). The procedure for performing the oxidation process is the same as that of the first embodiment. After the electron transport layer 6 is formed, for example, by sputtering, the electron transport layer 6 is sequentially formed to have a given film thickness (for example, 1 nm) of a conductive nitride layer 7c and a metal layer 7d having a given film thickness (for example, 3 nm). Through this step, a surface electrode 7 composed of a conductive nitride layer 7c and a metal layer 7d is formed, and an electron source 10 having a structure as shown in Fig. 8D is obtained. The process of the electron source 10 according to the third embodiment can provide an electron source which has enhanced thermal resistance and suppresses deterioration of electron emission characteristics. In the third embodiment, a conductive nitride layer 7c of the surface electrode 7 is formed by a sputtering method. The sputtering method that can be used may be selected from, for example, RF sputtering method, RF magnetron sputtering method, DC sputtering method, RF magnetron sputtering method, DC sputtering method, and DC magnetron sputtering method. A conductive nitride layer 7c is formed by a sputtering method using a target made of a conductive nitride. The present invention can be reproduced with excellent quality. The paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) (please read the precautions on the back before filling this page). Printed by Cooperatives-31-Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, printed 1222653 A7 B7 V. Description of the invention (29) Properties and stability and high productivity, providing a conductive nitride layer 7c with low surface roughness, reducing production costs And increase the electron emission area of the electron source 10. In addition, the existing sputtering equipment can be easily transferred to the equipment for forming the conductive nitride layer 7c, reducing equipment investment and equipment cost. Therefore, the electron source 10 having enhanced thermal resistance and suppressing deterioration of the electron emission characteristics can be provided at a lower cost. In addition, the conductive nitride layer 7c can be formed at a relatively low process temperature. The method for forming the conductive nitride layer 7c is not limited to the above-mentioned sputtering method. For example, conductive nitrogen can be formed by a vacuum evaporation method using a deposition source composed of conductive nitride, or a reactive sputtering method using a target composed of metal (pure metal) and a gas (reactive gas) containing nitrogen.化 层。 Chemical layer. The vacuum evaporation method or the reactive sputtering method can also provide a conductive nitride layer 7c having a low surface roughness with excellent reproducibility and stability and high productivity, reducing production costs and increasing the electron emission area of the electron source 10. Therefore, it is possible to provide an electron source 10 having enhanced thermal resistance and suppressing deterioration of electron emission characteristics at a lower cost. In addition, a conductive nitride layer can be formed at a relatively low process temperature. Furthermore, when the conductive nitride layer 7c is formed by the vacuum evaporation method, the existing vacuum evaporation equipment can be easily transferred to the equipment for forming the conductive nitride layer 7c, reducing equipment investment and reducing equipment cost. The reactive sputtering method using a target composed of a metal (pure metal) and a gas (reactive gas) containing nitrogen can easily control the nitrogen concentration in the conductive nitride layer 7c. That is, in the reactive sputtering method, a type of a reactive gas and a mixing ratio of an inert gas such as Ar and a reactive gas containing a nitrogen atom may be selected to control a nitrogen component in the conductive nitride layer 7c. Therefore, the size of this paper is in accordance with Chinese National Standard (CNS) A4 (210X297mm) " • 32-(Please read the precautions on the back before filling this page)

1222653 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 _ _B7___ V. Description of the invention (30) The radiographic method can provide a conductive nitride layer 7c whose nitrogen content is controlled to a desired level. Generally speaking, compared to nitride targets, pure metal targets with higher purity are widely available from the market. Therefore, compared with a sputtering method using a conductive nitride as a target, the reactive sputtering method can provide a conductive nitride layer 7c containing a smaller amount of metal impurities, and therefore, it is possible to suppress a decrease in performance due to impurities. Alternatively, the conductive nitride layer 7c may be formed via a CVD method. The CVD method can also provide a conductive nitride layer 7c with low surface roughness with excellent reproducibility and stability and high productivity, reducing production costs and increasing the electron emission area of the electron source 10. Therefore, it is possible to provide an electron source 10 having enhanced thermal resistance and suppressing deterioration of electron emission characteristics at a lower cost. In addition, the CVD method is excellent in step masking performance. Since the thermal CVD method typically involves a process temperature of 600 ° C or higher, it is preferable to use a plasma CVD method which can reduce the process temperature. In the step of forming the conductive nitride layer 7c, a metal film (for example, a titanium film) is deposited on the electron transport layer 6 by a vacuum evaporation method or a sputtering method, and then nitrogen ions are implanted into the metal film to form a conductive layer. Nitride layer 7c. This method can also provide a conductive nitride layer 7c having a low surface roughness with excellent reproducibility and stability. In addition, this method can reduce the roughness of the interface between the conductive nitride layer 7c and the metal layer 7b, reduce the production cost, and increase the electron emission area of the electron source 10. Therefore, the electron source 10 having enhanced thermal resistance and suppressing deterioration of the electron emission characteristics can be provided at a lower cost. In addition, the method can form the conductive nitride layer 7c at a relatively low process temperature, and can easily control the control of the conductivity in the conductive nitride layer 7c. This paper size applies to China National Standard (CNS) A4 (210X297 mm) (Please read the precautions on the back before filling this page)

33- 1222653 A7 B7 V. Description of the invention (31) Alternatively, in the step of forming the conductive nitride layer 7c, a metal film (for example, 'titanium') is deposited on the electron transport layer 6 through a vacuum evaporation method or a sputtering method. Film), and then subjecting the metal film to heat treatment in a gas atmosphere containing nitrogen to form a conductive nitride layer 7c. This method can also provide a conductive nitride layer 7c having a low surface roughness with excellent reproducibility and stability. In addition, this method can reduce the roughness of the interface between the conductive nitride layer 7c and the metal layer 7b, reduce the production cost, and increase the electron emission area of the electron source 10. Therefore, the electron source 10 having enhanced thermal resistance and suppressing deterioration of the electron emission characteristics can be provided at a lower cost. As in the case of the first embodiment, in the third embodiment, the oxidation process may be replaced by a nitriding process or a nitriding process. The lower electrode 2 may be formed to have a multilayer structure, and at least one layer may be formed as a conductive nitride layer. Conductive nitrides have relatively high electrical conductivity, higher melting points than precious metals such as gold, excellent diffusion barrier properties, and oxidation resistance superior to metals such as tungsten or aluminum. Therefore, compared with an electron source having a lower electrode 2 made of metal, the lower electrode 2 having a conductive nitride layer has enhanced thermal resistance and suppresses deterioration of the electron emission characteristics to prevent it from being caused by thermal processes such as a vacuum sealing process Deterioration of electron emission characteristics. In addition, since the lower electrode 2 is composed of a multilayer structure having at least one conductive nitride layer, the conductive nitride layer can provide enhanced thermal resistance of the lower electrode 2. In addition, another layer deposited on the conductive nitride layer may be configured to provide a lowered resistance of the lower electrode 2 and an enhanced adhesion between the lower electrode 2 and a layer forming an interface therewith. It should be understood that the entire lower electrode 2 may be composed of a conductive nitride layer. This paper size applies to China National Standard (CNS) A4 (210X297 mm) (Please read the precautions on the back before filling this page)

-/ T Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs-34- 1222653 A7 ___B7_ V. Description of the Invention (32) The conductive nitride layer used in the lower electrode 2 can be replaced with the conductive nitride layer 7c on the surface electrode 7 Made of the same material as the conductive nitride. In addition, the conductive nitride layer of the lower electrode 2 can be formed by the same method as the method of forming the conductive nitride layer 7 c of the surface electrode 7. (Fourth Embodiment) A fourth embodiment of the present invention will be described below. As shown in FIG. 9, the electron source 10 according to the fourth embodiment includes a substrate 1 composed of an insulating substrate (for example, an insulating glass substrate or an insulating ceramic substrate), and a lower electrode formed on one of the main surfaces of the substrate 1. 2. A semiconductor layer or an undoped polycrystalline silicon layer 3 is formed on the lower electrode 2. An electron transport layer 6 (strong field drift layer) composed of an oxidized porous polycrystalline silicon layer is formed on the polycrystalline silicon layer 3. In addition, a surface electrode 7 is formed on the electron transport layer 6. In particular, in the electron source 10, the surface electrode 7 and the lower electrode 2 are arranged to face each other, and the electron transport layer 6 is interposed between the surface and the lower electrode. The thickness of the surface electrode 7 is set to 12 nm or less. Although the fourth embodiment uses an insulating substrate as the substrate 1, any other suitable semiconductor substrate such as a silicon substrate may be used as the substrate 1. In addition, although the polycrystalline silicon layer 3 is interposed between the electron transport layer 6 and the lower electrode 2, the electron transport layer 6 can be directly formed on the lower electrode 2 without inserting the polycrystalline silicon layer 3. In the electron source 10 as a ballistic electron surface-emission type electron source according to the fourth embodiment, the electron emission step or the electron emission model is the same as the electron source according to the first embodiment (refer to Figs. 2 and 3). Therefore, compared to the electron source 10 according to the first embodiment, the electron source 10 according to the fourth embodiment exhibits the paper standard applicable to the Chinese National Standard (CNS) A4 (21 × 297 mm) -35- ( (Please read the precautions on the back before filling this page)--Ordered by the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by the Consumer Cooperatives 1222653 Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by the Consumer Cooperatives A7 B7 V. Description of the invention (33) Low vacuum dependence And enhanced electron emission characteristics free of sudden phenomena, and thus capable of emitting electrons stably. Although the fourth embodiment uses a glass substrate as the substrate 1, in the same manner as in the second embodiment, the glass substrate may be replaced by any other appropriate substrate. The electron source 10 according to the fourth embodiment can also be used as an electron source for a display device in the same manner as the second embodiment. The lower electrode 2 is made of a highly doped n-type polycrystalline silicon layer. However, the material of the lower electrode 2 is not limited to n-type polycrystalline silicon, and the lower electrode 2 may be made of a metal such as Cr, W, Ti, Al, Cu, Au, Pt, or Mo; an alloy containing this material; or an impurity doped other than the polymetal Made of miscellaneous semiconductors. The surface electrode 7 is composed of a conductive carbide layer 7e deposited on the electron transport layer 6 and a noble metal layer 7f deposited on the conductive carbide layer 7e. The conductive carbide layer 7e is made of a conductive carbide composed of chromium carbide. In general, conductive carbides have a relatively high electrical conductivity, a relatively low work function, a melting point higher than that of precious metals such as gold, and excellent diffusion barrier properties. In addition, conductive carbides have better oxidation resistance than metals such as tungsten or aluminum. The conductive carbide that can be used in the conductive carbide layer 7e having these characteristics is not limited to chromium carbide, and it may be chromium carbide, molybdenum carbide, tungsten carbide, vanadium carbide, niobium carbide, titanium carbide, or carbide. In consideration of thermal stability, work function, and reproducibility, it is preferable to use hafnium carbide, titanium carbide, and carbide. The precious metal layer 7f is made of platinum, which is one of the precious metals (that is, the precious metal layer 7f is made of a platinum layer having a laminated structure). However, the precious metal used is not limited to platinum, and the precious metal layer 7f may be made of any other appropriate precious metal such as gold or iridium. In addition, part of the valuable gold paper size applies to the Chinese National Standard (CNS) A4 specification (210X 297 mm) (Please read the precautions on the back before filling this page)

-36- 1222653 A7 B7 V. Description of the Invention (34) The metal layer 7f may be composed of a platinum layer having a laminated structure, and the remaining portion may be made of a precious metal different from platinum. In the surface electrode 7, the conductive carbide layer is preferably set at 4 nm or less, and the thickness of the precious metal layer 7f is preferably set at 8 nm or less. More preferably, the thickness of the conductive carbide layer 7e is set at 2 nm or less, and the thickness of the precious metal layer 7f is set at 4 nm or less to provide enhanced electron emission efficiency. In the electron source 10 according to the fourth embodiment, the surface electrode 7 is composed of a conductive carbide layer 7e made of a conductive carbide and a precious metal layer 7f made of a precious metal. As described above, conductive carbides have a relatively high electrical conductivity, a relatively low work function, a melting point higher than that of precious metals, excellent diffusion barrier properties, and oxidation resistance superior to metals such as tungsten or aluminum. In addition, the conductive carbide layer 7e has excellent adhesion to the precious metal layer 7f. Therefore, the electron source 10 according to the fourth embodiment can provide an enhanced thermal resistance of the surface electrode 7 and suppress deterioration of the electron emission characteristics, compared to an electron source having a surface electrode composed of a metal thin film. That is, the electron source 10 according to the fourth embodiment can suppress unnecessary sintering caused by the material in the surface electrode 7 in other cases to prevent deterioration of the electron emission characteristics caused by a thermal process such as vacuum sealing. In addition, the surface electrode 7 composed of the conductive carbide layer 7e and the noble metal layer 7f can prevent individual atoms constituting the surface electrode 7 and the electron transport layer from diffusing therebetween. Therefore, the materials of the surface electrode 7 and the electron transport layer 6 may be selected from different substitutes. Reference will be made to Figures 10 A to 10D below to explain that the paper size of the electric paper according to the fourth embodiment is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) -37- (Please read the precautions on the back before (Fill in this page) •• I install. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 1222653 A7 B7 V. Description of Invention (35) The process of subsource 10. (Please read the precautions on the back before filling this page) An undoped polycrystalline silicon layer with a given film thickness (for example, 1 // m) is first formed on one of the main surfaces of the substrate 1, by Ion implantation method or thermal burying, doping n-type impurities into the polycrystalline silicon layer to form a lower electrode 2 composed of a conductive polycrystalline silicon layer (n-type polycrystalline silicon layer). Then, an undoped polycrystalline silicon layer 3 having a given film thickness (for example, 1.5 // m) is formed on the main surface side of the selected substrate 1 (on the lower electrode 2) to provide, for example, Figure 10 A structure. The procedure for forming the undoped polycrystalline silicon layer 3 is the same as that of the second embodiment. When the lower electrode 2 is made of a metal such as Cr, W, Ti, Al, Cu, Au, pt, or Mo or an alloy containing the metal, for example, it can be formed by a sputtering method or a vacuum evaporation method. Lower electrode 2. After the undoped polycrystalline silicon layer 3 is formed, a porous region reaching a given depth of the polycrystalline silicon layer 3 is set by an anodizing process'. Through this step, a porous semiconductor layer or a porous polycrystalline silicon layer 4 is formed, and thus a structure as shown in FIG. 10B is obtained. The procedure for performing the anodizing process is the same as that of the first embodiment. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs After the anodization is completed, the porous polycrystalline silicon layer 4 is oxidized through an oxidation process. Through this step, an electron transport layer 6 composed of an anodized porous polycrystalline silicon layer is formed, thereby obtaining a structure as shown in FIG. 10C. In the oxidation process, for example, the porous polycrystalline silicon layer 4 is oxidized by a rapid heating method to form an electron transport layer including crystal grains 51, silicon nanocrystals 63, and silicon oxide films 52 and 64 (refer to FIG. 3). 6. The procedure for performing the oxidation process is the same as that of the first embodiment. After the electron transport layer 6 is formed, for example, by the sputtering method, the paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -38- 5 6 2 2 2 Staff Consumption of Intellectual Property Bureau of the Ministry of Economic Affairs Cooperative prints A7 ___B7_ 5. Description of the invention (36) A conductive carbide layer 7e and a precious metal layer 7f are sequentially formed. Through this step ', a surface electrode 7 composed of a conductive carbide layer 7e and a precious metal layer 7f is formed on the electron transport layer 6, thereby obtaining an electron source 10 having a structure as shown in Fig. 10D. The manufacturing process of the electron source 10 according to the fourth embodiment can provide the electron source 10 having enhanced thermal resistance and suppressing deterioration of electron emission characteristics. In the fourth embodiment, a conductive carbide layer 7e of the surface electrode 7 is formed by a sputtering method. A usable sputtering method can be selected from different types of methods such as an RF sputtering method, an RF magnetron sputtering method, a DC sputtering method, and a DC magnetron sputtering method. In this case, a conductive carbide layer 7e is formed by a sputtering method using a target composed of a conductive carbide. These methods can provide a conductive carbide layer 7e having a low surface roughness with excellent reproducibility and stability and high productivity, reduce the manufacturing cost, and increase the electron emission area of the electron source 10. In addition, the existing equipment can be easily transferred to the equipment for forming the conductive carbide layer 7e, reducing equipment investment and cost. Therefore, it is possible to provide an electron source 10 having enhanced thermal resistance and suppressing deterioration of electron emission characteristics at a lower cost. In addition, the conductive carbide layer 7e can be formed at a relatively low process temperature. The film forming method for the conductive carbide layer 7e is not limited to the above-mentioned sputtering method. For example, a conductive vapor deposition method using a deposition source made of conductive carbide or a reactive sputtering method using a target made of metal (pure metal) and a carbon-containing gas (reactive gas) can be used to form a conductive material. Carbide layer 7e. The vacuum evaporation method or the reactive sputtering method can also provide a conductive carbide layer with low surface roughness 7e with excellent reproducibility and stability and high productivity. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297) PCT) '" -39- (Please read the notes on the back before filling this page)

1222653 A7 B7 V. Description of the invention (37) ′ Reduce the manufacturing cost and increase the electron emission area of the electron source 10. Therefore, the electron source 10 having enhanced thermal resistance and suppressing deterioration of the electron emission characteristics can be provided at a lower cost. In addition, the conductive carbide layer 7e can be formed at a relatively low process temperature. In addition, when the conductive carbide layer 7e is formed by a vacuum evaporation method, the existing vacuum evaporation equipment can be easily transferred to the equipment for forming the conductive carbide layer 7e, reducing equipment investment and equipment cost. Since the conductive carbide has a high melting point, the vapor deposition method EB (electron beam) is a suitable vacuum evaporation method that can be used. On the other hand, a reactive sputtering method using a target made of a metal (pure metal) and a carbon-containing gas (reactive gas) can easily control the carbon concentration in the conductive carbide layer 7e. That is, in the reactive sputtering method, the type of the reaction gas or the mixing ratio of the inert gas such as Ar to the reaction gas containing carbon atoms can be appropriately selected to control the carbon concentration in the conductive material layer 7e to provide A carbon-concentrated conductive carbide layer 7e is required. In addition, when a reactive sputtering method is used, a required titanium carbide film, chromium carbide film, or carbonized film is formed at a substrate temperature of 150 to 50 ° C, which is relatively low. Generally speaking, compared with carbide targets, Pure metal targets with higher purity are widely available in the market. Therefore, compared with the sputtering method using conductive carbides as a target, reactive sputtering can provide a conductive carbide layer containing a smaller amount of metal impurities. 7e, thereby suppressing the decrease in performance due to impurities. Considering the uniformity and masking of the film thickness of the surface of the conductive carbide layer 7e of the conductive carbide layer 7e having a thickness of 4 nm or less as in the fourth embodiment. Performance, sputtering method, vacuum evaporation method or reactive sputtering method is more advantageous than other film forming methods for forming this conductive carbide layer. This paper size applies to Chinese National Standard (CNS) A4 specification (210X297 mm) (please first Read the precautions on the back and fill in this page.) !!, order, printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs -40-1222653 A7 B7 V. Description of the invention (38) (Please read the precautions on the back before completing this page In the fourth embodiment, the electron transporting layer 6 is composed of an oxidized porous polycrystalline silicon layer. Alternatively, the electron transporting layer 6 may be composed of a nitrided porous polycrystalline silicon layer or an oxidized porous polycrystalline silicon layer. In addition, the electron transporting layer 6 6 may be composed of any other appropriate oxidized, nitrided, or oxynitride porous semiconductor layer. The oxidized, nitrided, or oxynitrided methods and the features or advantages in these cases are described in the first embodiment. Referring to Fig. 11, the measurement results of the electron emission characteristics of the electron source 10 actually manufactured through the process according to the fourth embodiment before and after being subjected to heat treatment will be described. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs in this embodiment, A silicon substrate is used as the substrate 1, an n-type polycrystalline silicon layer is used as the lower electrode 2, an electron transport layer 6 (a strong field drift layer) is used as the oxidized porous polycrystalline silicon layer, and a chromium carbide layer is used as the conductive carbide layer 7e of the surface electrode 7. And a precious metal layer 7f using a platinum layer as the surface electrode 7. The thickness of the conductive carbide layer 7e is 2 nm, and the thickness of the precious metal layer 7f is The degree is 4 nm. A conductive carbide layer 7e is formed by an RF sputtering method using a chromium carbide target in an Ar gas atmosphere. The formation conditions of the conductive carbide layer 7e are described below;

Ar gas pressure: 0.5-7 Pa RF power density: 0.5 · 3.0 W / cm2%

Substrate temperature: 30-150 ° C where the data shown in Fig. 11 are obtained from an electron source having a conductive carbide layer 7e of chromium carbide formed under the following conditions. This paper size applies to China National Standard (CNS) A4 (210X297 mm) -41-1222653 A7

Ar gas pressure: about 1.3 Pa RF power density: about 1.7 W / cm2 Substrate temperature: about 5 (TC The formation conditions of the precious metal layer 7f are described below;

Ar gas pressure: about 0.7 Pa RF power density: about 0.6 W / cm2 substrate temperature: about 50 ° C The electron source 10 is introduced into a vacuum chamber (not shown) to measure the state shown in FIG. 2 The electron emission characteristics of the electron source 10. That is, the collector 21 is disposed to face the surface electrode 7. Then, a DC voltage Vps is applied between the surface and the lower electrode, so that the surface electrode 7 has a higher potential than the lower electrode 7, and another DC voltage Vc is applied between the collector and the surface electrode, so that the collector has a high voltage. To the surface electrode 7. Printed in Figure 11 by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs shows the measurement results of the electron emission characteristics in a vacuum chamber with a vacuum of 5x 1 (T5 Pa and a DC voltage of 1000 V). In FIG. 11, the horizontal axis means the DC voltage Vps, and the vertical axis means the current density. The symbol "A" means the current density of the diode current Ips in the state before the heat treatment. The symbol "B" means the The current density of the emission current Ie in the state before the heat treatment. The symbol "C" means the current density of the diode current Ips in the state after the heat treatment. The symbol "D" means the current density of the emission current Ie in the state after the heat treatment. The heat treatment is performed at a temperature of 400 t for one hour in an air atmosphere. As shown in FIG. 11, in the electron source 10 of this embodiment, neither the emission current Ie nor the emission efficiency is deteriorated by the heat treatment. In addition, in In this implementation, the paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) -42- 1222653 A7 ____ B7_ 5. In the example of the electron source 10 of the invention, the diode current Ips will be caused by heat. Li is reduced, the emission current Ie increases. This proves that the electron emission efficiency is improved. Although the invention has been described with reference to specific embodiments, it will be apparent to those skilled in the art that various modifications and changes can be made. It is not intended to limit the disclosure to the embodiments described herein, and the invention is limited only by the scope of the attached patent application and its equivalent scope. (Please read the precautions on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper is sized for the Chinese National Standard (CNS) A4 (210X297 mm) -43-

Claims (1)

1222653 Λ8 B8 C8 D8 VI. Patent application scope 1 1. A field emission type electron source, including: lower electrode; (please read the precautions on the back before filling this page) The electron transport layer is formed on the lower electrode and consists of A composite nano crystal layer composed of polycrystalline silicon and some nanocrystalline silicon at the grain boundary of the polycrystalline silicon; and a surface electrode formed on the electron transport layer, wherein the field emission type electron source is allowed to pass through the electron transport layer Of the electrons are emitted through a surface electrode, at least part of which is composed of a layered conductive carbide or a layered conductive nitride. 2. The field-emission electron source according to item 1 of the application, wherein the surface electrode includes a conductive carbide layer or a conductive nitride layer deposited on the electron transport layer, and a conductive carbide layer or a conductive nitrogen layer deposited on the surface electrode. Precious metal layer on the compound layer. 3. If the field emission type electron source of item 2 of the patent application scope, at least part of the precious metal layer is composed of a platinum layer having a layer structure. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 4. If the field emission type electron source of the second scope of the patent application, the conductive carbide layer or conductive nitride layer of the surface electrode has a thickness of 4 nm or less, and the The precious metal layer of the surface electrode has a precious metal layer of 8 nm or less. 5. The field emission electron source according to item 1 of the application, wherein the conductive carbide is titanium carbide, hafnium carbide or carbide, and the conductive nitride is molybdenum nitride, titanium nitride, chromium nitride or nitride. give. 6. — Seed field emission type electron source, including: This paper size is applicable to Chinese National Standard (CNS) A4 specification (210X297 mm) -44- 1222653 A8 B8 C8 D8 6. Patent application scope 2 Lower electrode; Surface electrode; and (Please read the precautions on the back before filling this page.) The electron transport layer is interposed between the lower electrode and the surface electrode to allow electrons to pass. The field emission electron source allows electrons passing through the electron transport layer to pass through the surface. Electrode emission, wherein the surface electrode is composed of a multilayer film including a conductive carbide layer or a conductive nitride layer and a precious metal layer, and the surface electrode has a surface formed with some recesses to allow the multilayer film to have a locally reduced thickness. 7. —A field emission type electron source, including: a lower electrode; an electron transporting layer formed on the lower electrode and composed of a composite nanocrystalline layer of polycrystalline silicon and some nanocrystalline silicon adjacent to a grain boundary of the polycrystalline silicon; And a surface electrode formed on the electron transport layer, wherein the field emission type electron source allows electrons passing through the electron transport layer to be emitted through the surface electrode, wherein at least part of the The lower electrode is made of a layered conductive carbide or a layered conductive nitride. 8. If the field emission electron source of item 7 of the patent application scope, wherein the conductive carbide is titanium carbide, chromium carbide or carbide, and the conductive nitride is molybdenum nitride, titanium nitride, nitride pin or nitride give. This paper size applies to China National Standard (CNS) A4 (210X297 mm) -45-