TW516352B - Manufacturing method for printed circuit board - Google Patents
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- TW516352B TW516352B TW90116793A TW90116793A TW516352B TW 516352 B TW516352 B TW 516352B TW 90116793 A TW90116793 A TW 90116793A TW 90116793 A TW90116793 A TW 90116793A TW 516352 B TW516352 B TW 516352B
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Description
516352 五、發明說明(l) 【發明領域_ 本f明係有關於一種多層印刷電路板製造方法。 【先前技術】 了:電路板通常係由一層導電材料(通常為銅或鍍有銲 錫= i承載於一絕緣材質(通常為玻璃纖維強化環 η製成的蕊層上形成。印刷電路板具有兩層導電電 路板。而為了容納更多電路二電層兩面者,稱為雙層電 ,導電電路夾早一電路板中,-般係將數 路夾δ又於介電層間而製成多層電路板。 夕層印刷電路板—般係以後述 内蕊層(例如以FR-4 f成)^ /成。百先,棱供一 面。之後,將_刻=要貼;f上下兩 層(例如預浸潰體(prepreg)導接者,將介電 成)交錯設於該具有導雷及導電電路(由銅箔形 -堆疊體,其中相:兩邊,而形成 體。然後,形成該多層印刷 之間至^设有一預浸^ 刻而形成所要之導電電㈣,再將· 片)之連接。最後,將兮换;^電子70件(例如半導體^ 體之樹脂材料而製得該堆疊加壓以固化該預浸潰 浸潰體以及銅箔的總層數_人曰,件(13们113七6)。該預 以及每一個银刻成所要電=二3蕊層上下兩邊的銅箱層 一般係利用四層或四層以、、’;泊層)係視所需而定,但 電路層之間的電性“係利:,:;:般而言,不同導電 (through-hole),並且/ 在層愿件上鑽出通孔 在该通孔塗覆-層導電金屬而達 P01-003.ptd 516352 五、發明說明(2) 成。 然而’就多層印刷電路板而言,通孔及其孔墊是限制線 路密度的主要因素之一。孔墊通常要比孔徑大〇· 2mm左 右’以補侦鑽孔偏差(drill misregistration)、層壓件 的%脹收縮(1 a in丨n a t e e x p a s丨0 n / s h r i n k a g e)和曝光設備 白、J% 脹收縮(photo ί〇〇]· expasion/shrinkage)。此外, 在多層構造中的内層通孔墊,由於其無法從外面看到,因 此更難控制位置關係,故孔墊要比孔徑大〇· 5 — 〇. 8mm左 右 因此’線路設計不易達到真正的高密度。 【發明概要】 u =此’本發明之主要目的在於提供一種多層印刷電路板 製造方法’其可克服或至少改善前述先前技術的問題。 根據本發明之多層印刷電路板製造方法,其主要包含將516352 V. Description of the invention (l) [Field of the Invention_ This invention relates to a method for manufacturing a multilayer printed circuit board. [Previous technology]: The circuit board is usually made of a layer of conductive material (usually copper or solder-plated = i) carried on a core layer made of an insulating material (usually a glass fiber reinforced ring η). A printed circuit board has two Layer conductive circuit board. In order to accommodate more circuits on both sides of the electrical layer, it is called double-layer electricity. The conductive circuit is clamped in the previous circuit board. Generally, a number of circuit clamps δ are placed between the dielectric layers to make a multilayer circuit. The printed circuit board of the evening layer-generally the inner core layer described later (for example, FR-4 f) ^ / Cheng. Baixian, edge for one side. After that, _ engraved = to be attached; f two layers above and below (for example Prepreg conductors (dielectrics) are staggered on the circuit with a lightning conductor and a conductive circuit (made of copper foil-stacked, with phases: both sides to form a body. Then, the multilayer printing is formed. There is a pre-dip etched between ^ and ^ to form the desired conductive electrode, and then connect the 片 piece. Finally, change the ;; 70 pieces of electronics (such as the resin material of the semiconductor ^ body) to make the stack Pressed to cure the total number of layers of the prepreg impregnated body and the copper foil 13 people 113 7 6). The pre- and each silver carved into the required electricity = two 3 copper layers on the upper and lower sides of the copper box layer generally use four or four layers (,, ;; poise layer) as required , But the electrical properties between the circuit layers are: "::: In general, different through-holes, and / drilled through holes in the layer wish, coated in this through-hole conductive metal And up to P01-003.ptd 516352 5. Description of the invention (2). However, as far as multilayer printed circuit boards are concerned, through holes and their hole pads are one of the main factors limiting the density of circuits. Hole pads are usually larger than the hole diameter. 〇 · 2mm 'to compensate for drill misregistration,% expansion and contraction of the laminate (1 a in nateexpas 丨 0 n / shrinkage) and exposure equipment white, J% expansion and contraction (photo ί〇〇) · Expasion / shrinkage). In addition, the inner layer through-hole pads in a multilayer structure are more difficult to control the positional relationship because they cannot be seen from the outside, so the hole pads are larger than the aperture by about 0.5-0.8 mm. Circuit design is not easy to achieve true high density. [Summary of the invention] u = this' The main object of the invention to provide a method for manufacturing a multilayer printed circuit board 'which may be overcome or at least ameliorate the aforementioned problems of the prior art. The method of manufacturing a multilayer printed circuit board according to the present invention, which mainly comprises
一第一基板利用錫球、柱狀銲錫突塊或異方性導電膠層 (anisotropic conductive adhesive film (ACF))固 並且電性連接至具有一開口的第二基板,藉此製得具有 槽或3D結構的多層印刷電路板。該第一基板之上表面設有 第一組接墊用以電性連接至一半導體晶片以及第二組接 墊,該第一基板下表面設有第三組接墊用以電性連接至一 外部印刷電路板,#中該第三組接墊係電性連接至第一組 接墊以及第二組接墊。該第二基板具有一組連接墊設於其 下表面。 值知庄思的是,該第一基板以及第二基板並非利用習知 的預浸潰體(Prepreg)以及熱壓合法彼此層壓結合。此A first substrate is fixed and electrically connected to a second substrate having an opening by using a solder ball, a columnar solder bump, or an anisotropic conductive adhesive film (ACF), thereby preparing a groove or 3D structured multilayer printed circuit board. The first surface of the first substrate is provided with a first group of pads for electrically connecting to a semiconductor wafer and the second group of pads, and the lower surface of the first substrate is provided with a third group of pads for electrically connecting to a For an external printed circuit board, the third group of pads in # is electrically connected to the first group of pads and the second group of pads. The second substrate has a set of connection pads disposed on a lower surface thereof. It is worth knowing that the first substrate and the second substrate are not laminated and bonded to each other by using a conventional Prepreg and a hot pressing method. this
第5頁 516352 五、發明說明(4) 氧柄月曰(fiberglass reinforced epoxy resin)製成之蕊 層(core layer)形成,藉此增加該多層印刷電路板丨〇〇之 機械強度。此外,用於本發明之基板可包含通孔 (through-hole)並且在該通孔塗覆一層導電金屬用以形成 同一基板内不同導電電路層之間的電性連接。另外,用於 本發明之基板表面較佳具有一層拒銲劑(s〇lder resist) (未示於圖中)覆蓋於其上,並且該拒銲層對應於接墊 (例如接墊1 l〇a、UOb、1 l〇c或連接墊12〇1))之位置係設 有開孔,使得接墊係裸露於該拒銲層。 然後將複數個錫球1 3 〇設於基板1 2 Q之連接墊丨2 〇 b或基板 11 0之第二組接墊11 〇 b。詳細言之,其可以下列步驟達 成:(a)將錫球130裝在一固定件(f ixture)上,該固定件 具有複數個孔其排列對應於所要之球格陣列;(b )將共晶 (eutectic)錫貧印在連接墊i2〇b或第二組接墊ii〇b上; (c )利用一真空吸頭’將排列在固定件上的錫球吸起县 轉移至位在金屬墊上的錫膏;然後(d)回焊(只熔該 錫貧)。 〜 接著’將基板1 2 0置於基板11 〇之上表面,使得該第一組 接墊110a係裸露於該開口i2〇a並且基板120之連接墊120b 係對齊於基板110之第二組接墊n〇b。此時,一基板上的 錫球係對齊設在另一基板上相對應的接墊,其中錫膏係已 先印在該接墊上。 然後’在另一次回焊製程中,錫膏會融化而在基板 Π 〇、1 2 0相對應的接墊之間形成銲錫黏接。 P01-003.ptd 五、發明說明(5) t參照第二圖,根據本發明第二較佳實施例之多層印 路板2 0 〇製造方法,其特徵在於該基2 〇 突塊:5。固定並且電性連接至基板n。。該柱狀銲錫 1 50車乂佳係先利用模板印刷(stenci丨γ inting)形成於基 = 120之連接墊1201}或基板11〇之第二組接墊u〇b,然後回 銲該銲錫突塊15〇,藉此將基板12〇固定並且電性接 板110。 设王丞 根據本發明第一以及第二較佳實施例之多層印刷電路板 製造方法,其較佳另包含一填膠製程。詳細言之,填膠 140係利用一自動化點膠系統(aut〇mated underfill、/ dispense system)將填膠材料點在基板11〇、12〇之間的間 隔(gap)邊緣。然後該填膠材料經由毛細作用吸到間隔内 而完成填膠製程。接著,將填膠製程之產物移至一填膠固 化爐(underfill curing oven)内,然後固化該填膠ho。 首先,形成複數個金屬突塊160在基板120之連接 參照第三圖,根據本發明第三較佳實施例之多層印刷電 路板3 0 0製造方法,其包含下列步驟:Page 5 516352 V. Description of the invention (4) A core layer made of fiberglass reinforced epoxy resin is formed, thereby increasing the mechanical strength of the multilayer printed circuit board. In addition, the substrate used in the present invention may include a through-hole and the through-hole is coated with a conductive metal to form an electrical connection between different conductive circuit layers in the same substrate. In addition, the surface of the substrate used in the present invention preferably has a layer of solder resist (not shown) covered thereon, and the solder resist layer corresponds to a pad (for example, a pad 1 l0a) , UOb, 1 10c or connection pad 1210)) is provided with an opening so that the pad is exposed on the solder resist layer. Then, a plurality of solder balls 1 30 are set on the connection pads 1 2 b of the substrate 1 2 Q or the second group of pads 11 0 b of the substrate 1 10. In detail, it can be achieved by the following steps: (a) the solder ball 130 is mounted on a fixture, the fixture has a plurality of holes, the arrangement of which corresponds to the desired ball grid array; (b) a total of Eutectic tin is printed on the connection pad i20b or the second set of pads ii〇b; (c) using a vacuum nozzle 'to suck the solder balls arranged on the fixed parts to the metal Solder paste on the pad; then (d) re-solder (melt the tin only). ~ Next 'Place the substrate 120 on the top surface of the substrate 110, so that the first group of pads 110a are exposed at the opening i20a and the connection pads 120b of the substrate 120 are aligned with the second group of substrates 110 Pad noob. At this time, the solder balls on one substrate are aligned with the corresponding pads on the other substrate, and the solder paste has been printed on the pads first. Then, in another re-soldering process, the solder paste will melt to form a solder bond between the pads corresponding to the substrate Π 0 and 120. P01-003.ptd V. Description of the invention (5) Referring to the second figure, the method for manufacturing a multilayer printed circuit board 200 according to the second preferred embodiment of the present invention is characterized in that the base 200 bumps: 5. It is fixed and electrically connected to the substrate n. . The columnar solder 150 is firstly formed by stencil printing on the connection pad 1201 of the base = 120 or the second set of pad u0b of the substrate 11, and then the solder bump is re-soldered. Block 150, whereby the substrate 120 is fixed and the board 110 is electrically connected. It is assumed that the method for manufacturing a multilayer printed circuit board according to the first and second preferred embodiments of the present invention preferably further includes an adhesive filling process. In detail, the underfill 140 uses an automated underfill (/ dispense system) to place the underfill material on the edges of the gap between the substrates 110 and 120. The glue filling material is then sucked into the space by capillary action to complete the glue filling process. Next, the product of the filling process is moved to an underfill curing oven, and the filling ho is then cured. First, a plurality of metal bumps 160 are formed on the substrate 120. Referring to the third figure, a method for manufacturing a multilayer printed circuit board 300 according to a third preferred embodiment of the present invention includes the following steps:
Si 120b。可以理解的是,該複數個金屬突塊丨6〇亦可形成在 基板11 0之第二組接墊11 〇 b上。該金屬突塊1 6 0較佳為利用 習知的打線技術(w i r e b ο n d i n g t e c h n i q u e )形成之柱狀突 塊(stud bump)。此外,該金屬突塊i6〇可利用習知的植球 技術(bumping technology)形成,其包含步驟(A)在基板 的複數個接墊上形成一突塊下金屬層(under bump metallurgy,UBM),例如以無電鍍鎳/ 金(eiectf〇iessSi 120b. It can be understood that the plurality of metal bumps 6o can also be formed on the second group of pads 11b of the substrate 110. The metal bump 1 60 is preferably a stud bump formed by a conventional wire bonding technique (wiir b ο n d i n g t e c h n i q u e). In addition, the metal bump i60 can be formed by using a conventional bumping technology, which includes step (A) forming an under bump metallurgy (UBM) on a plurality of pads of the substrate, E.g. electroless nickel / gold (eiectf〇iess
516352 五、發明說明(6)516352 V. Description of Invention (6)
Ni/Au)形成UBM ;以及(B)在UBM上形成金屬突塊,植球的 方式則有蒸錢、電鍍(electroplating)、印刷(printing) 等方法。 然後,將基板1 2 0利用一異方性導電膠層(a c F ) 1 7 0置於 基板11 0之上表面,使得該第一組接墊丨丨〇 a係裸露於該開 口 120a並且基板丨2〇之連接墊丨2〇b係對齊於基板11{)之第二 組接墊1 1 0 b。已知適合用以形成該異方性導電膠層1 7 〇的 異方性膠為一「z軸異方性膠」,其係被填入低濃度之導 電粒子170a,並且使得其在xy平面不會彼此接觸。因此, 在z方向壓縮該物質將建立一導電路徑。 接著,進行熱壓合製程(therm〇c〇mpressi〇n b〇nding) 後,使得基板120藉由異方性導電膠層17〇接合至基板 1 ίο,並且使得連接墊12013上的金屬突塊16〇藉由導電粒子 I 7 0 a電性連接至相對應之第二組接墊11 〇 ^。可以理解的是 異方|生導電膠層可以是熱塑性或熱固性。熱塑性異方性膠 係先被加熱軟化使用後再冷卻固化。熱固性異方性膠 加熱100 一 30 0。。,數分鐘至一小時或以上使其固化。餘 根據本發明之多層印刷電路板製造方法,由於基板 II 0、1 20係各自獨立製成並且測試完成後,再利用錫球、 柱狀銲錫突塊或異方性導電膠層彼此固定且電性連接,因 此基板1 1 0、1 2 0之間的電性連接不需要利用通孔 的問題。 請參照第四圖,其揭示利用本發明多層印刷電路板100Ni / Au) forms UBM; and (B) forms metal bumps on UBM, and the methods of planting balls include steaming, electroplating, and printing. Then, the substrate 1 2 0 is placed on the upper surface of the substrate 110 using an anisotropic conductive adhesive layer (ac F) 1 70 so that the first group of pads 丨 丨 〇a is exposed at the opening 120a and the substrate The connecting pads of 2o 2b are aligned with the second set of pads 1 1 0 b of the substrate 11 {). An anisotropic adhesive suitable for forming the anisotropic conductive adhesive layer 170 is known as a "z-axis anisotropic adhesive", which is filled with conductive particles 170a at a low concentration and placed on the xy plane. Will not touch each other. Therefore, compressing the substance in the z direction will establish a conductive path. Next, after performing a thermocompression process (thermoccmpressio), the substrate 120 is bonded to the substrate 1 through the anisotropic conductive adhesive layer 17o, and the metal bump 16 on the connection pad 12013 is made. 〇 is electrically connected to the corresponding second group of pads 11 through conductive particles I 7 0 a. It can be understood that the anisotropic | green conductive adhesive layer can be thermoplastic or thermosetting. The thermoplastic anisotropic rubber is first heated and softened and then cooled and solidified. Thermosetting anisotropic adhesive Heat 100 to 300. . It can be cured for several minutes to one hour or more. According to the manufacturing method of the multilayer printed circuit board of the present invention, since the substrates II 0 and 120 are independently made and tested, the solder balls, columnar solder bumps, or anisotropic conductive adhesive layers are used to fix and electrically connect each other. Because of the electrical connection, the electrical connection between the substrates 110 and 120 does not require the use of a via. Please refer to the fourth figure, which discloses the use of the multilayer printed circuit board 100 of the present invention.
516352 五、發明說明(7) 2成,半導體晶片#裝構&,其主要包含一晶片18〇承載 於孩夕層印刷電路板1 0 0。該晶片1 8 〇係利用一晶片接著膠 (die attach material)設於該多層印刷電路板日工日⑽之凹夕 部,然後利用打線機將銲線(例如金線)接合至晶片丨8〇 之晶片銲墊以及第一組接墊110a。然後,利^習:的傳遞 杈塑法(transfer molding)將晶片180密封於一封膠體182 内。可以理解的是封膠體182亦可利用頂團製程(gl〇卜ΐ〇ρ process)形成。根據本發明第四圖之半導體晶片封裝構造 雖以多廣印刷電路板1 〇〇作為較佳實施例,但根據本發明 之多晶片封裝構造亦可利用多層印刷電路板2 0 0或3 〇 〇。 請參照第五圖,其揭示利用本發明多層印刷電路板丨0〇 形成之多晶片封裝構造,其特徵在於另包含一晶片ΐ9θ承 載於一多層印刷電路板4 〇 〇之凹部,其中該多層印刷電路 板40 0係利用錫球固定並且電性連接至多層印刷電路板 1 00。可以理解的是,該多層印刷電路板4〇〇亦可利用柱狀 銲錫突塊或異方性導電膠層(ACF)固定並且電性連接^^ 層印刷電路板100。較佳地,該晶片180、190係可各 立封裝並且測試完成後,再將多層印刷電路板4 〇 〇安裝至 多層印刷電路板100。 根據本發明之晶片封裝構造係可以利用錫球安裝於一外 部基板,例如一印刷電路板。可以理解的是,封裝構造底 部之接墊亦可先印上錫膏(solder paste),再安裝至外部 基板。 雖然本發明已以前述較佳實施例揭示,然其並非用以限516352 V. Description of the invention (7) 20%, the semiconductor wafer # assembly & mainly includes a wafer 180 which is carried on a child-layer printed circuit board 100. The wafer 1 800 is provided with a die attach material on the concave portion of the multi-layer printed circuit board, and then a wire bonding machine (such as a gold wire) is bonded to the wafer. 8 Wafer pads and a first set of pads 110a. Then, the transfer molding method seals the wafer 180 in a colloid 182. It can be understood that the sealant 182 can also be formed by a glOb process. Although the semiconductor chip package structure according to the fourth figure of the present invention takes a multi-layer printed circuit board 1000 as a preferred embodiment, the multi-chip package structure according to the present invention can also utilize a multilayer printed circuit board 2000 or 300. . Please refer to the fifth figure, which discloses a multi-chip package structure formed by using the multilayer printed circuit board of the present invention, which is further characterized by including a wafer ΐ9θ recessed in a multilayer printed circuit board 400, wherein the multilayer The printed circuit board 400 is fixed with a solder ball and electrically connected to the multilayer printed circuit board 100. It can be understood that the multilayer printed circuit board 400 can also be fixed and electrically connected to the printed circuit board 100 with a columnar solder bump or an anisotropic conductive adhesive layer (ACF). Preferably, the chips 180 and 190 can be individually packaged and tested, and then the multilayer printed circuit board 400 is mounted on the multilayer printed circuit board 100. The chip package structure according to the present invention can be mounted on an external substrate, such as a printed circuit board, using solder balls. It can be understood that the pads at the bottom of the package structure can also be printed with solder paste before being mounted on the external substrate. Although the present invention has been disclosed in the foregoing preferred embodiments, it is not limited thereto
P01-003.ptd 第10頁 516352 五、發明說明(8) 定本發明,任何熟習此技藝者,在不脫離本發明之精神和 範圍内,當可作各種之更動與修改。因此本發明之保護範 圍當視後附之申請專利範圍所界定者為準。P01-003.ptd Page 10 516352 V. Description of the invention (8) Anyone skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the protection scope of the present invention shall be determined by the scope of the attached patent application.
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TW90116793A TW516352B (en) | 2001-07-06 | 2001-07-06 | Manufacturing method for printed circuit board |
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TW90116793A TW516352B (en) | 2001-07-06 | 2001-07-06 | Manufacturing method for printed circuit board |
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Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW90116793A TW516352B (en) | 2001-07-06 | 2001-07-06 | Manufacturing method for printed circuit board |
Country Status (1)
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TW (1) | TW516352B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102625564A (en) * | 2011-01-28 | 2012-08-01 | 大自达电线股份有限公司 | Shielded type printed circuit board |
TWI468086B (en) * | 2012-11-07 | 2015-01-01 | Universal Scient Ind Shanghai | Electronic device, system package module and method of manufactoring system package module |
CN104885578A (en) * | 2013-02-26 | 2015-09-02 | 大自达电线股份有限公司 | Reinforcing member for flexible printed wiring substrate, flexible printed wiring substrate, and shield printed wiring substrate |
-
2001
- 2001-07-06 TW TW90116793A patent/TW516352B/en not_active IP Right Cessation
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102625564A (en) * | 2011-01-28 | 2012-08-01 | 大自达电线股份有限公司 | Shielded type printed circuit board |
TWI501708B (en) * | 2011-01-28 | 2015-09-21 | Tatsuta Densen Kk | Shielded printed circuit boards |
CN102625564B (en) * | 2011-01-28 | 2016-05-04 | 大自达电线股份有限公司 | Shielded printed circuit board |
TWI468086B (en) * | 2012-11-07 | 2015-01-01 | Universal Scient Ind Shanghai | Electronic device, system package module and method of manufactoring system package module |
CN104885578A (en) * | 2013-02-26 | 2015-09-02 | 大自达电线股份有限公司 | Reinforcing member for flexible printed wiring substrate, flexible printed wiring substrate, and shield printed wiring substrate |
US9736924B2 (en) | 2013-02-26 | 2017-08-15 | Tatsuta Electric Wire & Cable Co., Ltd. | Reinforcing member for flexible printed wiring board, flexible printed wiring board, and shield printed wiring board |
TWI599274B (en) * | 2013-02-26 | 2017-09-11 | 大自達電線股份有限公司 | Reinforcing member for flexible printed wiring board, flexible printed wiring board, and shield printed wiring board |
US9867280B2 (en) | 2013-02-26 | 2018-01-09 | Tatsuta Electric Wire And Cable Co., Ltd. | Reinforcing member for flexible printed wiring board flexible printed wiring board, and shield printed wiring board |
CN104885578B (en) * | 2013-02-26 | 2018-05-04 | 大自达电线股份有限公司 | Flexible printed circuit board reinforcement part, flexible printed circuit board and shielding printed wiring board |
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