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TW447097B - Photosensitive semiconductor packaging process for preventing flashing - Google Patents

Photosensitive semiconductor packaging process for preventing flashing Download PDF

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Publication number
TW447097B
TW447097B TW089108879A TW89108879A TW447097B TW 447097 B TW447097 B TW 447097B TW 089108879 A TW089108879 A TW 089108879A TW 89108879 A TW89108879 A TW 89108879A TW 447097 B TW447097 B TW 447097B
Authority
TW
Taiwan
Prior art keywords
packaging process
module
base
support block
guide
Prior art date
Application number
TW089108879A
Other languages
Chinese (zh)
Inventor
Jian-Ping Huang
Original Assignee
Siliconware Precision Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siliconware Precision Industries Co Ltd filed Critical Siliconware Precision Industries Co Ltd
Priority to TW089108879A priority Critical patent/TW447097B/en
Application granted granted Critical
Publication of TW447097B publication Critical patent/TW447097B/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

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  • Packaging Frangible Articles (AREA)

Abstract

A photosensitive semiconductor packaging process for preventing flashing which can be used to package a photosensitive semiconductor chip, such as an image sensor chip or an UV sensing programmable ROM chip; and, during the molding process of the packaging encapsulation, it can prevent the flashing effect on the lead frame. The packaging process is characterized of using a support block with specific structural shape; and, in accordance with the mold used in the molding process, it can air-tightly clip the portion for bonding the chip and welding the wires on the lead frame; therefore, it can prevent the flashing effect on these portions of the lead frame. Comparing to the conventional techniques, because the packaging process of the present invention needs no expensive organic polymer spraying material and cleaning solvent to remove the flashing, it can have better cost efficiency and environmental protection effect.

Description

447097 Α7 Β7 五、發明說明(1) [發明領域] 本發明係有關於一種半導體封裝技術,特別是有關於 一種可防止溢膠的感光式半導體封裝製程,其可用以封裝 一感光式之半導趙晶片,例如為一影像感測器晶片或一可 感應紫外光之可程式化唯讀記憶體斤16<^1^31丨丫-Programmable Read-Only Memory,EPROM)晶片,並可於封 裝膠體之模鑄製程中,防止導腳架上產生溢膠現象。 [發明背景] 半導體封裝技術可將一或多個半導體晶片容納於單一 之封裝膠體中,以便於將晶片整合至印刷電路板上。一般 而言,封裝膠體大多是採用不透光之樹脂材料製成》但對 於感光式之晶片而言,例如為影像感測器晶片或可威應紫 外光之可程式化唯讀記憶體晶片,便有必要讓所封裝之晶 片能夠感測到外部光線。因此感光式晶片便須採用一種特 殊之封裝技術來作封裝》習知技術上常用的一種感光式晶 片封裝方法為首先形成一具有中心空洞部分的封裝膠體; 接著透過此中心空洞部分來進行黏晶及導線銲接製程;最 後再將一透明蓋片固接至此中心空洞部分的開口上,即完 成感光式晶片的封裝β被封裝的感光式晶片即可透過此透 明蓋月而感測到外部光線。 .然而上述之感光式半導體封裝製程的一項製程問題在 於進行封裝膠體之模鑄時,容易在導腳架上用來黏置晶片 及銲接導線的部位上產生溢膠現象,致使後續之晶片黏置 及導線銲接產生品質不佳之結果。此製程問題目前已有許 本紙張又度適用中國國家標準(CNS)A4規格(210 X 297公釐) <請先聞讀背面之注意事項再填寫本頁)447097 Α7 Β7 V. Description of the Invention (1) [Field of Invention] The present invention relates to a semiconductor packaging technology, and in particular, to a photosensitive semiconductor packaging process capable of preventing overflow, which can be used to package a photosensitive semiconductor Zhao chip, for example, is an image sensor chip or a programmable read-only memory (EPROM) chip that can sense ultraviolet light and can be packaged with gel. During the mold casting process, the occurrence of glue overflow on the guide leg is prevented. [Background of the Invention] Semiconductor packaging technology can accommodate one or more semiconductor wafers in a single packaging gel to facilitate the integration of the wafer onto a printed circuit board. Generally speaking, the packaging colloids are mostly made of opaque resin materials. But for photosensitive wafers, such as image sensor wafers or programmable read-only memory chips that can withstand ultraviolet light, It is necessary for the packaged chip to be able to sense external light. Therefore, a photosensitive wafer must use a special packaging technology for packaging. A photosensitive wafer packaging method commonly used in the conventional technology is to first form a packaging colloid with a central cavity portion; then stick the crystal through this central cavity portion. And wire welding process; finally, a transparent cover sheet is fixed to the opening of the central hollow part, and the packaging of the photosensitive chip is completed. The encapsulated photosensitive chip can sense external light through the transparent cover. However, one of the manufacturing process problems of the above-mentioned photosensitive semiconductor packaging process is that during the molding of the packaging colloid, it is easy to cause an overflow of glue on the portion of the guide frame used to adhere the chip and the solder wire, resulting in subsequent wafer adhesion. Placement and wire bonding produce poor quality results. This process problem has already been approved. This paper is also applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) < Please read the precautions on the back before filling this page)

^ n H I a— It.^-OJ n n i n I I 經濟部智慧財產局員工消费合作社印製 15975 經濟部智慧財產局員工消費合作社印製 2 Α7 Β7 五、發明說明(2 ) 多的解決方法’例如美國專利第5,070,041號“METHOD OF RE 10VING FLASH FROM A SEMICONDUCTOR LEADFRAME USING COATED LEADFRAME AND SOLVENT”。此美國專利所揭露之解決方法為首先在導腳 架上用來黏置晶片及銲接導線的部位上塗佈上一層有機高 分子材料;接著在完成封裝膠體之模鑄後,便可利用一特 殊之清洗溶劑將此有機高分子塗佈層連同其上之溢膠一起 清洗掉。 然而上述之專利封裝方法卻有以下數項缺點。第一項 缺點為有機高分子塗佈材料及清洗溶劑的使用成本極高, 且執行程序上亦頗為複雜,因此並不具有使用上之成本效 益a第二項缺點為所採用之清洗溶劑亦可能易於對導腳架 造成侵蝕性破壞,因此有產品可靠性之顧慮β第三項缺點 為所採用之清洗溶劑易於造成環境污染,因此並不具有環 保效益。 [發明概述] 鑒於以上所述習知技術之缺點,本發明之主要目的便 是在於提供一種新穎之感光式半導體封裝製程,其可防止 導腳架上產生溢膠現象,但無需採用高成本及污染性之有 機高分子塗佈材料及清洗溶劑,以使得使用上具有較高之 成本效益及環保效益。 本發明之另一目的在於提供一種新穎之感光式半導體 封裝製程’其可使得製成之半導體封裝成品具有更高之產 品可靠性。 本紙張尺度適用中國國家標準(CNS)A4規烙(210 X 297公t ) 15975 -------------裝--------訂·--------線 (請先閱讀背面之注意事項再填寫本頁) 447097 A7 經濟部智慧財產局員工消費合作社印製 B7 五、發明說明(3) 根據以上所述之目的’本發明即提供了一種新穎之感 光式半導體封裝製程。本發明之半導體封裝製程包含以下: 步驟:(1)預製一導腳架’其具有一黏晶座及一導聊部;(2) 頓製一電絕緣性之支撐塊體,其具有一平坦之上表面,且 其具有一預定寬度和一預定高度;(3)預製一模具組,其包 括一上插入式模塊(Inserted mold)及一下空穴式模塊 (Cavity mold);其中該上插入式模塊形成有一邊牆空六結 構’而該下空穴式模塊則形成有一底座空穴結構,且該底 座空穴結構之深度大致等於該支撐塊體之高度:(4)將該支 撐塊體置入(Drop-in)於該下空穴式模塊之底座空穴結構 中’再接著將該導腳架之整個黏晶座及導腳部内端放置於 該支樓塊艘之上表面上,(5)將該上插入式模塊向下壓置於 該導腳架之上方,致使該導腳架之整個黏晶座及導腳部内 端被氣密地夾緊於該支撐塊體與該上插入式模塊之間;(6) 進行一模鑄製程,藉以將一模鑄材料填入至該上插入式模 塊之邊牆空穴結構,並同時填入至該下空穴式模塊之底座 空穴结構中未為該支撐塊體所佔據之空洞部分’藉此而形 成一封裝膠體.該封裝膠體具有一上部邊牆部分及一下部 底座部ΛΤ其中該上部邊牆部分區隔出一令心空洞部分作 為晶片黏置及導線銲接之區域’而該下部底座部分則用以 封裝該支撐塊體;(7)將該上插入式模塊及該下空穴式模塊 移除;(8)進行一黏晶製程’藉以將至少一半導體晶片透過 該封裝膠艘之上部邊牆部分之中心空洞部分而黏貼至該導 腳架之黏晶S上;(9)進行一導線銲接製程,藉以利用一導 私紙張^適用宁國國家標準(CNS)A4規格-(21〇 X 297公爱)------— 3 15975 <請先閲讀背面之注意事項再填寫本頁) -!----- 丨訂-------. — 線丨h-------- A7 A7 經濟部智慧財產局員工消費合作钍印製 五、發明說明(4 ) 線組來將該半導體晶片電性藕接至該導腳架之導腳部的内 端;以及(ίο)進行一加蓋片製程,藉以將一蓋片固接至該 封裝膠鳢之上部邊牆部分之中心空洞部分的開口上。 上述之封裝製程之特點即在於採用一具有特定結構形 狀之支撐塊體,配合模鑄製程令所用之模具組,即可氣密 地夾緊不能有溢膠現象產生的導腳架部位,藉此而防止這 些導腳架部位上產生溢膠現象。相較於習知技術,由於本 發月不需採用成本昂貴之有機高分子塗佈材料和清洗溶劑 來去除溢膠,因此本發明具有更進步之實用性及更佳之使 用成本效益。 [圖式簡述】 為讓本發明之上述和其它目的、特徵、和優點能更明 顯易懂,下文將舉本發明之較佳實施例,並配合所附圖式, 詳細說明本發明之實質技術内容β所附圖式之内容簡述如 下: 第1Α至1D圖為側視剖面示意圖,其用以說明本發明 之感光式半導體封裝製程之第一實施例中的各個程序步 驟; 第2圈為側視剖面示意圖,其用以說明本發明之感光 式半導體封裝製程之第二實施例中的各個程序步驟; 第3圖為側視剖面示意圖,其用以說明本發明之感光 式半導體封裝製程之第三實施例中的各個程序步驟。 [圖式之標號] 100 導腳架 t紙張尺度適用中國國家標準(CNS)A4規格(21〇 X 297公爱) 15975 -------------裝---------訂---------線 f請先閱讚背面之注意事項再填寫本頁} 447097 A7 B7^ n HI a—It. ^-OJ nnin II Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 15975 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 2 Α7 Β7 V. Description of the Invention (2) Many Solutions Patent No. 5,070,041 "METHOD OF RE 10VING FLASH FROM A SEMICONDUCTOR LEADFRAME USING COATED LEADFRAME AND SOLVENT". The solution disclosed in this U.S. patent is to first coat a layer of organic polymer material on the portion of the tripod used to adhere the chip and the solder wire; then, after the molding of the packaging colloid is completed, a special The cleaning solvent of the organic polymer coating layer is washed away together with the overflow glue thereon. However, the above-mentioned patented packaging method has the following disadvantages. The first disadvantage is that the cost of using organic polymer coating materials and cleaning solvents is very high, and the implementation procedures are quite complicated, so it is not cost-effective to use. The second disadvantage is that the cleaning solvents used are also It may be easy to cause erosive damage to the tripod, so there are concerns about product reliability. Β The third disadvantage is that the cleaning solvent used is prone to environmental pollution, so it is not environmentally friendly. [Summary of the Invention] In view of the shortcomings of the conventional technology described above, the main purpose of the present invention is to provide a novel photosensitive semiconductor packaging process which can prevent the occurrence of glue overflow on the guide frame, but does not require high cost and Polluting organic polymer coating materials and cleaning solvents, so that it has higher cost and environmental protection benefits in use. Another object of the present invention is to provide a novel photosensitive semiconductor packaging process', which can make the finished semiconductor package to have higher product reliability. This paper size applies the Chinese National Standard (CNS) A4 gauge (210 X 297 male t) 15975 ------------- Installation -------- Order · ----- --- line (please read the precautions on the back before filling this page) 447097 A7 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs B7 V. Description of the invention (3) According to the purpose described above, the present invention provides a Novel photosensitive semiconductor packaging process. The semiconductor packaging process of the present invention includes the following steps: (1) a prefabricated lead frame having a sticky crystal base and a lead-in chattering portion; (2) an electrically insulating support block having a flat surface The upper surface has a predetermined width and a predetermined height; (3) a prefabricated mold set including an inserted mold and a cavity mold; and the insert mold The module is formed with a side wall and empty six structures' and the bottom cavity module is formed with a base cavity structure, and the depth of the base cavity structure is approximately equal to the height of the support block: (4) placing the support block Drop-in in the cavity structure of the base of the lower cavity module, and then the entire sticky crystal base and the inner end of the guide leg of the guide frame are placed on the upper surface of the ship, ( 5) The upper plug-in module is pressed down above the guide leg, so that the entire sticky crystal seat and the inner end of the guide leg of the guide leg are air-tightly clamped to the support block and the upper insert. Type modules; (6) a die casting process is performed to cast a die casting material Into the cavity structure of the side wall of the upper plug-in module and at the same time into the cavity portion of the base structure of the lower cavity module that is not occupied by the support block, thereby forming a packaging gel The packaging colloid has an upper side wall portion and a lower base portion ΛΤ, wherein the upper side wall portion separates a heart cavity portion as a region for chip bonding and wire bonding, and the lower base portion is used to encapsulate the Support block; (7) removing the upper plug-in module and the lower cavity module; (8) performing a sticky crystal process to pass at least one semiconductor wafer through the center of the upper side wall portion of the packaging glue boat The hollow part is adhered to the sticky crystal S of the guide frame; (9) A wire welding process is performed to use a guide paper ^ Applicable to Ning National Standard (CNS) A4 specification-(21〇X 297 public love) ------— 3 15975 < Please read the notes on the back before filling out this page)-! ----- 丨 Order -------. — Line 丨 h ------ -A7 A7 Consumer cooperation of Intellectual Property Bureau of the Ministry of Economic Affairs The chip is electrically connected to the inner end of the guide leg portion of the guide frame; and (ίο) a cover sheet process is performed to fix a cover sheet to a central hollow portion of a side wall portion of the upper part of the packaging adhesive On the opening. The above-mentioned packaging process is characterized by the use of a support block with a specific structural shape and the mold set used in the mold-casting process order to air-tightly clamp the part of the guide frame that cannot be caused by the overflow of glue. And to prevent the occurrence of glue overflow on these guide feet. Compared with the conventional technology, the present invention does not need to use expensive organic polymer coating materials and cleaning solvents to remove the overflow glue. Therefore, the present invention has more advanced practicability and better cost-effectiveness. [Brief Description of the Drawings] In order to make the above and other objects, features, and advantages of the present invention more comprehensible, the following describes preferred embodiments of the present invention in conjunction with the accompanying drawings to explain the essence of the present invention in detail. The content of the technical drawings in the technical content β is briefly described as follows: FIGS. 1A to 1D are schematic side sectional views for explaining each program step in the first embodiment of the photosensitive semiconductor packaging process of the present invention; It is a schematic side sectional view, which is used to explain each program step in the second embodiment of the photosensitive semiconductor packaging process of the present invention; FIG. 3 is a schematic side sectional view, which is used to explain the photosensitive semiconductor packaging process of the present invention Each program step in the third embodiment. [Symbols of drawings] 100 paper guides t paper size is applicable to China National Standard (CNS) A4 specifications (21〇X 297 public love) 15975 ------------- installation ----- ---- Order --------- Please read the notes on the back of the line f before filling in this page} 447097 A7 B7

111 支撐塊體110之上表面 112 支撐塊體110之下表面突出卿部 120 模具組 121 上插入式模塊 121a 上插入式模塊121中之邊牆空穴結構 122 下空穴式模塊 122a下空穴式模塊122中之底座空穴結構 130 封裝膠體 131 封裝膠體130之上部邊牆部分 132 封裝膠體130之下部底座部分 140 半導體晶片 -- » · I I r請先Batt背面之注意事項再填窝本頁} · 經濟部智慧財產局員工消費合作社印製 150 導線組 160 透明蓋片 210 第二實施例之支撐塊體 * 211 支撐塊艘210之上表面 212 支撐塊體210之下表面 213 支撐塊體210之突出扣部 310 第三實施例之支撐塊體 311 支撐塊體310之上表面 312 支撐塊體310之下表面突出腳部 320 黏膠 本紙張尺度適用史3國家標準(CNS)A4規格(210 X 297公SI ) 5 15975 線 B7 B7 經濟部智慧財產局員工消費合作杜印製 五、發明說明(6 ) [發明實施例詳細說明] 以下將配合第1A至1D圖、第2圖、及第3圖分別詳 細揭露說明本發明之感光式半導體封裝製程的三個實施 例〇 差二實施例(第1 A至1D圖) 以下將配合第1A至1D圖詳細揭露說明本發明之感光 式半導體封裝製程的第一個實施例。 請首先參閱第1A圖,本發明之感光式半導體封裝製 程的第一個步驟為預製一導腳架100、一支撐塊體110、以 及一模具組12 0 » 導腳架1〇〇具有一黏晶座101及一導腳部102(此導腳 部實際上具有複數隻導腳,但於第1A圖之側視圖中 並未能全部顯示出來)。於此實施例中,支撐塊體110為一 電性絕緣之塊體,具有一平坦之上表面111及一具突出聊 部之下表面Π2,且其具有一預定寬度F和一預定高度汀。 此預定宽度酽須為至少可涵蓋整個黏晶座1〇1及導腳部 102内端’而此預定高度尺須為大致等於導腳架丨〇〇之黏 晶座101的支撐高度。 模具組120包括一上插入式模塊121及一下空穴式模 塊122’其中上插入式模塊121形成有一邊牆空穴結構 12U(此邊牆空穴結構121a將於後續之製章中用來形成封 裝膠體之邊牆部分)’而下空穴式模塊122則形成有一底座 空穴結構122 a(此底座空穴結構122a將於後續之製程中用 本纸張尺度適用中國國家標準(CNS)A4規格(210x297公釐) 15975 -------------裝--------訂---I-----線 (請先閱讀背面之注意事項再填冩本頁) 經濟部智慧財產局員工消費合作社印製 7 447097 A7 __________ 五、發明說明(7 ) 來形成封裝踢體之底座部分)。此底座空穴結構122a之深 度£>必須為大致等於支撐塊體n〇之高度汗。 請接著參閱第1B圓,下一個步驟為將支撐塊體11〇 容納於下空穴式模塊122之底座空穴結構122a中;接著將 導腳架100之整個黏晶座101及導腳部1〇2内端的背面放 置於支撐塊體11〇的上表面上;再接著將上插入式模塊121 向下壓置於導腳架100的上方。由於支撐塊體11〇的高度 大致等於底座空穴結構I22a之深度,因此支撐塊體11〇 與上插入式模塊121二者可合力夹緊導腳架1〇〇之整個黏 晶座101及導脚部102内端,並可達到氣密性之夹緊效果。 接著便可進行一模鑄製程,藉以將一模鑄材料,例如 為樹脂’填入至上插入式模塊121的邊牆空穴結構12u 之中,並同時填入至下空穴式模塊122的底座空穴結構 122 a中未為支撐塊體no所佔據之空洞部分。於此模轉製 程中’由於導卿架1〇〇之整個黏晶座及導腳部内 端均被氣密地夹緊於支撐塊體110與上插入式模塊121之 間,因此模鑄製程中所用的樹脂難以濺溢至此些部位上, 亦即不會有溢膠現象產生β 請接著參閲第1C圖’下一個步驟為將上插入式模塊 121及下空穴式模塊i22移除,即可製成一封裝膠體13〇。 於上述之模鑄製程中’填入至上插入式模塊121之邊牆空 穴結構121a中的樹脂即形成封裝膠體13〇之上部邊牆部分 131 ’而填入至下空穴式模塊122之底座空穴結構中 的樹脂即形成封裝膠體130之下部底座部分132。封裝膠 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公蜚) 15975 (請先閱讀背面之注意事項再填寫本頁) ^ · I ί I I I I I-i-rSJ* — — — — — 11— ΚΙΙΙΙΙΙΙΓΙΙΙΙΙΙΙΙΙΙΙί — 經濟部智慧財產局員工消費合作社印製 B7 五、發明說明(8 ) 體130之上部邊牆部分ι31用以區隔出一中心空洞部分 131a,以作為後續黏置晶片及銲接導線之區域;而封裝膠 體130之下部底座部分132則用以封裝支撐塊體11〇,並 作為整個封裝結構體之底部支撐。 請接著參閱第1D圖,下一個步驟為進行一黏晶製程 (die attachment),藉以將一感光式半導體晶片140,例如 為一影像感測器晶片或一可感應紫外光之可程式化唯讀記 憶體晶片’透過封裝膠體13〇之上部邊牆部分〗31之中心 空洞部分13la而黏貼至導腳架10〇之黏晶座ι〇1的正面 上σ 接著進行一導線銲接製程(wire bonding),藉以利用一 導線組1 50 ’例如為金製之導線,將半導體晶片14〇電性 藕接至導腳架100之導腳部102的内端上。 於上述之黏晶及導線銲接製程中,由於第圖所述 之步驟會使得溢膠現象不會發生於導腳架100之整個黏晶 座101及導腳部102内端的正面上,因此此處所完成之黏 晶及導線銲接具有高可靠度。 最後一個步驟為進行一加蓋片製程(lidding),藉以將 _透明蓋片160’例如為一玻璃蓋片,固接至封裝膠艘130 的上部逢牆部分1 3 1的中心空洞部分1 3 1 a的開口上。此即 完成本發明之感光式半導體封裝製程。111 The upper surface of the support block 110 The lower surface of the support block 110 protrudes the clear part 120 The mold group 121 The side wall cavity structure in the top plug-in module 121a The bottom cavity module 122a The bottom cavity Base cavity structure 130 in the module 122 Encapsulation gel 131 Encapsulation colloid 130 Upper side wall part 132 Encapsulation gel 130 Under base part 140 Semiconductor wafer-»· II r Please note on the back of Batt before filling this page } · Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 150 Lead group 160 Transparent cover sheet 210 Support block of the second embodiment * 211 Support block 210 upper surface 212 Support block 210 lower surface 213 Support block 210 Protruded buckle 310 The third embodiment of the supporting block 311 The upper surface of the supporting block 310 312 The lower surface of the supporting block 310 protruding from the foot 320 Viscose This paper is applicable to national standards (CNS) A4 specifications (210 X 297 male SI) 5 15975 Line B7 B7 Duplicate printing of employee cooperation of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of invention (6) [Detailed description of the embodiment of the invention] The following will cooperate with Figures 1A to 1D, Figure 2, The third embodiment of the photosensitive semiconductor packaging process of the present invention is disclosed in detail in FIG. 3 and the second embodiment (FIGS. 1A to 1D) will be disclosed in detail with reference to FIGS. 1A to 1D. The first embodiment of the semiconductor packaging process. Please refer to FIG. 1A first. The first step of the photosensitive semiconductor packaging process of the present invention is to prefabricate a guide frame 100, a support block 110, and a mold set 12 0. The guide frame 100 has an adhesive The crystal base 101 and a guide leg 102 (this guide leg actually has a plurality of guide legs, but not all of them can be shown in the side view of FIG. 1A). In this embodiment, the supporting block 110 is an electrically insulating block having a flat upper surface 111 and a lower surface Π2 protruding from the chattering portion, and has a predetermined width F and a predetermined height. The predetermined width 酽 must cover at least the entire die mount 101 and the inner end of the guide leg portion 102, and the predetermined height ruler must be approximately equal to the support height of the die mount 101 of the guide foot stand 〇〇〇. The mold set 120 includes an upper plug-in module 121 and a lower cavity module 122 ', wherein the upper plug-in module 121 is formed with a side wall cavity structure 12U (this side wall cavity structure 121a will be used to form in subsequent regulations) The side wall part of the encapsulating colloid) 'and the bottom cavity module 122 is formed with a base cavity structure 122 a (this base cavity structure 122 a will be used in subsequent processes in accordance with this paper standard to Chinese National Standard (CNS) A4 Specifications (210x297 mm) 15975 ------------- Installation -------- Order --- I ----- line (Please read the precautions on the back before filling (冩 Page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 7 447097 A7 __________ V. Description of the Invention (7) to form the base part of the package kick body). The depth of the base cavity structure 122a must be approximately equal to the height of the support block no. Please refer to the circle 1B. The next step is to accommodate the support block 110 in the cavity structure 122a of the base of the lower cavity module 122; then, the entire sticky crystal base 101 and the guide leg 1 of the guide frame 100 〇2 The back of the inner end is placed on the upper surface of the supporting block 11; then, the upper plug-in module 121 is pressed down on the leg guide 100. Since the height of the support block 11 is approximately equal to the depth of the cavity structure I22a of the base, the support block 11 and the upper plug-in module 121 can work together to clamp the entire die mount 101 and the guide of the guide 100. The inner end of the leg portion 102 can achieve an air-tight clamping effect. Then, a molding process can be performed, so that a molding material, such as resin, is filled into the side wall cavity structure 12u of the upper plug-in module 121, and simultaneously filled into the base of the lower cavity module 122. The cavity portion 122 a is not a hollow portion occupied by the support block no. In this die-turning process, 'the entire inner die end of the guide frame 100 and the guide leg are air-tightly clamped between the support block 110 and the upper plug-in module 121, so the die-casting process The resin used is difficult to spill on these parts, that is, there will be no overflow of glue. Β Please refer to Figure 1C 'The next step is to remove the upper plug-in module 121 and the lower cavity module i22, that is, It can be made into an encapsulant 13. In the above-mentioned mold casting process, the resin filled in the side wall cavity structure 121a of the upper plug-in module 121 is formed into the sealing colloid 13 and the upper side wall portion 131 is filled into the base of the lower cavity module 122. The resin in the cavity structure forms the lower base portion 132 of the encapsulant 130. The size of the sealed plastic paper is in accordance with China National Standard (CNS) A4 (210 X 297 cm) 15975 (Please read the precautions on the back before filling this page) ^ · I ί IIII Ii-rSJ * — — — — — 11 — ΚΙΙΙΙΙΙΙΙΓΙΙΙΙΙΙΙΙΙΙΙΙΙΙΙ — Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by B7 V. Description of the invention (8) The upper side wall portion ι31 of the body 130 is used to separate a central hollow portion 131a for subsequent bonding of the wafer and soldering wires Area; and the lower base portion 132 of the encapsulant 130 is used to encapsulate the support block 110 and to serve as the bottom support of the entire encapsulation structure. Please refer to FIG. 1D. The next step is to perform a die attachment process, whereby a photosensitive semiconductor chip 140, such as an image sensor chip or a programmable read-only sensor that can sense ultraviolet light, is performed. The memory chip is pasted through the central cavity portion 13la of the upper side wall portion 13 of the encapsulation gel 13 and adhered to the front surface of the die mount 〇1 of the guide frame 10. Then a wire bonding process is performed. The semiconductor chip 14 is electrically connected to the inner end of the guide pin portion 102 of the lead frame 100 by using a wire group 1 50 ′, such as a wire made of gold. In the above-mentioned bonding die and wire welding process, because the steps described in the figure will prevent the glue overflow phenomenon from occurring on the entire front of the die attach base 101 and the inner end of the guide pin 102 of the guide frame 100, The finished die bonding and wire welding have high reliability. The last step is to perform a lidding process, so that the transparent cover sheet 160 ′ is, for example, a glass cover sheet, and is fixed to the central cavity part 1 3 1 of the upper wall part 1 3 1 of the encapsulant 130. 1 a on the opening. This completes the photosensitive semiconductor packaging process of the present invention.

差士實砲例(笫2 SM 以下將配合第2圖詳細揭露說明本發明之感光式半導 體封裝製程的第二實施例。於此第2圖所示之第二實施例 本紙張尺度適用中國國家標準(CNS〉A4規格(210 x 297公釐) 15975 — — — — — — —I1IIII1 « — —III—— . ---II I I I f請先聞讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 9 447097 A7 _ B7 五、發明說明(9) 中,與前面第一實施例完全相同之構件係以相同之標號表 示0 如第2圖所示’本實施例與前一實施例不同之處僅在 於此處所採用之支律塊體(此處以標號21〇表示),其具有 一不同之結構形狀;亦即其具有一平坦之上表面211及一 平坦之下表面212,且其側壁上形成一突出扣部213,且其 底面完全露出於封裝膠體130之底部外。 於封裝膠體130的模鋒製程令,此支撐塊體21〇的放 置方式係完全相同於第圖所示之第一實施例中的支樓 塊體110’因此此支撐塊體210可與上插入式模塊121共 同合力來氣密地夹緊導腳架1〇〇之整個黏晶座1〇1及導腳 部102内端’藉此而防止溢膠現象β模鑄製程完成之後, 支樓塊想210的下表面212即完全露出於封裝膠體130之 底部外’但其可藉著突出扣部213之扣持而不會滑出封裝 膠體130之外。 第三實施例(第3 1[) 以下將配合第3圖詳細揭露說明本發明之感光式半導 想封裝製程的第三個實施例。於此第3圖所示之第二實施 例中’與前面二個實施例完全相同之構件係以相同之標號 表示。 如第3圖所示’此實施例申所採用之支撐塊體(此處以 標號3 10表示),其結構形狀完全相同於第一實施例中所採 用之支撑塊體110;其不同之處僅在於此支撐塊體31〇之 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公蜚) 15975Chashi real shot example (笫 2 SM The following will explain in detail the second embodiment of the photosensitive semiconductor packaging process of the present invention in conjunction with FIG. 2. The second embodiment shown in this FIG. 2 is a paper scale applicable to China. Standard (CNS> A4 size (210 x 297 mm) 15975 — — — — — — — —I1IIII1 «— —III——. --- II III f Please read the notes on the back before filling out this page) Ministry of Economy Printed by the Intellectual Property Bureau employee consumer cooperative 9 447097 A7 _ B7 V. In the description of the invention (9), the components that are completely the same as the previous first embodiment are denoted by the same reference numerals. 0 As shown in FIG. 2 'this embodiment and The difference between the previous embodiment is only the branch block (represented here by reference numeral 21) used here, which has a different structural shape; that is, it has a flat upper surface 211 and a flat lower surface. 212, and a protruding buckle 213 is formed on the side wall, and the bottom surface is completely exposed from the bottom of the encapsulant 130. According to the molding process order of the encapsulant 130, the support block 21 is placed in exactly the same manner as the first embodiment. As shown in the figure The supporting block body 110 ′ in the embodiment, therefore, the supporting block body 210 can work together with the upper plug-in module 121 to air-tightly clamp the entire stick crystal base 100 and the guide leg portion 102 of the guide frame 100. The inner end is used to prevent the overflow of glue. After the β-casting process is completed, the lower surface 212 of the branch block 210 is completely exposed outside the bottom of the encapsulant 130, but it can be held by the protruding buckle 213. Does not slide out of the encapsulant 130. Third Embodiment (3 1 [) The third embodiment of the photosensitive semiconductor package process of the present invention will be described in detail below with reference to FIG. 3. Here, the third embodiment In the second embodiment shown in the figure, the components that are completely the same as those in the previous two embodiments are denoted by the same reference numerals. As shown in FIG. 3, the supporting block used in this embodiment (here denoted by reference numeral 3 10) (Shown), its structure and shape are exactly the same as the support block 110 used in the first embodiment; the only difference is that the paper size of this support block 31 is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 males) 15975

If BflBf ϋ n I BE I I . * I I I^eJ λ— n ϋ κϋ I 線V - (請先M讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 A7 _______B7 五、發明說明(10) 上表面係藉著一黏膠320而預先固接至導腳架1〇〇之黏晶 座10丨及導腳部102内端的底面上。 於封裝膠體130的模鑄製程中,此支撐塊體310的放 置位置與第1B圖所示之支撐塊體no完全相同,因此此 支樓塊體310可與上插入式模塊121共同合力來氣密地夾 緊導腳架100之整個黏晶座101及導腳部1〇2内端,藉此 而防止溢膠現象。但由於此處之導腳架10〇已採用黏膠32〇 而固接至支撐塊體310上’因此在上插入式模塊丨21下壓 至導腳架100上時’不會致使導腳架1〇〇產生滑動現象; 亦即可讓導腳架100之整個黏晶座101及導腳部1〇2内端 具有更為穩固之氣密夹緊效果。 [結論] 综而言之’本發明提供了 一種新穎之感光式半導體封 裝製程’其可用以封裝一感光式之半導體晶片,例如為一 影像感測器晶片或一可感應紫外光之可程式化唯讀記憶體 晶片’並可於封裝膠體之模鑄製程中,防止導腳架上產生 溢膝現象。本發明之特點即在於採用一具有特定結構形狀 之支樓塊體*配合模鑄製程中所用之模具組,即可氣密地 夾緊不能有溢膠現象產生的導腳架部位,藉此而防止這些 導腳架部位上產生溢膠現象。相較於習知技術,由於本發 明不需採用成本昂貴之有機高分子塗佈材料和清洗溶劑來 去除溢膠,因此本發明具有更佳之成本效益及環保效益。 以上所述僅為本發明之較佳實施例而已,並非用以限 定本發明之實質技術内容的範圍。本發明之實質技術内容 ------裝 -------訂---I---1* 線 {請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4規格(2〗ϋχ 297公楚) 10 15975 447 0 9 A7 B7 五、發明說明(11 ) 係廣義地定義於下述之申請專利!^巾1何他人所完成 之技術實體,若是與下述之中請專利範圍所定義者為完全 相同、或是為一種等效之變更,均將被視為涵蓋於此專利 範圍之中》 — II — I — I I I I I ' I I I I I I ί « — — — — —ill i J..r (請先Μ讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS>A4規格(210 X 297公t)If BflBf ϋ n I BE II. * III ^ eJ λ— n ϋ κϋ I Line V-(Please read the notes on the back before filling out this page) Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 _______B7 V. Invention Explanation (10) The upper surface is fixed in advance to the bottom surface of the inner end of the guide leg portion 102 and the guide base portion 102 by an adhesive 320 in advance. During the molding process of the encapsulant 130, the placement position of the support block 310 is exactly the same as the support block no shown in FIG. 1B. Therefore, the support block 310 can work together with the upper plug-in module 121 to generate air. The entire sticky crystal base 101 and the inner end of the guide leg portion 102 of the leg guide 100 are tightly clamped, thereby preventing glue overflow. However, since the foot guide 100 has been fixed to the support block 310 by using adhesive 32, the foot guide 100 will not be caused when the upper plug-in module 丨 21 is pressed onto the guide foot 100. A sliding phenomenon occurs at 100; that is, the entire sticky crystal base 101 of the guide leg holder 100 and the inner end of the guide leg portion 102 have a more stable air-tight clamping effect. [Conclusion] In summary, the present invention provides a novel photosensitive semiconductor packaging process, which can be used to package a photosensitive semiconductor wafer, such as an image sensor chip or a programmable ultraviolet light sensor. The read-only memory chip can be used in the molding process of the encapsulation gel to prevent knee overflow on the guide. The feature of the present invention is that a supporting block with a specific structural shape is used in combination with a mold set used in the mold casting process to air-tightly clamp the guide leg portion that cannot be caused by overflowing glue, thereby Prevent the occurrence of glue overflow on these guides. Compared with the conventional technology, since the present invention does not need to use expensive organic polymer coating materials and cleaning solvents to remove the overflow glue, the present invention has better cost-effectiveness and environmental protection benefits. The above descriptions are merely preferred embodiments of the present invention, and are not intended to limit the scope of the essential technical content of the present invention. Essential technical content of the present invention ------ install ------- order --- I --- 1 * line {Please read the notes on the back before filling this page) This paper size is applicable to China Standard (CNS) A4 Specification (2〗 ϋχ 297 公 楚) 10 15975 447 0 9 A7 B7 V. Description of Invention (11) is a broadly defined patent application as described below! ^ Any technical entity completed by others, if it is exactly the same as the one defined in the patent scope below, or an equivalent change, will be considered to be covered by this patent scope "— II — I — IIIII 'IIIIII ί «— — — — —ill i J..r (please read the notes on the back before filling in this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Employees' Cooperatives This paper is applicable to China Standard (CNS > A4 size (210 X 297 mm t)

II 15975II 15975

Claims (1)

經濟部智慧財產局員x消費合作社印製 12 A8 B8 C8 D8 六、申請專利範圍 1. 一種感光式半導體封裝製程,包含以下步騨: (1) 預製一導腳架,其具有一黏晶座及一導腳部, (2) 預製一電絕緣性之支撐塊體,其具有一平坦之上 表面’且其具有一預定寬度和一預定高度; (3) 預製一模具組,其包括一上插入式模塊及一下空 穴式模塊:其中該上插入式模塊形成有一邊牆空穴結 構’而該下空穴式模塊則形成有一底座空六結構,且該 底座空穴結構之深度大致等於該支撐塊體之高度; (4) 將該支樓塊體置入(Dr〇p_in)於該下空穴式模塊 之底座空穴結構中;再接著將該導腳架之整個黏晶座及 導腳部内端放置於該支撐塊體之上表面上; (5) 將該上插入式模塊向下壓置於該導腳架之上 方,致使該導腳架之整個黏晶座及導腳部内端被氣密地 夾緊於該支撐塊體與該上插入式模塊之間; ⑷進行-模鑄製程’藉以將一模鑄材料填入至該上 插入式模塊之邊踏空穴結構’並同時填入至該下空穴式 模塊之底座空穴結構中未為該支撐塊體所佔據之空洞 部分’藉此而形成一封裝膠趙;該封裝黟體具有—上部 邊牆部分及一下部底座部分,苴令 r该上部邊牆部分區隔 出一中心空洞部分作為晶片 黏置及導線銲接之區域,而 該下部底座部分則用以封裝該支樓塊艘 ⑺將該上插入式模塊及該下空穴式模 : 、紙張 ^ a a (Ci\S)A J (210 x 297 —----- 15975 --------------^ - 1 ------^ « --------線 (請先間讀背面之注意事項再填寫本頁) 447097 頜 __S 六、申請專利範圍 W進行-黏晶製程’藉以將至少一半導體晶片透過 該封裝膠體之上部邊牆部分之中心空洞冑分而黏貼至 該導腳架之黏晶座上; W進行-導線銲接製程,藉以利用一導線組來將該 半導艘晶片電性藕接至該導卿架之導腳部的内端;以 及 (10)進行一加蓋片製程’藉以將一蓋片固接至該封 裝膠體之上部邊牆部分之中心空洞部分的開口上。 2. 如申請專利範圍第1項所述之感光式半導體封裝製 程,其中該支撐塊體之下表面形成有一突出腳部β 3. 如申請專利範圍第1項所述之感光式半導體封裝製 程,其令該支撐塊體之下表面為平坦狀’且其侧壁上形 成有一突出扣部。 4. 如申請專利範圍第3項所述之感光式半導體封裝製 程’其中該支撐塊體其底面完全露出於該封裝膠體之底 面外部〇 5. 如申請專利範圍第1項所述之感光式半導體封裝製 程’其令該支撐塊體之上表面係使用一黏膠而預先固接 至該導腳架之整個黏晶座及導腳部内端的底面上。 6. 如中請專利範圍第1項所述之感光式半導體封裝製 程’其中該半導體晶片為一影像感測器晶片。 7·如申請專利範圍第1項所述之感光式半導體封裝製 程’其令該半導體晶片為一可感應紫外光之可程式化唯 讀記憶體晶片。 (請先閱讀背面之注意事項再填寫本頁) -,^· 丨 I ! I I 111 — 丨 I i I I I 經濟部智慧財產局員工消費合作社印製 -f— n _ 本紙張尺度適用中國國家標準(CNS)A4規格C297公g ) 13 15975 8 00 00Φ ABCD 申請專利範圍 8.如申請專利範圍第1項所述之感 I您感先式半導體封裝襲 程’其令該模鑄材料為樹脂。 9·如_請專利範圍第i項所述之感光式半導體封裝製 程’其中該導線為金製導線β ‘如申請專利範圍第1項所述之感光式半導體封裝製 程’其令該蓋片為一玻璃蓋片。 -------------裝--- (請先閱讀背面之注意事項再填窝本頁) 訂---------線 經濟部智慧財產局員工消費合作社印f 木紙張义度適用φ國®家標箪(CNS),\i規格(210XJ97公釐) 15975Member of the Intellectual Property Bureau of the Ministry of Economic Affairs x Printed by Consumer Cooperatives 12 A8 B8 C8 D8 VI. Application for Patent Scope 1. A photosensitive semiconductor packaging process including the following steps: (1) a prefabricated guide frame with a sticky crystal holder and A guide leg, (2) prefabricated an electrically insulating support block having a flat upper surface and having a predetermined width and a predetermined height; (3) a prefabricated mold set including an upper insert Module and lower cavity module: the upper plug-in module is formed with a side wall cavity structure, and the lower cavity module is formed with a base hollow structure, and the depth of the base cavity structure is approximately equal to the support The height of the block; (4) Place the supporting block into the hollow structure of the base of the lower cavity module; and then follow the entire sticky crystal base and guide leg of the guide frame. The inner end of the part is placed on the upper surface of the support block; (5) The upper plug-in module is pressed down above the guide foot, so that the entire stick crystal base of the guide foot and the inner end of the guide foot are Hermetically clamped on the support block and the Between plug-in modules; ⑷Proceed-die-casting process 'by which a mold-casting material is filled into the side step cavity structure of the upper plug-in module' and simultaneously filled into the base cavity structure of the lower cavity module The hollow portion occupied by the supporting block is not used to form an encapsulation glue; the encapsulation body has an upper side wall portion and a lower base portion, so that the upper side wall portion is separated by a The central hollow part is used as the area for chip bonding and wire bonding, and the lower base part is used to encapsulate the building block. The upper plug-in module and the lower cavity mold:, paper ^ aa (Ci \ S ) AJ (210 x 297 ------- 15975 -------------- ^-1 ------ ^ «-------- line (please first Note on the back of the occasional reading, please fill in this page again) 447097 Jaw __S VI. Patent Application Scope W-Adhesive Crystal Process' by which at least one semiconductor wafer is divided through the center cavity of the upper side wall portion of the packaging colloid and stuck to The stick base of the guide frame; W-conductor welding process, by using a wire set to the semi-conductor The sheet is electrically connected to the inner end of the guide leg of the guide frame; and (10) a cover sheet process is performed to fix a cover sheet to the center hollow part of the upper wall portion of the packaging colloid. 2. The photosensitive semiconductor packaging process according to item 1 of the scope of patent application, wherein a protruding leg β is formed on the lower surface of the support block 3. The photosensitive semiconductor according to item 1 of the scope of patent application The packaging process makes the lower surface of the support block flat and has a protruding buckle formed on its side wall. 4. The photosensitive semiconductor packaging process according to item 3 of the patent application scope, wherein the support block is Its bottom surface is completely exposed on the outside of the bottom surface of the packaging colloid. 5. The photosensitive semiconductor packaging process described in item 1 of the scope of the patent application 'makes the upper surface of the support block to be pre-fixed using an adhesive. The bottom surface of the entire sticky crystal base and the inner end of the guide leg. 6. The photosensitive semiconductor packaging process described in item 1 of the patent scope, wherein the semiconductor chip is an image sensor chip. 7. The photosensitive semiconductor packaging process described in item 1 of the scope of patent application ', which makes the semiconductor wafer a programmable read-only memory chip that can sense ultraviolet light. (Please read the precautions on the back before filling this page)-, ^ · 丨 I! II 111 — 丨 I i III Printed by the Consumers ’Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs -f— n _ This paper size applies to Chinese national standards ( CNS) A4 specification C297 g) 13 15975 8 00 00 Φ ABCD patent application scope 8. Feel as described in the scope of the application for the first item of the I-type semiconductor package attack 'It makes the molding material resin. 9 · As described in the photo-sensitive semiconductor packaging process described in item i of the patent scope ', where the wire is a gold wire β' as in the photo-sensitive semiconductor packaging process described in item 1 of the patent scope ', which makes the cover sheet be A cover glass. ------------- Equipment --- (Please read the precautions on the back before filling in this page) Order --------- Employee Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Printing f wood paper is suitable for φ China® House Standard (CNS), \ i size (210XJ97 mm) 15975
TW089108879A 2000-05-10 2000-05-10 Photosensitive semiconductor packaging process for preventing flashing TW447097B (en)

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