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TW439151B - Method for forming conductive layer using atomic layer deposition process - Google Patents

Method for forming conductive layer using atomic layer deposition process Download PDF

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Publication number
TW439151B
TW439151B TW87106228A TW87106228A TW439151B TW 439151 B TW439151 B TW 439151B TW 87106228 A TW87106228 A TW 87106228A TW 87106228 A TW87106228 A TW 87106228A TW 439151 B TW439151 B TW 439151B
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Taiwan
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layer
metal
gas
patent application
atomic layer
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TW87106228A
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Chinese (zh)
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Sang-Bom Kang
Yun-Sook Chae
Chang-Soo Park
Sang-In Lee
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Samsung Electronics Co Ltd
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523—Pulsed gas flow or change of composition over time
    • C23C16/45525—Atomic layer deposition [ALD]
    • C23C16/45527—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
    • C23C16/45534—Use of auxiliary reactants other than used for contributing to the composition of the main film, e.g. catalysts, activators or scavengers
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • C23C16/08—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/42—Silicides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45561—Gas plumbing upstream of the reaction chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

A method for forming a conductive layer using an atomic layer deposition process. A sacrificial metal atomic layer is formed on a semiconductor substrate by reacting a precursor containing a metal with a reducing gas, and a metal atomic layer where metal atoms dissolved from a metal halide gas is deposited is formed on a semiconductor substrate by reacting the sacrificial metal atomic layer with a metal halide gas. Also, a silicon atomic layer may be additionally formed on the metal atomic layer using a silicon source gas, to thereby alternately stack metal atomic layers and silicon layers.

Description

4 4 經濟部智慧財產局員工消費合作社印製 Α7 Β7 五、發明說明（I ) 發明背景 1·發明之領域 本發明係關於形成一種半導體裝置導電層之方法，更 精確地講’係使用原子層沉積過程形成一種半導體導電層 之方法。 2·相關技藝之描述 當半導體裝置的整合度增加時，設計尺度降低。這樣 ’連接孔（contact hole)的寬高比變得很高，結深(細cti〇n depth)變得很淺。，結深直接依賴於―種M〇s電晶體的短通 道效應。即是’ 一種適於高整合度的半導體裝置的M〇s電 晶體需要一個短的通道長度，和一個淺的源區/漏區 (source/drain region)，即結深必須很淺以提高一具短通道的 MOS電晶體的性能。一種用來連接淺結(shaU〇w」‘uncU〇n)和 金屬連接線的連接技術，需要一種金屬障礙層，這樣阻止 了金屬連接線對淺結之穿透，即阻止了結點尖釘(juncti〇n spiking)現象。氮化鈦(TiN)層廣泛地用於金屬障礙層。一種 歐姆層’例如，矽化鈦層，介入金屬障礙層和結點之間。 一種熔點1M0°C，電阻率π〜16/z Ω-cm，阻高0.6eV的有 關於N-型雜質層之矽化鈦層，被廣泛地用作歐姆層或連接 線。较化鈦層用作歐姆層，是在結點上形成一個鈦層，即 砂基板（雜質層）先摻雜雜質，然後退火使之與鈦層相互反 應。 如上所述’ 一種形成金屬連接線的通常方法是5在雜 質層上形成一種中間介電層，此中間介電層被佈局圖案化 3 本紙張尺度適用中國國家標準（CNS)A4規格（2丨〇 X 297公爱） - yL· <-- ^^1 tt ^^1 cl f 〆 » n n In n 4 · ^^1 n n 1 ^^1 I 71，«I (請先閱讀背面之注意事項再填寫本頁) A7 B7 五、發明說明（y) 以便在雜質層上一個預先決定的暴露區域內形成一連結孔 。同樣’歐姆層、金屬障礙層和金屬連線在形成連結孔所 得結構的整個表面上相繼形成。在暴露的雜質層上形成一 鈦層後，將鈦層退火，或直接在雜質層上形成一矽化鈦層 ’可得到歐姆層。矽化鈦層之形成必須在足夠低的溫度下 以抑制雜質層之損傷。一個已提出的形成矽化鈦層方法是 使用電漿強化之化學蒸氣沉積(PECVD)過程，即1· Lee等 人發表於 J. Electrochem· Soc. ，vol. 139，No · 4，1992 ’pp.1159-1165之“在氧化物佈局圖案化晶片上的TiSh鋪 面之電槳強化CVD” ，Alan E_ Morgan等人發表於J. Vac • Sci· Technol· B4(3)，1986，pp.723-731 之“電漿強化 CVD的矽化鈦材料特性”。但是，當矽化鈦層在高整合半 導體裝置上具高的寬高比之連接孔上形成時，由於電漿之 特性，顯不了較差的梯級覆蓋（step coverage)。同時，在 6〇〇°C或更高溫度下，使用低壓CVD(LPCVD)過程形成矽化 駄層之方法由V· Ilderem等人，和G‘〗· Reynolds等人提 出（參閱“低壓CVD矽化鈦之最佳沉積參數” J · Electrochem- Soc- ，1988，ρρ·2590-2596 和“低壓 CVD 之 選擇性二矽化鈦"J· App：!· Phys. 65(8)，1989，pp.3212-3218)。但是，當在600°C或更高溫度形成矽化鈦層時，雜 質層與鈦層連結的矽消耗增加，因此惡化了結點之洩漏電 流(leakage current)特性《這樣，很難透過LPCVD得到合適 的需要淺結的高整合半導體裝置之矽化鈦層。 發明之槪要 4 本紙張尺度適用中國國家標準（CNS)A4規格（210 公釐） (請先閱讀背面之沒意事項再填寫本頁) 訂---------線- 經濟部智慧財產局員工消費合作社印製 4391 5 A7 B7 五、發明說明（3) 本發明之目標係提供一種在500°C或更低溫度下提高 梯級覆蓋之使用原子層沉積過程形成導電層的方法° 相應地，根據本發明的一個方面達到了上述目標’一 種犧牲性金屬原子層在半導體基板上形成，此犧牲性金屬 原子層與金屬鹵化物氣體反應，去掉此犧牲性金屬原子層 而將原來溶於金屬鹵化物氣體中的金屬原子沉積’形成此 種金屬原子層。此半導體基板是一種矽基板且具有—個預 先決定的表面區域，其上之結點摻入雜質形成雜質層。同 樣，一個具有一暴露雜質層之預先決定區域之連結孔的中 間介電層佈局圖案，可在半導體基板上形成。 犧牲性金屬原子層和金屬原子層，在初始金屬原子層 上，即在半導體基板上最初形成之金屬原子層上至少依次 形成一次，於是在半導體基板上形成了一個包含多種金屬 原子層的金屬原子層。此處，初始犧牲性金屬原子層，即 在半導體基板上最初形成的犧牲性金屬原子層，其形成必 須完全覆蓋整個暴露的雜質層表面。如果連結孔暴露之雜 質層表面不能被初始犧牲性金屬原子層完全覆蓋，金屬鹵 化物氣體將與雜質層反應並損壞之。這樣，一個完全覆蓋 雜質層之初始犧牲性金屬層，可先於初始犧牲性金屬原子 層而形成。此時，初始犧牲性金屬層形成之時，半導體基 板最好是加熱至300〜500°C，初始犧牲性金屬層之材料應 與初始犧牲性金屬原子層相同。初始犧牲性金屬層或初始 犧牲性金屬原子層，由犧牲性金屬源氣體和還原氣體相互 反應製成。此時，最好是使用Hz或SiH4故爲還原氣體。 5 本紙張尺度適用中國國家標準（CNS)A4規格m〇 X 297公a ) (請先閱讀背面之注意事項再填寫本頁) 言： % 經濟部智慧財產局員工消費合作”社印製 1 439151 . 1 A7 __B7____ 五、發明說明（ ip 同時，金屬鹵化物氣體必須有一個低於由初始犧牲性 金屬原子層之金屬原子和金屬鹵化物氣體之鹵原子組成的 吉布斯自由能(Gibbs free energy)。換句話說，初始犧牲性 金屬原子層之金屬原子必須能與鹵原子結合，以取代金屬 鹵化物之金屬原子與鹵原子結合。例如，爲了在半導體基 板上形成由鈦組成之金屬原子層，優先使用如下之金屬鹵 化物氣體：TiCU氣體，TiL·氣體，TiBn氣體或Tih氣體。 此時，如果金屬鹵化物氣體是TiCL·氣體，優選之犧牲性金 屬原子層是A1層1 La層，Pr層，In層，Ce層，Nd層或 Be層。這時因爲TiCL·氣體之吉布斯自由能低於Al2Cl6 , LaCh氣體，PrCh氣體，Ir^Ch氣體，CeCh氣體，NdCls氣 體，BeCL·氣體。同樣，如果使用TiL·氣體在半導體基板上 形成由鈦組成之金屬原子層，則優選之犧牲性金屬原子層 是A1層、Zr層、Hf層。這時因爲TiL·氣體之吉布斯自由 能低於AhL·氣體、Zrl·氣體或HfL·氣體。 不同的金屬鹵化物氣體，例如，TaCl5氣體、TaL·氣體 、TaBrs氣體、TaF5氣體、HfCU氣體、HfL·氣體、HfBn氣 體、HfF4氣體、ZrCU氣體.、Zrl·氣體、ZrBn氣體或Zrh.氣 體’可以用來在半導體基板上形成相應的金屬原子層。 如上所述，如果金屬鹵化物氣體應用於犧牲性金屬原 子層，或初始犧牲性金屬層和初始犧牲性金屬原子層形成 之所得結構表面，那麼，在犧牲性金屬原子層上的金屬原 子和初始犧牲性金屬層的金屬原子與金屬鹵化物氣體之鹵 原子’產生一種揮發性氣體。這樣，在金屬鹵化物中的金 6 (請先閱讀背面之注意事項再填寫本頁) i^- ------訂 --------線 — 經濟部智慧財產局員工消費合作賊印製 本纸張尺度適用中國國家標準（CNS)AJ規格（210 X 297公釐） 經濟部智慧財產局員工消費合作社印製4 4 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the Invention (I) Background of the Invention 1. Field of the Invention The present invention relates to a method for forming a conductive layer of a semiconductor device. A method of forming a semiconductor conductive layer during the deposition process. 2. Description of related technologies When the integration degree of a semiconductor device increases, the design scale decreases. In this way, the aspect ratio of the contact hole becomes very high, and the junction depth becomes very shallow. The junction depth depends directly on the short channel effect of a Mos transistor. That is, a MOS transistor suitable for high-integration semiconductor devices requires a short channel length and a shallow source / drain region, that is, the junction depth must be very shallow to increase the Performance of MOS transistor with short channel. A connection technology for connecting a shallow junction (shaU〇w''uncU〇n) and a metal connection line requires a metal barrier layer, which prevents the metal connection line from penetrating the shallow junction, that is, prevents the node spikes ( juncti〇n spiking) phenomenon. Titanium nitride (TiN) layers are widely used for metal barrier layers. An ohmic layer ', for example, a titanium silicide layer, intervenes between a metal barrier layer and a node. A titanium silicide layer with a melting point of 1M0 ° C, a resistivity of π ~ 16 / z Ω-cm, and a resistance of 0.6eV is an N-type impurity layer. It is widely used as an ohmic layer or a connection line. The comparative titanium layer is used as an ohmic layer. A titanium layer is formed on the junction, that is, the sand substrate (impurity layer) is doped with impurities and then annealed to react with the titanium layer. As mentioned above, a common method for forming metal connection lines is to form an intermediate dielectric layer on the impurity layer. This intermediate dielectric layer is patterned on the layout. 3 This paper is applicable to the Chinese National Standard (CNS) A4 specification (2 丨〇X 297 public love)-yL · <-^^ 1 tt ^^ 1 cl f 〆 »nn In n 4 · ^^ 1 nn 1 ^^ 1 I 71,« I (Please read the notes on the back first (Fill in this page again) A7 B7 V. Description of the invention (y) In order to form a connecting hole in a predetermined exposed area on the impurity layer. Also, the 'ohmic layer, the metal barrier layer, and the metal wiring are sequentially formed on the entire surface of the structure obtained by forming the connection hole. After forming a titanium layer on the exposed impurity layer, the titanium layer is annealed, or a titanium silicide layer is formed directly on the impurity layer to obtain an ohmic layer. The titanium silicide layer must be formed at a temperature low enough to suppress damage to the impurity layer. A proposed method for forming a titanium silicide layer is a plasma-enhanced chemical vapor deposition (PECVD) process, which is published by 1. Lee et al. In J. Electrochem · Soc., Vol. 139, No. 4, 1992 'pp. 1159-1165 "Electron Pad Enhanced CVD of TiSh Pavement on Oxide Layout Patterned Wafer", Alan E_Morgan et al., Published in J. Vac • Sci · Technol · B4 (3), 1986, pp.723-731 "Characteristics of Plasma Strengthened CVD Titanium Silicide". However, when a titanium silicide layer is formed on a connection hole with a high aspect ratio on a highly integrated semiconductor device, due to the characteristics of the plasma, poor step coverage is not shown. At the same time, the method of forming a silicide layer using a low pressure CVD (LPCVD) process at 600 ° C or higher was proposed by V. Ilderem et al. And G 'Reynolds et al. (See "Low Pressure CVD Titanium Silicide" Optimal Deposition Parameters "J · Electrochem-Soc-, 1988, ρρ · 2590-2596 and" Selective Titanium Silicide for Low Pressure CVD "" J · App:! · Phys. 65 (8), 1989, pp. 3212 -3218). However, when a titanium silicide layer is formed at a temperature of 600 ° C or higher, the silicon consumption of the impurity layer and the titanium layer is increased, thereby deteriorating the leakage current characteristics of the junction. LPCVD obtains suitable titanium silicide layers for highly integrated semiconductor devices that require shallow junctions. Essentials of Invention 4 The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 mm) (Please read the unintentional matter on the back before filling out (This page) Order --------- Line-Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 4391 5 A7 B7 V. Invention Description (3) The object of the present invention is to provide a product at 500 ° C or lower Conductive layer formation using atomic layer deposition process to increase step coverage at temperature Method ° Accordingly, according to one aspect of the present invention, the above-mentioned objective is achieved. 'A sacrificial metal atom layer is formed on a semiconductor substrate. This sacrificial metal atom layer reacts with a metal halide gas, and the sacrificial metal atom layer is removed to remove The metal atom layer originally dissolved in the metal halide gas is deposited to form such a metal atom layer. This semiconductor substrate is a silicon substrate and has a predetermined surface area, and the nodes on the semiconductor layer are doped with impurities to form an impurity layer. An intermediate dielectric layer layout pattern having a connecting hole exposing a predetermined region of an impurity layer can be formed on a semiconductor substrate. The sacrificial metal atom layer and the metal atom layer are on the initial metal atom layer, that is, on the semiconductor substrate The metal atomic layer originally formed thereon was formed at least once in succession, so a metal atomic layer containing a plurality of metal atomic layers was formed on the semiconductor substrate. Here, the initial sacrificial metal atomic layer, that is, the sacrificial firstly formed on the semiconductor substrate Metal atomic layer whose formation must completely cover the entire exposure The surface of the impurity layer. If the surface of the impurity layer exposed by the connection holes cannot be completely covered by the original sacrificial metal atom layer, the metal halide gas will react with and damage the impurity layer. In this way, an initial sacrificial metal layer completely covering the impurity layer, It can be formed before the initial sacrificial metal atom layer. At this time, when the initial sacrificial metal layer is formed, the semiconductor substrate is preferably heated to 300 ~ 500 ° C. The material of the initial sacrificial metal layer should be the same as that of the initial sacrificial metal. The atomic layer is the same. The initial sacrificial metal layer or the initial sacrificial metal atomic layer is made by reacting the sacrificial metal source gas and the reducing gas with each other. In this case, it is preferable to use Hz or SiH4 as the reducing gas. 5 This paper size is in accordance with Chinese National Standard (CNS) A4 specification m〇X 297 malea) (Please read the notes on the back before filling this page) Words:% Printed by the Intellectual Property Bureau, Ministry of Economic Affairs, Consumer Consumption Cooperative, 1 439151 1 A7 __B7____ 5. Explanation of the invention (ip At the same time, the metal halide gas must have a Gibbs free energy lower than that consisting of the metal atoms of the original sacrificial metal atomic layer and the halogen atoms of the metal halide gas. In other words, the metal atoms of the initial sacrificial metal atomic layer must be able to combine with the halogen atom to replace the metal atom of the metal halide with the halogen atom. For example, to form a metal atomic layer composed of titanium on a semiconductor substrate It is preferred to use the following metal halide gas: TiCU gas, TiL · gas, TiBn gas, or Tih gas. At this time, if the metal halide gas is TiCL · gas, the sacrificial metal atomic layer is preferably A1 layer 1 La layer, Pr layer, In layer, Ce layer, Nd layer or Be layer. At this time, the Gibbs free energy of TiCL · gas is lower than Al2Cl6, LaCh gas, PrCh gas, Ir ^ Ch gas, Ce. Ch gas, NdCls gas, BeCL · gas. Similarly, if TiL · gas is used to form a metal atomic layer composed of titanium on a semiconductor substrate, the preferred sacrificial metal atomic layers are the A1 layer, the Zr layer, and the Hf layer. The Gibbs free energy of TiL · gas is lower than AhL · gas, Zrl · gas, or HfL · gas. Different metal halide gases, such as TaCl5 gas, TaL · gas, TaBrs gas, TaF5 gas, HfCU gas, HfL · Gas, HfBn gas, HfF4 gas, ZrCU gas., Zrl · gas, ZrBn gas, or Zrh. Gas' can be used to form a corresponding metal atomic layer on a semiconductor substrate. As mentioned above, if a metal halide gas is used for sacrificial Metal atomic layer, or the structure surface formed by the initial sacrificial metal layer and the initial sacrificial metal atom layer, then, the metal atom on the sacrificial metal atom layer and the metal atom of the initial sacrificial metal layer and the metal halide gas. Halogen atom 'generates a volatile gas. In this way, gold 6 in metal halides (please read the precautions on the back before filling this page) i ^---- --- Order -------- Line — The paper is printed by the employees of the Intellectual Property Bureau of the Ministry of Economic Affairs, and the paper is printed in accordance with the Chinese National Standard (CNS) AJ specification (210 X 297 mm). Printed by Employee Consumer Cooperative

^3 91 5 I A7 B7 五、發明說明（&lt;) 屬原子，例如，過渡金屬原子，沉積於半導體基板上，形 成金屬原子層。犧牲性金屬原子層和金屬原子層最好是相 繼形成於半導體基板加熱至300〜500°C時。 根據本發明所達到目標之另一方面，一種犧牲性金屬 原子層和金屬原子層以與上述方面同樣之方式形成於半導 體基板上，並且，矽原子層形成於金屬原子層上。此處， 最初形成於半導體基板上的一層——初始犧牲性金屬原子 層形成前，初始犧牲性金屬層以與上述方面同樣之方式形 成於半導體基板上。接著，犧牲性金屬原子層、金屬原子 層和矽原子層依次層疊於初始矽原子層形成之結構上至少 一次，因此在半導體基板上交替層疊成金屬原子層和矽原 子層。此時，當一個金屬原子層之厚度和矽原子層厚度得 到正確控制時，一個具有所需組成比之金屬矽化物層得以 形成。或者，矽原子層和金屬原子層依次形成於半導體基 板上至少一次，因此交替層疊成矽原子層和金屬原子.層。 然後，如果需要的話，將矽原子層和金屬原子層交替層疊 之所得結構進行退火，以形成能夠提高連結阻抗之金屬矽 化物層。較優方案是，透過快速熱處理(RTP)退火，一種火 爐退火處理或真空退火處理。且當矽原子層形成時，半導 體基板加熱至300〜500°C。矽原子層之形成，使用一種包 含砂原子之前體-政源氣體。砂源氣體最好使用如下氣體： SiH4 、 S12H6 、 (CH3)3SiC ξ CSi(CH)3 、 （（CEh)、Si)2CH2 、 (CH小CSUCH+Cl ' (C4H9)SiCL· 、 （CH3)3SiN(C2H5)2 、 (CH3)2SiCl2 ' ((CH：〇2Si-)n、（CsHshSiCh、（C6Hs)2SiH2 、 7 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） --Γ I--I I I---{.机 I-------訂---------1 (請先閱讀背面之注意事項再填寫本頁) S1I蘧 A7 B7 五·、發明說明（) GHsSiCh、Cl3SiSiCl3、（CH3)3SiSi(CH3)3、CHdiChH、 (CH3)(C6H5)Sia2、CsHsSiCb，SiBn、SiCU、S1F4、SiL·、 (C32Hl6N8)SiCl2、Si(Si(CH;)3)4、Si(CH3)4、CiLSiCh、HSiCh ' (C2H5&gt;SiCn、CF3Si(CH3)3、（CH〇3SiCl、（CHASiH、（CH3)3SiC =CH ' (C5H5)Si(CH3)3、（C5(CH3)5)Si(CH3)3、（C6H5)3SiCl、 (C6H5)3Sm、（(CH3)2N)3CH、CH口CHSiCh等氣體。 根據本發明，一個具有優良梯級覆蓋之金屬層或金屬 矽化物層可以在500°C或更低溫度時，在一個具有高的寬 高比的連結孔之半導體基板上形成。這樣，在製造需要淺 結之高整合度半導體裝置中，具有優良可靠性之導體層， 即具有優良可靠性之金屬障礙層或歐姆層，得以形成。 圖式之槪述 透過詳細描述最佳實施例且參考下列有關圖形，本發 明之上述目標和優點將十分明顯： 圖一是闡述本發明一實施例之處理順序之流程圖； 圖二是闡述本發明一實施例之時間圖解； 圖三是闡述本發明另一實施例之處理順序之流程圖； 圖四是闡述本發明另一實施例之時間圖解； 圖五是闡述本發明製備導體層實施例中所使用之有關 裝置之圖解； 圖六逶關於本發明一實施例中鈦層橫截面之掃描電子 顯微鏡(SEM)照片； 圖七所示乃是X射線螢光分析測定之圖六鈦層之組成 0 $ (請先閱讀背面之注意事項再填寫本頁) 訂---------線'. 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家楳準（CNS)A4規格（210 X 297公釐） 經濟部智慧財產局員工消費合作社印製 ^ S i _____B7_；_ 五、發明說明（°)) 較隹實施例之描述 圖五中用來形成有關本發明之導電層之裝置包括反應 室51，安裝於反應室51之底部用以固定半導體基板55之 襯托器53，安裝於襯托器53上用以注入反應氣體至反應 室51之噴頭57，連接反應室51用以控制其壓力之真空泵 59。此處，噴頭57包括兩個各自獨立之氣體進樣口 A和B 。透過氣體進樣口 A，金屬源氣體和惰性氣體被注入反應 室51 ;透過氣體進樣口 B矽源氣體、犧牲性金屬源氣體、 還原氣體注入反應室51。反應氣體在到達反應室51前， 於進樣口 A或B中壓制住。進樣口 A中，金屬源氣體和惰 性氣體之注入分別由第一和第二閥VI和V2控制；進樣口 B中，矽源氣體、犧牲性金屬源氣體和還原氣體之注入分 別由第三、第四和第五閥V3、V4和V5分別控制。 圖1，2和5描述本發明一實施例中，摻雜雜質之結點 ，即雜質層，形成於半導體基板上，例如，矽基板之表面 預定區域上。對於高整合半導體裝置，雜質層對應於MOS 電晶體的源區/漏區必須瑕成0.1 Aim或更低之深度.這是因 爲MOS電晶體的短通道效應與結深密切相關。雜質層之結 深越低，電晶體的短通道效應越顯著。中間介電層形成於 雜質層形成處的所得結構的整個表面，中間介電層被佈局 圖案化，以形成暴露雜質層之預定區域的連結孔。此時， 半導體裝置整合度增加了，中間介電層厚度增加了，連結 孔之直徑減小了。這樣，隨著半導體裝置整合度增加，連 接孔之寬高比也增加。形成連接孔的半導體基板55載於形 9 A7 (請先閱讀背面之注音？事項再填寫本頁) 訂. -線. 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 經濟部智慧財產局員工消货合作社印製 A7 _B7_ 五、發明說明（忿） 成導電層之裝置的反應室襯托器53上。同時，在處理程序 中，η値初始於零，而同時決定顯示所需處理循環次數的 Κ値(步驟10)。 接著，如果半導體基板55的溫度Ts控制到3⑻〜550 t，第二，第四和第五閥V2，V4和V5打開，在預定時間 內情性氣體、犧牲性金屬源氣體和還原氣體注入51室，由 此在半導體基板55連結孔之形成處的整個表面，形成初始 犧牲性金屬層(步驟11)。犧牲性金屬源氣體和還原氣體在 氣體進樣口 B相互混和，但由於在氣體進樣口 B之100〜 150°C低溫而不能相互反應。此時，在反應室51壓力控制 在10 torr或更低。初始犧牲性金屬層最好是一在後續的過 程中易興形成所需原子層之金屬源氣體反應之金屬層，金 屬鹵化物氣體包含過渡金屬和鹵素。例如，爲了形成鈦金 屬原子層，金屬鹵化物最好包含鈦金屬，即TiCh，TiL·， TiBn，或T1F4是所需的金屬鹵化物氣體。同樣，如果T1CI4 被用於金屬鹵化物氣體，Al，La，Pr，In，Ce，Nd或Be層 是所需初始犧牲性金屬層。此時，Ai是更優先之初始犧牲 性金屬層。因爲鋁和氯等不同的前體之結合具有最高的吉 布斯自由能，如表la。最好用氬氣和氮氣作惰性氣體，氫 氣作還原氣體。還原氣體還原犧牲性金屬源氣體。關於不 同金屬鹵化物氣體在絕對溫度700° K(427°C)之吉布斯自由 能列於表la，lb，2，3和4。 10 (請先閱讀背面之注意事項再填寫本頁) I 丨___ 言 線- 本紙張尺度適用中國囤家標準（CNS)A4規格（210 X 297公釐） A7 B7 五、發明說明) 經濟部智慧財產局員工消f合作社印製 表la 含氯之不同金屬鹵化物氣體在42TC的吉布斯自由能 化合物 吉布斯自由能 (千焦/莫耳） 化合物 吉布斯自由能 (千焦/莫耳) 化合物 吉布斯自由能 (千焦/莫耳） AI2C!5 -1121.9 HfCI3 -626.7 BeCI2 -373.1 ThCI4 -895.8 EuCI3 -621.6 BC丨3 -367.7 UCI5 -811.9 YbCl3 -621.5 SiCI3 -365.7 HfCI. -804.7 K2CI2 -609.8 SnCl4 -362.3 ZrCI4 -777.6 Rb2CI2 -607.6 [nCI3 -335.8 LaC[] -708.9 Li2CI2 -597.8 aici2 -305.5 PrCI3 -706.9 SiCI4 -569.6 丁 aCI3 -300.1 ln2Clg -703.7 aici3 -550.1 ΟθΟΙ3 -299.8 CeC 丨 3 -699.5 Fe2Cls -526.8 MnCI2 -286.4 NdCI3 -696.6 巳 aCl2 -524.3 WCI5 -235.6 Be2CI4 -692.6 SrCI2 -498.1 CsCI -276.7 TiCI4 -678.3 TaC^ -497.5 ZnCI2 -273.5 GdCI3 -674.3 CsCIt -489.1 WCL -267.6 TbCI3 -668.1 PbCI4 -462.1 Ti2CI2 -259.8 HoC!3 -659.7 VaCla -447.2 GaCl: -258.4 ErCI3 -651.7 GeCL -410.8 SbCl5 -249.9 Cs2CI2 -644.1 MgCI, -407.8 Cu.CU -242.9 TmCI3 -641.5 Fe2CI4 &quot;406.5 PC丨3 -242.3 TaCI3 -636.6 GaCI3 -388.6 FeCI3 -240.6 Π (請先閱讀背面之注意事項再填寫本頁) '衣--------訂------ 線&lt; 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） A7 ____ί£ 五、發明說明（（0) 表lb 含氯之不同金屬鹵化物氣體在427°C的吉布斯自由能 化合物 吉布斯自由能 (千焦/莫耳) 化合物 吉布斯自由能 (千焦/莫耳） 化合物 吉布斯自由能 (千焦/莫耳） lnCI2 -240..2 CaCS -165.1 NiCI2 -101.8 BiCI3 -238.5 TeCI4 -136.4 HCI -98.7 丨 AsCI3 -231.4 HgCI2 -136.2 SeCI2 -50.5 SnCI2 -215.8 TeCI2 -134.6 BiCI -30.9 巳aC丨 -198.5 CoCt2 ^125.2 巳eCl ~6.2 | SiCI2 -195.5 GaCI -123.1 AgC! 29.6 SrCi ' -181.5 AiCl· --m.6 BCl· 74.3 · FeCl2 -174.5 BCi2 -109.9 SiCS 123.7 (請先閱讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消f合作社印製 表2 含碘之不同金屬鹵化物氣體在427°C的吉布斯自由能 化合物 吉布斯自由能 (千焦/莫耳） 化合物 吉布斯自由能 (千焦/莫耳) 化合物 吉布斯自由能 (千焦/莫耳） Thl4 -512 Zrl4 -409 Til, -320 Al2is -510 Hfl, -405 Pbl4 -266 Κ2ί2 -480 Dy丨3 -402 Mgl2 -239 La丨3 -457 Tm丨3 -399 Cul -237 Prl] -443 Gdl3 -388 Cs! -220 Cel3 -442 Bal2 -38.0 Tal5 -202 Ndl3 -438 ui, -377 SiL -150 ； Li2J2 -427 Srl2 -353 HI -11.8 E「丨3 -410 Cal， -338 - 12 本紙張尺度適用中國囷家標準（CNS)A4規格（210 X 297公釐） 經濟部智慧財產局員工消費合作社卬製 4391 5 1 ^ A7 __B7 五、發明說明（f I) 表3 含溴之不同金屬鹵化物氣體在427°C的吉布斯自由能 化合物 吉布斯自由能 (千焦/莫耳） 化合物 吉布斯自由能 (千焦/莫耳) 化合物 吉布斯自由能 (千焦/莫耳） Al2Brs -860 HoB「3 -567 CaBr, -435 Mg2Br4 -764 Ε「Βγ3 -566 PbB「4 -428 ThBr, -743 Tm 巳「3 -563 Ta8r5 •424 HfBr4 -639 TbB「3 -559 EuB「2 -413 ZrBr, -627 DyB「3 -559 SiBr4 -387 LaBr3 -621 GdBr3 -551 Cu3 巳 r3 -187 CeBr3 -646 Li2Bf2 -534 WBrs -139 PrBr3 -612 TiB「4 -527 HBr -58.6 UBr4 -602 Na2Br2 -510 - - NdBr3 -598 SrBr2 -453 - - 表4 含氟之不同金屬鹵化物氣體在427°C的吉布斯自由能 化合物 吉布斯自由能 (千焦/莫耳） 化合物 吉布斯自由能 (千焦/莫耳) 化合物 吉布斯自由能 (千焦/莫耳） AI2Fs -2439 HfFd -1592 Li/3 -1457 UFa -1958 ZrF4 -1587 P「F] -1231 TaF5 -1687 -1581 AsF5 -1080 ThF, -1687 SiF, -1515 CuF, -287.3 Mg2F4 -1624 wf5 -1513 HF -277.1 NbFs '-1607 TiF4 -1467 - - 13 (請先閱讀背面之ii意事項再填寫本頁) c -------tr-i 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 經濟部智慧財產局員工消費合作社印製 '4391 51 Δ7 ------B7_ 五、發明說明（\l) 適宜在半導體基板上形成所需金屬原子層之金屬源氣 體和初始犧牲性金屬層，可從表1到4中選擇。例如，爲 了將鈦原子層做爲金屬原子層，Al，La，Pr，In，Ce，Nd ，Be可成爲所需之初始犧牲性金屬層，TiCl·氣體可成爲所 需之金屬源氣體。形成A1層以做爲初始犧牲金屬層的犧牲 性金屬源氣體，最好是包含A1之前體，例如，（C4H&lt;〇2AlH ，（C4H4A1H，（C2H5)3A卜（CH+Al，A1H3N(CH小，（CH3)2A1H ，或(CH小C2H5N : A1H3。同樣，形成La層做爲初始犧牲性 金屬層的犠牲性金屬源氣體，最好是一種包含La的前體， 例如，（C5H5)3La或(C2H7C4EU：bLa，形成Pr層做爲初始犧牲 性金屬層的犧牲性金屬源氣體，是一種包含Pr的前體，如 (C5H〇3Pr或(C3H7GH小Pr。同樣，形成In層做爲初始犧牲 性金屬層的犧牲性金屬源氣體，最好是一種包含In的前體 ，例如，GtLIn、（C.H3)5C5In、（C2H5)3In 或(CH小In。同樣’ 形成Ce層做爲初始犧牲性金屬層的犧牲性金屬源氣體’最 好是一種包含Ce的前體，例如，（C;H小Ce或 ((C5H5)C5H4)3Ce。形成Nd層做爲初始犧牲性金屬層的犧牲 性金屬源氣體，最好是一種包含Nd的前體’如（GH+Nd 或(C3H?C5H小Nd。再者，形成Be層做爲初始犧牲性金屬層 的犧牲性金屬源氣體，最好是一種包含Be的前體，例如’ Be(C2H5)2。包含A1的前體是犧牲性金屬源氣體之優先選擇 。如上所述，因爲A1的吉布斯自由能高於其他和鹵原子 Cl，Br，I結合之過渡金屬及前體。 如果A1層被做爲初始犧牲性金屬層，TMA(三甲基錦 14 (請先閱讀背面之注意事項再填寫本頁) 訂---------線— 本紙張尺度適用t國國家標準（CNS)A4規格（210 X 297公釐） 細 ^ '·&gt;；! Α7 Β7 經濟部智慧財產局員工消費合作社印製 五、發明說明（P?) ;(CH+Al)是典型之犧牲性金屬源氣體的前體。此時，H2 做爲還原氣體，與TMA氣體反應使TMA中CH3變成CH4 。CH4從反應室51中排掉，而A1原子沉積於半導體基板表 面上形成A1層。接著，初始犧牲性金屬層形成處之所得結 構之周圍部分，被惰性氣體淸除，且完全排除了在反應室 51中殘存之犧牲性金屬源氣體(步驟Π)，（第一淸除過程） 。還原氣體在第一淸除過程中可被供給，同樣，半導體基 板保持在300〜500°C。此處，半導體基板在初始犧牲性金 屬層形成過程中之溫度，可控制成同於或不同於其在第一 淸除過程中之溫度。 第一淸除過程完成之後，犧牲性金屬源氣體、還原氣 體和惰性氣體被注入反應室51，使犧牲性金屬源氣體和還 原氣體起反應，這樣使犧牲性金屬原子層在初始犧牲性金 屬層上形成(步驟15)。例如，如果TMA((CH3)3A1)氣體和氫 氣被分別地用作犧牲性金屬源氣體和還原氣體，A1層將形 成爲犧牲性金屬原子層。此處，犧牲性金屬原子層由與初 始犧牲性金屬層相同之材料形成，例如，如果初始犧牲性 金屬層是Μ，犧牲性金屬原子層亦是由A1形成。同樣， 犧牲性金屬原子層使用形成初始犧牲性金屬層相同之犧牲 性金屬源氣體來形成。此時，犧牲性金屬原子層之厚度最 好應在4〜5Α。這裏，當整個被暴露雜質層的表面被犧牲 性金屬原子層覆蓋時，初始犧牲性金屬層之形成過程可以 被省略。換句話講，形成初始犧牲性金屬層，是爲了防止 注入反應室51之金屬源氣體在金屬原子層之形成過程中與 15 本紙張尺度適用+國國家標準（CNS)A4規格（210 X 297公釐） I K - I n J1— —1 -1 - - ί J. ^ Λ -I - - - -- n ---^-T°J1 1— - - - n n I (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（α) 雜質層中矽原子反應。 犧牲性金屬層形成處之所得結構之周圍部分’被惰性 氣體淸除，完全排除了殘留在反應室之犧牲性金屬源氣體（ 步驟17)(第二淸除過程）。還原氣體可在第二淸除過程中供 給。第二淸除過程完成後，金屬源氣體’惰性氣體和還原 氣體注入反應室51中，由此’除掉犧牲性金屬原子層和初 始犧牲性金屬層，同時在半導體基板之整個表面上形成金 屬原子層(步驟19)。此時’最好用包含形成金屬層之金屬 原子的金屬鹵化物氣體，如TiCh ’做爲金屬源氣體。惰性 氣體，如N2氣或Ar氣，是金屬源氣體即金屬鹵化物氣體 之載氣。當犧牲性金屬原子層和初始犧牲性金屬層都是A1 層，TiCU氣體被用作金屬鹵化物氣體時’ AhCU氣體將由 A1層之A1原子和TiCU中的（：1原子結合而生成’溶於 TiCL·氣體中的Ti原子將沉積於半導體基板上’形成Ti層 。AhCh氣體將於反應室51中被排除掉。 因爲AhCU的吉布斯自由能高於TiCU氣體，正如表 1A所示，A1層與TiCU氣體反應，形成鈦層。TaCls，HfCU ，ZrCh，TiL·..，TaL·，HfL·，Zrh，TiBn，TaBn，HfBn， ZrBn，TiF*，TaF5，HfF，或ZrF*氣體可以代替TiCl·氣體做 爲金屬鹵化物氣體。爲了使用HfCl·或ZrCU氣體做爲金屬 鹵化物氣體形成Hf層或Zr層，A1層是最佳犧牲性金屬原 子層或初始犧牲性金屬層。因爲HfCL·和ZrCL·氣體吉布斯 自由能高於 LaCh，PrCh，ImCU，CeCh，NdCl;和 BezCU 氣 體，如表1A所示。同樣，爲了形成所需之金屬原子層， [6 X\J I ------------- --------訂---------線- (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（2i0 X 297公釐） A7 ____—_B7 _____ 五、發明說明 ((^) 大多使用金屬鹵化物氣體，如表2至4所示，A1層是最優 之犧牲性金屬原子層或初始犧牲性金屬層。步驟13，15 ’ 17和19(第一次淸除，形成犧牲性金屬原子層，第二次淸 除，形成金屬原子層)最好於相同溫度下進行。形成金屬原 子層之後，η値增加1(步驟21)，增加的η與初始預定循環 數k相比較(步驟23)。如果增加的η値比初始預定循環數k 小，步驟13，15，Π和19(第一次淸除，形成犧牲性金屬 原子層，第二次淸除，形成金屬原子層)相繼被重覆’直到 II値等於循環數k，由此在半導體基板上形成所需厚度之金 屬層。當金屬層形成處之所得結構在預定溫度被退火時， 金屬矽化物層在雜質層和金屬層之間的界面上形成。此處 ，金屬矽化物層是改善金屬層和雜質層間之連結阻抗的歐 姆層。 如圖6所示，鈦層根據本發明一實施例形成。在形成 初始犧牲金屬層之過程中，第一次淸除、形成犧牲性金屬 原子層、第二次淸除、形成金屬原子層，半導體基板之溫 度Ts是450°C。初始犧牲金屬層藉由將TMA氣體和出氣 體反應十秒的鋁層而形成。此時，惰性％氣也注入反應室 中，％和Η:分別以流速40sccm和iOOOsccm注入反應室， 在反應室中壓力大約是3 toa。同樣，TMA氣體使用擴散 器在室溫產生。此時，無載氣用於TMA氣體，故TMA氣 體是由於TMA氣體蒸氣壓與反應室壓力之差而注入反應室 。在形成初始犧牲性金屬層(A1層)之後，TMA氣體不再供 給，爲了淸除殘留於反應室中的TMA氣體，第一淸除過程 L7 本紙張尺度適用中國國家標準（CNS)A4规格（210 X 297公釐) ' ^ (請先閱讀背面之注意事項再填寫本頁) k--------tr-i--------線' 經濟部智慧財產局員工消費合作社印製 4391 51 五、發明說明（^) A7 B7 經濟部智慧財產局員工消費合作社印製 進行5秒鐘。此時，N2氣體和出氣體繼續注入，使反應室 壓力大約保持在8 torr。然後，第一淸除過程進行完成之後 ，TMA氣體再供給大約1秒鐘，這樣H2與TMA氣體反應 形成薄的犧牲性金屬原子層，即鋁原子層。下一步，TMA 氣體停止供給，第二淸除過程如第一淸除過程之同樣之方 式進行。之後，ΤΗ：14氣體注入反應室約5秒鐘，這樣，鋁 層和TiCL*氣體相互反應，在半導體基板之整個表面上形成 鈦原子層。接下來，第一次淸除，形成犧牲性金屬原子層 ，第二次淸除，形成金屬原子層，依序重複50次。 參考圖6，根據本發明一實施例，鈦層在具有寬高比 爲5或更高的連結孔裏形成，且在連結孔周圍部分具有均 一的約600A的厚度。 在圖7中，水平軸代表X-射線之繞射角，垂直軸代表 任意單位之繞射X-射線強度。同樣，圖中，X-射線繞射角 2 0之範圍在140°和170°之間是透過測量A1成分得到的 結果，角度在84°和89°之間是透過測量Ti成分得到的 結果。測量C1成分得到的結果是90°和96°之間。 從圖7可知，根據本發明之一實施例形成之Ti層不包 含雜質，只有Ti原子。 圖3和4，標有相同參考數字之部分代表著在第一實 施例中提到之相同步驟 參考圖3、4和5，在形成初始犧牲性金屬層、第一次 淸除、形成犧牲性金屬原子層、第二次淸除，形成金屬原 子層之步驟11、13、15、17和19後，增加進行了第三次 18 (請先閱讀背面之注意事項再填寫本頁) -Q------ 訂— 線· 本紙張尺度適用中國國家標準（CNS)A4規格（2〖0 X 297公釐） 經濟部智慧財產局員Η消費合作社印製 43 91 δ 1 Α7 ______Β7______ 五、發明說明（q) 淸除、形成矽原子層之步驟25和27由此形成金屬矽化物 層。第三次淸除之步驟25同於第一次淸除第二次淸除之步 驟13和17。，在第三次淸除之步驟25完成之後，透過將 矽源氣體注入反應室51中反應形成在金屬原子層上之矽原 子層。此時，在形成矽層過程中，半導體基板的溫度維持 於在第三次淸除步驟25中之相同’溫度，即是，300〜500°C 。像在本發明之第一實施例中之步驟11、13、15、Π、19 、25和27(第一次淸除、形成犧牲性金屬原子層、第二次 淸除1形成金屬原子層，第三次淸除、形成矽金屬原子層） 如所需按順序重複，這樣，金屬原子層和矽原子層交替層 疊。此時，金屬原子層和矽原子層相互反應，這樣，金屬 砂層可以形成。金屬矽化物層之組成比，可透過控制金屬 原子層和矽原子層之厚度而變化。金屬源氣體最好用SiH-、S12H6 、 （CH〇3SiC ξ CSi(CH)3 、 ((CH3)3Si)2CH2 、 (CH3)3CSi(CH3)2Cl ' (C4H9)SiCh 、 （CH3)3SiN(C2H5)2 、 (CH3)2SiCl2、（(CH〇2Si-)n、（C6H5)2SiCl2、（C6H5)2SiH2、 C^HsSiCh、ChSiSiCh、（CH3)3SiSi(CH3)3、CHsSiChH、 (CH3)(CsH5)SiCl2、C6H5SiCh，SiBn、SiCh、SiF4、SiL·、 (C32HieNs)SiCh、Si(Si(CH3)3)4、Si(CH3&gt;、CH^SiCh、HSiCh、 (GH5)3SiQ、CF3Si(CH3)3、（CHbhSiCl、（CH3)3SiH、（CH3)3SiC 三 CH、（C5H5)Si(CH3)3、（C5(CH3)5)Si(CH3h、（C6H5)3SiCl、 (CsH小SiH、（(CHANhCH、CH2=CHSiCl3氣體。 丰艮據本發明另一具體實施例，所需之金屬矽化物層， 例如’ TiSi層、TaSi層、ZrSi層或HfSi層，可以根據金屬 __ 19 本i張尺度適用斤國家^~準-(咖认4規‘T2iG χ 297 - (請先閱讀背面之注意事項再填寫本頁) -rlk&lt;-------'—tT.---------線~ 3 '9 1 δ 1 Α7 _Β7_ 五、發明說明（ίβ) 原子層之種類來形成。同樣，具有優良之梯級覆蓋之金屬 矽化物層，可以形成於具有高的寬高比的連結孔內。 如上所述，根據本發明，具有優良梯級覆蓋的金屬層 或金屬矽化物層，可以形成於具有高的寬高比的連結孔內 。因此，可形成適合高度整合之半導體裝置的金屬連結。 本發明並不限於舉例說明的具體實施例，而熟悉此藝 者可於本發明的範圍內做許多改變和更動。 &quot; TJ 象 r |丨丨丨丨 4 β5- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 ο 2 本紙張尺度適用+國國家標準（CNS)A4規格（210 X 297公釐）^ 3 91 5 I A7 B7 V. Description of the invention (<) Metal atoms, for example, transition metal atoms, are deposited on a semiconductor substrate to form a metal atom layer. The sacrificial metal atomic layer and the metal atomic layer are preferably sequentially formed when the semiconductor substrate is heated to 300 to 500 ° C. According to another aspect of the object achieved by the present invention, a sacrificial metal atom layer and a metal atom layer are formed on a semiconductor substrate in the same manner as in the above aspect, and a silicon atom layer is formed on the metal atom layer. Here, before the formation of the first sacrificial metal atom layer on the semiconductor substrate, the initial sacrificial metal layer is formed on the semiconductor substrate in the same manner as described above. Then, the sacrificial metal atomic layer, the metal atomic layer, and the silicon atomic layer are sequentially stacked on the structure formed by the initial silicon atomic layer at least once, so the metal atomic layer and the silicon atomic layer are alternately stacked on the semiconductor substrate. At this time, when the thickness of a metal atomic layer and the thickness of a silicon atomic layer are properly controlled, a metal silicide layer having a desired composition ratio is formed. Alternatively, the silicon atomic layer and the metal atomic layer are sequentially formed on the semiconductor substrate at least once, so that the silicon atomic layer and the metal atomic layer are alternately stacked. Then, if necessary, the obtained structure in which silicon atomic layers and metal atomic layers are alternately laminated is annealed to form a metal silicide layer capable of improving the connection resistance. The preferred solution is through rapid thermal processing (RTP) annealing, a furnace annealing or vacuum annealing. And when the silicon atomic layer is formed, the semiconductor substrate is heated to 300 ~ 500 ° C. The silicon atomic layer is formed using a precursor gas containing sand atoms. The sand source gas is best to use the following gases: SiH4, S12H6, (CH3) 3SiC ξ CSi (CH) 3, ((CEh), Si) 2CH2, (CH small CSUCH + Cl '(C4H9) SiCL ·, (CH3) 3SiN (C2H5) 2, (CH3) 2SiCl2 '((CH: 〇2Si-) n, (CsHshSiCh, (C6Hs) 2SiH2, 7) This paper size applies to China National Standard (CNS) A4 specifications (210 x 297 mm)- Γ I--II I --- {. 机 I ------- Order --------- 1 (Please read the precautions on the back before filling this page) S1I 蘧 A7 B7 V · Description of the invention () GHsSiCh, Cl3SiSiCl3, (CH3) 3SiSi (CH3) 3, CHdiChH, (CH3) (C6H5) Sia2, CsHsSiCb, SiBn, SiCU, S1F4, SiL ·, (C32Hl6N8) SiCl2, Si (Si (CH; ) 3) 4, Si (CH3) 4, CiLSiCh, HSiCh ′ (C2H5> SiCn, CF3Si (CH3) 3, (CH〇3SiCl, (CHASiH, (CH3) 3SiC = CH '(C5H5) Si (CH3) 3, (C5 (CH3) 5) Si (CH3) 3, (C6H5) 3SiCl, (C6H5) 3Sm, ((CH3) 2N) 3CH, CH port CHSiCh, etc.) According to the present invention, a metal layer with excellent step coverage or The metal silicide layer can be formed on a semiconductor substrate having a high aspect ratio connection hole at 500 ° C or lower. Thus, in manufacturing a highly integrated semiconductor device requiring a shallow junction, a conductive layer having excellent reliability, that is, a metal barrier layer or an ohmic layer having excellent reliability, is formed. The description of the figure describes the best implementation in detail For example, referring to the following related figures, the above-mentioned objects and advantages of the present invention will be very obvious: Figure 1 is a flowchart illustrating the processing sequence of an embodiment of the invention; Figure 2 is a timing diagram illustrating an embodiment of the invention; Figure 3 is A flowchart illustrating a processing sequence of another embodiment of the present invention; FIG. 4 is a timing diagram illustrating another embodiment of the present invention; FIG. 5 is a diagram illustrating related devices used in the embodiment for preparing a conductor layer of the present invention; FIG. 6扫描 Scanning electron microscope (SEM) photo of the cross section of the titanium layer in an embodiment of the present invention; Figure 7 shows the composition of the titanium layer in Figure 6 shown by X-ray fluorescence analysis. 0 $ (Please read the precautions on the back first (Fill in this page again) Order --------- line '. Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Cooperatives This paper is printed in accordance with China National Standard (CNS) A4 (210 X 297) (%) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs ^ S i _____B7_; _ V. Description of the invention (°)) Comparative description of the embodiment Figure 5 The device used to form the conductive layer of the present invention includes a reaction chamber 51 A susceptor 53 installed on the bottom of the reaction chamber 51 to fix the semiconductor substrate 55, a nozzle 57 installed on the susceptor 53 to inject a reaction gas to the reaction chamber 51, and a vacuum pump 59 connected to the reaction chamber 51 to control its pressure . Here, the spray head 57 includes two independent gas inlets A and B. Through the gas inlet A, a metal source gas and an inert gas are injected into the reaction chamber 51; through the gas inlet B, a silicon source gas, a sacrificial metal source gas, and a reducing gas are injected into the reaction chamber 51. Before reaching the reaction chamber 51, the reaction gas is suppressed in the injection port A or B. Injector A, the injection of metal source gas and inert gas is controlled by the first and second valves VI and V2, respectively. Injector B, the injection of silicon source gas, sacrificial metal source gas, and reducing gas are respectively controlled by the first The third, fourth and fifth valves V3, V4 and V5 are controlled respectively. Figures 1, 2 and 5 depict an embodiment of the present invention in which a node of doped impurities, that is, an impurity layer, is formed on a semiconductor substrate, for example, a predetermined area on a surface of a silicon substrate. For highly integrated semiconductor devices, the source / drain regions of the impurity layer corresponding to the MOS transistor must be flawed to a depth of 0.1 Aim or less. This is because the short channel effect of the MOS transistor is closely related to the junction depth. The lower the junction depth of the impurity layer, the more significant the short channel effect of the transistor. An intermediate dielectric layer is formed on the entire surface of the resulting structure where the impurity layer is formed, and the intermediate dielectric layer is patterned in a layout to form a connection hole exposing a predetermined region of the impurity layer. At this time, the integration degree of the semiconductor device is increased, the thickness of the intermediate dielectric layer is increased, and the diameter of the connection hole is reduced. Thus, as the integration degree of the semiconductor device increases, the aspect ratio of the connection hole also increases. The semiconductor substrate 55 forming the connection hole is contained in the shape 9 A7 (please read the note on the back? Matters before filling out this page) Order. -Line. This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) Printed by the Consumer Goods Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 _B7_ V. Description of the Invention (忿) The reaction chamber susceptor 53 of the device forming a conductive layer. At the same time, in the processing program, η 値 is initialized to zero, and at the same time, κ 决定, which displays the required number of processing cycles, is determined (step 10). Next, if the temperature Ts of the semiconductor substrate 55 is controlled to 3 to 550 t, the second, fourth, and fifth valves V2, V4, and V5 are opened, and the emotional gas, the sacrificial metal source gas, and the reducing gas are injected into the 51 chamber within a predetermined time. Thus, an initial sacrificial metal layer is formed on the entire surface of the semiconductor substrate 55 where the connection hole is formed (step 11). The sacrificial metal source gas and the reducing gas are mixed with each other in the gas inlet B, but they cannot react with each other due to the low temperature of 100 ~ 150 ° C in the gas inlet B. At this time, the pressure in the reaction chamber 51 is controlled to 10 torr or lower. The initial sacrificial metal layer is preferably a metal layer that reacts with a metal source gas that forms a desired atomic layer in a subsequent process. The metal halide gas contains a transition metal and a halogen. For example, in order to form a titanium metal atomic layer, the metal halide preferably contains titanium metal, that is, TiCh, TiL ·, TiBn, or T1F4 is a desired metal halide gas. Similarly, if T1CI4 is used for a metal halide gas, the Al, La, Pr, In, Ce, Nd or Be layer is the required initial sacrificial metal layer. At this time, Ai is the more preferred initial sacrificial metal layer. Because the combination of different precursors such as aluminum and chlorine has the highest Gibbs free energy, as shown in Table la. Preferably, argon and nitrogen are used as the inert gas, and hydrogen is used as the reducing gas. The reducing gas reduces the sacrificial metal source gas. The Gibbs free energies for different metal halide gases at an absolute temperature of 700 ° K (427 ° C) are listed in Tables la, lb, 2, 3 and 4. 10 (Please read the precautions on the back before filling this page) I 丨 ___ Speech Line-This paper size is applicable to China Store Standard (CNS) A4 (210 X 297 mm) A7 B7 V. Description of the Invention) Ministry of Economic Affairs Employees of the Intellectual Property Bureau printed a table of cooperatives la Gibbs free energy compounds containing different metal halides gas at 42TC Gibbs free energy (kilojoules / mole) Compound Gibbs free energy (kilojoules / Moore) Compound Gibbs Free Energy (KJ / Mole) AI2C! 5 -1121.9 HfCI3 -626.7 BeCI2 -373.1 ThCI4 -895.8 EuCI3 -621.6 BC 丨 3 -367.7 UCI5 -811.9 YbCl3 -621.5 SiCI3 -365.7 HfCI.- 804.7 K2CI2 -609.8 SnCl4 -362.3 ZrCI4 -777.6 Rb2CI2 -607.6 [nCI3 -335.8 LaC [] -708.9 Li2CI2 -597.8 aici2 -305.5 PrCI3 -706.9 SiCI4 -569.6 butylaCI3 -300.1 ln2Clg -703.7 aici3 -550.1 ΟθΙΟ -699.5 Fe2Cls -526.8 MnCI2 -286.4 NdCI3 -696.6 巳 aCl2 -524.3 WCI5 -235.6 Be2CI4 -692.6 SrCI2 -498.1 CsCI -276.7 TiCI4 -678.3 TaC ^ -497.5 ZnCI2 -273.5 GdCI3 -674.3 CsCIt -489.1 WCI3-26b. -462.1 T i2CI2 -259.8 HoC! 3 -659.7 VaCla -447.2 GaCl: -258.4 ErCI3 -651.7 GeCL -410.8 SbCl5 -249.9 Cs2CI2 -644.1 MgCI, -407.8 Cu.CU -242.9 TmCI3 -641.5 Fe2CI4 &quot; 406.5 PC 丨 3 -242.3 TaCI3- 636.6 GaCI3 -388.6 FeCI3 -240.6 Π (Please read the precautions on the back before filling in this page) 'Clothing -------- Order ------ Thread &lt; This paper size applies to China National Standard (CNS ) A4 specification (210 X 297 mm) A7 ____ ί £ V. Description of the invention ((0) Table lb Gibbs free energy compounds of different metal halide gases containing chlorine at 427 ° C Gibbs free energy (kilojoules) / Mole) Compound Gibbs Free Energy (KJ / Mole) Compound Gibbs Free Energy (KJ / Mole) lnCI2 -240..2 CaCS -165.1 NiCI2 -101.8 BiCI3 -238.5 TeCI4 -136.4 HCI- 98.7 丨 AsCI3 -231.4 HgCI2 -136.2 SeCI2 -50.5 SnCI2 -215.8 TeCI2 -134.6 BiCI -30.9 巳 aC 丨 -198.5 CoCt2 ^ 125.2 巳 eCl ~ 6.2 | SiCI2 -195.5 GaCI -123.1 AgC! 29.6 SrCi '-181.5 AiCl ·- m.6 BCl · 74.3 · FeCl2 -174.5 BCi2 -109.9 SiCS 123.7 (Please read the precautions on the back before filling this page) Ordered by the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by the cooperative. Table 2 Gibbs Free Energy Compounds with Different Metal Halide Gases Containing Iodine at 427 ° C Gibbs Free Energy (KJ / Mole) Compound Gibbs Free Energy (kilojoules / mole) Compound Gibbs free energy (kilojoules / mole) Thl4 -512 Zrl4 -409 Til, -320 Al2is -510 Hfl, -405 Pbl4 -266 Κ2ί2 -480 Dy 丨 3 -402 Mgl2 -239 La 丨 3 -457 Tm 丨 3 -399 Cul -237 Prl] -443 Gdl3 -388 Cs! -220 Cel3 -442 Bal2 -38.0 Tal5 -202 Ndl3 -438 ui, -377 SiL -150; Li2J2 -427 Srl2 -353 HI -11.8 E 「丨 3 -410 Cal ， -338-12 This paper size is applicable to the Chinese Family Standard (CNS) A4 (210 X 297 mm) The system of employee consumer cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 4391 5 1 ^ A7 __B7 V. Description of the invention (f I) Table 3 Gibbs free energy compound of different metal halide gases containing bromine at 427 ° C Gibbs free energy (kJ / mole) Compound Gibbs free energy (KJ / Mole) Compound Gibbs Free Energy (KJ / Mole) Al2Brs -860 HoB 「3 -567 CaBr, -435 Mg2Br4 -764 Ε」 Β γ3 -566 PbB 「4 -428 ThBr, -743 Tm 巳「 3 -563 Ta8r5 • 424 HfBr4 -639 TbB 「3 -559 EuB」 2 -413 ZrBr, -627 DyB 「3 -559 SiBr4 -387 LaBr3 -621 GdBr3 -551 Cu3 巳 r3 -187 CeBr3 -646 Li2Bf2 -534 WBrs -139 PrBr3 -612 TiB 「4 -527 HBr -58.6 UBr4 -602 Na2Br2 -510--NdBr3 -598 SrBr2 -453--Table 4 Different fluorine-containing metals Gibbs free energy of compounds of halides at 427 ° C Gibbs free energy (kJ / mole) Compound Gibbs free energy (kJ / mole) Compound Gibbs free energy (kJ / mol) Ear) AI2Fs -2439 HfFd -1592 Li / 3 -1457 UFa -1958 ZrF4 -1587 P 「F] -1231 TaF5 -1687 -1581 AsF5 -1080 ThF, -1687 SiF, -1515 CuF, -287.3 Mg2F4 -1624 wf5- 1513 HF -277.1 NbFs' -1607 TiF4 -1467--13 (Please read the meanings on the back before filling out this page) c ------- tr-i This paper size applies Chinese National Standard (CNS) A4 Specifications (210 X 297 mm) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs' 4391 51 Δ7 ------ B7_ V. Description of the invention (\ l) Suitable for forming the required metal source on the semiconductor substrate The metal source gas layer and the initial sacrificial metal layer, may be selected from Table 1-4. For example, in order to use a titanium atomic layer as a metal atomic layer, Al, La, Pr, In, Ce, Nd, Be can be a required initial sacrificial metal layer, and TiCl · gas can be a required metal source gas. The A1 layer is formed as a sacrificial metal source gas for the initial sacrificial metal layer, and preferably contains the A1 precursor, for example, (C4H &lt; 〇2AlH, (C4H4A1H, (C2H5) 3A, (CH + Al, A1H3N (CH small , (CH3) 2A1H, or (CH small C2H5N: A1H3. Similarly, the La layer used as the sacrificial metal source gas for the initial sacrificial metal layer is preferably a precursor containing La, for example, (C5H5) 3La or (C2H7C4EU: bLa, forming the Pr layer as the sacrificial metal source gas for the initial sacrificial metal layer, is a precursor containing Pr, such as (C5H03Pr or (C3H7GH small Pr.) Similarly, forming the In layer as the initial sacrificial The sacrificial metal source gas of the metal layer is preferably a precursor containing In, for example, GtLIn, (C.H3) 5C5In, (C2H5) 3In, or (CH small In.) Also, the Ce layer is formed as an initial sacrificial The sacrificial metal source gas of the metal layer is preferably a precursor containing Ce, for example, (C; H small Ce or ((C5H5) C5H4) 3Ce. Forming the Nd layer as the sacrificial property of the initial sacrificial metal layer The metal source gas is preferably a precursor containing Nd, such as (GH + Nd or (C3H? C5H small Nd. Furthermore, it forms As the sacrificial metal source gas of the initial sacrificial metal layer, the Be layer is preferably a precursor containing Be, for example, 'Be (C2H5) 2. The precursor containing A1 is the preferred choice of the sacrificial metal source gas. As above As mentioned above, because the Gibbs free energy of A1 is higher than other transition metals and precursors combined with halogen atoms Cl, Br, I. If the A1 layer is used as the initial sacrificial metal layer, TMA (trimethyl bromide 14 ( Please read the precautions on the back before filling in this page) Order --------- Line — This paper size is applicable to the national standard (CNS) A4 specification (210 X 297 mm) Fine ^ '· &gt;; Α7 Β7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs V. Invention Description (P?); (CH + Al) is a typical precursor of a sacrificial metal source gas. At this time, H2 is used as a reducing gas, and The TMA gas reaction causes CH3 in TMA to become CH4. CH4 is removed from the reaction chamber 51, and A1 atoms are deposited on the surface of the semiconductor substrate to form the A1 layer. Then, the surrounding portion of the resulting structure where the sacrificial metal layer is formed is inert. The gas is eliminated and the sacrificial metal source gas remaining in the reaction chamber 51 is completely eliminated (Step Π), (first eradication process). The reducing gas can be supplied during the first erasure process. Similarly, the semiconductor substrate is maintained at 300 ~ 500 ° C. Here, the semiconductor substrate is in the initial sacrificial metal layer. The temperature during the formation process can be controlled to be the same as or different from the temperature during the first elimination process. After the first elimination process is completed, the sacrificial metal source gas, reducing gas, and inert gas are injected into the reaction chamber 51, The sacrificial metal source gas and the reducing gas are reacted, so that the sacrificial metal atom layer is formed on the initial sacrificial metal layer (step 15). For example, if TMA ((CH3) 3A1) gas and hydrogen gas are used as the sacrificial metal source gas and the reducing gas, respectively, the A1 layer will form a sacrificial metal atomic layer. Here, the sacrificial metal atom layer is formed of the same material as the original sacrificial metal layer. For example, if the initial sacrificial metal layer is M, the sacrificial metal atom layer is also formed of A1. Similarly, the sacrificial metal atomic layer is formed using the same sacrificial metal source gas as the initial sacrificial metal layer. In this case, the thickness of the sacrificial metal atomic layer should preferably be 4 to 5A. Here, when the entire surface of the exposed impurity layer is covered with a sacrificial metal atom layer, the formation process of the initial sacrificial metal layer can be omitted. In other words, the formation of the initial sacrificial metal layer is to prevent the metal source gas injected into the reaction chamber 51 from forming on the metal atomic layer in accordance with 15 paper standards + National Standard (CNS) A4 (210 X 297) Mm) IK-I n J1— —1 -1--ί J. ^ Λ -I----n --- ^-T ° J1 1—---nn I (Please read the note on the back first Please fill in this page again for details) Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (α) The silicon atom in the impurity layer reacts. The surrounding portion of the structure obtained at the formation of the sacrificial metal layer is purged with an inert gas, and the sacrificial metal source gas remaining in the reaction chamber is completely excluded (step 17) (second purging process). The reducing gas may be supplied during the second scavenging process. After the second eradication process is completed, the inert gas and the reducing gas of the metal source gas are injected into the reaction chamber 51, thereby removing the sacrificial metal atomic layer and the initial sacrificial metal layer, and simultaneously forming a metal on the entire surface of the semiconductor substrate Atomic layer (step 19). At this time, 'a metal halide gas containing metal atoms forming a metal layer, such as TiCh', is preferably used as the metal source gas. An inert gas, such as N2 gas or Ar gas, is a carrier gas for a metal source gas, that is, a metal halide gas. When the sacrificial metal atomic layer and the initial sacrificial metal layer are both A1 layers, TiCU gas is used as the metal halide gas. 'AhCU gas will be generated by the combination of the A1 atom in the A1 layer and the TiCU (: 1 atom) to dissolve. Ti atoms in TiCL · gas will be deposited on the semiconductor substrate to form a Ti layer. AhCh gas will be eliminated in the reaction chamber 51. Because the Gibbs free energy of AhCU is higher than that of TiCU gas, as shown in Table 1A, A1 The layer reacts with TiCU gas to form a titanium layer. TaCls, HfCU, ZrCh, TiL ..., TaL ·, HfL ·, Zrh, TiBn, TaBn, HfBn, ZrBn, TiF *, TaF5, HfF, or ZrF * gas can be used instead TiCl · gas is used as metal halide gas. In order to form Hf or Zr layer using HfCl · or ZrCU gas as metal halide gas, A1 layer is the best sacrificial metal atomic layer or initial sacrificial metal layer. Because HfCL · And ZrCL · gas Gibbs free energy higher than LaCh, PrCh, ImCU, CeCh, NdCl; and BezCU gas, as shown in Table 1A. Similarly, in order to form the required metal atomic layer, [6 X \ JI --- ---------- -------- Order --------- line- (Please read the note on the back first Please fill in this page for the matters needing attention.) This paper size is in accordance with Chinese National Standard (CNS) A4 specification (2i0 X 297 mm) A7 ______B7 _____ 5. Description of the invention ((^) Most metal halide gases are used, as shown in Table 2 As shown in Fig. 4, the A1 layer is the optimal sacrificial metal atomic layer or the initial sacrificial metal layer. Steps 13, 15 '17 and 19 (first eradication to form a sacrificial metal atomic layer, second erasure, The formation of the metal atomic layer) is preferably performed at the same temperature. After the metal atomic layer is formed, η 値 is increased by 1 (step 21), and the increased η is compared with the initial predetermined cycle number k (step 23). If the increased η 値 ratio is The initial predetermined number of cycles k is small, steps 13, 15, Π, and 19 (the first eradication to form a sacrificial metal atomic layer, the second eradication to form a metal atomic layer) are repeated one by one until II 値 equals the cycle A number of k, thereby forming a metal layer of a desired thickness on the semiconductor substrate. When the resulting structure where the metal layer is formed is annealed at a predetermined temperature, a metal silicide layer is formed at the interface between the impurity layer and the metal layer. Metal silicide layer An ohmic layer connecting impedance with the impurity layer. As shown in FIG. 6, a titanium layer is formed according to an embodiment of the present invention. In the process of forming the initial sacrificial metal layer, the first sacrificial metal atom layer is formed, and the first The second elimination formed a metal atomic layer, and the temperature Ts of the semiconductor substrate was 450 ° C. The initial sacrificial metal layer was formed by reacting the TMA gas with the outgas for ten seconds. At this time, the inert% gas was also injected into the reaction chamber, and% and Η: were injected into the reaction chamber at a flow rate of 40 sccm and iOOOsccm, respectively, and the pressure in the reaction chamber was about 3 toa. Similarly, TMA gas is generated at room temperature using a diffuser. At this time, no carrier gas is used for the TMA gas, so the TMA gas is injected into the reaction chamber due to the difference between the vapor pressure of the TMA gas and the pressure of the reaction chamber. After the initial sacrificial metal layer (layer A1) is formed, the TMA gas is no longer supplied. In order to eliminate the TMA gas remaining in the reaction chamber, the first removal process is L7. This paper applies the Chinese National Standard (CNS) A4 specification ( 210 X 297 mm) '^ (Please read the precautions on the back before filling this page) k -------- tr-i -------- line' Consumption by the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the cooperative 4391 51 V. Description of the invention (^) A7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs for 5 seconds. At this time, N2 gas and outlet gas were continuously injected to keep the pressure in the reaction chamber at about 8 torr. Then, after the first scavenging process is completed, the TMA gas is supplied for about 1 second, so that H2 reacts with the TMA gas to form a thin sacrificial metal atomic layer, that is, an aluminum atomic layer. Next, the supply of TMA gas is stopped, and the second erasing process is performed in the same manner as the first erasing process. After that, the T: 14 gas is injected into the reaction chamber for about 5 seconds. In this way, the aluminum layer and the TiCL * gas react with each other to form a titanium atom layer on the entire surface of the semiconductor substrate. Next, the first elimination is performed to form a sacrificial metal atomic layer, and the second elimination is performed to form a metal atomic layer, which is sequentially repeated 50 times. Referring to FIG. 6, according to an embodiment of the present invention, a titanium layer is formed in a connection hole having an aspect ratio of 5 or higher, and has a uniform thickness of about 600A in a portion around the connection hole. In Fig. 7, the horizontal axis represents the diffraction angle of X-rays, and the vertical axis represents the diffraction X-ray intensity in arbitrary units. Similarly, in the figure, the range of X-ray diffraction angle 20 between 140 ° and 170 ° is the result obtained by measuring the A1 component, and the angle between 84 ° and 89 ° is the result obtained by measuring the Ti component. The measurement of the C1 component is between 90 ° and 96 °. It can be seen from FIG. 7 that the Ti layer formed according to an embodiment of the present invention does not contain impurities, but only Ti atoms. 3 and 4, the parts marked with the same reference numerals represent the same steps mentioned in the first embodiment. Referring to FIGS. 3, 4 and 5, the formation of the initial sacrificial metal layer, the first erasure, and the formation of the sacrificial The metal atomic layer, the second elimination, the steps of forming the metal atomic layer 11, 13, 15, 17, and 19, the third 18 (please read the precautions on the back before filling this page) -Q- ----- Order-line · This paper size applies to China National Standard (CNS) A4 (2 〖0 X 297mm） Printed by the member of Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 43 91 δ 1 Α7 ______ Β7 ______ 5. Description of the invention (Q) Steps 25 and 27 of removing and forming a silicon atom layer thereby forming a metal silicide layer. Step 25 of the third eradication is the same as steps 13 and 17 of the first erasure. After the completion of step 25 of the third elimination, a silicon atomic layer formed on the metal atomic layer is reacted by injecting a silicon source gas into the reaction chamber 51. At this time, during the formation of the silicon layer, the temperature of the semiconductor substrate was maintained at the same temperature as that in the third erasing step 25, that is, 300 to 500 ° C. Like steps 11, 13, 15, Π, 19, 25, and 27 in the first embodiment of the present invention (the first erasure, the formation of a sacrificial metal atom layer, the second erasure 1, the formation of a metal atom layer, The third eradication and formation of a silicon metal atomic layer) Repeat as necessary in order, so that the metal atomic layer and the silicon atomic layer are alternately stacked. At this time, the metal atomic layer and the silicon atomic layer react with each other, so that a metal sand layer can be formed. The composition ratio of the metal silicide layer can be changed by controlling the thickness of the metal atomic layer and the silicon atomic layer. The metal source gas is preferably SiH-, S12H6, (CH〇3SiC ξ CSi (CH) 3, ((CH3) 3Si) 2CH2, (CH3) 3CSi (CH3) 2Cl '(C4H9) SiCh, (CH3) 3SiN (C2H5 ) 2, (CH3) 2SiCl2, ((CH〇2Si-) n, (C6H5) 2SiCl2, (C6H5) 2SiH2, C ^ HsSiCh, ChSiSiCh, (CH3) 3SiSi (CH3) 3, CHsSiChH, (CH3) (CsH5) SiCl2, C6H5SiCh, SiBn, SiCh, SiF4, SiL ·, (C32HieNs) SiCh, Si (Si (CH3) 3) 4, Si (CH3 &gt;, CH ^ SiCh, HSiCh, (GH5) 3SiQ, CF3Si (CH3) 3, (CHbhSiCl, (CH3) 3SiH, (CH3) 3SiC three CH, (C5H5) Si (CH3) 3, (C5 (CH3) 5) Si (CH3h, (C6H5) 3SiCl, (CsH small SiH, (CHANHCH, CH2 = CHSiCl3 gas. Fenggen According to another specific embodiment of the present invention, the required metal silicide layer, such as a 'TiSi layer, a TaSi layer, a ZrSi layer, or a HfSi layer, can be applied to the country according to the metal __19 This scale ^ ~ Quasi- (Certificate 4 regulations' T2iG χ 297-(Please read the precautions on the back before filling out this page) -rlk &lt; -------'-- tT .--------- Line ~ 3 '9 1 δ 1 Α7 _Β7_ V. Description of invention (ίβ) The type of the atomic layer is formed. Similarly, metal silicon with excellent step coverage The physical layer can be formed in the connection hole having a high aspect ratio. As described above, according to the present invention, the metal layer or the metal silicide layer having excellent step coverage can be formed in the connection hole having a high aspect ratio. Therefore, a metal connection suitable for a highly integrated semiconductor device can be formed. The present invention is not limited to the specific embodiments illustrated, and those skilled in the art can make many changes and modifications within the scope of the present invention. &Quot; TJ icon r | 丨 丨 丨 丨 4 β5- (Please read the precautions on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 2 This paper is applicable to the national standard (CNS) A4 specification (210 X 297 mm)

Claims (1)

經湳部智总財/$.局员工消#合作社印 1. 一種形成金屬層之方法’其包括如下步驟： (a) 在单導體基板上彫成犧牲性金屬原子層； (b) 在半導體基板上，透過使犧牲性金屬原子層與金屬 鹵化物氣體反應，淸除犧牲性金屬原子層同時形成金屬原 子層；及 (c) 透過交替形成犧牲性金屬原子層和金眉原子-層至少 一次，在半導體基板上交替層疊金屬原子層，其中該金屬 原子層係自金屬鹵化物中之金屬還原而形成，且該構成金 屬原子層之金屬與構成犧牲性金屬原子層之金屬係不同-之 金屬元素。 2·如申請專利範圍第1項之方法，其進一步包含在形 成犧牲性金屬原子層之步驟⑷之前’在半導體基板上形成 初始犧牲性金屬層。 3·如申請專利範圍第2項之方法，其中在形成初始犧 牲性金屬層時，半導體基板加熱至300〜500°C。 4,如申請專利範圍第2項之方法，其中該初始犧牲性 金屬層和犧牲性金屬原子層由相同材料彫成。 5·如申請專利範圍第2項之方法，其中該初始犧牲性 金屬層和犧牲性金屬原子層由相同反應氣體形成。 6·如申請專利範圍第1項之方法，其中當犧牲性金屬 原子層、金屬原子層形成時，半導體基板加熱至300〜500 °C ° 7·如申請專利範圍第1項之方法，其中由犧牲性金屬 原子層之金屬原子和金屬阖化物氣體之鹵原子組成的吉布 木紙張又度適用中國國家樣準（CNS &gt; A4現格（2t0X2W公釐） —,-------T------1TI.------^=- (請先閱讀背面之注意事項再填寫本頁)The Ministry of Economic Affairs, Intellectual Property, General Affairs / $. 局 员 消 ## 社 社 印 1. A method of forming a metal layer, which includes the following steps: (a) Carving a sacrificial metal atom layer on a single-conductor substrate; (b) On a semiconductor On the substrate, by reacting the sacrificial metal atomic layer with the metal halide gas, the sacrificial metal atomic layer is eliminated and a metal atomic layer is formed at the same time; and (c) the sacrificial metal atomic layer and the gold eyebrow atom-layer are alternately formed at least once Metal atom layers are alternately stacked on a semiconductor substrate, wherein the metal atom layer is formed by reducing a metal in a metal halide, and the metal constituting the metal atom layer is different from the metal constituting the sacrificial metal atom layer-a metal element. 2. The method according to item 1 of the patent application scope, further comprising, before the step (i) of forming a sacrificial metal atomic layer ', forming an initial sacrificial metal layer on the semiconductor substrate. 3. The method according to item 2 of the patent application range, wherein the semiconductor substrate is heated to 300 to 500 ° C when the initial sacrificial metal layer is formed. 4. The method according to item 2 of the application, wherein the initial sacrificial metal layer and the sacrificial metal atomic layer are carved from the same material. 5. The method of claim 2 in which the initial sacrificial metal layer and the sacrificial metal atom layer are formed of the same reactive gas. 6. The method according to item 1 of the patent application, wherein when the sacrificial metal atomic layer or metal atom layer is formed, the semiconductor substrate is heated to 300 ~ 500 ° C ° 7. The method according to item 1 of the patent application, wherein Djiboumu paper composed of metal atoms of sacrificial metal atomic layer and halogen atoms of metal halide gas is applicable to Chinese national standards (CNS &gt; A4 now (2t0X2W mm)), ----------- T ------ 1TI .------ ^ =-(Please read the notes on the back before filling this page) 立^利範圍 ABCD 經濟部智;Λ財4局ta;工消t合作社印lid 斯自由能，高於金屬鹵化物之吉布斯自由能。 8*如申請專利範圍第7項之方法，其中透過使犧牲性 金屬源氣體與還原氣體反應，來形成犧牲性金屬原子層。 9·如申請專利範圍第8項之方法，其中該還原氣體從 H2和矽烷氣體所組成之族群中選擇。 10·如申請專利範圍第7項之方法，其中該金屬鹵化 物氣體從以下氣體所組成之族群中選擇：TiCh、TaCh、 HfCL·、ZrCh ' TiL·、TaL·、HfL·、ZrL·、TiBr4、TaBr5、HfBn 、ZrBn、TiF4、TaF5、TiF*、HfF4和 ZrF4 等氣體。 11‘如申請專利範圍第I〇項之方法，其中當金屬鹵化 物氣體是TiCU時，犧牲性金屬層從以下金屬層所組成之族 群中選擇· A1層，La層，Pr層，In層，Ce層，Nd層和Be 層。 12·如申請專利範圍第丨丨項之方法，其中用來形成 A1層，La層，pr層，in層，Ce層，Nd層或Be層之犧牲 性金屬源氣體是分別包含Al，La，Pr，In，Ce，Nd或Be 的前體。 13’如申請專利範圍第12項之方法，其中包含Al的 前體從以下所組成之族群中選擇：（C4H9)2A1H，（GH+AIH ，（C2H5：hAl，（CH+Al，A1H3N(CIL)3，（CH3)2A1H，和 (CH〇2C2H5N : A1H3。 Η·如申請專利範圍第12項之方法，其中包含La的 前體從以下所組成之族群中選擇：（C5H5)3La和(C2H7C4H4)3La 0 2 衣紙張尺度適用中國國家標卒（CNS〉A4規格（210X297公嫠） ' —.--------Ύ------、玎------線 U (請先閱讀背面之注意事項再填寫本頁)The profit scope of ABCD is the wisdom of the Ministry of Economic Affairs; the 4th bureau of 财 cai; the free energy of industrial consumer t cooperatives, which is higher than the Gibbs free energy of metal halides. 8 * The method according to item 7 of the scope of patent application, wherein a sacrificial metal atomic layer is formed by reacting a sacrificial metal source gas with a reducing gas. 9. The method of claim 8 in which the reducing gas is selected from the group consisting of H2 and silane gas. 10. The method according to item 7 in the scope of patent application, wherein the metal halide gas is selected from the group consisting of the following gases: TiCh, TaCh, HfCL, ZrCh 'TiL, TaL, HfL, ZrL, TiBr4 , TaBr5, HfBn, ZrBn, TiF4, TaF5, TiF *, HfF4 and ZrF4. 11 'The method according to item 10 of the scope of patent application, wherein when the metal halide gas is TiCU, the sacrificial metal layer is selected from the group consisting of the following metal layers: A1 layer, La layer, Pr layer, In layer, Ce layer, Nd layer and Be layer. 12. The method according to item 丨 丨 in the scope of patent application, wherein the sacrificial metal source gases used to form the A1 layer, the La layer, the pr layer, the in layer, the Ce layer, the Nd layer, or the Be layer respectively include Al, La, Precursor of Pr, In, Ce, Nd or Be. 13 'The method according to item 12 of the scope of patent application, wherein the precursor containing Al is selected from the group consisting of: (C4H9) 2A1H, (GH + AIH, (C2H5: hAl, (CH + Al, A1H3N (CIL ) 3, (CH3) 2A1H, and (CH〇2C2H5N: A1H3) Η · As in the method of claim 12 of the patent application, the precursor containing La is selected from the group consisting of: (C5H5) 3La and (C2H7C4H4 ) 3La 0 2 The size of the paper is applicable to the Chinese national standard (CNS> A4 size (210X297)) — —.-------- Ύ ------, 玎 ------ line U (Please read the notes on the back before filling this page) •利範圍 8 8 8 8 ABCD 15·如申請專利範圍第12項之方法，其中包含Pr的 前體從以下所組成之族群中選擇：（C5H〇3Pr和（ΟΗ7〇Η小Pr (請先閱讀背面之注意事項再填寫本頁) 16·如申請專利範圍第12項之方法，其中包含In的 前體從以下所組成之族群中選擇：CMWn、（CH3)5C5In、 (GH5)3In 和（CH+In。 17·如申請專利範圍第12項之方法，其中包含Ce的 前體從以下所組成之族群中選擇：（C5H5：hCe和 ((CsH5)C5H〇3Ce ° 18·如申請專利範圍第12項之方法，其中包含Nd的 前體從以下所組成之族群中選擇：（C5H〇3Nd和 (C3H7C5H4)3Nd。 19·如申請專利範圍第12項之方法，其中包含Be的 前體是 Be(CiH5)2。 20*如申請專利範圍第2項之方法，其進一步包含在 形成犧牲性金屬原子層之步驟(a)之前，用惰性氣體淸除初 始犧牲性金屬層形成處的所得結構的周圍部分的步驟。 經濟部智蒽时是局負工^评合作社印災 21·如申請專利範圍第丨項之方法，其進一步包含在 形成金屬原子層之步驟(b)之前，用惰性氣體淸除初始犧牲 性金屬層形成處的所得結構的周圍部分的步驟。 22·如申請專利範圍第20項之方法，其中該惰性氣體 係從N:氣和Ar氣所組成之族群中選擇。 23·如申請專利範圍第21項之方法，其中該惰性氣體 係從N2氣和Ar氣所組成之族群中選擇。 本紙張尺度適用中國國家榇準（CNS ) A4規格（210X 297公釐）• Benefit range 8 8 8 8 ABCD 15 · As in the method of claim 12 of the patent scope, the precursors containing Pr are selected from the following groups: (C5H〇3Pr and (〇Η7〇Η 小 Pr (Please read first Note on the back page, please fill out this page again) 16. If the method of the scope of patent application No. 12, the precursor containing In is selected from the following groups: CMWn, (CH3) 5C5In, (GH5) 3In, and (CH + In. 17. The method according to item 12 of the scope of patent application, in which the precursor containing Ce is selected from the group consisting of: (C5H5: hCe and ((CsH5) C5H03Ce ° 18. The method of 12 items, in which the precursor containing Nd is selected from the group consisting of: (C5H03Nd and (C3H7C5H4) 3Nd.) 19. The method of item 12 in the scope of patent application, wherein the precursor containing Be is Be (CiH5) 2. 20 * The method according to item 2 of the patent application scope, further comprising, before step (a) of forming a sacrificial metal atomic layer, purging the obtained structure at the formation site of the initial sacrificial metal layer with an inert gas. The steps of the surrounding part. ^ Review of the cooperative cooperative disaster 21. The method according to item 丨 of the patent application, further comprising, before step (b) of forming a metal atomic layer, purging the surrounding portion of the resulting structure where the initial sacrificial metal layer is formed with an inert gas. 22. The method according to item 20 of the patent application, wherein the inert gas system is selected from the group consisting of N: gas and Ar gas. 23. The method according to item 21 of the patent application, wherein the inert gas It is selected from the group consisting of N2 gas and Ar gas. This paper size is applicable to China National Standard (CNS) A4 (210X 297 mm) 利範圍 24.如申請專利範圍第1項之方法，其進一步包含在 層疊金屬原子層之步驟(〇後’在半導體基板和多個金屬原 子層之間界面上進行退火處理’而使半導體基板和金屬原 子層之間相互反應形成歐姆層的步驟。 25·如申請專利範圍第24項之方法，其中在退火過程 中，環境氣體可以從Ar、沁和NH3氣體所組成之族群中選 擇一種。 26·如申請專利範圍第24項之方法，其中該歐姆層是 金屬矽化物層。 J： 27. —種形成金屬矽化物層之方法，其包括如下步驟 在半導體基板上形成犧牲性金屬原子層； 在半導體基板上，透過使犧牲性金屬原子層與_金麗虑 化物氣體反應，淸除犧牲性金屬原子層，同時形成金屬原 子層； 在金屬原子層上形成矽原子層；及 經濟部智总財工消#合作钍印災 (請先閱讀背面之注意事項再填寫本頁) 線I 透過依序形成犧牲性金屬原子層、金屬原子層和矽原 子層至少—次，在半導體基板上交替層疊会屬原子層和矽 原子層，其中該金屬原子層係自金屬鹵化物中之金屬還原 而形成’且該構成金屬原子層之金屬與構成犧牲性金屬原 子層之金屬係不同之金屬元素。 28·如申請專利範圍第27項之方法，其進一步包含在 形成犧牲性金屬原子層步驟之前，在半導體基板上形成初 始犧牲性金屬層之步驟。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐〉 Α8 BS C8 D8 吴、申請專利範圍 29·如申請專利範圍第28項之方法，其中在初始犧牲 性金屬層形成時，半導體基板加熱至300〜5(χΓ(：。 (請先聞讀背面之注意事項再填寫本頁) 30·如申請專利範圍第28項之方法，其中該初始犧牲 性金屬原子層和犧牲性金屬層由相同材料形成。 31·如申請專利範圍第28項之方法，其中該初始犧牲 性金屬原子層和犧牲性金屬層由相同反應氣體形成。 32·如申請專利範圍第27項之方法，其中當初始犧牲 性金屬原子層、金屬原子層和矽原子層形成時，半導體基 板加熱至300〜500°C。 33·如申請專利範圍第27項之方法，其中包含犧牲性 金屬原子層之金屬原子和金屬鹵化物氣體之鹵原子的成分 的吉布斯自由能，高於金屬鹵化物之吉布斯自由能。 34·如申請專利範圍第33項之方法，其中透過使犧牲 性金屬源氣體與還原氣體反應，來形成犧牲性金屬原子層 〇 35*如申請專利範圍第34項之方法，其中該還原氣體 係從H2和矽烷氣體所組成之族群中選擇。 經濟部智慧財4局tfl工;'/]#合作杜印製 36·如申請專利範圍第35項之方法，其中該金屬鹵化 物氣體從以下氣體所組成之族群中選擇：TiCU、TaCh、 HfCh，ZrCU，T1I4，TaL·，Hfh，ZrL·，ΤιΒη，TaBn，HfBr4 ，ZrBn，TiF4、TaF5，Hfh和 ZrF4氣體。 37·如申請專利範圍第36項之方法，其中當金屬鹵化 物氣體是TKh時，犧牲性金屬層從以下金屬層所組成之族 群中選擇：A1.層，La層，Pr層，In層，Ce層，Nd層和Be 5 本紙張义度適用中國國家標率（CNS &gt;八4規格（210Χ297公釐) 1391 5 1The scope of claim 24. The method according to item 1 of the patent application scope, further comprising a step of laminating a metal atomic layer (after the annealing treatment on the interface between the semiconductor substrate and a plurality of metal atomic layers), so that the semiconductor substrate and Steps in which the metal atomic layers react with each other to form an ohmic layer. 25. The method according to item 24 of the patent application, wherein during the annealing process, the ambient gas can be selected from the group consisting of Ar, Qin and NH3 gas. 26 The method of claim 24, wherein the ohmic layer is a metal silicide layer. J: 27. A method for forming a metal silicide layer, which includes the following steps of forming a sacrificial metal atom layer on a semiconductor substrate; On the semiconductor substrate, by reacting the sacrificial metal atom layer with the _Jinlixide gas, the sacrificial metal atom layer is eliminated and a metal atom layer is formed at the same time; a silicon atom layer is formed on the metal atom layer;财 工 消 # Cooperation 钍 India disaster (please read the precautions on the back before filling this page) Line I through the formation of sacrificial metal atoms , Metal atomic layer and silicon atomic layer at least one time, alternately stacked on a semiconductor substrate will be an atomic layer and a silicon atomic layer, wherein the metal atomic layer is formed by reduction of a metal in a metal halide 'and the constituent metal atomic layer And the metal constituting the sacrificial metal atomic layer is a different metal element. 28. The method of claim 27, further comprising forming an initial sacrificial property on the semiconductor substrate before the step of forming the sacrificial metal atomic layer. Steps of the metal layer. This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm> A8 BS C8 D8 Wu, applied for the scope of patent 29. If the method of the scope of the patent application No. 28 method, where the initial sacrificial metal layer During the formation, the semiconductor substrate is heated to 300 ~ 5 (χΓ (:. (Please read the precautions on the back before filling out this page) 30. If the method of the scope of patent application No. 28, the initial sacrificial metal atomic layer and The sacrificial metal layer is formed of the same material. 31. The method of claim 28, wherein the initial sacrificial metal source The layer and the sacrificial metal layer are formed of the same reaction gas. 32. The method according to item 27 of the patent application, wherein when the initial sacrificial metal atom layer, metal atom layer and silicon atom layer are formed, the semiconductor substrate is heated to 300 to 500 ° C. 33. The method according to item 27 of the patent application, wherein the Gibbs free energy of the component containing the metal atom of the sacrificial metal atom layer and the halogen atom of the metal halide gas is higher than that of the metal halide Gibbs 34. The method according to item 33 of the patent application, wherein the sacrificial metal source gas is reacted with the reducing gas to form a sacrificial metal atomic layer. 35 * The method according to item 34 of the patent application, wherein The reducing gas system is selected from the group consisting of H2 and silane gas. Ministry of Economic Affairs, Treasury, 4th Bureau; '/] # Cooperative Du printed 36. If the method of applying for the scope of the patent No. 35, wherein the metal halide gas is selected from the group consisting of: TiCU, TaCh, HfCh , ZrCU, T1I4, TaL ·, Hfh, ZrL ·, TiBn, TaBn, HfBr4, ZrBn, TiF4, TaF5, Hfh, and ZrF4 gases. 37. The method of claim 36, wherein when the metal halide gas is TKh, the sacrificial metal layer is selected from the group consisting of the following metal layers: A1. Layer, La layer, Pr layer, In layer, Ce layer, Nd layer and Be 5 The meaning of this paper is applicable to China's national standard (CNS &gt; 8 4 specifications (210 × 297 mm) 1391 5 1 埠利範圍Boli range A8 B8 C8 D8 層。 (請先閱讀背面之注意事項再填寫本頁) 38·如申請專利範圍第37項之方法，其中用來形成 Α1層，La層，Pr層，In層，Ce層，Nci層或Be層之犧牲 性金屬源氣體是分別包含Al，La，Pr，In，Ce，Nd或Be 之前體。 39·如申請專利範圍第38項之方法，其中包含A1的 前體從以下所組成之族群中選擇：（GH小A1H，（C%H屮A1H ，（C2H5)3A1，（CHb)3Al，A1H3N(CH3)3，（CH3)2A1H，和 (CH^GfLN : Aim。 40·如申請專利範圍第38項之方法，其中包含La的 前體從以下所組成之族群中選擇：（C5H5)3La和(C2H7C4H小La Q 41·如申請專利範圍第38項之方法，其中包含Pr的 前體從以下所組成之族群中選擇：（C5H5)3Pr和(GHvGH+Pr 經濟部智总財&quot;As(工消贽合作社印％ 42·如申請專利範圍第38項之方法，其中包含In的 前體從以下所組成之族群中選擇：C2H5In、（CH3)5C5In、 (C2H5)3In 和（CH3)3ln。 43·如申請專利範圍第38項之方法，其中包含Ce的 前體從以下所組成之族群中選擇：（C5H5)3Ce和 ((C5H5)C5H4)3Ce。 44·如申請專利範圍第38項之方法，其中包含Nd的 前體從以下所組成之族群中選擇：（C5H5)3Nd和 (C3H7C5H4)3Nd。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） A8 B8 C8 D8 439151 六、申請專利範圍 45·如申請專利範圍第38項之方法，其中包含Be的 前體是Be(GH5)2。 46·如申請專利範圍第28項之方法，其進一步包含在 形成犧牲性金屬原子層之前，用惰性氣體淸除初始犧牲性 金屬層形成處的所得結構的周圍部分的步驟。 47·如申請專利範圍第27項之方法，其進一步包含在 形成金屬原子層之前，用惰性氣體淸除犧牲性金屬原子層 形成處的所得結構的周圍部分的步驟。 48·如申請專利範圍第27項之方法，其進一步包含在 形成矽原子層之前，用惰性氣體淸除金屬原子層形成處的 所得結構的周圍部分的步驟。 49·如申請專利範圍第46項之方法，其中該惰性氣體 係從％氣和Ar氣所組成之族群中選擇其一。 50·如申請專利範圍第47項之方法，其中該惰性氣體 係從N2氣和Ar氣所組成之族群中選擇其一。 51·如申請專利範圍第48項之方法，其中該惰性氣體 係從N2氣和Ar氣所組成之族群中選擇其一。 52·如申請專利範圍第27項之方法，其中該矽原子層 由矽源氣體反應形成。 53·如申請專利範圍第52項之方法，其中該矽源氣體 係爲一種從以下氣體所組成之族群中選擇：S：iH4、S12H6、 (CH3)3SiC 三 CSi(CH)3、（（CH3)3Si)2CH2、（CH3)3CSi(CH3)2C1、 (C%H〇SiC13、（CH3)3SiN(C2H5)2、（CH+SiCh、（(CH3)2Si-)n、 (C6H5)2SiCl2 、 （C6H5)2SiH2 、 C2H5S1CI3 、 CbSiSiCb ' 7 (請先閱讀背面之注意事項再填寫本頁) 訂 竦！ 本紙浪尺度適用中國國家標隼（CNS ) A4規格（210X297公釐）A8 B8 C8 D8 layer. (Please read the precautions on the back before filling this page) 38. If the method of the scope of patent application No. 37, which is used to form the A1 layer, La layer, Pr layer, In layer, Ce layer, Nci layer or Be layer The sacrificial metal source gas is a precursor containing Al, La, Pr, In, Ce, Nd or Be, respectively. 39. The method of claim 38, wherein the precursor containing A1 is selected from the group consisting of: (GH small A1H, (C% H 屮 A1H, (C2H5) 3A1, (CHb) 3Al, A1H3N (CH3) 3, (CH3) 2A1H, and (CH ^ GfLN: Aim. 40. As in the method of claim 38, the precursor containing La is selected from the group consisting of: (C5H5) 3La and (C2H7C4H Small La Q 41 · As in the method of applying for the scope of patent No. 38, the precursor containing Pr is selected from the group consisting of: (C5H5) 3Pr and (GHvGH + Pr Ministry of Economy and Intellectual Property &quot; As ( Industrial consumption cooperatives seal% 42. As in the method of the 38th patent application, the precursor containing In is selected from the group consisting of: C2H5In, (CH3) 5C5In, (C2H5) 3In, and (CH3) 3ln. 43. The method according to item 38 of the patent application, wherein the precursor containing Ce is selected from the group consisting of (C5H5) 3Ce and ((C5H5) C5H4) 3Ce. 44. Method, in which precursors containing Nd are selected from the group consisting of: (C5H5) 3Nd and (C3H7C5H4) 3Nd. Applicable to China National Standard (CNS) A4 specification (210X297 mm) A8 B8 C8 D8 439151 6. Application for patent scope 45. For the method of applying for patent scope item 38, the precursor containing Be is Be (GH5) 2. 46 The method according to item 28 of the patent application scope, further comprising the step of purging the surrounding portion of the resulting structure where the initial sacrificial metal layer is formed with an inert gas before forming the sacrificial metal atomic layer. The method according to item 27, further comprising the step of removing the surrounding portion of the structure obtained at the formation site of the sacrificial metal atom layer with an inert gas before forming the metal atom layer. 48. The method according to item 27 in the scope of patent application, which The method further includes a step of purging the surrounding portion of the resulting structure at the place where the metal atomic layer is formed with an inert gas before forming the silicon atomic layer. 49. The method according to item 46 of the patent application range, wherein the inert gas system is from% gas and Ar Choose one of the groups consisting of gas. 50. The method according to item 47 of the scope of patent application, wherein the inert gas system is composed of N2 gas and Ar gas. 51. The method according to item 48 of the patent application, wherein the inert gas system selects one from the group consisting of N2 gas and Ar gas. 52. The method according to item 27 of the patent application The silicon atomic layer is formed by the reaction of a silicon source gas. 53. The method according to item 52 of the patent application range, wherein the silicon source gas system is selected from the group consisting of the following gases: S: iH4, S12H6, ( CH3) 3SiC Three CSi (CH) 3, ((CH3) 3Si) 2CH2, (CH3) 3CSi (CH3) 2C1, (C% H0SiC13, (CH3) 3SiN (C2H5) 2, (CH + SiCh, (( CH3) 2Si-) n, (C6H5) 2SiCl2, (C6H5) 2SiH2, C2H5S1CI3, CbSiSiCb '7 (Please read the precautions on the back before filling this page) Order! The paper scale is applicable to China National Standard (CNS) A4 (210X297 mm) Α8 Β8 C8 D8 六、申請專利範圍 (CH3)3SiSi(CH3)3、OLSiCKH、（CH3)(C6H5)SiCh、OBLSiCh， SiBn、SiCl&lt;t、SiF·*、Sih、（CizHieNOSiClz、Si(Si(CH3)3)4、 Si(CHb&gt;、CH3SiCl3、HSiCh、（C2H5)3SiCl、CF3Si(CH3)3 ' (CHahSiCl、（CH3)3SiH、（CH3)3SiC 三 CH、（C5H5)Si(CH3)3 ' (C5(CH3)5)Si(CH3)3、（GH5)3SiCl、（C6H5)3SiH、（(CH3)飾CH 和 CH2=CHSiCl3 氣體。 54·如申請專利範圍第27項之方法，其進一步包含在 半導體基板上交替層疊金屬原子層和矽原子層之後，在預 定溫度下退火之步驟。 55*如申請專利範圍第54項之方法，其中選擇透過快 速熱處理(RTP)退火，火爐退火處理和真空熱處理其中之一 ，來進行退火。 了 ，56·—種形成金屬矽化物層之方法，其包括如下步驟 在半導體基板上形成矽原子層； 在矽原子層上形成犧牲.性金屬原子層； 在半導體基板上，透過使犧牲性金屬原子層與金屬齒 化物氣體_反應，淸除犧牲性金屬原子層，同時形成金屬原 子層；及 透過依序形成砂原子層、犧牲性金屬原子層和金屬原 子層至少層疊一次’在半導體基板上交替層疊金屬原子層 和政原子層，其中該金屬原子層係自金屬鹵化物中之金屬 麗显而形成，且該構成金屬原子層之金屬與構成犧牲性金 屬原子層之金屬係不同之金屬元素。 ^_ 8 ^尺度適用中國國家標準（CNS ) Μ現格（210X297公釐） ----- (請先閲讀背面之注意事項再填寫本頁) 、τ. 線——Α8 Β8 C8 D8 VI. Patent application scope (CH3) 3SiSi (CH3) 3, OLSiCKH, (CH3) (C6H5) SiCh, OBLSiCh, SiBn, Sicl &lt; t, SiF · *, Sih, (CizHieNOSiClz, Si (Si (CH (3 ) 3) 4, Si (CHb>, CH3SiCl3, HSiCh, (C2H5) 3SiCl, CF3Si (CH3) 3 '(CHahSiCl, (CH3) 3SiH, (CH3) 3SiC three CH, (C5H5) Si (CH3) 3' C5 (CH3) 5) Si (CH3) 3, (GH5) 3SiCl, (C6H5) 3SiH, ((CH3) decorated with CH and CH2 = CHSiCl3 gas. 54. If the method of the 27th scope of the patent application, it is further included in The step of annealing at a predetermined temperature after alternately stacking a metal atomic layer and a silicon atomic layer on a semiconductor substrate. 55 * As the method of the scope of patent application No. 54, which includes rapid thermal processing (RTP) annealing, furnace annealing processing, and vacuum thermal processing. One of them is to perform annealing. 56. A method for forming a metal silicide layer, which includes the following steps of forming a silicon atom layer on a semiconductor substrate; forming a sacrificial metal atom layer on the silicon atom layer; On the substrate, the sacrificial metal atomic layer reacts with the metal dentate gas. Eliminate the sacrificial metal atomic layer and simultaneously form the metal atomic layer; and by sequentially forming the sand atomic layer, the sacrificial metal atomic layer, and the metal atomic layer at least once, 'the metal atomic layer and the political atomic layer are alternately stacked on the semiconductor substrate, The metal atomic layer is formed from the metal of the metal halide, and the metal constituting the metal atomic layer is different from the metal element constituting the sacrificial metal atomic layer. ^ _ 8 ^ The scale applies to Chinese national standards (CNS) Μ is now (210X297 mm) ----- (Please read the precautions on the back before filling in this page), τ. Line——
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