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TW338810B - A method and system for data transmissions in a processing system utilizing interrupts - Google Patents

A method and system for data transmissions in a processing system utilizing interrupts

Info

Publication number
TW338810B
TW338810B TW086103558A TW86103558A TW338810B TW 338810 B TW338810 B TW 338810B TW 086103558 A TW086103558 A TW 086103558A TW 86103558 A TW86103558 A TW 86103558A TW 338810 B TW338810 B TW 338810B
Authority
TW
Taiwan
Prior art keywords
data transmissions
processing system
transmission
interrupts
system utilizing
Prior art date
Application number
TW086103558A
Other languages
Chinese (zh)
Inventor
Lee Sherman
Vepa Ramkrishna
Alan Williams Robert
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of TW338810B publication Critical patent/TW338810B/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)
  • Computer And Data Communications (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

A system and method of facilitating a fast transmission of packet information, including: 1) transmission of information packet in the buffer areas to the media; 2) starting an interrupted signal showing the signal successful transmission of the information packet to the media; and 3) transmission from one line of one information packet to the buffer area.
TW086103558A 1996-09-04 1997-03-21 A method and system for data transmissions in a processing system utilizing interrupts TW338810B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/708,308 US5923852A (en) 1996-09-04 1996-09-04 Method and system for fast data transmissions in a processing system utilizing interrupts

Publications (1)

Publication Number Publication Date
TW338810B true TW338810B (en) 1998-08-21

Family

ID=24845283

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086103558A TW338810B (en) 1996-09-04 1997-03-21 A method and system for data transmissions in a processing system utilizing interrupts

Country Status (3)

Country Link
US (1) US5923852A (en)
JP (1) JPH10105489A (en)
TW (1) TW338810B (en)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6449281B1 (en) 1997-09-30 2002-09-10 Intel Corporation Interface control of communication between a control processor and a digital signal processor
US6393493B1 (en) * 1998-04-20 2002-05-21 National Instruments Corporation System and method for optimizing serial USB device reads using virtual FIFO techniques
GB2344030B (en) * 1998-11-17 2003-06-04 3Com Technologies Ltd Credit-based scheme for high performance communication between devices in a packet-based communication system
US6338111B1 (en) * 1999-02-22 2002-01-08 International Business Machines Corporation Method and apparatus for reducing I/O interrupts
US7464133B1 (en) 1999-10-05 2008-12-09 Fujitsu Limited Server/client system
US6721835B1 (en) * 2000-09-19 2004-04-13 Intel Corporation Method and apparatus for minimizing bus contention for I/O controller read operations
US20020138655A1 (en) * 2001-03-21 2002-09-26 Jenison Lucas M. Reducing memory copies by a network controller
US7046628B2 (en) * 2001-09-24 2006-05-16 Intel Corporation Apparatus and method for just-in-time transfer of transmit commands to a network interface
US7302503B2 (en) * 2002-04-01 2007-11-27 Broadcom Corporation Memory access engine having multi-level command structure
US20040111537A1 (en) * 2002-12-05 2004-06-10 Intel Corporation Method, system, and program for processing operations
US7028961B1 (en) * 2003-05-30 2006-04-18 Csav, Inc. Self-balancing adjustable flat panel mounting system
CA2674471C (en) 2007-01-03 2014-07-29 Milestone Av Technologies, Inc. Device mount with selectively positionable tilt axis
WO2008085889A1 (en) 2007-01-05 2008-07-17 Milestone Av Technologies, Inc. Wall-avoiding self-balancing mount for tilt positioning of a flat panel electronic display
US20090019160A1 (en) * 2007-07-12 2009-01-15 International Business Machines Corporation Method and system for workload management utilizing tcp/ip and operating system data
US9109742B2 (en) 2008-09-02 2015-08-18 Milestone Av Technologies Llc Low profile mount for flat panel electronic display

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5440690A (en) * 1991-12-27 1995-08-08 Digital Equipment Corporation Network adapter for interrupting host computer system in the event the host device driver is in both transmit and receive sleep states

Also Published As

Publication number Publication date
US5923852A (en) 1999-07-13
JPH10105489A (en) 1998-04-24

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