TW202411821A - Touch data processing method, driver chip and touch display performing a touch data processing program on a frame of touch sensing data stored in a memory area by utilizing the composite operation circuit - Google Patents

Abstract

Disclosed is a touch data processing method executed by an arithmetic logic unit. The touch data processing method includes the following steps: receiving a set of planning parameters by utilizing a planning unit within the arithmetic logic unit; and selecting at least one of basic operation circuits from a plurality of basic operation circuits within the arithmetic logic unit according to the set of planning parameters to form a composite operation circuit, and performing a touch data processing program on a frame of touch sensing data stored in a memory area by utilizing the composite operation circuit.

Description

Touch data processing method, driver chip and touch display

The present invention relates to touch data processing, and more particularly to a method of performing touch data processing with a dedicated ALU.

TDDI (touch and display driver integration) is a touch and display integration solution that integrates touch scanning and display driver into the same chip. This solution requires the touch panel to be scanned within a specific display gap. At the same time, in order to ensure the touch effect, the frequency of touch reporting is generally more than twice the display frame rate. With the popularization of high refresh rate screens, TDDI chips have higher requirements for touch data processing speed. The processing method is to use MCU (microcontroller unit) to send corresponding instructions to ALU (architecture logic unit) and the ALU performs data operations on the sensor array data in the memory. The data operations include basic operations such as data movement, arithmetic operations (addition, subtraction, multiplication, division, modulus), comparison operations (greater than, equal to, less than) and shift operations (logical shift, arithmetic shift), as well as complex operations composed of basic operations dedicated to touch requirements. The functions of the complex operation can be to find the value and row and column position of the extreme point of the array data, to solve the number and cumulative sum of data greater than or less than a certain threshold, to perform mean filtering on the array data, or to solve the abnormally rising DC component generated by various factors in the single row or single column sensor array data.

According to the requirements of actual applications, TDDI chips have multiple independent storage units built in, each of which can be used to store the original data of touch sampling or the intermediate value or final calculation result after processing and calculation by a dedicated ALU. When the TDDI chip is working, the continuous multi-frame sensor array data obtained by its touch scanning may be placed in the same or different storage units according to the requirements of the application, and the MCU will control the ALU by sending instructions to perform the above-mentioned processing and calculation on the single frame or multiple frames of original and intermediate data in these independent storage units in whole or in part, and write the results back to the specified location of the specified storage unit.

As mentioned above, the processing object of the dedicated ALU is the data matrix from the sensor, and its processing method is to use basic operations or complex operations composed of basic operations. In addition, since most of the current basic operation IPs (Intellectual Property) can realize continuous operations based on pipelines, the ultimate limit to the processing speed of the dedicated ALU is often determined by the efficiency of the ALU's continuous access to the storage unit. If its storage unit cannot continuously and efficiently provide the operation elements and write back the operation results, the basic operation pipeline will be continuously interrupted, resulting in the overall data processing time being extended.

To solve the above problems, a novel touch data processing solution is urgently needed in this field.

One purpose of the present invention is to disclose a touch data processing method, which can read operation elements from a memory area and write operation results back to the memory area according to the time required for each operation when a touch-specific ALU executes a pipeline touch data processing program, thereby maximizing the processing speed of the pipeline touch data processing program.

Another object of the present invention is to disclose a touch data processing method, which can provide different pipeline touch data processing procedures through a programmable ALU, thereby providing compatibility and maintainability.

Another object of the present invention is to disclose a driver chip that can maximize the processing speed of the pipeline touch data processing program through the aforementioned method, and plan different pipeline touch related operations in a programmable ALU according to different application requirements, thereby providing compatibility and maintainability.

Another object of the present invention is to disclose a touch display that can optimize the processing speed of touch data through the aforementioned driver chip, and plan different pipeline touch data processing procedures in a modifiable ALU according to different application requirements, thereby providing compatibility and maintainability.

To achieve the above-mentioned purpose, a touch data processing method is proposed, which is executed by an arithmetic logic unit, and the method includes: Using a planning unit in the arithmetic logic unit to receive a set of planning parameters; and Selecting at least one of the basic operation circuits in the arithmetic logic unit according to the set of planning parameters to form a complex operation circuit, and using the complex operation circuit to execute a touch data processing program on a frame of touch sensing data stored in a memory area.

In one embodiment, the set of planning parameters includes a computing circuit configuration parameter to configure the complex computing circuit.

In one embodiment, the set of planning parameters further includes a time parameter, and the time parameter is used to determine the execution times of the touch data processing program.

In one embodiment, the set of planning parameters further includes at least one set of basic operation parameters, each of which includes at least one operation element storage address and an operation result storage address for the complex operation circuit to load the required operation element data from the memory area and write the generated operation result data into the memory area when executing the touch data processing program.

In one embodiment, each of the basic operation circuits in the complex operation circuit has at least one operation element temporary storage unit, an operation result temporary storage unit and a corresponding execution time, and when the complex operation circuit is operated, each of the basic operation circuits inside it generates at least one first delay time and a second delay time according to the corresponding execution time. The at least one first delay time is used to determine the time to load the operation element data stored in the at least one operation element storage address of the memory area into the at least one operation element temporary storage unit, and the second delay time is used to determine the time to write the operation result data into the operation result storage address of the memory area.

To achieve the above-mentioned purpose, the invention further proposes a driver chip, which includes a control unit, a memory area and an arithmetic logic unit to execute a touch data processing method, the method comprising: Using a planning unit in the arithmetic logic unit to receive a set of planning parameters output by the control unit; and The arithmetic logic unit selects at least one of the basic operation circuits in the arithmetic logic unit according to the set of planning parameters to form a complex operation circuit, and uses the complex operation circuit to execute a touch data processing program on a frame of touch sensing data stored in the memory area.

In one embodiment, the set of planning parameters includes a computing circuit configuration parameter to configure the complex computing circuit.

In one embodiment, the set of planning parameters further includes a time parameter, and the time parameter is used to determine the execution times of the touch data processing program.

In one embodiment, the set of planning parameters further includes at least one set of basic operation parameters, each of which includes at least one operation element storage address and an operation result storage address for the complex operation circuit to load the required operation element data from the memory area and write the generated operation result data into the memory area when executing the touch data processing program.

In one embodiment, each of the basic operation circuits in the complex operation circuit has at least one operation element temporary storage unit, an operation result temporary storage unit and a corresponding execution time, and when the complex operation circuit is operated, each of the basic operation circuits inside it generates at least one first delay time and a second delay time according to the corresponding execution time. The at least one first delay time is used to determine the time to load the operation element data stored in the at least one operation element storage address of the memory area into the at least one operation element temporary storage unit, and the second delay time is used to determine the time to write the operation result data into the operation result storage address of the memory area.

To achieve the above-mentioned object, the invention further proposes a touch display having a touch display module and a driving chip as mentioned above for driving the touch display module.

In one embodiment, the touch display module has a touch sensing module, and the touch sensing module can be a capacitive touch sensing module, an electromagnetic touch sensing module or an optical touch sensing module.

In order to enable the Review Committee to further understand the structure, features and purpose of the present invention, the following are attached with drawings and detailed descriptions of preferred specific embodiments.

The principle of the present invention is: (i) different pipeline touch-related operations can be planned in an ALU according to different application requirements; and (ii) different pipeline access modes of storage units used to store operation elements and operation results can be planned according to different application requirements to reasonably allocate the access delay values of each storage unit under different modes, thereby optimizing the operation efficiency when the ALU performs a pipeline touch-related operation to reduce the overall time consumption, thereby achieving better touch effect or higher touch reporting rate.

Please refer to FIG1, which shows a block diagram of an embodiment of the driver chip of the present invention. As shown in FIG1, a driver chip 100 includes a control unit 110, a memory area 120 and an arithmetic logic unit 130, wherein the memory area 120 has a plurality of basic storage areas 121 to store a frame of touch sensing data D _TCH , and the arithmetic logic unit 130 has a planning unit 131, a configuration control unit 132 and a basic operation circuit module 133. The driving chip 100 executes a touch data processing program, which includes: (i) using the planning unit 131 to receive a set of planning parameters output by the control unit 110; and (ii) the planning unit 131 drives the configuration control unit 132 to generate a set of corresponding connection signals S _CONN according to an operation circuit configuration parameter in the set of planning parameters, and the basic operation circuit module ₁₃₃ controls the multiple basic operation circuits (which may include data transfer circuits, arithmetic operation (addition, subtraction, multiplication, division, modulus) circuits, comparison operation (greater than, equal to, less than) circuits and shift operation (logical shift, arithmetic shift) contained therein according to the control of the set of connection signals S CONN. At least one basic operation circuit is selected from the basic operation circuits such as the CMOS circuit to form a complex operation circuit, and the complex operation circuit is used to execute a touch data processing program on the frame touch sensing data _DTCH stored in the memory area 120, wherein the frame touch sensing data _DTCH can come from a capacitive touch sensing module, an electromagnetic touch sensing module or an optical touch sensing module.

In addition, the set of planning parameters may further include a number parameter D _NUM , and the number parameter D _NUM is used to determine the execution times of the touch data processing program.

In addition, the set of planning parameters may further include at least one set of basic operation parameters ADDR, each of which includes at least one operation element storage address and an operation result storage address for the complex operation circuit to load the required operation element data D _IN from at least one basic storage area among the multiple basic storage areas 121 in the memory area 120 when executing the touch data processing program, and write the generated operation result data D _OUT into one of the multiple basic storage areas 121 in the memory area 120.

In addition, each of the basic operation circuits in the complex operation circuit has at least one operation element temporary storage unit, an operation result temporary storage unit and a corresponding execution time, and when the complex operation circuit is operated, each of the basic operation circuits inside it generates at least one first delay time and a second delay time according to the corresponding execution time. The at least one first delay time is used to determine the time to load the operation element data D _IN stored in the at least one operation element storage address of the memory area 120 into the at least one operation element temporary storage unit, and the second delay time is used to determine the time to write the operation result data D _OUT into the operation result storage address of the memory area 120. For example, assuming that a multiplication operation requires three execution cycles, the present invention will allow the multiplication operation to have two of the first delay times to determine the time to load the two operation element data D _IN stored in the two operation element storage addresses of the memory area 120 into the two operation element temporary storage units, and a second delay time to determine the time to write the operation result data D _OUT into the operation result storage address of the memory area 120, so that the multiplication operation can be smoothly repeated in a pipeline manner.

As can be seen from the above description, the present invention discloses a touch data processing method. Please refer to FIG. 2, which shows a flow chart of an embodiment of the touch data processing method of the present invention, and it is executed by an arithmetic logic unit. As shown in FIG. 2, the method includes: using a planning unit in the arithmetic logic unit to receive a set of planning parameters (step a); and selecting at least one of the basic operation circuits in the arithmetic logic unit according to the set of planning parameters to form a complex operation circuit, and using the complex operation circuit to execute a touch data processing program on a frame of touch sensing data stored in a memory area (step b).

In the above steps, the set of planning parameters may include: an operation circuit configuration parameter to form the complex operation circuit; a number parameter to determine the number of times the touch data processing program is executed; and at least one set of basic operation parameters, each of which includes at least one operation element storage address and an operation result storage address for the complex operation circuit to load the required operation element data from the memory area and write the generated operation result data into the memory area when executing the touch data processing program.

In addition, each of the basic operation circuits in the complex operation circuit has at least one operation element temporary storage unit, an operation result temporary storage unit and a corresponding execution time, and when the complex operation circuit is operated, each of the basic operation circuits inside it can generate at least one first delay time and a second delay time according to the corresponding execution time. The at least one first delay time is used to determine the time to load the operation element data stored in the at least one operation element storage address of the memory area into the at least one operation element temporary storage unit, and the second delay time is used to determine the time to write the operation result data into the operation result storage address of the memory area.

In detail, the arithmetic logic unit of the present invention can perform four pipeline operation modes, and the typical scenario of its basic operation is: obtain operator A and operator B from the same or different storage units, perform the operation, and write the operation result C back to the same or different storage units as the two operators. It is worth mentioning that the number of operators of the present invention is not limited to two, and it can also be one.

Assume that the storage units where the operator A, operator B, and operation result C are stored are unit A, unit B, and unit C, respectively, and the four pipeline operation modes of the present invention are mode0-mode3. The following description will give the specific definition of the relevant parameters involved in each pipeline operation mode and the meaning of these relevant parameters in the specific control timing:

(1) Access control counter initial load value mem_ctrl_cnt_init: The present invention controls the ALU to access units A, B, and C by assigning an initial value to the counter and counting down, and when the counter outputs different count values, the process of the counter from the initial value to 0 is regarded as a small calculation cycle. Overall, each calculation cycle will complete a visit to each unit.

(2) Write/read empty counter initial load value wr_rd_blk_cyc_init: The access control counter initial load value mem_ctrl_cnt_init describes the loop initial value of each small calculation cycle. However, in actual applications, after the operator A and operator B are given, the operation unit often cannot give the operation result C in this calculation cycle, and often has to give the result after the next or even the next few cycles. Therefore, the initial few calculation cycles only need to give the operator without writing back the result, while the last few calculation cycles only need to write back the result without reading the operator. The value describing the number of write and read cycles is its initial load value. After the ALU starts working, the write empty counter is assigned an initial value and decreases with the calculation cycle. Before the write empty counter is 0, it is considered that the operation unit has not yet given a result, so unit C is not accessed; similarly, at the beginning of the last calculation, the read empty counter is assigned an initial value and decreases with the calculation cycle. At this time, it is considered that all the operation elements have been given, and units A and B are not accessed; and after the read empty counter is 0, it is considered that this ALU operation has ended, and the access control counter no longer works.

(3) Unit access delay ramb_ce_dly_cyc/ramc_ce_dly_cyc: As described in (1) above, the ALU will access storage units A, B, and C at different count values, where unit A is fixed at the initial count value. Depending on the actual storage unit configuration occupied by each unit, the access delay of unit B and unit C is different from that of unit A. This value is determined by the unit access delay cycle.

(4) Calculation result delay ramc_wdata_dly_cyc: Based on the access efficiency, the present invention defines the access timing of unit C under various access modes, that is, the write-back timing of the calculation result. However, since the various calculation units take varying amounts of time, in addition to the need to write the empty cycle counter to adjust the calculation cycle, it is also necessary to fine-tune the timing of the calculation result in conjunction with the calculation result delay cycle, so that the data is written back at the specified write-back timing. The setting of the write/read empty counter loading value and the calculation result delay cycle lengthens the actual time consumed by a single calculation, but meets the access pipeline conditions, so that the optimal overall calculation time can be obtained in continuous calculations similar to touch data processing.

After giving the mode configuration parameters, the following are the specific introductions to the four access modes of the storage unit:

Mode 0: Full pipeline mode, the condition is that unit A, unit B and unit C come from completely different basic storage device units, or when one of the operands is fixed or missing, the units can be accessed in parallel without any conflicts. In this case, when the basic operation can be fully pipelined, unit A and unit B will read the operands continuously without gaps, and write them back to unit C continuously without gaps after the basic operation is completed without generating storage unit access conflicts. Therefore, this mode can realize a basic ALU operation in a single cycle. For operations that take n cycles, the parameter configuration is shown in Table 1 below. Since all three units are accessed continuously, each parameter is configured as 0. The actual write-empty and read-empty cycles should be n, but since the initial value is 0, the access to unit C in mode0 is directly based on the delay of unit C for n cycles, and is not implemented through the counter value. The storage unit access timing of this mode is shown in Figure 3. Table 1 mem_ctrl_cnt_init wr_rd_blk_cyc_init ramb_ce_dly_cyc ramc_ce_dly_cyc ramc_wdata_dly_cyc mode0 0 0 0 0 0

Mode 1: Semi-pipeline mode, the condition is that unit A and unit B come from different storage units or one of the operands is missing or fixed, and the operation result C and one of the operands come from the same storage unit. At this time, unit A and unit B can be accessed in parallel without any conflict, and unit C avoids access conflicts with the same unit. In this mode, the overall basic ALU operation can be completed in two cycles. For operations that take n cycles, the parameter configuration is shown in Table 2, where [n/2] represents the integer value closest to n/2, and MOD((n+1), 2) represents the remainder of (n+1)/2. Taking n as 5 as an example, the storage unit access timing of this mode is shown in Figure 4. Table 2 mem_ctrl_cnt_init wr_rd_blk_cyc_init ramb_ce_dly_cyc ramc_ce_dly_cyc ramc_wdata_dly_cyc mode1 1 [n/2] 0 1 MOD((n+1), 2)

Mode2: Semi-pipeline mode, the condition is that unit A and unit B come from the same storage unit, but they are different from the storage unit of unit C. At this time, unit A and unit B need to be accessed staggered, first access unit A, and access unit B in the next cycle; at the same time, in the third cycle, unit A can be accessed to read operator A and unit C can be accessed to write back the operation result. In addition, in order to ensure that operator A and operator B are input into the operation unit at the same time, the reading data of operation unit A needs to be delayed by one cycle. In this mode, the overall basic ALU operation is still completed in two cycles. For the operation that consumes n cycles, the parameter configuration is shown in Table 3. Among them, wr_rd_blk_cyc_init is rounded down when it is not an integer. Taking n as 5 as an example, the storage unit access timing of this mode is shown in Figure 5. Table 3 mem_ctrl_cnt_init wr_rd_blk_cyc_init ramb_ce_dly_cyc ramc_ce_dly_cyc ramc_wdata_dly_cyc mode2 1 [n/2] 1 0 MOD((n+1),2)

Mode 3: Semi-pipeline mode, the condition is that units A, B, and C are all configured as the same storage unit. In this mode, the three units need to be accessed in time-sharing to avoid access conflicts. Similar to mode 2, operator A also needs to be delayed by one cycle to ensure that it is given to the operator unit at the same time as operator B. In this mode, it takes 3 cycles to complete a basic ALU operation. For the operation with a cost of n, the parameter configuration is shown in Table 4, where f(MOD(n,3)) = (MOD(n,3)-1)*(3*MOD(n,3)-2)/2, that is, when MOD(n,3) is 0, f(MOD(n,3)) = 1, when MOD(n,3) is 1, f(MOD(n,3)) = 0, and when MOD(n,3) is 2, f(MOD(n,3)) = 2. Taking n as 5 as an example, the storage unit access timing of this mode is shown in Figure 6. Table 4 mem_ctrl_cnt_init wr_rd_blk_cyc_init ramb_ce_dly_cyc ramc_ce_dly_cyc ramc_wdata_dly_cyc mode3 2 [(n+1)/3] 1 2 f(MOD(n,3))

In fact, for operation algorithms that cannot be pipelined, the mode parameters of mode3 can also be used to achieve the best efficiency between the algorithm and access. However, it is necessary to analyze the actual problem and give specific parameters in combination to access the storage unit in advance before the next round of calculation starts, so as to complete the seamless connection of the operation processing.

In addition, it is worth mentioning that Figures 3-6 are examples of ALU access timings with an algorithm delay of 5 under the four pipeline modes according to the embodiments of the present invention, which respectively show the write-to-empty pipeline and read-to-empty process of the ALU operation under the four pipeline modes described in the present invention, where opa and opb are the time it takes for the ALU to obtain the corresponding operand after initiating storage access; outc represents the time it takes for the ALU to write the calculation result back to the storage area after generating it; and dly represents the delay that the operand or calculation result needs to wait for in order to meet the calculation timing specified by the present invention.

As can be seen from the above, the present invention designs different ALU access modes based on access conflicts in view of the different configurations of the operation elements and operation results stored in the storage units. By combining the operation unit consumption cycle configuration in different modes, the access counter load value, read/write empty counter load value, unit access delay and operation result delay and other parameters are configured. Under the condition that the algorithm can be pipelined, the optimal overall duration of continuous operation is guaranteed at the memory access level, thereby maintaining the optimal ALU processing efficiency in various flexible touch data processing scenarios to obtain better touch effects or higher touch reporting rates.

According to the above description, the present invention further proposes a touch display. Please refer to FIG. 7, which shows a block diagram of an embodiment of the touch display of the present invention. As shown in FIG. 7, a touch display 200 has a touch display module 210 and a driver chip 220 for driving the touch display module 210, wherein the driver chip 220 is implemented by the driver chip 100.

In addition, the touch display module 210 has a touch sensing module, and the touch sensing module can be a capacitive touch sensing module, an electromagnetic touch sensing module or an optical touch sensing module.

Through the above disclosed design, the present invention has the following advantages: 1. The touch data access method of the present invention can effectively shorten the access time of the operation element and the operation result when an ALU performs a pipeline touch-related operation, thereby greatly improving the speed of the pipeline touch-related operation. 2. The touch data access method of the present invention can plan different pipeline touch-related operations through a programmable ALU, thereby providing compatibility and maintainability. 3. The driver chip of the present invention can greatly improve the processing speed of touch data through the above method, and plan different pipeline touch-related operations in a programmable ALU according to different application requirements, thereby providing compatibility and maintainability. 4. The touch display of the present invention can greatly improve the processing speed of touch data through the aforementioned driver chip, and plan different pipeline touch-related operations in a programmable ALU according to different application requirements, thereby providing compatibility and maintainability.

The invention disclosed in this case is a preferred embodiment. Any partial changes or modifications that are derived from the technical concept of this case and are easily inferred by people familiar with the art do not deviate from the scope of the patent rights of this case.

In summary, this case shows that its purpose, means and effects are all different from the known technology, and it is the first invention that is practical and indeed meets the patent requirements for invention. We sincerely request the review committee to examine this carefully and grant a patent as soon as possible to benefit the society. This is our utmost prayer.

100: driver chip 110: control unit 120: memory area 121: basic storage area 130: arithmetic logic unit 131: planning unit 132: configuration control unit 133: basic operation circuit module 200: touch display 210: touch display module 220: driver chip Step a: using a planning unit in the arithmetic logic unit to receive a set of planning parameters. Step b: Select at least one basic operation circuit from the multiple basic operation circuits in the arithmetic logic unit according to the set of planning parameters to form a complex operation circuit, and use the complex operation circuit to execute a touch data processing program on a frame of touch sensing data stored in a memory area

FIG. 1 is a block diagram of an embodiment of a driver chip of the present invention. FIG. 2 is a flow chart of an embodiment of a touch data processing method of the present invention. FIG. 3 is a timing diagram of a storage unit access in a full pipeline mode adopted by the present invention. FIG. 4 is a timing diagram of a storage unit access in a half pipeline mode adopted by the present invention. FIG. 5 is a timing diagram of a storage unit access in the other half pipeline mode adopted by the present invention. FIG. 6 is a timing diagram of a storage unit access in the other half pipeline mode adopted by the present invention. FIG. 7 is a block diagram of an embodiment of a touch display of the present invention.

Step a: Utilize a planning unit in the arithmetic logic unit to receive a set of planning parameters

Step b: Select at least one basic operation circuit from the multiple basic operation circuits in the arithmetic logic unit according to the set of planning parameters to form a complex operation circuit, and use the complex operation circuit to execute a touch data processing program on a frame of touch sensing data stored in a memory area

Claims (12)

A touch data processing method is performed by an arithmetic logic unit, the method comprising: Using a planning unit in the arithmetic logic unit to receive a set of planning parameters; and Selecting at least one basic operation circuit from a plurality of basic operation circuits in the arithmetic logic unit according to the set of planning parameters to form a complex operation circuit, and using the complex operation circuit to execute a touch data processing program on a frame of touch sensing data stored in a memory area. As described in the touch data processing method of claim 1, wherein the set of planning parameters includes an operation circuit configuration parameter to form the complex operation circuit. As described in item 2 of the patent application scope, the set of planning parameters further includes a number parameter, and the number parameter is used to determine the number of executions of the touch data processing program. As described in item 3 of the patent application scope, the set of planning parameters further includes at least one set of basic operation parameters, each of which includes at least one operation element storage address and one operation result storage address for the complex operation circuit to load the required operation element data from the memory area and write the generated operation result data into the memory area when executing the touch data processing program. As described in item 4 of the patent application scope, the touch data processing method, wherein each of the basic operation circuits in the complex operation circuit has at least one operation element temporary storage unit, an operation result temporary storage unit and a corresponding execution time, and when the complex operation circuit is operated, each of the basic operation circuits inside it generates at least one first delay time and a second delay time according to the corresponding execution time, the at least one first delay time is used to determine the time to load the operation element data stored in the at least one operation element storage address of the memory area into the at least one operation element temporary storage unit, and the second delay time is used to determine the time to write the operation result data into the operation result storage address of the memory area. A driver chip includes a control unit, a memory area, and an arithmetic logic unit to execute a touch data processing method, the method comprising: Using a planning unit in the arithmetic logic unit to receive a set of planning parameters output by the control unit; and The arithmetic logic unit selects at least one of the basic operation circuits in the arithmetic logic unit according to the set of planning parameters to form a complex operation circuit, and uses the complex operation circuit to execute a touch data processing program on a frame of touch sensing data stored in the memory area. A driver chip as described in item 6 of the patent application scope, wherein the set of planning parameters includes an operation circuit configuration parameter to form the complex operation circuit. As described in claim 7 of the driving chip, the set of planning parameters further includes a number parameter, and the number parameter is used to determine the number of executions of the touch data processing program. A driver chip as described in Item 8 of the patent application scope, wherein the set of planning parameters further includes at least one set of basic operation parameters, each of which includes at least one operation element storage address and an operation result storage address for the complex operation circuit to load the required operation element data from the memory area and write the generated operation result data into the memory area when executing the touch data processing program. A driving chip as described in Item 9 of the patent application scope, wherein each of the basic operation circuits in the complex operation circuit has at least one operation element temporary storage unit, an operation result temporary storage unit and a corresponding execution time, and when the complex operation circuit is operated, each of the basic operation circuits inside it generates at least one first delay time and a second delay time according to the corresponding execution time, the at least one first delay time is used to determine the time to load the operation element data stored in the at least one operation element storage address of the memory area into the at least one operation element temporary storage unit, and the second delay time is used to determine the time to write the operation result data into the operation result storage address of the memory area. A touch display has a touch display module and a driving chip as described in any one of items 6 to 10 of the patent application scope for driving the touch display module. As described in item 11 of the patent application scope, the touch display module has a touch sensing module, and the touch sensing module is a touch sensing module selected from a group consisting of a capacitive touch sensing module, an electromagnetic touch sensing module and an optical touch sensing module.

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