Nothing Special   »   [go: up one dir, main page]

TW202017741A - Laminate and target material having blackened films with low reflectance - Google Patents

Laminate and target material having blackened films with low reflectance Download PDF

Info

Publication number
TW202017741A
TW202017741A TW108131535A TW108131535A TW202017741A TW 202017741 A TW202017741 A TW 202017741A TW 108131535 A TW108131535 A TW 108131535A TW 108131535 A TW108131535 A TW 108131535A TW 202017741 A TW202017741 A TW 202017741A
Authority
TW
Taiwan
Prior art keywords
film
substrate
blackened
layer
metal layer
Prior art date
Application number
TW108131535A
Other languages
Chinese (zh)
Other versions
TWI712502B (en
Inventor
木村優太
勝見昌高
川島慎吾
南和希
Original Assignee
日商大同特殊鋼股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商大同特殊鋼股份有限公司 filed Critical 日商大同特殊鋼股份有限公司
Publication of TW202017741A publication Critical patent/TW202017741A/en
Application granted granted Critical
Publication of TWI712502B publication Critical patent/TWI712502B/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28088Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01022Titanium [Ti]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01042Molybdenum [Mo]

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Composite Materials (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Physical Vapour Deposition (AREA)
  • Laminated Bodies (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

The object of the present invention is to provide a laminate having blackened films with low reflectance. The present invention provides a laminate 10, which comprises: a substrate 18; a metal layer 32 laminated on the substrate 18 for forming electrodes and/or wiring; and, a blackened film 35 laminated on the surface of metal layer 32 opposite to the substrate 18 and/or a blackened film 34 laminated between the metal layer 32 and the substrate 18. The blackened films 34, 35 contain nitride of titanium alloy represented by (Ti1-xMox)1-yNy and unavoidable dopant, where x and y represent the atomic ratio, respectively, and satisfy 0.03 ≤ x ≤ 0.28 and 0.40 ≤ y ≤ 0.60.

Description

積層體及靶材 Laminates and targets

本發明係關於具備了抑制於金屬層之反射之黑化膜的積層體及用於形成黑化膜的靶材。 The present invention relates to a laminate including a blackened film that suppresses reflection of a metal layer and a target for forming a blackened film.

液晶面板係具有彩色濾光片基板、TFT(Thin Film Transistor,薄膜電晶體)陣列基板、及由此等二片基板挾持之液晶層。關於形成於TFT陣列基板上的電極,除了透明之ITO(Indium Tin Oxide:氧化銦錫)電極之外,尚使用極細之金屬電極。金屬電極之情況,由於金屬線呈不透明並具有金屬光澤,故來自外部之光抵接此金屬線而反射,因該反射光而有對顯示部之辨視性降低的問題。 The liquid crystal panel has a color filter substrate, a TFT (Thin Film Transistor, thin film transistor) array substrate, and a liquid crystal layer sandwiched by these two substrates. Regarding the electrodes formed on the TFT array substrate, in addition to transparent ITO (Indium Tin Oxide) electrodes, very thin metal electrodes are still used. In the case of a metal electrode, since the metal wire is opaque and has a metallic luster, light from the outside comes into contact with the metal wire and is reflected, and this reflected light has a problem that the visibility of the display portion is lowered.

作為其對策,於液晶面板中,係採用於金屬電極之正上方配置黑矩陣,將來自金屬電極之反射光遮蔽的構造。然而,此種情況下,難以使將R(紅色)、G(綠色)、B(藍色)各色之彩色濾光片區劃為格子狀的黑矩陣之寬度窄化,難以達到提高彩色濾光片之開口率等面板性能之提升。 As a countermeasure, in the liquid crystal panel, a structure in which a black matrix is arranged directly above the metal electrode and shields the reflected light from the metal electrode is adopted. However, in this case, it is difficult to narrow the width of the black matrix that divides the color filters of R (red), G (green), and B (blue) into a lattice shape, and it is difficult to improve the color filter. The aperture ratio and other panel performance improvements.

另一方面,作為抑制來自金屬電極之反射光的其他手段,已有在形成金屬電極之金屬層上,形成可將反射抑制為較低之黑化膜者等各種提案(例如參照下述專利文獻1)。此等黑化膜係確認到抑制於金屬層之反射的一定效果,但近年來係進一步要求反射率更低的黑化膜。 On the other hand, as other means to suppress the reflected light from the metal electrode, there have been various proposals on the metal layer forming the metal electrode to form a blackened film that can suppress the reflection to a low level (for example, refer to the following patent documents 1). These blackening films have been confirmed to have a certain effect of suppressing reflection in the metal layer, but in recent years, blackening films with lower reflectance have been further required.

[先前技術文獻] [Prior Technical Literature] [專利文獻] [Patent Literature]

[專利文獻1]日本專利特開2015-69573號公報 [Patent Document 1] Japanese Patent Laid-Open No. 2015-69573

本發明係以以上情況為背景,目的在於提供具備低反射率之黑化膜的積層體、以及提供適合形成低反射率之黑化膜的靶材。 The present invention is based on the above circumstances, and an object of the present invention is to provide a laminate having a blackened film with a low reflectance and a target material suitable for forming a blackened film with a low reflectance.

本發明之積層體之特徵在於,至少具有: The laminate of the present invention is characterized by having at least:

基材; Substrate

積層於該基材而形成電極及/或佈線的金屬層;與 A metal layer deposited on the substrate to form electrodes and/or wiring; and

積層於該金屬層之與上述基材相反側之面、及/或該金屬層與該基材之間的黑化膜; A blackened film deposited on the surface of the metal layer opposite to the substrate, and/or between the metal layer and the substrate;

該黑化膜係含有以(Ti1-xMox)1-yNy表示之鈦合金之氮化物及無法避免之雜質,x及y係分別表示原子比,且滿足0.03≦x≦0.28、0.40≦y≦0.60。 The blackened film contains nitrides of titanium alloys represented by (Ti 1-x Mo x ) 1-y N y and unavoidable impurities, x and y represent atomic ratios, respectively, and satisfy 0.03≦x≦0.28, 0.40≦y≦0.60.

如以上,本發明之積層體在構成具備基材、與形成電極及/或配線之金屬層的積層體時,係於金屬層之與基材相反側之面(亦即,以基材為下側、以金屬層為上側時,於該金屬層之上面)、及/或於金屬層與基材之間之至少一處,積層形成了由既定組成範圍內之鈦合金之氮化物所構成的黑化膜。 As described above, when the laminate of the present invention constitutes a laminate including a base material and a metal layer forming electrodes and/or wirings, it is on the surface of the metal layer opposite to the base material (that is, with the base material as the bottom Side, when the metal layer is the upper side, above the metal layer), and/or at least one place between the metal layer and the substrate, the layer is formed of a nitride of a titanium alloy within a predetermined composition range Blackening film.

依照本發明,在金屬層之上面積層形成了由鈦合金之氮化物所構成的黑化膜之情況,可將金屬層於對於由金屬層側朝基 材側入射之光的反射抑制為較低。 According to the present invention, when a blackened film composed of a nitride of titanium alloy is formed on the area layer above the metal layer, the metal layer The reflection of light incident on the material side is suppressed to be low.

另一方面,在金屬層與基材之間積層形成了黑化膜的情況,在以基材為上側、以金屬層為下側的方向配置積層體時,可將金屬層對於由基材側朝金屬層側入射之光的反射抑制為較低,可確保良好的辨視性。 On the other hand, when a blackened film is formed between the metal layer and the substrate, when the laminate is arranged with the substrate on the upper side and the metal layer on the lower side, the metal layer can be placed on the substrate side The reflection of light incident toward the metal layer side is suppressed to be low, which can ensure good visibility.

本發明之黑化膜係含有Ti及Mo作為金屬成分的氮化物。於規定組成之(Ti1-xMox)1-yNy式中,x係表示金屬成分中之Mo之原子比,1-x係表示金屬成分中之Ti之原子比。又,y係表示黑化膜中之N之原子比。 The blackened film of the present invention is a nitride containing Ti and Mo as metal components. In the formula (Ti 1-x Mo x ) 1-y N y of the prescribed composition, x represents the atomic ratio of Mo in the metal component, and 1-x represents the atomic ratio of Ti in the metal component. In addition, y represents the atomic ratio of N in the blackened film.

含有Ti及Mo作為金屬成分的黑化膜,由於耐熱性優越,故即使在如TFT製造過程般加熱至300℃以上(例如真空狀態下370℃、10分鐘)的情況下仍無色變化,可維持既定之反射率減低效果。 The blackened film containing Ti and Mo as metal components has excellent heat resistance, so it remains colorless and can be maintained even when heated to more than 300°C (eg, 370°C for 10 minutes under vacuum) as in the TFT manufacturing process Established reflectance reduction effect.

本發明中,將黑化膜之金屬成分中之Mo之原子比x設為0.03≦x≦0.28。此係由於在x值較小、未滿0.03時,難以藉由濕式蝕刻進行圖案化而製造性惡化。另一方面,在x值較大、超過0.28時,則反射率超過25%而變高,反射率減低之效果變小。因此,本發明中將x之範圍設為可在確保製造性之同時獲得反射率減低效果的0.03≦x≦0.28。 In the present invention, the atomic ratio x of Mo in the metal component of the blackened film is set to 0.03≦x≦0.28. This is because when the x value is small and less than 0.03, it is difficult to pattern by wet etching and the manufacturability is deteriorated. On the other hand, when the value of x is large and exceeds 0.28, the reflectance becomes higher than 25%, and the effect of reducing the reflectance becomes smaller. Therefore, in the present invention, the range of x is set to 0.03≦x≦0.28, which can obtain a reflectance reduction effect while ensuring manufacturability.

於此,為了更加確保製造性且獲得反射率減低效果的較佳x範圍為0.08≦x≦0.25,更佳範圍為0.10≦x≦0.20。 Here, in order to further ensure manufacturability and obtain a reflectance reduction effect, a preferable x range is 0.08≦x≦0.25, and a more preferable range is 0.10≦x≦0.20.

又,反射率減低之效果亦依存於黑化膜中之N之原子比y的值。因此,本發明中,將y之範圍設為0.40≦y≦0.60。較佳係0.40≦y≦0.50。 In addition, the effect of reducing the reflectance also depends on the value of the atomic ratio y of N in the blackened film. Therefore, in the present invention, the range of y is set to 0.40≦y≦0.60. Preferably it is 0.40≦y≦0.50.

尚且,黑化膜係除了上述元素之外,亦可含有無法避 免之雜質。例如氧(O)亦可作為無法避免之雜質而含有未滿3at%。 In addition, the blackening film system may contain unavoidable elements in addition to the above elements Free from impurities. For example, oxygen (O) can also be contained as less than 3at% as an unavoidable impurity.

又,本發明亦可由含有Ti及Mo作為金屬成分之氧氮化物構成黑化膜。此時,黑化膜係含有以(Ti1-xMox)1-y-zNyOz表示之鈦合金之氧氮化物及無法避免之雜質,x、y及z係分別表示原子比,且依滿足0.03≦x≦0.28、0.10≦y≦0.60、0.03≦z≦0.47之方式構成。較佳係0.07≦x≦0.16、0.10≦y≦0.15、及0.10≦z≦0.15。 In addition, in the present invention, a blackened film may be formed of an oxynitride containing Ti and Mo as metal components. At this time, the blackened film contains the oxynitride of titanium alloy represented by (Ti 1-x Mo x ) 1-yz N y O z and unavoidable impurities, x, y and z represent the atomic ratio, and It is structured to satisfy 0.03≦x≦0.28, 0.10≦y≦0.60, 0.03≦z≦0.47. It is preferably 0.07≦x≦0.16, 0.10≦y≦0.15, and 0.10≦z≦0.15.

於規定黑化膜之組成的(Ti1-xMox)1-y-zNyOz式中,x係表示金屬成分中之Mo之原子比,1-x係表示金屬成分中之Ti之原子比。又,y係表示黑化膜中之N之原子比,z係表示黑化膜中之O之原子比。 In the formula (Ti 1-x Mo x ) 1-yz N y O z which specifies the composition of the blackened film, x represents the atomic ratio of Mo in the metal component, and 1-x represents the atom of Ti in the metal component ratio. In addition, y represents the atomic ratio of N in the blackened film, and z represents the atomic ratio of O in the blackened film.

藉由將黑化膜設為氧氮化物,可更加提高反射率減低之效果。其中,在過度提高黑化膜中之O之原子比時,由於反而損及反射率減低之效果,故本發明中將z之範圍設為0.03≦z≦0.47。 By setting the blackened film as oxynitride, the effect of reducing the reflectance can be further improved. However, when the atomic ratio of O in the blackened film is excessively increased, the effect of reducing the reflectance is impaired. Therefore, in the present invention, the range of z is set to 0.03≦z≦0.47.

又,本發明之用於形成黑化膜的靶材,其特徵在於含有Mo 3~28at%、較佳為7~16at%,剩餘部分係含有Ti及無法避免之雜質。藉由使用如此規定之鈦合金之靶材,可藉由反應性濺鍍而容易形成低反射率之黑化膜。 In addition, the target for forming a blackened film of the present invention is characterized by containing Mo 3 to 28 at%, preferably 7 to 16 at%, and the remaining part contains Ti and unavoidable impurities. By using the target material of the titanium alloy thus specified, a black film with a low reflectance can be easily formed by reactive sputtering.

根據如以上般之本發明,可提供具備低反射率之黑化膜的積層體,以及適合形成低反射率之黑化膜的靶材。 According to the present invention as described above, it is possible to provide a laminate having a blackened film with a low reflectance and a target material suitable for forming a blackened film with a low reflectance.

10、50、50A、60、60A‧‧‧積層體 10, 50, 50A, 60, 60A

14‧‧‧層間絕緣層 14‧‧‧Interlayer insulation

16‧‧‧氧化物導電層 16‧‧‧oxide conductive layer

18、52‧‧‧基材 18, 52‧‧‧ substrate

20‧‧‧閘極電極層 20‧‧‧Gate electrode layer

22‧‧‧閘極絕緣層 22‧‧‧Gate insulation

24‧‧‧半導體層 24‧‧‧Semiconductor layer

26‧‧‧源極電極層 26‧‧‧Source electrode layer

28‧‧‧汲極電極層 28‧‧‧Drain electrode layer

29‧‧‧凹部 29‧‧‧recess

30‧‧‧金屬電極層 30‧‧‧Metal electrode layer

30a‧‧‧積層膜 30a‧‧‧Layered film

32‧‧‧金屬層 32‧‧‧Metal layer

32a‧‧‧第2導電膜 32a‧‧‧Second conductive film

34、34a‧‧‧第1黑化膜 34、34a‧‧‧The first blackening film

35、35a‧‧‧第2黑化膜 35, 35a‧‧‧Second blackening film

36‧‧‧連接孔 36‧‧‧Connecting hole

38‧‧‧抗蝕層 38‧‧‧Anti-corrosion layer

41‧‧‧源極區域 41‧‧‧Source area

42‧‧‧汲極區域 42‧‧‧ Drainage area

43‧‧‧通道區域 43‧‧‧Channel area

54‧‧‧金屬層 54‧‧‧Metal layer

54D‧‧‧電極 54D‧‧‧electrode

56‧‧‧黑化膜 56‧‧‧Blackening film

S1、S2‧‧‧極細線 S1, S2‧‧‧‧fine wire

圖1為表示本發明一實施形態之積層體的圖。 FIG. 1 is a diagram showing a laminate according to an embodiment of the present invention.

圖2(A)至(C)為表示同積層體之製造手續的說明圖。 2(A) to (C) are explanatory diagrams showing the manufacturing process of the same laminate.

圖3(A)至(C)為表示接著圖2之製造手續的說明圖。 3(A) to (C) are explanatory diagrams showing the manufacturing procedure following FIG. 2.

圖4(A)及(B)為表示接著圖3之製造手續的說明圖。 4(A) and (B) are explanatory diagrams showing the manufacturing procedure following FIG. 3.

圖5(A)及(B)為表示接著圖4之製造手續的說明圖。 5(A) and (B) are explanatory diagrams showing the manufacturing procedure following FIG. 4.

圖6(A)及(B)為表示本發明其他實施形態之積層體的圖。 6(A) and (B) are diagrams showing laminates according to other embodiments of the present invention.

圖7為表示黑化膜中之Mo之原子比x與反射率間之關係的圖。 7 is a graph showing the relationship between the atomic ratio x of Mo in the blackened film and the reflectance.

圖8為表示用於反射率評價之積層體之構成的圖。 FIG. 8 is a diagram showing the structure of a laminate used for reflectance evaluation.

接著以下詳細說明本發明之實施形態。 Next, the embodiments of the present invention will be described in detail.

圖1中,10為具備作為薄膜電晶體(以下稱為「TFT」)之機能的積層體,其具備:形成於基板18上之閘極電極層20;被覆閘極電極層20之閘極絕緣層22;經由閘極絕緣層22而配置成與閘極電極層20重疊的半導體層24;與半導體層24接合之源極電極層26及汲極電極層28。又,有時將源極電極層26及汲極電極層28總稱為金屬電極層30。 In FIG. 1, 10 is a laminate having a function as a thin film transistor (hereinafter referred to as "TFT"), which includes: a gate electrode layer 20 formed on a substrate 18; and a gate insulation covering the gate electrode layer 20 Layer 22; a semiconductor layer 24 configured to overlap with the gate electrode layer 20 via the gate insulating layer 22; a source electrode layer 26 and a drain electrode layer 28 joined to the semiconductor layer 24. In addition, the source electrode layer 26 and the drain electrode layer 28 may be collectively referred to as a metal electrode layer 30.

基板18係由透明之基材所構成,除了鈉鈣玻璃、無鹼玻璃等玻璃基板之外,亦可使用聚對苯二甲酸乙二酯(PET)等樹脂基板。基板18之厚度由加工性方面而言,較佳係設為300μm~1mm。 The substrate 18 is made of a transparent base material. In addition to glass substrates such as soda lime glass and alkali-free glass, resin substrates such as polyethylene terephthalate (PET) can also be used. From the viewpoint of workability, the thickness of the substrate 18 is preferably 300 μm to 1 mm.

閘極電極層20可由Al或Cu等之低電阻之金屬材料所構成。然而,Al單獨時有耐熱性差、或容易腐蝕等問題,故亦可與其他之耐熱性導電性材料組合形成。 The gate electrode layer 20 can be composed of a low-resistance metal material such as Al or Cu. However, Al alone has problems such as poor heat resistance or easy corrosion, so it can also be formed in combination with other heat-resistant conductive materials.

閘極絕緣層22可為單層或2層以上,亦可使用習知一般使用者,例如矽氧化膜(SiOx膜)、矽氮化膜(SiNx膜)等。 The gate insulating layer 22 may be a single layer or two or more layers, or a conventional general user, such as a silicon oxide film (SiOx film), a silicon nitride film (SiNx film), etc., may be used.

半導體層24可由In-Ga-Zn系氧化物(亦記載為IGZO) 等之氧化物半導體所構成。所謂In-Ga-Zn系氧化物,意指具有In與Ga與Zn作為主成分的氧化物,且不論In與Ga與Zn之比率。又,亦可含有In與Ga與Zn以外的金屬元素。 The semiconductor layer 24 may be made of In-Ga-Zn oxide (also described as IGZO) Consisting of oxide semiconductors. The In-Ga-Zn-based oxide means an oxide having In, Ga, and Zn as main components, regardless of the ratio of In, Ga, and Zn. In addition, metal elements other than In, Ga, and Zn may be contained.

尚且,半導體層24並不限定於氧化物半導體,亦可使用例如非晶矽(亦記載為a-Si)。 In addition, the semiconductor layer 24 is not limited to an oxide semiconductor, and for example, amorphous silicon (also referred to as a-Si) may be used.

源極電極層26及汲極電極層28係分別接合至半導體層24。詳言之,於源極電極層26與汲極電極層28之間設置凹部29,依藉由此凹部29而使源極電極層26與汲極電極層28呈分離之狀態,分別接合至半導體層24。 The source electrode layer 26 and the drain electrode layer 28 are respectively bonded to the semiconductor layer 24. In detail, a recess 29 is provided between the source electrode layer 26 and the drain electrode layer 28, and the source electrode layer 26 and the drain electrode layer 28 are separated from each other by the recess 29, and are respectively joined to the semiconductor Layer 24.

源極電極層26及汲極電極層28係形成含有下述者之積層構造:由Al、Cu或含有此等之合金所構成的金屬層32;設置於金屬層32之半導體層24側之面的第1黑化膜34;與設置於金屬層32之與半導體層24相反側之面的第2黑化膜35。 The source electrode layer 26 and the drain electrode layer 28 form a layered structure including: a metal layer 32 composed of Al, Cu, or an alloy containing these; a surface provided on the semiconductor layer 24 side of the metal layer 32 The first blackening film 34; and the second blackening film 35 provided on the surface of the metal layer 32 opposite to the semiconductor layer 24.

金屬層32為了成為低電阻,較佳係由Al單獨構成。一般作為電極材料係除了Al之外尚使用Cu。此等Al、Cu均可藉由濕式蝕刻進行加工,但Cu由於無法藉由乾式蝕刻進行加工,故Al的通用性較高。又,成本方面而言,Al為Cu之1/3左右的廉價。 In order to achieve low resistance, the metal layer 32 is preferably made of Al alone. Generally, Cu is used as the electrode material system in addition to Al. Both of these Al and Cu can be processed by wet etching, but Cu cannot be processed by dry etching, so Al has high versatility. In terms of cost, Al is cheaper than 1/3 of Cu.

在由Al單獨構成金屬層32時,可藉由使用了純Al之靶材的非反應性濺鍍進行成膜。又,視情況亦可藉由Al含量為90at%以上之Al合金構成金屬層32,亦可與耐熱性導電性材料組合形成。金屬層32之厚度較佳係設為10nm~1μm。 When the metal layer 32 is composed of Al alone, film formation can be performed by non-reactive sputtering using a target of pure Al. In addition, the metal layer 32 may be composed of an Al alloy having an Al content of 90 at% or more, or may be formed in combination with a heat-resistant conductive material. The thickness of the metal layer 32 is preferably 10 nm to 1 μm.

第1黑化膜34及第2黑化膜35係依抑制於金屬層32表面之光反射之目的而被覆金屬層32之下面及上面。第1黑化膜34及第2黑化膜35係(Ti1-xMox)1-yNy所示之鈦合金之氮化物。x 及y係分別表示原子比,且滿足0.03≦x≦0.28、0.40≦y≦0.60。此種第1黑化膜34及第2黑化膜35係使用由既定組成之鈦合金所構成的靶材,詳言之為含有Mo 3~28at%、剩餘部分為由Ti及無法避免之雜質所構成的靶材,於Ar等惰性氣體與氮氣體之混合氣體環境下可藉由反應性濺鍍而形成。 The first blackening film 34 and the second blackening film 35 cover the lower and upper surfaces of the metal layer 32 for the purpose of suppressing light reflection on the surface of the metal layer 32. The first blackened film 34 and the second blackened film 35 are nitrides of titanium alloys represented by (Ti 1-x Mo x ) 1-y N y . x and y represent the atomic ratio, and satisfy 0.03≦x≦0.28, 0.40≦y≦0.60. The first blackening film 34 and the second blackening film 35 use a target composed of a titanium alloy with a predetermined composition. Specifically, it contains Mo 3~28at%, and the remaining part is made of Ti and unavoidable impurities. The formed target material can be formed by reactive sputtering in a mixed gas environment of inert gas such as Ar and nitrogen gas.

第1黑化膜34及第2黑化膜35之組成彼此可為相同或相異。若為相同組成,則可使用共通之靶材。 The composition of the first blackening film 34 and the second blackening film 35 may be the same or different from each other. If the composition is the same, a common target can be used.

尚且,第1黑化膜34及第2黑化膜35之厚度較佳係設為15~200nm。 In addition, the thicknesses of the first blackening film 34 and the second blackening film 35 are preferably 15 to 200 nm.

層間絕緣層14係依被覆源極電極層26及汲極電極層28之方式配置,於源極電極層26與汲極電極層28之間的凹部29中,依與半導體層24之通道區域43相接之方式配置。層間絕緣層14係與閘極絕緣層22同樣地、可使用矽氧化膜(SiOx膜)、矽氮化膜(SiNx膜)等。 The interlayer insulating layer 14 is arranged in such a manner as to cover the source electrode layer 26 and the drain electrode layer 28, and in the recess 29 between the source electrode layer 26 and the drain electrode layer 28, it depends on the channel region 43 of the semiconductor layer 24 Configuration by way of connection. The interlayer insulating layer 14 is similar to the gate insulating layer 22, and a silicon oxide film (SiOx film), a silicon nitride film (SiNx film), or the like can be used.

氧化物導電層16係由ITO、ZnO、SnO2、IZO等所構成,配置於層間絕緣層14上。在將本例子之積層體作為構成液晶面板之TFT陣列基板而發揮機能的情況,氧化物導電層16係構成省略了圖示的液晶顯示部中之畫素電極。氧化物導電層16係經由形成於層間絕緣層14之連接孔36而與汲極電極層28電性連接著,藉由TFT進行ON、OFF,而進行對氧化物導電層16之電壓施加的開始、結束。 The oxide conductive layer 16 is composed of ITO, ZnO, SnO 2 , IZO, etc., and is disposed on the interlayer insulating layer 14. When the layered body of this example functions as a TFT array substrate constituting a liquid crystal panel, the oxide conductive layer 16 constitutes a pixel electrode in a liquid crystal display section (not shown). The oxide conductive layer 16 is electrically connected to the drain electrode layer 28 through the connection hole 36 formed in the interlayer insulating layer 14, and the TFT is turned on and off to start the application of voltage to the oxide conductive layer 16 ,End.

如此構成之積層體10中,源極電極層26及汲極電極層28由於由金屬層32、及依挾持該金屬層32之方式積層形成的黑化膜34、35所構成,故可抑制金屬層32對於來自外部之光的反射。 In the laminated body 10 configured in this manner, the source electrode layer 26 and the drain electrode layer 28 are composed of the metal layer 32 and the blackened films 34 and 35 formed by laminating the metal layer 32, so metal can be suppressed Layer 32 reflects light from the outside.

接著,說明此積層體10的製造步驟。 Next, the manufacturing process of this laminate 10 will be described.

首先,於基板18上,藉由濺鍍法或蒸鍍法等之真空薄膜形成方法形成第1導電膜,對第1導電膜進行圖案化,如圖2(A)所示般形成含有Al等之閘極電極層20。 First, on the substrate 18, a first conductive film is formed by a vacuum thin film forming method such as sputtering or vapor deposition, and the first conductive film is patterned to form Al and the like as shown in FIG. 2(A).之 Gate electrode layer 20.

若藉由第1導電膜之圖案化形成閘極電極層20,則閘極電極層20所位處之部分以外係露出基板18之表面。如圖2(B)所示,於基板18及閘極電極層20之表面,形成SiO2、SiNx等之閘極絕緣層22。 If the gate electrode layer 20 is formed by patterning the first conductive film, the surface of the substrate 18 is exposed except for the portion where the gate electrode layer 20 is located. As shown in FIG. 2(B), a gate insulating layer 22 of SiO 2 , SiNx, or the like is formed on the surfaces of the substrate 18 and the gate electrode layer 20.

接著,如圖2(C)所示,於閘極絕緣層22上形成半導體之薄膜,其後進行圖案化,形成由經圖案化之半導體之薄膜所構成的半導體層24。例如,形成由依既定比例含有In、Ga、Zn之In-Ga-Zn系氧化物所構成的氧化物半導體層。 Next, as shown in FIG. 2(C), a semiconductor thin film is formed on the gate insulating layer 22, and then patterned to form a semiconductor layer 24 composed of the patterned semiconductor thin film. For example, an oxide semiconductor layer composed of an In-Ga-Zn oxide containing In, Ga, and Zn in a predetermined ratio is formed.

接著,如圖3(A)、(B)、(C)所示,於半導體層24之表面、及在半導體層24所位處之部分以外處露出之閘極絕緣層22的表面,依第1黑化膜34a、第2導電膜32a、第2黑化膜35a之順序將此等積層為膜狀。 Next, as shown in FIGS. 3(A), (B), and (C), the surface of the gate insulating layer 22 exposed on the surface of the semiconductor layer 24 and outside the portion where the semiconductor layer 24 is located 1 The blackening film 34a, the second conductive film 32a, and the second blackening film 35a are laminated in the order of film.

第1黑化膜34a係對製作至圖2(C)之狀態為止的積層體,使用既定組成之鈦合金靶材,並藉由使用含有氮氣體之混合氣體作為濺鍍氣體的反應性濺鍍而形成。 The first blackened film 34a is a layered product prepared up to the state shown in FIG. 2(C), using a titanium alloy target of a predetermined composition, and reactive sputtering by using a mixed gas containing a nitrogen gas as a sputtering gas While forming.

接著,使用以Al作為主成分的靶材,藉由使用對靶材呈非反應性之氣體作為濺鍍氣體的非反應性濺鍍,如圖3(B)所示般,於第1黑化膜34a之表面形成第2導電膜32a。 Next, using a target material containing Al as a main component, by using non-reactive sputtering using a gas that is non-reactive to the target as a sputtering gas, as shown in FIG. 3(B), the first blackening A second conductive film 32a is formed on the surface of the film 34a.

接著,使用由既定組成之鈦合金所構成之靶材,藉由使用含氮氣體之混合氣體作為濺鍍氣體的反應性濺鍍,如圖3(C) 所示般,於第2導電膜32a之表面形成第2黑化膜35a。如此,形成含有第1黑化膜34a、第2導電膜32a、第2黑化膜35a的積層膜30a。 Next, using a target composed of a titanium alloy of a predetermined composition, by reactive sputtering using a mixed gas of a nitrogen-containing gas as a sputtering gas, as shown in FIG. 3(C) As shown, a second blackened film 35a is formed on the surface of the second conductive film 32a. In this way, the build-up film 30a including the first blackening film 34a, the second conductive film 32a, and the second blackening film 35a is formed.

其後,如圖4(A)所示般於積層膜30a之非去除部份形成抗蝕層38,依此狀態將含有積層膜30a之積層體浸漬於蝕刻液中,藉此將積層膜30a之未被抗蝕層38遮罩的部分部分地去除。其後,去除抗蝕層38時,如圖4(B)所示般,形成具有第1黑化膜34、金屬層32及第2黑化膜35的源極電極層26及汲極電極層28。 Thereafter, as shown in FIG. 4(A), a resist layer 38 is formed on the non-removed portion of the build-up film 30a, and the build-up body containing the build-up film 30a is immersed in the etchant in this state, thereby immersing the build-up film 30a The part that is not covered by the resist layer 38 is partially removed. Thereafter, when the resist layer 38 is removed, as shown in FIG. 4(B), the source electrode layer 26 and the drain electrode layer having the first blackening film 34, the metal layer 32, and the second blackening film 35 are formed 28.

如此,本例之第1黑化膜34及第2黑化膜35係可與金屬層32一起藉由習知之濕式蝕刻或乾式蝕刻進行圖案形成。 In this way, the first blackening film 34 and the second blackening film 35 of this example can be patterned together with the metal layer 32 by conventional wet etching or dry etching.

圖4(B)中,半導體層24之源極區域41與汲極區域42之間為通道區域43,閘極電極層20係位於挾持閘極絕緣層22而與通道區域43相對向的位置。於此狀態下,藉由半導體層24、閘極絕緣層22、與閘極‧源極‧汲極之各電極層20、26、28構成TFT。 In FIG. 4(B), between the source region 41 and the drain region 42 of the semiconductor layer 24 is a channel region 43, and the gate electrode layer 20 is located opposite to the channel region 43 by sandwiching the gate insulating layer 22 therebetween. In this state, the TFT is formed by the semiconductor layer 24, the gate insulating layer 22, and the electrode layers 20, 26, and 28 of the gate, source, and drain.

接著,如圖5(A)所示般形成含有SiNx或SiO2等的層間絕緣層14。於此同時,在層間絕緣層14之既定處形成連接孔36(參照圖1)。其後,如圖5(B)所示般,於層間絕緣層14之表面形成ITO等之第3導電膜,其後進行圖案化,形成氧化物導電層16。 Next, as shown in FIG. 5(A), an interlayer insulating layer 14 containing SiNx, SiO 2 or the like is formed. At the same time, a connection hole 36 (see FIG. 1) is formed at a predetermined position of the interlayer insulating layer 14. Thereafter, as shown in FIG. 5(B), a third conductive film made of ITO or the like is formed on the surface of the interlayer insulating layer 14 and then patterned to form an oxide conductive layer 16.

以上說明了本發明一實施形態之積層體10之構成及其製造方法,但積層體10之構成及其製造方法可適當變更。例如,上述積層體10中係於源極‧汲極電極26、28設置黑化膜,但視情況亦可於圖1所示之閘極電極20之上下形成黑化膜。又,亦可僅於閘極電極20、源極‧汲極電極26、28之上側形成黑化膜,或亦可僅於閘極電極20、源極‧汲極電極26、28之下側形成黑化膜。 The structure and manufacturing method of the layered body 10 according to an embodiment of the present invention have been described above, but the structure and manufacturing method of the layered body 10 can be appropriately changed. For example, in the above-mentioned laminated body 10, a blackened film is provided on the source/drain electrodes 26 and 28, but a blackened film may be formed on and under the gate electrode 20 shown in FIG. Also, the blackened film may be formed only on the upper side of the gate electrode 20, the source and drain electrodes 26, 28, or may be formed only on the lower side of the gate electrode 20, the source and drain electrodes 26, 28 Blackening film.

又,上述實施形態中,係由鈦合金之氮化物構成第1黑化膜34及第2黑化膜35,但此等黑化膜34、35亦可由(Ti1-xMox)1-y-zNyOz所示之鈦合金之氧氮化物所構成。x、y、z係分別表示原子比,且滿足0.03≦x≦0.28、0.10≦y≦0.60、0.03≦z≦0.47。此種氮氧化物係使用含有既定組成之鈦合金的靶材,可藉由於含有氮氣體及氧氣體之混合氣體環境下的反應性濺鍍而形成。 In addition, in the above embodiment, the first blackening film 34 and the second blackening film 35 are made of a titanium alloy nitride, but these blackening films 34 and 35 may also be made of (Ti 1-x Mo x ) 1- yz N y O z is composed of oxynitride of titanium alloy. The x, y, and z systems respectively represent atomic ratios, and satisfy 0.03≦x≦0.28, 0.10≦y≦0.60, 0.03≦z≦0.47. Such a nitrogen oxide uses a target material containing a titanium alloy of a predetermined composition, and can be formed by reactive sputtering in a mixed gas environment containing a nitrogen gas and an oxygen gas.

圖6係表示本發明其他實施形態的積層體。 Fig. 6 shows a laminate according to another embodiment of the present invention.

圖6(A)中,50A係表示作為觸控面板感應器而使用之積層體之一例。同圖中,52為透明基材,於此基板52之其中一面(圖中之上面),電極形成之金屬層54係涵括基材52全面而積層為膜狀。然後,於此金屬層54之與基材52相反側之面、即圖中之上面,積層形成黑化膜56。此黑化膜56亦涵括金屬層54之全面而積層形成為膜狀。 In FIG. 6(A), 50A represents an example of a laminate used as a touch panel sensor. In the same figure, 52 is a transparent substrate. On one side of the substrate 52 (the upper side in the figure), the metal layer 54 formed by the electrode covers the entirety of the substrate 52 and is laminated in a film shape. Then, a blackened film 56 is formed on the surface of the metal layer 54 opposite to the substrate 52, that is, the upper surface in the figure. The blackened film 56 also covers the entirety of the metal layer 54 and is formed into a film shape.

本例中之黑化膜56,係由(Ti1-xMox)1-yNy所示之鈦合金之氮化物。於此,x及y係分別表示原子比,且滿足0.03≦x≦0.28、0.40≦y≦0.60。又,黑化膜56亦可由(Ti1-xMox)1-y-zNyOz所示之鈦合金之氧氮化物所構成。於此,x、y、z係分別表示原子比,且滿足0.03≦x≦0.28、0.10≦y≦0.60、0.03≦z≦0.47。 The blackened film 56 in this example is a titanium alloy nitride represented by (Ti 1-x Mo x ) 1-y N y . Here, x and y represent the atomic ratio, and satisfy 0.03≦x≦0.28, 0.40≦y≦0.60. Also, the blackened film 56 may be composed of an oxynitride of a titanium alloy shown by (Ti 1-x Mo x ) 1-yz N y O z . Here, x, y, and z represent the atomic ratio, and satisfy 0.03≦x≦0.28, 0.10≦y≦0.60, 0.03≦z≦0.47.

積層體50A實際上係進行加工而使用作為觸控面板感應器之要件。50係表示其加工後之積層體。 The laminate 50A is actually processed and used as a requirement of the touch panel sensor. The 50 series represents the laminate after its processing.

加工後之積層體50中,加工前之積層體50A中之膜狀之金屬層54的多餘部分被去除,僅有多數之極細線S1作為金屬層54而殘留,此等殘留之極細線S1形成為彼此平行而形成條紋狀圖案的電極54D。 In the laminated body 50 after processing, the excess portion of the film-like metal layer 54 in the laminated body 50A before processing is removed, and only a majority of the ultrafine wires S1 remain as the metal layer 54 and these remaining ultrafine wires S1 are formed The electrodes 54D in a stripe pattern are formed parallel to each other.

黑化膜56亦被去除多餘部分,僅有被覆極細線S1之圖中上面之部分成為極細線S2而殘留,此等係具有使極細線對於由圖中上面所入射之光的反射減低的作用。 The blackened film 56 is also removed of excess parts, and only the upper part of the figure covering the extremely thin line S1 becomes the extremely fine line S2 and remains. These have the effect of reducing the reflection of the extremely fine line on the light incident from the upper side of the figure .

尚且,此實施形態中之圖6(A)的積層體50A及50均涵括於本發明之積層體的概念中。 In addition, the laminates 50A and 50 of FIG. 6(A) in this embodiment are included in the concept of the laminate of the present invention.

又,圖6(B)所示積層體60A及60係本實施形態之積層體的其他形態例。積層體60A及60中,係於金屬層54與透明之基材52之間積層形成黑化膜56。如此,可抑制由下側朝上入射之光被電極54D(金屬層54)朝下反射的情形。 In addition, the laminates 60A and 60 shown in FIG. 6(B) are other forms of the laminate of this embodiment. In the laminates 60A and 60, a blackened film 56 is laminated between the metal layer 54 and the transparent substrate 52. In this way, the light incident upward from the lower side can be suppressed from being reflected downward by the electrode 54D (metal layer 54).

[實施例1] [Example 1]

接著以下詳細說明本發明之實施例。 Next, embodiments of the present invention will be described in detail below.

此實施例1中,如下表1所示般,使(Ti1-xMox)1-yNy所示之黑化膜中之Mo原子比x改變,而依以下之方式製造各種積層體,並依以下方法對反射率及蝕刻性進行測定、評價。 In this Example 1, as shown in Table 1 below, the Mo atomic ratio x in the blackened film shown by (Ti 1-x Mo x ) 1-y N y was changed, and various laminates were manufactured in the following manner , And the reflectivity and etching properties are measured and evaluated according to the following methods.

(黑化膜/金屬膜/黑化膜/基材之積層體的製作) (Fabrication of blackened film/metal film/blackened film/substrate laminate)

使用100mm×100mm×1.1mm之玻璃基板作為透明基材,首先進行反應性濺鍍而於基材上形成第1黑化膜。反應性濺鍍係使用含有Mo比相異之TiMo合金的濺鍍靶材,將真空度設為5×10-4~5×10-5Pa,於腔室內導入氮氣體比率為80%以上的混合氣體(剩餘部分為Ar氣體及無法避免之雜質),濺鍍壓力係設為0.1~1.5Pa、電力係設為100~500W而進行。藉此形成厚100nm之黑化膜。 Using a glass substrate of 100 mm×100 mm×1.1 mm as a transparent substrate, first reactive sputtering is performed to form a first blackened film on the substrate. The reactive sputtering system uses a sputtering target containing a TiMo alloy with a different Mo ratio, the degree of vacuum is set to 5×10 -4 to 5×10 -5 Pa, and the rate of introducing nitrogen gas into the chamber is 80% or more For the mixed gas (the remaining part is Ar gas and unavoidable impurities), the sputtering pressure is set to 0.1 to 1.5 Pa, and the electric power is set to 100 to 500W. Thereby, a blackened film with a thickness of 100 nm is formed.

接著,進行非反應性濺鍍而於黑化膜上積層形成含有Cu之金屬膜。用於形成金屬膜之非反應性濺鍍係將真空度設為5×10-4~5×10-5Pa,於腔室內導入Ar氣體(惰性氣體)而進行。濺鍍壓力係設為0.1~1.5Pa、電力係設為100~500W而進行。藉此形成厚200nm之含有Cu的金屬膜。 Next, non-reactive sputtering is performed to form a metal film containing Cu on the blackened film. The non-reactive sputtering for forming a metal film is carried out by introducing Ar gas (inert gas) into the chamber with a vacuum degree of 5×10 −4 to 5×10 −5 Pa. The sputtering pressure is set to 0.1 to 1.5 Pa, and the power system is set to 100 to 500W. This forms a Cu-containing metal film with a thickness of 200 nm.

接著,進行反應性濺鍍而於金屬膜上形成第2黑化膜。成膜條件與第1黑化膜相同。 Next, reactive sputtering is performed to form a second blackened film on the metal film. The film forming conditions are the same as the first blackened film.

如此,獲得於透明基材上依序積層了第1黑化膜與金屬膜與第2黑化膜的構造、亦即圖8所示之第2黑化膜/金屬膜/第1黑化膜/基材的積層體。 In this way, a structure in which the first blackening film, the metal film, and the second blackening film are sequentially stacked on the transparent substrate, that is, the second blackening film/metal film/first blackening film shown in FIG. 8 /Laminate of substrate.

[表1]

Figure 108131535-A0101-12-0012-16
[Table 1]
Figure 108131535-A0101-12-0012-16

(反射率之評價) (Evaluation of reflectivity)

使用如上述般製作之第2黑化膜/金屬膜/第1黑化膜/基材之積層體,根據JIS K 7105進行反射率之測定。詳言之,使用紫外可見分光光度計針對可見光(波長400~780nm)測定波長每1nm之反射率,並算出其平均值。反射率之測定係如圖8中箭頭所示般,測定 由金屬膜側朝基材側觀看時的反射光、亦即測定光由金屬膜側入射至基材側時之反射光,依下述評價基準進行評價。其結果示於表1。 Using the layered product of the second blackened film/metal film/first blackened film/base material produced as described above, the reflectance was measured in accordance with JIS K 7105. In detail, the reflectance per 1 nm wavelength is measured for visible light (wavelength 400-780 nm) using an ultraviolet-visible spectrophotometer, and the average value is calculated. The reflectance is measured as shown by the arrow in Figure 8. The reflected light when viewed from the metal film side toward the substrate side, that is, the reflected light when the measurement light enters the substrate side from the metal film side, was evaluated according to the following evaluation criteria. The results are shown in Table 1.

○:反射率未滿25% ○: The reflectivity is less than 25%

×:反射率為25%以上 ×: Reflectance is 25% or more

(濕式蝕刻性評價) (Evaluation of wet etching)

於濕式蝕刻性評價中,由形成金屬膜前之黑化膜/基材的積層體切出5cm正方之試料,將此試料浸漬於林純藥工業製之蝕刻液Pure Etch TE,測定形成於基板上之黑化膜完全溶解為止的時間,求得蝕刻速率(nm/min),依下述評價基準進行評價。將其結果示於表1。 In the wet etchability evaluation, a 5 cm square sample was cut from the laminate of the blackened film/substrate before forming the metal film, and this sample was immersed in Pure Etch TE, an etching solution made by Lin Chunyao Industry Co., Ltd. The time until the blackened film on the substrate was completely dissolved, the etching rate (nm/min) was obtained, and the evaluation was performed according to the following evaluation criteria. The results are shown in Table 1.

○:蝕刻速率為70nm/min以上 ○: Etching rate is above 70nm/min

×:蝕刻速率未滿70nm/min ×: The etching rate is less than 70nm/min

於表1之結果中,No.1之積層體係不含Mo,由TiN構成黑化膜者。No.1之積層體係反射率之評價、濕式蝕刻性之評價均為×。 In the results of Table 1, the lamination system of No. 1 does not contain Mo, and the blackened film is composed of TiN. The evaluation of the reflectance of the lamination system of No. 1 and the evaluation of the wet etching property are both ×.

另一方面,使黑化膜中含有Mo 32at%以上的No.6及No.7的積層體,雖然濕式蝕刻性之評價為○,但反射率高達超過25%、反射率之評價為×。 On the other hand, the laminates of No. 6 and No. 7 containing Mo 32at% or more in the blackened film were evaluated as ○ for wet etching, but the reflectance was as high as over 25%, and the reflectance was evaluated as × .

相對於此,具備本發明規定之組成之黑化膜的No.2~No.5的積層體,反射率及濕式蝕刻性均得到良好結果。又,於圖7表示黑化膜中之Mo原子比x與反射率間的關係。 On the other hand, the laminates No. 2 to No. 5 provided with the blackened film of the composition prescribed by the present invention have good results in both reflectivity and wet etching. In addition, FIG. 7 shows the relationship between the Mo atomic ratio x in the blackened film and the reflectance.

又,表1中作為參考,亦表示乾式濕刻性的評價。表1所示黑化膜均可進行乾式蝕刻。 In addition, as a reference in Table 1, it also shows the evaluation of dry wet etching. The blackened films shown in Table 1 can be dry etched.

[實施例2] [Example 2]

使用Ti0.92Mo0.08之鈦合金作為黑化膜用之靶材,依與上述實施例1相同的手續,製作第2黑化膜/金屬膜/第1黑化膜/基材的積層體。其中,於此,如表2所示般使黑化膜成膜時之混合氣體中之氮氣體量改變而製造積層體,調查黑化膜之組成並測定反射率。其結果示於表2。 Using a titanium alloy of Ti 0.92 Mo 0.08 as the target for the blackening film, a second blackening film/metal film/first blackening film/substrate laminate was produced in the same procedure as in Example 1 above. Here, as shown in Table 2, the nitrogen gas amount in the mixed gas at the time of forming the blackened film was changed to produce a laminate, the composition of the blackened film was investigated, and the reflectance was measured. The results are shown in Table 2.

[表2]

Figure 108131535-A0101-12-0015-3
[Table 2]
Figure 108131535-A0101-12-0015-3

根據表2之結果,可知為了實現目標之反射率未滿25%,必須使黑化膜中之N含有40at%以上。本例中,藉由將成膜時之混合氣體中之氮氣體量設為80%以上,可使黑化膜中之N成為40at%以上。 According to the results in Table 2, it is known that in order to achieve the target reflectance of less than 25%, it is necessary to make N in the blackened film contain at least 40 at%. In this example, by setting the amount of nitrogen gas in the mixed gas at the time of film formation to 80% or more, N in the blackened film can be made 40 at% or more.

[實施例3] [Example 3]

使用Ti單獨或鈦合金之靶材作為黑化膜用之靶材,依與上述實施例1相同的手續,製作第2黑化膜/金屬膜/第1黑化膜/基材的積層體。其中,於此,如表3、4所示般使黑化膜成膜時之混合氣體中之氮氣體量與氧氣體量的比率改變而製造積層體,調查黑化膜之組成並測定反射率。且,亦一併進行濕式蝕刻性及乾式蝕刻性之評價。其結果示於表3、表4。 Using Ti alone or a titanium alloy target as the target for the blackening film, a second blackened film/metal film/first blackened film/substrate laminate was produced in the same procedure as in Example 1 above. Here, as shown in Tables 3 and 4, the ratio of the amount of nitrogen gas to the amount of oxygen gas in the mixed gas at the time of forming the blackened film was changed to produce a laminate, the composition of the blackened film was investigated, and the reflectance was measured . In addition, the wet-etchability and dry-etchability were also evaluated together. The results are shown in Table 3 and Table 4.

尚且,表3中之Ti-4Mo之記載係表示靶材組成為Ti0.96Mo0.04,Ti-8Mo之記載係表示靶材組成為Ti0.92Mo0.08Furthermore, the description of Ti-4Mo in Table 3 indicates that the target composition is Ti 0.96 Mo 0.04 , and the description of Ti-8Mo indicates that the target composition is Ti 0.92 Mo 0.08 .

[表3]

Figure 108131535-A0101-12-0017-4
[table 3]
Figure 108131535-A0101-12-0017-4

[表4]

Figure 108131535-A0101-12-0018-6
[Table 4]
Figure 108131535-A0101-12-0018-6

根據表3、表4之結果,使用僅含有Ti之靶材時(參照No.21、22)及使用Mo比率較高之靶材(Ti-32Mo)時(參照No.57~62),未達目標(反射率未滿25%)。 According to the results of Table 3 and Table 4, when using a target containing only Ti (refer to No. 21, 22) and when using a target with a high Mo ratio (Ti-32Mo) (refer to No. 57-62), there is no Reach the target (reflectivity less than 25%).

另一方面,若著眼於使用共通靶材所製作之積層體(例如參照表3之No.23~No.29),則隨著黑化膜中所含O量增加而反射率降低,確認到使黑化膜中含有O所造成的效果。其中,在超過適當量而含有的情況,反射率反而變高,可知為了實現目標之反射率未滿25%,有效的是將O設為47at%以下(且N設為10~60at%)。 On the other hand, if we focus on the laminates made using common targets (for example, refer to No. 23 to No. 29 in Table 3), the reflectance decreases as the O content in the blackened film increases, and it is confirmed The effect caused by the inclusion of O in the blackened film. Among them, when it is contained in an amount exceeding an appropriate amount, the reflectance becomes higher. It can be seen that in order to achieve the target reflectance of less than 25%, it is effective to set O to 47 at% or less (and N to 10 to 60 at%).

以上詳細說明了本發明之實施形態及實施例,但此僅為一例示。例如本發明之積層體亦可使用於液晶面板或觸控面板之外的具有有機EL的顯示裝置中等,本發明係在不脫離其旨趣之範圍內可依施加了各種變更的態樣實施。 The embodiments and examples of the present invention have been described in detail above, but this is only an example. For example, the layered product of the present invention can also be used in a display device having an organic EL other than a liquid crystal panel or a touch panel. The present invention can be implemented according to various modifications without departing from its scope.

本案係根據2018年9月3日提出之日本專利申請案2018-164810及2019年6月25日提出之日本專利申請案2019-117759,並將其內容引用於此作為參考。 This case is based on the Japanese patent application 2018-164810 filed on September 3, 2018 and the Japanese patent application 2019-117759 filed on June 25, 2019, and the contents thereof are incorporated herein by reference.

10‧‧‧積層體 10‧‧‧Layered body

14‧‧‧層間絕緣層 14‧‧‧Interlayer insulation

16‧‧‧氧化物導電層 16‧‧‧oxide conductive layer

18‧‧‧基材 18‧‧‧ Base material

20‧‧‧閘極電極層 20‧‧‧Gate electrode layer

22‧‧‧閘極絕緣層 22‧‧‧Gate insulation

24‧‧‧半導體層 24‧‧‧Semiconductor layer

26(30)‧‧‧源極電極層 26(30)‧‧‧Source electrode layer

28(30)‧‧‧汲極電極層 28(30)‧‧‧Drain electrode layer

29‧‧‧凹部 29‧‧‧recess

32‧‧‧金屬層 32‧‧‧Metal layer

34‧‧‧第1黑化膜 34‧‧‧The first blackening film

35‧‧‧第2黑化膜 35‧‧‧Second blackening film

36‧‧‧連接孔 36‧‧‧Connecting hole

41‧‧‧源極區域 41‧‧‧Source area

42‧‧‧汲極區域 42‧‧‧ Drainage area

43‧‧‧通道區域 43‧‧‧Channel area

Claims (3)

一種積層體,其特徵在於,至少具有: A laminate, characterized by having at least: 基材; Substrate 積層於該基材而形成電極及/或佈線的金屬層;與 A metal layer deposited on the substrate to form electrodes and/or wiring; and 積層於該金屬層之與上述基材相反側之面、及/或該金屬層與該基材之間的黑化膜; A blackened film deposited on the surface of the metal layer opposite to the substrate, and/or between the metal layer and the substrate; 該黑化膜係含有以(Ti1-xMox)1-yNy表示之鈦合金之氮化物及無法避免之雜質,x及y係分別表示原子比,且滿足0.03≦x≦0.28、0.40≦y≦0.60。 The blackened film contains nitrides of titanium alloys represented by (Ti 1-x Mo x ) 1-y N y and unavoidable impurities, x and y represent atomic ratios, respectively, and satisfy 0.03≦x≦0.28, 0.40≦y≦0.60. 一種積層體,其特徵在於,至少具有: A laminate, characterized by having at least: 基材; Substrate 積層於該基材而形成電極及/或佈線的金屬層;與 A metal layer deposited on the substrate to form electrodes and/or wiring; and 積層於該金屬層之與上述基材相反側之面、及/或該金屬層與該基材之間的黑化膜; A blackened film deposited on the surface of the metal layer opposite to the substrate, and/or between the metal layer and the substrate; 該黑化膜係含有以(Ti1-xMox)1-y-zNyOz表示之鈦合金之氧氮化物及無法避免之雜質,x、y及z係分別表示原子比,且滿足0.03≦x≦0.28、0.10≦y≦0.60、0.03≦z≦0.47。 The blackened film contains the oxynitride of titanium alloy represented by (Ti 1-x Mo x ) 1-yz N y O z and unavoidable impurities, x, y and z represent the atomic ratio, and satisfy 0.03 ≦x≦0.28, 0.10≦y≦0.60, 0.03≦z≦0.47. 一種靶材,係用於形成請求項1或2中之黑化膜者,其特徵在於含有Mo 3~28at%,剩餘部分係含有Ti及無法避免之雜質。 A target material used to form the blackened film in claim 1 or 2, characterized by containing Mo 3~28at%, and the remaining part contains Ti and unavoidable impurities.
TW108131535A 2018-09-03 2019-09-02 Laminated body and target TWI712502B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2018164810 2018-09-03
JP2018-164810 2018-09-03
JP2019117759A JP7326918B2 (en) 2018-09-03 2019-06-25 laminate
JP2019-117759 2019-06-25

Publications (2)

Publication Number Publication Date
TW202017741A true TW202017741A (en) 2020-05-16
TWI712502B TWI712502B (en) 2020-12-11

Family

ID=69737275

Family Applications (1)

Application Number Title Priority Date Filing Date
TW108131535A TWI712502B (en) 2018-09-03 2019-09-02 Laminated body and target

Country Status (3)

Country Link
JP (1) JP7326918B2 (en)
KR (1) KR102335672B1 (en)
TW (1) TWI712502B (en)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5662680B2 (en) * 2007-08-22 2015-02-04 住友電気工業株式会社 Surface coated cutting tool
JP6043264B2 (en) * 2013-09-30 2016-12-14 株式会社コベルコ科研 Electrode used for input device
WO2016159602A1 (en) * 2015-03-27 2016-10-06 주식회사 엘지화학 Conductive structure, manufacturing method therefor, and electrode comprising conductive structure
CN107683453B (en) * 2015-04-24 2020-09-08 Lg伊诺特有限公司 Touch window
JP2017068219A (en) * 2015-10-02 2017-04-06 株式会社コベルコ科研 Electrode structure
JP6868426B2 (en) * 2016-03-29 2021-05-12 東北特殊鋼株式会社 Titanium alloy coating film and its manufacturing method, and titanium alloy target material manufacturing method
WO2017170639A1 (en) * 2016-03-29 2017-10-05 大同特殊鋼株式会社 Titanium alloy coating film and titanium alloy target material
JP6975543B2 (en) * 2017-03-29 2021-12-01 ジオマテック株式会社 A method for manufacturing an electrode for an organic electroluminescence element, an organic electroluminescence element, an organic electroluminescence display device, and an electrode for an organic electroluminescence element.

Also Published As

Publication number Publication date
TWI712502B (en) 2020-12-11
JP2020037253A (en) 2020-03-12
KR20200026740A (en) 2020-03-11
KR102335672B1 (en) 2021-12-03
JP7326918B2 (en) 2023-08-16

Similar Documents

Publication Publication Date Title
JP4705062B2 (en) Wiring structure and manufacturing method thereof
TWI437697B (en) Wiring structure and a display device having a wiring structure
KR101489652B1 (en) Thin film transistor array substrate and method of fabricating the same
KR101408445B1 (en) Wiring structure, method for manufacturing wiring structure, and display device provided with wiring structure
US20130181218A1 (en) Wiring structure and display device
KR101175085B1 (en) Semiconductor device, liquid crystal display device equipped with semiconductor device, and process for production of semiconductor device
CN101097948A (en) Transparent conductive film, semiconductor device and active matrix display unit
US8933442B2 (en) Thin film transistor substrate and display
US9142682B2 (en) Thin film transistor and manufacturing method thereof
JP2011076080A5 (en)
TWI622088B (en) Low reflection electrode for display device, display device, input device, and sputtering target
US20060261335A1 (en) Liquid crystal display device
TW201841403A (en) Electrode for organic electroluminescence element, organic electroluminescence element, organic electroluminescence display device, and method for manufacturing electrode for organic electroluminescence element
KR102004398B1 (en) Display device and method of manufacturing the same
KR20090066245A (en) Transparent conductive film and method for preparing the same
US8373832B2 (en) Wiring layer, semiconductor device, and liquid crystal display device using semiconductor device
TWI585497B (en) Liquid crystal display panel and manufacturing method thereof
KR20190068171A (en) Thin film trnasistor, method for manufacturing the same and display device comprising the same
TWI712502B (en) Laminated body and target
CN110872687B (en) Laminate and target material
KR20190069210A (en) Thin film trnasistor having supporting layer, method for manufacturing the same and display device comprising the same
KR102434908B1 (en) Thin film trnasistor comprising oxide semiconductor layer, method for manufacturing the same and display device comprising the same
JP2019165192A (en) Active matrix substrate
KR20100040603A (en) Oxide thin film transistor and method of fabricating the same
JP2019098565A (en) Laminate