TW201701418A - Package structure and the manufacture thereof - Google Patents

Abstract

Provided is a package structure, comprising: a substrate, first and second electronic elements disposed on the substrate, a heat sink disposed on the second electronic element, and a packaging layer encapsulating the heat sink, the first and second electronic elements, wherein the height of the first electronic element is greater than the height of the second electronic element, and equals to the combined height of the second electronic element and the heat sink, and wherein surfaces of the heat sink and the first electronic elements are exposed from the packaging layer to allow and facilitate heat-dissipation of the first and second electronic elements. This invention further provides a method for fabricating the package structure as described above.

Description

Package structure and its manufacturing method

The present invention relates to a package structure, and more particularly to a package structure having a plurality of electronic components.

With the evolution of semiconductor packaging technology, semiconductor devices have developed different package types.

Due to the miniaturization of electronic products and the increasing demand for high operating speeds, in order to improve the performance and capacity of a single semiconductor package structure to meet the needs of miniaturization of electronic products (such as saving package space), semiconductor package structures are multi-chip modularized (Multichip) Module) is a trend. This kind of package can take advantage of the heterogeneous integration of system package (SiP), which can be used for different electronic components.

For example: memory, central processing unit, graphics processor, image application processor, etc., through the package design to achieve system integration, that is, combining two or more wafers in a single package structure, not only reducing the overall circuit of the electronic product The structure is bulky and can enhance electrical functions. That is, the multi-chip package structure can minimize the limitation of the operating speed of the system by combining two or more wafers in a single package structure.

In addition, the multi-chip package structure reduces the length of the connection line between the chips and reduces signal delay and access time.

As shown in FIGS. 1 and 1 ′, the conventional package structure 1 includes a substrate 10, a plurality of electronic components 11a, 11b, 11c disposed on the substrate 10, and cladding the electronic components 11a, 11b, 11c. The encapsulation layer 13 and each of the electronic components 11a, 11b, 11c are electrically connected to the substrate 10.

However, in the conventional package structure 1, if the heat dissipation power is to be increased by bare crystal (ie, the exposed crystal back), the height (thickness) of each of the electronic components 11a, 11b, and 11c may be different, and the package may not be polished. The way of layer 13 achieves the purpose of bare crystal heat dissipation.

Therefore, how to make the conventional package structure capable of dissipating heat has become a problem that is currently being solved.

In view of the above-mentioned various deficiencies of the prior art, the present invention discloses a package structure including: a substrate; a first electronic component and a second electronic component are disposed on the substrate, and the height of the first electronic component is higher than a height of the second electronic component; a heat dissipation plate disposed on the second electronic component such that a height of the first electronic component is equal to a total height of the second electronic component and the heat dissipation plate; and an encapsulation layer is formed on the The encapsulating layer covers the heat dissipating plate, the first and second electronic components, and the surface of the heat dissipating plate and the surface of the first electronic component are exposed on the encapsulating layer.

The invention discloses a method for manufacturing a package structure, comprising: providing a substrate, wherein one side of the substrate is provided with at least one first electronic component and at least one second electronic component, and the height of the first electronic component is higher than The second a height of the electronic component; forming a heat dissipation plate on the second electronic component such that a height of the first electronic component is equal to a total height of the second electronic component and the heat dissipation plate; and forming an encapsulation layer on the substrate to enable the package The layer covers the heat dissipation plate, the first and second electronic components, and the surface of the heat dissipation plate and the surface of the first electronic component are exposed to the package layer.

In the above package structure and method of manufacturing the same, the substrate is electrically connected to the first and second electronic components. For example, the first or second electronic component is electrically connected to the substrate by a plurality of conductive elements.

In the foregoing package structure and method of manufacturing the same, the first or second electronic component is a module of a stacked combination.

In the above package structure and method of manufacturing the same, the material of the heat dissipation plate is made of ceramic material or metal material.

In the above package structure and method of manufacturing the same, the heat dissipation plate is a porous metal plate.

In the foregoing package structure and method of manufacturing the same, the heat dissipation coefficient of the heat dissipation plate is greater than 230 W/(m.K) or 400 W/(m.K).

In the foregoing package structure and method of manufacturing the same, the projected area of the heat dissipation plate is greater than or equal to the projected area of the second electronic component.

In the foregoing package structure and method of manufacturing the same, the heat dissipation plate is coupled to the second electronic component by a bonding layer.

The package structure and the manufacturing method thereof include removing a part of the material of the encapsulation layer by a grinding method or a laser burn-off method, and the surface of the heat dissipation plate, the surface of the first electronic component, and the surface of the encapsulation layer Qi Ping.

In the foregoing package structure and the method of manufacturing the same, the method includes The module is extruded to form an encapsulation layer equal to the first electronic component such that the surface of the heat dissipation plate and the surface of the first electronic component are flush with the surface of the encapsulation layer.

In addition, in the foregoing package structure and the manufacturing method thereof, the heat sink is combined with the heat dissipation member and the heat dissipation member is contacted with the heat dissipation plate.

It can be seen that, in the package structure of the present invention, the heat dissipation plate is disposed on the second electronic component such that the height of the first electronic component is equal to the total height of the second electronic component and the heat dissipation plate. Therefore, the surface of the first electronic component can be exposed by grinding the encapsulation layer, so that the first electronic component can achieve the purpose of dissipating heat.

Furthermore, after the encapsulation layer is polished, the surface of the heat dissipation plate can be exposed, so that the second electronic component can be heat-exchanged with the air to achieve heat dissipation, and compared with the heat dissipation effect of the bare crystal, The heat dissipation efficiency of the second electronic component of the invention can be significantly increased by more than 30%.

1,2,2’‧‧‧Package structure

10,20‧‧‧substrate

11a, 11b, 11c‧‧‧ electronic components

13,23‧‧‧Encapsulation layer

20a‧‧‧ first surface

20b‧‧‧second surface

200‧‧‧circuit layer

21a, 21a’‧‧‧ first electronic components

21b, 21b’‧‧‧Second electronic components

210,24‧‧‧Conductive components

22‧‧‧heating plate

220‧‧‧bonding layer

221‧‧‧Perforation

240‧‧‧ Metal layer under the bump

25‧‧‧ Heat sink

9‧‧‧Carrier

A, A’, B‧‧‧ projected area

H, L‧‧‧ Height

R‧‧‧ total height

T‧‧‧thickness

S‧‧‧ cutting path

1 is a schematic perspective view of a conventional package structure; FIG. 1A is a schematic cross-sectional view of FIG. 1; and FIGS. 2A to 2F are schematic cross-sectional views showing a method of manufacturing the package structure of the present invention; wherein, 2C' The figure is a partial enlarged view of FIG. 2C, and the 2F' figure is another embodiment of the 2Fth figure.

The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

It should be noted that the structure, proportion and size depicted in the drawings of this specification And the like, which are used for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the invention, and thus do not have technical significance, any structural modification, The change of the proportional relationship or the adjustment of the size should be within the scope of the technical content disclosed by the present invention without affecting the effects and the achievable effects of the present invention. In the meantime, the terms "upper", "first", "second" and "one" are used in the description, and are not intended to limit the scope of the invention. Changes or adjustments in the relative relationship are considered to be within the scope of the present invention.

2A to 2F are schematic cross-sectional views showing the manufacturing method of the package structure 2 of the present invention.

As shown in FIG. 2A, a carrier member 9 is provided, and a substrate 20 having a first surface 20a and a second surface 20b opposite thereto is disposed on the carrier member 9.

In the present embodiment, the substrate 20 is a circuit board or a ceramic board having at least one wiring layer 200, and the substrate 20 is bonded to the carrier 9 with its second surface 20b. However, the variety of substrates involved is not limited to the above.

As shown in FIG. 2B, a plurality of first electronic components 21a, 21a' and a plurality of second electronic components 21b, 21b' are disposed on the first surface 20a of the substrate 20, and the height of the first electronic components 21a, 21a' H is higher than the height L of the second electronic component 21b, 21b'.

In the present embodiment, the first and second electronic components 21a, 21a', 21b, 21b' are active components, passive components or a combination of both (e.g., stacked combination, side-by-side combination, etc.). Specifically, the active component system For example, semiconductor components (such as wafers, interposers, packages, package substrates, etc.), such as resistors, capacitors, and inductors. For example, a portion of the first electronic component 21a is an active component, and a portion of the first electronic component 21a' may also be a stacked combination of modules (eg, an active component stack, a passive component stack, or a stack of both), and A portion of the second electronic component 21b is a stacked combination of modules (eg, an active component stack, a passive component stack, or a stack of both), and a portion of the second electronic component 21b' is a single passive component.

Further, the substrate 20 is electrically connected to the first and second electronic components 21a, 21a', 21b, 21b'. For example, the first and second electronic components 21a, 21a', 21b, 21b' are electrically connected to the substrate 20 in a flip chip manner. Specifically, the first and second electronic components 21a, 21a', 21b, 21b' are electrically connected to the circuit layer 200 of the substrate 20 by a plurality of conductive elements 210 such as bumps.

In other modes, the first and second electronic components 21a, 21a', 21b, 21b' can be electrically connected to the substrate 20, that is, the first and second electronic components 21a, 21a', 21b. 21b' is electrically connected to the circuit layer 200 of the substrate 20 by a bonding wire (not shown).

In addition, the first and second electronic components 21a, 21a', 21b, 21b' may be electrically connected to the substrate 20 in other manners, and are not limited to the above.

As shown in FIG. 2C, a heat dissipation plate 22 is formed on the second electronic component 21b, 21b' such that the height H of the first electronic component 21a, 21a' is equal to the second electronic component 21b, 21b' and the heat dissipation. The total height R of the plates 22.

In this embodiment, the material of the heat dissipation plate 22 is made of ceramic material or The metal material, for example, has a porous metal plate (such as the perforation 221 shown in Fig. 2C'). Specifically, the heat transfer coefficient (Heat Transfer Coefficient) of the heat dissipation plate 22 needs to be greater than 80 W/(m.K), preferably greater than 230 W/(m.K), and most preferably greater than 400 W/(m) at a temperature of 300 K. .K).

Furthermore, the projected area A of the heat sink 22 is equal to the projected area B of the second electronic components 21b, 21b'. Alternatively, the projected area A' of the heat sink 22 may be larger than the projected area B of the second electronic components 21b, 21b' (see the 2F' diagram described later).

Further, the heat dissipation plate 22 is bonded to the second electronic components 21b, 21b' by a bonding layer 220. For example, the heat sink 22 is an adhesive such as a heat sink.

In addition, the total height R includes the height L of the second electronic component 21b, 21b' and the thickness t of the heat dissipation plate 22, and the thickness of the bonding layer 220 is extremely thin and can be ignored.

As shown in FIG. 2D, an encapsulation layer 23 is formed on the first surface 20a of the substrate 20, so that the encapsulation layer 23 covers the heat dissipation plate 22, the first and second electronic components 21a, 21a', 21b, 21b. '.

In this embodiment, the surface of the heat dissipation plate 22 and the surface of the first electronic component 21a, 21a' are exposed on the package layer 23, and the first and second electronic components 21a, 21a', 21b, 21b' are provided. Cooling. For example, the surface of the heat dissipation plate 22, the surface of the first electronic component 21a, 21a' is flush with the surface of the package layer 23, as shown in FIG. 2D; or an opening may be formed on the surface of the package layer 23, The surface of the heat dissipation plate 22 and the surface of the first electronic component 21a, 21a' (not shown) are exposed.

Furthermore, if the surface of the heat dissipation plate 22 and the surface of the first electronic component 21a, 21a' are flush with the surface of the package layer 23, the first electronic component 21a can be directly molded by using a molding method. 21a' contoured encapsulation layer 23.

Alternatively, a package having a thickness exceeding the first electronic component 21a, 21a' is formed first, and then a portion of the package is removed by grinding until the surface of the heat dissipation plate 22 and the surface of the first electronic component 21a, 21a' are exposed.

Further, when a package having a thickness exceeding the first electronic components 21a, 21a' is formed, in addition to the above-described polishing method, a part of the package may be removed by laser burn-off.

As shown in FIG. 2E, the carrier member 9 is removed, and a plurality of conductive members 24 are formed on the second surface 20b of the substrate 20.

In the embodiment, the conductive elements 24 are solder balls, copper bumps, copper pins, etc., and are electrically connected to the circuit layer 200 of the substrate 20 .

Furthermore, an under bump metallurgy (UBM) 240 may be formed between the conductive elements 24 and the circuit layer 200.

As shown in FIG. 2F, a singulation operation is performed, that is, the substrate 20 and the encapsulation layer 23 thereon are cut along the cutting path S as shown in FIG. 2E to obtain a plurality of package structures 2.

In addition, in an embodiment, as shown in FIG. 2F, the package structure 2' can be combined with a heat sink 25 such as a heat sink fin. For example, the heat sink 25 is in contact with the heat sink 22. In other embodiments, the heat sink 25 and the heat sink 22 can be integrally formed.

In the manufacturing method of the present invention, the heat dissipation plate 22 is mainly disposed in the second The height H of the first electronic component 21a, 21a' is equal to the total height R of the second electronic component 21b, 21b' and the heat sink 22, that is, the surface of the heat sink 22 and the electronic component 21b, 21b' The surface of the first electronic component 21a, 21a' is flush, so that the surface of the first electronic component 21a, 21a' can be exposed by polishing the encapsulation layer 23, so that the first electronic component 21a, 21a' can be dissipated. purpose.

Furthermore, after the encapsulation layer 23 is polished, the surface of the second electronic component 21b, 21b' cannot be exposed, but by exposing the surface of the heat dissipation plate 22, the thermal energy of the second electronic component 21b, 21b' is Conducted to the heat dissipation plate 22, and then heat exchanged with the heat dissipation plate 22 to make the second electronic component 21b, 21b' achieve the purpose of heat dissipation, and the heat dissipation effect of directly exchanging heat with the air surface of the electronic component The heat dissipation efficiency of the second electronic component 21b, 21b' of the present invention is increased by 30% or more.

The present invention further provides a package structure 2, 2' comprising: a substrate 20 having a first surface 20a and a second surface 20b opposite thereto, and a first electronic component 21a disposed on the first surface 20a of the substrate 20, 21a' and second electronic components 21b, 21b', a heat dissipation plate 22 provided on the second electronic component 21b, and an encapsulation layer 23 provided on the first surface 20a of the substrate 20.

The height H of the first electronic component 21a, 21a' is higher than the height L of the second electronic component 21b, 21b', and the height H of the first electronic component 21a, 21a' is equal to the second electronic component. 21b, 21b' and the total height R of the heat sink 22.

The encapsulation layer 23 covers the heat dissipation plate 22, the first and second electronic components 21a, 21a', 21b, 21b', and the upper surface of the heat dissipation plate 22 and the The upper surface of the first electronic component 21a is exposed to the encapsulation layer 23.

In one embodiment, the substrate 20 is electrically connected to the first and second electronic components 21a, 21a', 21b, 21b', and the first and second electronic components 21a, 21a', 21b, 21b' are The substrate 20 is electrically connected by a plurality of conductive elements 210.

In one embodiment, the first electronic component 21a' is a module of a stacked combination.

In an embodiment, the second electronic component 21b is a module of a stacked combination. In one embodiment, the material of the heat dissipation plate 22 is made of ceramic material or metal material. For example, the heat sink 22 is a metal plate having a porous shape.

In one embodiment, the heat sink 22 has a thermal conductivity greater than 230 W/(m.K) or greater than 400 W/(m.K).

In one embodiment, the projected area A of the heat sink 22 can be greater than or equal to the projected area B of the second electronic component 21b, 21b'.

In one embodiment, the heat sink 22 is bonded to the second electronic component 21b, 21b' by a bonding layer 220.

In one embodiment, the package structure 2' includes a heat sink 25 bonded to the package layer 23 and contacting the heat sink 22.

In summary, in the package structure of the present invention, the heat dissipation plate is disposed on the second electronic component, and the height of the first electronic component is equal to the second electronic component and the heat dissipation plate. The total height is such that the surface of the first electronic component can be exposed by grinding the encapsulation layer to achieve the purpose of dissipating the first electronic component.

Furthermore, after the encapsulation layer is polished, the surface of the heat dissipation plate is exposed. The second electronic component can achieve heat dissipation through heat exchange with the air through the heat dissipation plate, and the heat dissipation efficiency of the second electronic component can be remarkable compared to the heat dissipation effect of the second electronic component directly exchanging heat with the air. Increase by more than 30%.

The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

2‧‧‧Package structure

20‧‧‧Substrate

20a‧‧‧ first surface

20b‧‧‧second surface

21a‧‧‧First electronic component

21b‧‧‧Second electronic components

210,24‧‧‧Conductive components

22‧‧‧heating plate

220‧‧‧bonding layer

23‧‧‧Encapsulation layer

240‧‧‧ Metal layer under the bump

H, L‧‧‧ Height

R‧‧‧ total height

T‧‧‧thickness

Claims (25)

A package structure includes: a substrate; a first electronic component and a second electronic component are disposed on the substrate, and a height of the first electronic component is higher than a height of the second electronic component; On the second electronic component, the height of the first electronic component is equal to the total height of the second electronic component and the heat dissipation plate; and an encapsulation layer is formed on the substrate, so that the package layer covers the heat dissipation plate And the first and second electronic components, and the surface of the heat dissipation plate and the surface of the first electronic component are exposed to the encapsulation layer. The package structure of claim 1, wherein the substrate is electrically connected to the first and second electronic components. The package structure of claim 2, wherein the first or second electronic component is electrically connected to the substrate by a plurality of conductive elements. The package structure of claim 1, wherein the first or second electronic component is a module of a stacked combination. The package structure according to claim 1, wherein the material of the heat dissipation plate is a ceramic material or a metal material. The package structure of claim 1, wherein the heat dissipation plate is a porous metal plate. The package structure of claim 1, wherein the heat dissipation plate has a heat transfer coefficient greater than 230 W/(m.K). The package structure according to claim 1, wherein the heat dissipation plate has a heat transfer coefficient greater than 400 W/(m.K). The package structure of claim 1, wherein the heat sink has a projected area greater than or equal to a projected area of the second electronic component. The package structure of claim 1, wherein the heat dissipation plate is bonded to the second electronic component by a bonding layer. The package structure of claim 1, wherein the surface of the heat dissipation plate and the surface of the first electronic component are flush with the surface of the package layer. The package structure according to claim 1, wherein the heat dissipation member is coupled to the package layer and contacts the heat dissipation plate. A method for manufacturing a package structure includes: providing a substrate, wherein one side of the substrate is provided with at least one first electronic component and at least one second electronic component, and the height of the first electronic component is higher than the second electronic component a height of the component; forming a heat dissipation plate on the second electronic component such that a height of the first electronic component is equal to a total height of the second electronic component and the heat dissipation plate; and forming an encapsulation layer on the substrate to make the package layer The heat dissipation plate, the first and second electronic components are covered, and a surface of the heat dissipation plate and a surface of the first electronic component are exposed to the package layer. The method of fabricating a package structure according to claim 13, wherein the substrate is electrically connected to the first and second electronic components. The method of fabricating a package structure according to claim 14, wherein the first or second electronic component is electrically connected to the substrate by a plurality of conductive elements. The method of manufacturing a package structure according to claim 13, wherein the first or second electronic component is a module of a stacked combination. The method for manufacturing a package structure according to claim 13, wherein the material of the heat dissipation plate is a ceramic material or a metal material. The method of manufacturing a package structure according to claim 13, wherein the heat dissipation plate is a porous metal plate. The method for manufacturing a package structure according to claim 13, wherein the heat dissipation plate has a heat transfer coefficient greater than 230 W/(m.K). The method for manufacturing a package structure according to claim 13, wherein the heat dissipation plate has a heat transfer coefficient greater than 400 W/(m.K). The method for manufacturing a package structure according to claim 13 , wherein a projection area of the heat dissipation plate is greater than or equal to a projected area of the second electronic component. The method for manufacturing a package structure according to claim 13 , wherein the heat dissipation plate is bonded to the second electronic component by a bonding layer. The method for manufacturing a package structure according to claim 13 further comprises removing a part of the material of the encapsulation layer by grinding or laser burn-off, so that the surface of the heat dissipation plate and the surface of the first electronic component It is flush with the surface of the encapsulation layer. The method for manufacturing a package structure according to claim 13 of the patent application, comprising directly molding the same height as the first electronic component by molding. The encapsulation layer is such that the surface of the heat dissipation plate and the surface of the first electronic component are flush with the surface of the encapsulation layer. The method for manufacturing a package structure according to claim 13 further comprises combining a heat sink on the package layer and contacting the heat sink with the heat dissipation plate.