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TW201445872A - Variable gain low noise amplifier and method thereof, and receiver - Google Patents

Variable gain low noise amplifier and method thereof, and receiver Download PDF

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Publication number
TW201445872A
TW201445872A TW102117516A TW102117516A TW201445872A TW 201445872 A TW201445872 A TW 201445872A TW 102117516 A TW102117516 A TW 102117516A TW 102117516 A TW102117516 A TW 102117516A TW 201445872 A TW201445872 A TW 201445872A
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circuit
power
low noise
input signal
voltage
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TW102117516A
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Chinese (zh)
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TWI590581B (en
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Wei-Hsuan Lee
Sung-Mao Li
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Advanced Semiconductor Eng
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Abstract

A variable gain low noise amplifier (LNA) circuit is disclosed. The variable gain LNA circuit includes a LNA, a bypass switch circuit, a first power supply circuit and a second power supply circuit. The LNA receives a RF input signal, and the bypass switch circuit receives a switch signal and accordingly decides a conduction or cut-off state. When the power of the RF input signal is larger than a first power threshold value, the bypass switch circuit is conducted so as to form a first active resistor and the first and the second power supply circuit is turn-off so as to close the LNA according to a first and a second enable signal, so that the RF input signal is slightly decayed via the first active resistor; when the power of the RF input signal is larger than a second power threshold value, voltage level of the switch signal is elevated to make the LNA form a second active resistor, so that the RF input signal is significantly decayed via the first active resistor and second resistor.

Description

可變增益低雜訊放大電路及其可變增益方法與接收機 Variable gain low noise amplifying circuit and variable gain method and receiver thereof

本發明乃是關於一種低雜訊放大器電路,特別是指一種根據射頻輸入訊號之功率強度來調整增益之低雜訊放大器電路。 The present invention relates to a low noise amplifier circuit, and more particularly to a low noise amplifier circuit that adjusts the gain based on the power intensity of the RF input signal.

無線通訊係持續以空前未有之速度成長。現今全球係具有超過10億個行動無線裝置。全球係具有用於行動網路、廣域網路、區域網路、公眾安全通訊及軍事通訊之複數個頻帶及通訊標準/協定,其係使無所不在的通訊難以成為最好的。 The wireless communication system continues to grow at an unprecedented rate. Today there are more than one billion mobile wireless devices in the global system. The Global System has multiple frequency bands and communication standards/agreements for mobile networks, wide area networks, regional networks, public safety communications, and military communications that make ubiquitous communications difficult to be the best.

低雜訊放大器(Low Noise Amplifier,LNA)一般用於通信系統中,其作用是將經由天線接收的微弱輸入信號放大為低雜訊指數的信號。此外,低雜訊放大器(LNA)常設置在通訊系統的前端。一般而言,低雜訊放大器能夠降低大部分的雜訊並且放大一中心頻率附近的所需信號(desired signal)。如此一來不僅可以提高通訊系統的訊雜比(SNR),也可以提昇接收信號的品質。 Low Noise Amplifier (LNA) is generally used in communication systems to amplify a weak input signal received via an antenna into a low noise index signal. In addition, low noise amplifiers (LNAs) are often placed at the front end of the communication system. In general, low noise amplifiers can reduce most of the noise and amplify the desired signal near a center frequency. This not only improves the signal-to-noise ratio (SNR) of the communication system, but also improves the quality of the received signal.

在無線通訊系統中,接收機中的低雜訊放大器負責將微弱的射頻輸入信號予以放大並提供給後端之解調電路使用。然而,在一些情況下,如果接收機非常靠近訊號發射源(亦即基地台)下,則過強的發射信號容易造成低雜訊放大器飽和,進而造成接收機系統退化。 In wireless communication systems, the low noise amplifier in the receiver is responsible for amplifying the weak RF input signal and providing it to the back-end demodulation circuit. However, in some cases, if the receiver is very close to the signal source (ie, the base station), an excessively strong transmit signal is likely to cause saturation of the low noise amplifier, which in turn causes degradation of the receiver system.

本發明實施例提供一種可變增益低雜訊放大電路,可變增益低雜訊放大電路包括低雜訊放大器、旁路開關電路、第一電源電路與第二電源電路。低雜訊放大器接收射頻輸入信號。旁路開關電路並聯連接低雜訊放大器,所述旁路開關電路接收開關信號並據此決定導通或截止狀態。第一電源電路連接至低雜訊放大器與旁路開關電路,所述第一電源電路接收第一致能信號並據此輸出第一輸出電壓。第二電源電路連接至低雜訊放大器與旁路開關電路,所述第二電源電路接收第二致能信號並據此輸出第二輸出電壓。當射頻輸入信號之功率大於第一功率門檻值時,則導通旁路開關電路且使其形成第一主動電阻並且第一及第二電源電路分別根據第一及第二致能信號而關閉以使低雜訊放大器關閉,透過第一主動電阻以淺度衰減射頻輸入信號;當射頻輸入信號之功率大於第二功率門檻值時,則提高開關信號之電壓準位以使低雜訊放大器形成第二主動電阻,透過第一及第二主動電阻以深度衰減射頻輸入信號。 The embodiment of the invention provides a variable gain low noise amplification circuit, and the variable gain low noise amplification circuit comprises a low noise amplifier, a bypass switch circuit, a first power supply circuit and a second power supply circuit. The low noise amplifier receives the RF input signal. The bypass switch circuit is connected in parallel with the low noise amplifier, and the bypass switch circuit receives the switch signal and determines the on or off state accordingly. The first power supply circuit is coupled to the low noise amplifier and the bypass switch circuit, the first power supply circuit receiving the first enable signal and outputting the first output voltage accordingly. The second power supply circuit is coupled to the low noise amplifier and the bypass switch circuit, the second power supply circuit receiving the second enable signal and outputting the second output voltage accordingly. When the power of the RF input signal is greater than the first power threshold, turning on the bypass switch circuit and forming the first active resistor and the first and second power circuits are respectively turned off according to the first and second enable signals, so that The low noise amplifier is turned off, and the RF input signal is slightly attenuated by the first active resistor; when the power of the RF input signal is greater than the second power threshold, the voltage level of the switching signal is increased to form a second low noise amplifier. The active resistor transmits the RF input signal deeply through the first and second active resistors.

在本發明其中一個實施例中,可變增益低雜訊放大電路更包括第一電阻與第二電阻。第一電阻之一端連接第二電源電路以接收第二輸出電壓。第二電阻之一端連接第一電阻之另一端與低雜訊放大器,其另一端連接接地電壓。第一電阻及第二電阻構成分壓電路,並且將第二輸出電壓予以分壓後輸出啟動電壓至低雜訊放大器,並且第二功率門檻值大於第一功率門檻值。 In one embodiment of the invention, the variable gain low noise amplifying circuit further includes a first resistor and a second resistor. One end of the first resistor is coupled to the second power supply circuit to receive the second output voltage. One end of the second resistor is connected to the other end of the first resistor and the low noise amplifier, and the other end is connected to the ground voltage. The first resistor and the second resistor form a voltage dividing circuit, and the second output voltage is divided to output a starting voltage to the low noise amplifier, and the second power threshold is greater than the first power threshold.

在本發明其中一個實施例中,第一輸出電壓為系統電壓或接地電壓其中之一,並且第二輸出電壓為偏壓電壓或接地電壓其中之一。 In one of the embodiments of the present invention, the first output voltage is one of a system voltage or a ground voltage, and the second output voltage is one of a bias voltage or a ground voltage.

在本發明其中一個實施例中,低雜訊放大器包括輸出電晶體。輸出電晶體之閘極連接射頻輸入信號與啟動電壓,其源極連接接地電壓,其汲極連接第一電源電路以接收第一輸出電壓且輸 出射頻輸出訊號,其中工作於飽和區之輸出電晶體用以將射頻輸入信號予以放大,並且工作於線性區之輸出電晶體為第二主動電阻。 In one embodiment of the invention, the low noise amplifier includes an output transistor. The gate of the output transistor is connected to the RF input signal and the starting voltage, the source thereof is connected to the ground voltage, and the drain is connected to the first power circuit to receive the first output voltage and input The RF output signal is output, wherein the output transistor operating in the saturation region is used to amplify the RF input signal, and the output transistor operating in the linear region is the second active resistor.

在本發明其中一個實施例中,旁路開關電路包括開關電晶體。開關電晶體之閘極接收開關信號並據此決定導通或截止狀態,其源極連接輸出電晶體之閘極,其汲極連接第一電源電路以接收第一輸出電壓,其中開關電晶體根據開關信號之電壓準位予以調整第一主動電阻之電阻值。當射頻輸入訊號之功率大於第一功率門檻值時,則開關電晶體會根據開關信號之電壓準位而工作於線性區以形成第一主動電阻,並且第一及第二電源電路分別根據第一及第二致能信號而關閉以使輸出電晶體關閉,進而透過第一主動電阻以淺度衰減該射頻輸入信號。 In one of the embodiments of the invention, the bypass switch circuit includes a switching transistor. The gate of the switching transistor receives the switching signal and determines an on or off state according to which the source is connected to the gate of the output transistor, and the drain is connected to the first power circuit to receive the first output voltage, wherein the switching transistor is switched according to the switch The voltage level of the signal is adjusted to adjust the resistance of the first active resistor. When the power of the RF input signal is greater than the first power threshold, the switching transistor operates in the linear region according to the voltage level of the switching signal to form a first active resistor, and the first and second power circuits are respectively according to the first And the second enable signal is turned off to turn off the output transistor, and then the RF input signal is lightly attenuated by the first active resistor.

在本發明其中一個實施例中,當射頻輸入信號之功率大於第二功率門檻值時,則提高開關信號之電壓準位來使開關電晶體工作於線性區已形成第一主動電阻,藉此提高啟動電壓來開啟輸出電晶體並使輸出電晶體工作於線性區以形成第二主動電阻,進而透過第一及第二主動電阻以深度衰減射頻輸入信號。 In one embodiment of the present invention, when the power of the RF input signal is greater than the second power threshold, the voltage level of the switching signal is increased to cause the switching transistor to operate in the linear region to form the first active resistor, thereby improving The startup voltage is turned on to turn on the output transistor and the output transistor operates in the linear region to form a second active resistor, and the first and second active resistors are used to deeply attenuate the RF input signal.

本發明實施例另提供一種接收機,接收機包括可變增益低雜訊放大電路、解調電路與負載。可變增益低雜訊放大電路用以接收射頻輸入訊號且輸出射頻輸出信號。解調電路連接可變增益低雜訊放大電路,所述解調電路用以解調射頻輸出信號並輸出解調信號。負載連接解調電路,所述負載接收解調信號。 Another embodiment of the present invention provides a receiver including a variable gain low noise amplifying circuit, a demodulation circuit, and a load. The variable gain low noise amplifying circuit is configured to receive the RF input signal and output the RF output signal. The demodulation circuit is connected to a variable gain low noise amplifying circuit for demodulating the radio frequency output signal and outputting the demodulated signal. The load is coupled to a demodulation circuit that receives the demodulated signal.

本發明實施例再提供一種可變增益方法,可變增益方法包括以下步驟:偵測射頻輸入信號;判斷射頻輸入信號之功率是否大於第一功率門檻值;如果射頻輸入信號之功率大於第一功率門檻值,則繼續判斷射頻輸入信號之功率是否大於第二功率門檻值;如果射頻輸入信號之功率位於第一及第二功率門檻值之間,則透過第一主動電阻以淺度衰減射頻輸入信號;如果射頻輸入信號之 功率大於第二功率門檻值,則透過第一主動電阻與第二主動電阻以深度衰減該射頻輸入信號 The embodiment of the present invention further provides a variable gain method. The variable gain method includes the steps of: detecting an RF input signal; determining whether a power of the RF input signal is greater than a first power threshold; and if the power of the RF input signal is greater than the first power The threshold value continues to determine whether the power of the RF input signal is greater than the second power threshold; if the power of the RF input signal is between the first and second power thresholds, the RF input signal is shallowly attenuated by the first active resistor. If the RF input signal is The power is greater than the second power threshold, and the RF input signal is deeply attenuated by the first active resistor and the second active resistor

綜上所述,本發明實施例所提出之可變增益低雜訊放大電路及其可變增益方法與接收機,能夠透過偵測射頻輸入信號之功率強度來決定進入「正常模式」、「淺度衰減模式」與「深度衰減模式」其中之一,並且透過導通電阻之阻抗效應來不同幅度地衰減射頻輸入信號。據此,以達到保護接收機後端電路之功效。 In summary, the variable gain low noise amplifying circuit and the variable gain method and receiver thereof according to the embodiments of the present invention can determine the normal mode and the shallow state by detecting the power intensity of the RF input signal. One of the degree decay mode and the "depth decay mode", and the RF input signal is attenuated differently by the impedance effect of the on-resistance. Accordingly, the effect of protecting the back-end circuit of the receiver is achieved.

為使能更進一步瞭解本發明之特徵及技術內容,請參閱以下有關本發明之詳細說明與附圖,但是此等說明與所附圖式僅係用來說明本發明,而非對本發明的權利範圍作任何的限制。 The detailed description of the present invention and the accompanying drawings are to be understood by the claims The scope is subject to any restrictions.

100、200、500、700‧‧‧可變增益低雜訊放大電路 100, 200, 500, 700‧‧‧ variable gain low noise amplifier circuit

110‧‧‧低雜訊放大器 110‧‧‧Low noise amplifier

120‧‧‧旁路開關電路 120‧‧‧ Bypass Switch Circuit

130‧‧‧第一電源電路 130‧‧‧First power circuit

140‧‧‧第二電源電路 140‧‧‧Second power circuit

150‧‧‧分壓電路 150‧‧‧voltage circuit

160‧‧‧偵測器 160‧‧‧Detector

170‧‧‧控制器 170‧‧‧ Controller

900‧‧‧接收機 900‧‧‧ Receiver

910‧‧‧可變增益低雜訊放大電路 910‧‧‧Variable gain low noise amplifier circuit

920‧‧‧解調電路 920‧‧‧Demodulation circuit

930‧‧‧負載 930‧‧‧load

A、B‧‧‧信號路徑 A, B‧‧‧ signal path

C1‧‧‧第一電容 C1‧‧‧first capacitor

C2‧‧‧第二電容 C2‧‧‧second capacitor

EN1‧‧‧第一致能信號 EN1‧‧‧First enable signal

EN2‧‧‧第二致能信號 EN2‧‧‧Secondary enable signal

GND‧‧‧接地電壓 GND‧‧‧ Grounding voltage

GBS‧‧‧開關信號 GBS‧‧‧ switch signal

L1‧‧‧第一電感 L1‧‧‧first inductance

L2‧‧‧第二電感 L2‧‧‧second inductance

M‧‧‧開關電晶體 M‧‧‧Switching transistor

Q‧‧‧輸出電晶體 Q‧‧‧Output transistor

R1‧‧‧第一電阻 R1‧‧‧first resistance

R2‧‧‧第二電阻 R2‧‧‧second resistance

RFIN‧‧‧射頻輸入信號 RFIN‧‧‧RF input signal

RFOUT‧‧‧射頻輸出信號 RFOUT‧‧‧RF output signal

RS‧‧‧偵測結果 RS‧‧‧Detection results

t1、t2‧‧‧時間 T1, t2‧‧‧ time

TH1‧‧‧第一功率門檻值 TH1‧‧‧first power threshold

TH2‧‧‧第二功率門檻值 TH2‧‧‧second power threshold

VG‧‧‧啟動電壓 VG‧‧‧ start voltage

VH1‧‧‧第一高電壓準位 VH1‧‧‧ first high voltage level

VH2‧‧‧第二高電壓準位 VH2‧‧‧ second high voltage level

VL‧‧‧低電壓準位 VL‧‧‧low voltage level

VOUT1‧‧‧第一輸出電壓 VOUT1‧‧‧ first output voltage

VOUT2‧‧‧第二輸出電壓 VOUT2‧‧‧second output voltage

S1010、S1020、S1030、S1040、S1050‧‧‧步驟 S1010, S1020, S1030, S1040, S1050‧ ‧ steps

圖1為根據本發明實施例之可變增益低雜訊放大電路之區塊示意圖。 1 is a block diagram of a variable gain low noise amplifying circuit in accordance with an embodiment of the present invention.

圖2為根據本發明實施例之可變增益低雜訊放大電路之電路示意圖。 2 is a circuit diagram of a variable gain low noise amplifying circuit in accordance with an embodiment of the present invention.

圖3A為根據本發明實施例之射頻輸入信號之功率強度之波形圖。 3A is a waveform diagram of power intensity of a radio frequency input signal in accordance with an embodiment of the present invention.

圖3B為根據本發明實施例之開關信號之驅動波形圖。 3B is a driving waveform diagram of a switching signal according to an embodiment of the present invention.

圖4為根據本發明實施例之正常模式之可變增益低雜訊放大電路之模擬曲線圖。 4 is a simulation graph of a variable gain low noise amplifying circuit in a normal mode according to an embodiment of the present invention.

圖5為根據本發明實施例淺度衰減模式之可變增益低雜訊放大電路之電路示意圖。 FIG. 5 is a circuit diagram of a variable gain low noise amplifying circuit in a shallow attenuation mode according to an embodiment of the present invention.

圖6為根據本發明實施例之淺度衰減模式之可變增益低雜訊放大電路之模擬曲線圖。 6 is a simulation graph of a variable gain low noise amplifying circuit in a shallow attenuation mode according to an embodiment of the present invention.

圖7為根據本發明實施例深度衰減模式之可變增益低雜訊放大電路之電路示意圖。 7 is a circuit diagram of a variable gain low noise amplifying circuit in a depth decay mode according to an embodiment of the invention.

圖8為根據本發明實施例之深度衰減模式之可變增益低雜訊放大電路之模擬曲線圖。 FIG. 8 is a simulation diagram of a variable gain low noise amplifying circuit of a depth attenuation mode according to an embodiment of the present invention.

圖9為根據本發明實施例之接收機之區塊示意圖。 9 is a block diagram of a receiver in accordance with an embodiment of the present invention.

圖10為根據本發明實施例之可變增益方法之流程圖。 10 is a flow chart of a variable gain method in accordance with an embodiment of the present invention.

在下文將參看隨附圖式更充分地描述各種例示性實施例,在隨附圖式中展示一些例示性實施例。然而,本發明概念可能以許多不同形式來體現,且不應解釋為限於本文中所闡述之例示性實施例。確切而言,提供此等例示性實施例使得本發明將為詳盡且完整,且將向熟習此項技術者充分傳達本發明概念的範疇。在諸圖式中,可為了清楚而誇示層及區之大小及相對大小。類似數字始終指示類似元件。 Various illustrative embodiments are described more fully hereinafter with reference to the accompanying drawings. However, the inventive concept may be embodied in many different forms and should not be construed as being limited to the illustrative embodiments set forth herein. Rather, these exemplary embodiments are provided so that this invention will be in the In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Similar numbers always indicate similar components.

應理解,雖然本文中可能使用術語第一、第二、第三等來描述各種元件,但此等元件不應受此等術語限制。此等術語乃用以區分一元件與另一元件。因此,下文論述之第一元件可稱為第二元件而不偏離本發明概念之教示。如本文中所使用,術語「及/或」包括相關聯之列出項目中之任一者及一或多者之所有組合。 It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, such elements are not limited by the terms. These terms are used to distinguish one element from another. Thus, a first element discussed below could be termed a second element without departing from the teachings of the inventive concept. As used herein, the term "and/or" includes any of the associated listed items and all combinations of one or more.

〔可變增益低雜訊放大電路的實施例〕 [Embodiment of Variable Gain Low Noise Amplifying Circuit]

請參照圖1,圖1為根據本發明實施例之可變增益低雜訊放大電路之區塊示意圖。如圖1所示,可變增益低雜訊放大電路100包括低雜訊放大器110、旁路開關電路120、第一電源電路130、第二電源電路140與分壓電路150。旁路開關電路120並聯連接低雜訊放大器110。第一電源電路130連接至低雜訊放大器110與旁路開關電路120。第二電源電路140連接至分壓電路150。分壓電路150連接至低雜訊放大器110與旁路開關電路120。分壓電路150可是由電阻構成之電路。在本實施例中,低雜訊放大器110一般用以通信系統中並且用以接收射頻輸入信號RFIN,亦即,其作用是將經由天線接 收微弱之射頻輸入信號RFIN予以放大為低雜訊指數(low noise figure)之信號。旁路開關電路120用以接收一開關信號GBS並據此決定導通或截止狀態。第一電源電路130接收一第一致能信號EN1並據此輸出一第一輸出電壓VOUT1,第二電源電路140接收第二致能信號EN2並據此輸出第二輸出電壓VOUT2,第一輸出電壓VOUT1為系統電壓或接地電壓其中之一,並且第二輸出電壓VOUT1為偏壓電壓或接地電壓其中之一。分壓電路150用以將其所接收之第二輸出電壓VOUT2予以分壓並據此輸出一啟動電壓VG至低雜訊放大器110。 Please refer to FIG. 1. FIG. 1 is a block diagram of a variable gain low noise amplifying circuit according to an embodiment of the invention. As shown in FIG. 1, the variable gain low noise amplifying circuit 100 includes a low noise amplifier 110, a bypass switch circuit 120, a first power supply circuit 130, a second power supply circuit 140, and a voltage dividing circuit 150. The bypass switch circuit 120 is connected in parallel to the low noise amplifier 110. The first power supply circuit 130 is connected to the low noise amplifier 110 and the bypass switch circuit 120. The second power supply circuit 140 is connected to the voltage dividing circuit 150. The voltage dividing circuit 150 is connected to the low noise amplifier 110 and the bypass switch circuit 120. The voltage dividing circuit 150 may be a circuit composed of a resistor. In this embodiment, the low noise amplifier 110 is generally used in a communication system and is configured to receive a radio frequency input signal RFIN, that is, its function is to be connected via an antenna. The weak RF input signal RFIN is amplified to a low noise figure. The bypass switch circuit 120 is configured to receive a switching signal GBS and determine an on or off state accordingly. The first power supply circuit 130 receives a first enable signal EN1 and outputs a first output voltage VOUT1, and the second power supply circuit 140 receives the second enable signal EN2 and outputs a second output voltage VOUT2 according to the first output voltage. VOUT1 is one of a system voltage or a ground voltage, and the second output voltage VOUT1 is one of a bias voltage or a ground voltage. The voltage dividing circuit 150 is configured to divide the second output voltage VOUT2 received by the voltage dividing circuit 150 and output a starting voltage VG to the low noise amplifier 110.

在無線通訊系統中,接收機中的低雜訊放大器負責將微弱的射頻輸入信號予以放大並提供給後端之解調電路使用。然而,在一些情況下,如果接收機非常靠近訊號發射源(亦即基地台)下,則過強的發射信號容易造成低雜訊放大器飽和,進而造成接收機系統退化。據此,低雜訊放大器需要有能力來淺度衰減或是深度衰減這些過強的射頻輸入信號以維持接收機系統穩定。 In wireless communication systems, the low noise amplifier in the receiver is responsible for amplifying the weak RF input signal and providing it to the back-end demodulation circuit. However, in some cases, if the receiver is very close to the signal source (ie, the base station), an excessively strong transmit signal is likely to cause saturation of the low noise amplifier, which in turn causes degradation of the receiver system. Accordingly, low noise amplifiers need to be capable of shallow attenuation or deep attenuation of these excessive RF input signals to maintain receiver system stability.

接下來要教示的,是進一步說明可變增益低雜訊放大電路100的工作原理。 What will be taught next is to further explain the working principle of the variable gain low noise amplifying circuit 100.

請繼續參照圖1,在本實施例中,可變增益低雜訊放大電路100透過偵測器160來偵測射頻輸入信號RFIN之功率強度,並且偵測器160將此偵測結果RS傳送到控制器170,接著控制器170會根據偵測結果RS來分別傳送第一致能信號EN1、第二致能信號EN2與開關信號GBS至對應的第一電源電路130、第二電源電路140與旁路開關電路120以控制其相關動作,藉此對不同功率強度之射頻輸入信號RFIN進行不同程度之衰減。進一步來說,當偵測器160偵測到射頻輸入信號RFIN之功率大於第一功率門檻值時,則可變增益低雜訊放大電路100會進入「淺度衰減模式」並且偵測器160會將此偵測結果RS傳送至控制器170,接著控制器170會根據偵測結果RS來分別傳送第一致能信號EN1、第二致能信號EN2與開關信號GBS至對應 的第一電源電路130、第二電源電路140與旁路開關電路120。旁路開關電路120會根據開關信號GBS而被導通並且形成第一主動電阻之型態,而第一電源電路130與第二電源電路140分別根據第一致能信號EN1與第二致能信號EN2而關閉,亦即其所對應輸出之輸出電壓VOUT1及VOUT2為接地電壓或零電壓(zero voltage),據此以使低雜訊放大器110關閉。故,當射頻輸入信號RFIN進入到可變增益低雜訊放大電路100之輸入端後,會經由旁路開關電路120至可變增益低雜訊放大電路100之輸出端而轉為一射頻輸出信號RFOUT輸出至下一級電路區塊(未繪示),亦即,射頻輸入信號RFIN會被旁路開關電路120所形成之第一主動電阻來淺度衰減其功率強度。 Referring to FIG. 1 , in the embodiment, the variable gain low noise amplifying circuit 100 detects the power intensity of the RF input signal RFIN through the detector 160, and the detector 160 transmits the detection result RS to The controller 170, and then the controller 170 respectively transmits the first enable signal EN1, the second enable signal EN2 and the switch signal GBS to the corresponding first power circuit 130, the second power circuit 140 and the side according to the detection result RS. The circuit breaker circuit 120 controls its associated actions, thereby attenuating the RF input signal RFIN of different power intensities to varying degrees. Further, when the detector 160 detects that the power of the RF input signal RFIN is greater than the first power threshold, the variable gain low noise amplifier circuit 100 enters the "light attenuation mode" and the detector 160 will The detection result RS is transmitted to the controller 170, and then the controller 170 respectively transmits the first enable signal EN1, the second enable signal EN2 and the switch signal GBS according to the detection result RS. The first power circuit 130, the second power circuit 140 and the bypass switch circuit 120. The bypass switch circuit 120 is turned on according to the switch signal GBS and forms a first active resistor type, and the first power supply circuit 130 and the second power supply circuit 140 respectively according to the first enable signal EN1 and the second enable signal EN2 The off, that is, the output voltages VOUT1 and VOUT2 of the corresponding outputs are ground voltage or zero voltage, so that the low noise amplifier 110 is turned off. Therefore, when the RF input signal RFIN enters the input end of the variable gain low noise amplifier circuit 100, it will be converted to an RF output signal via the bypass switch circuit 120 to the output of the variable gain low noise amplifier circuit 100. The RFOUT is output to the next-stage circuit block (not shown), that is, the RF input signal RFIN is shallowly attenuated by the first active resistor formed by the bypass switch circuit 120.

另一方面,當偵測器160偵測到射頻輸入信號RFIN之功率大於第二功率門檻值時(第二功率門檻值大於第一功率門檻值),則可變增益低雜訊放大電路100會進入「深度衰減模式」並且偵測器160會同樣將此偵測結果RS傳送至控制器170,接著控制器170會根據偵測結果RS來分別傳送第一致能信號EN1、第二致能信號EN2與開關信號GBS至對應的第一電源電路130第二電源電路140與旁路開關電路120,其中第一電源電路與130與第二電源電路140所輸出之輸出電壓VOUT1及VOUT2仍為接地電壓。值得注意的是,此時控制器170所傳送至旁路開關電路120之開關信號GBS之電壓準位大於「淺度衰減模式」下開關信號GBS之電壓準位,藉著提高開關信號GBS之電壓準位來稍微拉高啟動電壓VG之電壓準位以使低雜訊放大器110形成第二主動電阻。故,當射頻輸入信號RFIN進入到可變增益低雜訊放大電路100之輸入端後,射頻輸入信號RFIN會被旁路開關電路120所形成之第一主動電阻與低雜訊放大器110所形成之第二主動電阻所深度衰減,並在可變增益低雜訊放大電路100之輸出端輸出一射頻輸出信號RFOUT至下一級電路區塊(未繪示)。 On the other hand, when the detector 160 detects that the power of the RF input signal RFIN is greater than the second power threshold (the second power threshold is greater than the first power threshold), the variable gain low noise amplifier circuit 100 The "Deep Attenuation Mode" is entered and the detector 160 transmits the detection result RS to the controller 170. The controller 170 then transmits the first enable signal EN1 and the second enable signal according to the detection result RS. EN2 and the switching signal GBS correspond to the first power supply circuit 130, the second power circuit 140 and the bypass switch circuit 120, wherein the output voltages VOUT1 and VOUT2 output by the first power circuit 130 and the second power circuit 140 are still grounded . It should be noted that, at this time, the voltage level of the switching signal GBS transmitted by the controller 170 to the bypass switch circuit 120 is greater than the voltage level of the switching signal GBS in the "shallow attenuation mode", by increasing the voltage of the switching signal GBS. The level is used to slightly pull up the voltage level of the startup voltage VG to cause the low noise amplifier 110 to form a second active resistor. Therefore, when the RF input signal RFIN enters the input end of the variable gain low noise amplifier circuit 100, the RF input signal RFIN is formed by the first active resistor and the low noise amplifier 110 formed by the bypass switch circuit 120. The second active resistor is deeply attenuated, and outputs an RF output signal RFOUT to the next-stage circuit block (not shown) at the output of the variable-gain low-noise amplifier circuit 100.

為了更詳細地說明本發明所述之可變增益低雜訊放大電路100的運作流程,以下將舉多個實施例中至少之一來作更進一步的 說明並且就可變增益低雜訊放大電路之三種模式「正常模式」、「淺度衰減模式」與「深度衰減模式」來依序進行說明。 In order to explain in more detail the operational flow of the variable gain low noise amplifying circuit 100 of the present invention, at least one of the following embodiments will be further developed. The description will be made in order for the three modes of the variable gain low noise amplifier circuit, "normal mode", "shallow attenuation mode" and "depth decay mode".

在接下來的多個實施例中,將描述不同於上述圖1實施例之部分,且其餘省略部分與上述圖1實施例之部分相同。此外,為說明便利起見,相似之參考數字或標號指示相似之元件。 In the following various embodiments, portions different from the above-described embodiment of Fig. 1 will be described, and the remaining omitted portions are the same as those of the above-described embodiment of Fig. 1. In addition, for the sake of convenience, like reference numerals or numerals indicate similar elements.

〔可變增益低雜訊放大電路的另一實施例〕 [Another embodiment of variable gain low noise amplifying circuit]

請參照圖2,圖2為根據本發明實施例之可變增益低雜訊放大電路之電路示意圖。圖2實施例為揭露可變增益低雜訊放大電路在「正常模式」之相關作動,與上述圖1實施例不同的是,分壓電路150包括第一電阻R1與第二電阻R2。低雜訊放大器110包括輸出電晶體Q。旁路開關電路120包括開關電晶體M。可變增益低雜訊放大電路200更包括一第一電感L1、第一電容C1、第二電感L2與第二電容C2。第一電阻R1之一端連接第二電源電路140。第二電阻R2之一端連接第一電阻R1之另一端,第二電阻R2之另一端連接接地電壓GND。輸出電晶體Q之閘極連接第二電阻R2之一端,輸出電晶體Q之源極連接接地電壓GND。第一電感L1之一端連接射頻輸入信號RFIN,第一電感L1之另一端連接第一電容C1之一端,第一電容C1之另一端連接輸出電晶體Q之閘極。開關電晶體M之閘極接收開關信號GBS並據此決定導通或截止狀態,開關電晶體M之源極連接輸出電晶體Q之閘極。開關電晶體M之汲極連接第二電容C2之一端。第二電容C2之另一端連接第二電感L2之一端,第二電感L2之另一端連接第一電源電路130。 Please refer to FIG. 2. FIG. 2 is a schematic circuit diagram of a variable gain low noise amplifying circuit according to an embodiment of the invention. The embodiment of FIG. 2 is to disclose the related operation of the variable gain low noise amplifier circuit in the "normal mode". Unlike the above embodiment of FIG. 1, the voltage dividing circuit 150 includes a first resistor R1 and a second resistor R2. The low noise amplifier 110 includes an output transistor Q. The bypass switch circuit 120 includes a switching transistor M. The variable gain low noise amplifier circuit 200 further includes a first inductor L1, a first capacitor C1, a second inductor L2, and a second capacitor C2. One end of the first resistor R1 is connected to the second power supply circuit 140. One end of the second resistor R2 is connected to the other end of the first resistor R1, and the other end of the second resistor R2 is connected to the ground voltage GND. The gate of the output transistor Q is connected to one end of the second resistor R2, and the source of the output transistor Q is connected to the ground voltage GND. One end of the first inductor L1 is connected to the RF input signal RFIN, and the other end of the first inductor L1 is connected to one end of the first capacitor C1, and the other end of the first capacitor C1 is connected to the gate of the output transistor Q. The gate of the switching transistor M receives the switching signal GBS and determines the on or off state according to this, and the source of the switching transistor M is connected to the gate of the output transistor Q. The drain of the switching transistor M is connected to one end of the second capacitor C2. The other end of the second capacitor C2 is connected to one end of the second inductor L2, and the other end of the second inductor L2 is connected to the first power source circuit 130.

接下來要教示的,是進一步說明「正常模式」之可變增益低雜訊放大電路200的工作原理。 What follows is to further explain the working principle of the variable gain low noise amplifying circuit 200 of the "normal mode".

請同時參照圖2、圖3A與圖3B,圖3A為根據本發明實施例之射頻輸入信號之功率強度之波形圖。圖3B為根據本發明實施例之開關信號之驅動波形圖。在時間t1之前,當偵測器160偵測到射頻輸入信號RFIN之功率強度在正常範圍內,亦即射頻輸入信號RFIN之 功率強度小於第一功率門檻值TH1,則可變增益低雜訊放大電路200會進入「正常模式」並且偵測器160會同樣將此偵測結果RS傳送至控制器170,接著控制器170會根據偵測結果RS來分別傳送第一致能信號EN1、第二致能信號EN2與開關信號GBS至對應的第一電源電路130、第二電源電路140與開關電晶體M。據此,開關電晶體M會根據低電壓準位VL之開關信號GBS而截止或斷開,第一電源電路130會根據第一致能信號EN1將系統電壓作為第一輸出電壓VOUT1而輸出,第二電源電路140會根據第二致能信號EN2將偏壓電壓作為第二輸出電壓VOUT2而輸出至分壓電路150,其中分壓電路150透過第一電阻R1與第二電阻R2所形成之分壓比值來進一步將偏壓電壓予以分壓並輸出一啟動電壓VG至輸出電晶體Q之閘極,此時,輸出電晶體Q工作在飽和區。故,當射頻輸入信號RFIN進入到可變增益低雜訊放大電路200之輸入端後,射頻輸入信號RFIN會透過低雜訊放大器110之輸出電晶體Q予以放大為低雜訊指數之射頻輸出信號RFOUT,以提高通訊系統之訊雜比(SNR),其中射頻輸入信號RFIN會循著信號路徑A而被予以放大而轉為射頻輸入信號RFOUT。接著,請同時參照圖4,圖4為根據本發明實施例之正常模式之可變增益低雜訊放大電路之模擬曲線圖,其橫軸為表示頻率(單位為GHz),其縱軸為表示增益(單位為dB)。由圖4可知,在「正常模式」之可變增益低雜訊放大電路200在2.45GHz下之增益約為18.157dB,其非常合乎低雜訊放大器之通訊標準。 Please refer to FIG. 2, FIG. 3A and FIG. 3B simultaneously. FIG. 3A is a waveform diagram of the power intensity of the radio frequency input signal according to an embodiment of the invention. 3B is a driving waveform diagram of a switching signal according to an embodiment of the present invention. Before time t1, when the detector 160 detects that the power intensity of the RF input signal RFIN is within a normal range, that is, the RF input signal RFIN If the power intensity is less than the first power threshold TH1, the variable gain low noise amplifier circuit 200 enters the "normal mode" and the detector 160 similarly transmits the detection result RS to the controller 170, and then the controller 170 The first enable signal EN1, the second enable signal EN2, and the switch signal GBS are respectively transmitted according to the detection result RS to the corresponding first power supply circuit 130, the second power supply circuit 140, and the switch transistor M. Accordingly, the switching transistor M is turned off or turned off according to the switching signal GBS of the low voltage level VL, and the first power supply circuit 130 outputs the system voltage as the first output voltage VOUT1 according to the first enabling signal EN1. The second power supply circuit 140 outputs the bias voltage as the second output voltage VOUT2 to the voltage dividing circuit 150 according to the second enable signal EN2, wherein the voltage dividing circuit 150 is formed by the first resistor R1 and the second resistor R2. The voltage dividing ratio further divides the bias voltage and outputs a starting voltage VG to the gate of the output transistor Q. At this time, the output transistor Q operates in the saturation region. Therefore, when the RF input signal RFIN enters the input end of the variable gain low noise amplifier circuit 200, the RF input signal RFIN is amplified by the output transistor Q of the low noise amplifier 110 to a low noise index RF output signal. RFOUT, to improve the communication system's signal-to-noise ratio (SNR), where the RF input signal RFIN is amplified along the signal path A and converted to the RF input signal RFOUT. Next, please refer to FIG. 4 at the same time. FIG. 4 is a simulation graph of a variable gain low noise amplifier circuit in a normal mode according to an embodiment of the present invention, wherein the horizontal axis represents the frequency (in GHz) and the vertical axis represents Gain (in dB). As can be seen from FIG. 4, the variable gain low noise amplifier circuit 200 in "normal mode" has a gain of about 18.157 dB at 2.45 GHz, which is very compatible with the communication standard of the low noise amplifier.

接下來要教示的,是進一步說明「淺度衰減模式」之可變增益低雜訊放大電路的工作原理。 The next step is to further explain the working principle of the variable gain low noise amplifier circuit in the "light attenuation mode".

〔可變增益低雜訊放大電路的再一實施例〕 [Further embodiment of variable gain low noise amplifying circuit]

請同時參照圖3A、圖3B與圖5,圖5為根據本發明實施例淺度衰減模式之可變增益低雜訊放大電路之電路示意圖。圖5實施例為揭露可變增益低雜訊放大電路500在「淺度衰減模式」之相關作動。在時間t1與時間t2之間,當偵測器160偵測到射頻輸入信號RFIN 之功率強度大於第一功率門檻值TH1時,亦即射頻輸入信號RFIN之功率強度在第一功率門檻值與第二功率門檻值TH2之間,則可變增益低雜訊放大電路500會進入「淺度衰減模式」並且偵測器160會同樣將此偵測結果RS傳送至控制器170,接著控制器170會根據偵測結果RS來分別傳送第一致能信號EN1、第二致能信號EN2與開關信號GBS至對應的第一電源電路130、第二電源電路140與開關電晶體M。開關電晶體M會根據第一高電壓準位VH1之開關信號GBS而導通且進入到線性區域以形成第一主動電阻(亦即開關電晶體M之導通電阻),第一電源電路130會根據第一致能信號EN1將接地電壓作為第一輸出電壓VOUT1而輸出,第二電源電路140會根據第二致能信號EN2將接地電壓作為第二輸出電壓VOUT2而輸出至分壓電路150,其中分壓電路150透過第一電阻R1與第二電阻R2所形成之分壓比值來進一步將接地電壓予以分壓並輸出一啟動電壓VG至輸出電晶體Q之閘極,此時輸出電晶體Q為工作在截止區。故,當射頻輸入信號RFIN進入到可變增益低雜訊放大電路500之輸入端後,射頻輸入信號RFIN會循著信號路徑B而分別經過第一主動電阻(進入到線性區域之開關電晶體M所形成)與第二電容C2而至可變增益低雜訊放大電路500之輸出端,亦即本實施例透過第一主動電阻之阻抗效應來淺度衰減射頻輸入信號RFIN,以避免接收機系統遭受過強之射頻信號而不穩定。請同時參照圖6,圖6為根據本發明實施例之淺度衰減模式之可變增益低雜訊放大電路之模擬曲線圖,其橫軸為表示頻率(單位為GHz),其縱軸為表示增益(單位為dB)。由圖6可知,在「淺度衰減模式」之可變增益低雜訊放大電路500在2.45GHz下之增益約為-3.056dB。 Please refer to FIG. 3A, FIG. 3B and FIG. 5 simultaneously. FIG. 5 is a circuit diagram of a variable gain low noise amplifying circuit in a shallow attenuation mode according to an embodiment of the invention. The embodiment of FIG. 5 discloses the related operation of the variable gain low noise amplifying circuit 500 in the "slight attenuation mode". Between time t1 and time t2, when the detector 160 detects the RF input signal RFIN When the power intensity is greater than the first power threshold TH1, that is, the power intensity of the RF input signal RFIN is between the first power threshold and the second power threshold TH2, the variable gain low noise amplifier circuit 500 enters The shallow attenuation mode and the detector 160 will also transmit the detection result RS to the controller 170, and then the controller 170 will respectively transmit the first enable signal EN1 and the second enable signal EN2 according to the detection result RS. The first power supply circuit 130, the second power supply circuit 140, and the switching transistor M corresponding to the switching signal GBS. The switching transistor M is turned on according to the switching signal GBS of the first high voltage level VH1 and enters the linear region to form a first active resistor (that is, the on-resistance of the switching transistor M), and the first power circuit 130 according to the first The coincidence signal EN1 outputs the ground voltage as the first output voltage VOUT1, and the second power supply circuit 140 outputs the ground voltage as the second output voltage VOUT2 to the voltage dividing circuit 150 according to the second enable signal EN2. The voltage circuit 150 further divides the ground voltage by a voltage dividing ratio formed by the first resistor R1 and the second resistor R2, and outputs a starting voltage VG to the gate of the output transistor Q. At this time, the output transistor Q is Work in the cut-off area. Therefore, when the RF input signal RFIN enters the input end of the variable gain low noise amplifier circuit 500, the RF input signal RFIN follows the signal path B and passes through the first active resistor (the switch transistor M entering the linear region) Forming) and the second capacitor C2 to the output of the variable gain low noise amplifier circuit 500, that is, the impedance effect of the first active resistor is shallowly attenuated by the impedance effect of the first active resistor to avoid the receiver system It is unstable due to excessive RF signal. Please refer to FIG. 6. FIG. 6 is a simulation diagram of a variable gain low noise amplifying circuit in a shallow attenuation mode according to an embodiment of the present invention, wherein the horizontal axis represents the frequency (in GHz) and the vertical axis represents Gain (in dB). As can be seen from Fig. 6, the gain of the variable gain low noise amplifier circuit 500 in the "slight attenuation mode" at 2.45 GHz is about - 3.056 dB.

〔可變增益低雜訊放大電路的更一實施例〕 [More Embodiment of Variable Gain Low-Noise Amplifying Circuit]

請同時參照圖3A、圖3B與圖7,圖7為根據本發明實施例深度衰減模式之可變增益低雜訊放大電路之電路示意圖。圖7實施例為揭露可變增益低雜訊放大電路700在「深度衰減模式」之相關作 動。在時間t2之後,當偵測器160偵測到射頻輸入信號RFIN之功率強度大於第二功率門檻值TH2時,則可變增益低雜訊放大電路700會進入「深度衰減模式」並且偵測器160會同樣將此偵測結果RS傳送至控制器170,接著控制器170會根據偵測結果RS來分別傳送第一致能信號EN1、第二致能信號EN2與開關信號GBS至對應的第一電源電路130第二電源電路140與開關電晶體M。開關電晶體M會根據第二高電壓準位VH2之開關信號GBS而繼續導通且仍然維持在線性區域以形成更高阻抗之第一主動電阻(亦即開關電晶體M之導通電阻),其中第二高電壓準位VH2略大於第一高電壓準位VH1,其皆使開關電晶體M導通且進入到線性區域,亦即本揭露內容利用不同的電壓準位來達到不同電阻值之第一主動電阻。第一電源電路130會根據第一致能信號EN1繼續將接地電壓作為第一輸出電壓VOUT1而輸出,第二電源電路140會根據第二致能信號EN2將偏壓電壓繼續作為第二輸出電壓VOUT2而輸出至分壓電路150,其中分壓電路150透過第一電阻R1與第二電阻R2所形成之分壓比值來進一步將接地電壓予以分壓並輸出一啟動電壓VG至輸出電晶體Q之閘極。值得注意的是,因為開關電晶體之閘極接收第二高電壓準位VH2之開關信號GBS,會因此拉高輸出電晶體Q之閘極電壓之準位,亦即此時啟動電壓VG並非為零電壓並且啟動電壓之電壓值大小能夠使得輸出電晶體Q進入到線性區域,進而使輸出電晶體Q形成第二主動電阻(亦即輸出電晶體Q之導通電阻)。簡單來說,本實施例透過第一主動電阻與第二主動電阻來加深射頻輸入信號RFIN之衰減幅度。故,當射頻輸入信號RFIN進入到可變增益低雜訊放大電路700之輸入端後,射頻輸入信號RFIN會循著信號路徑C而分別經過第一主動電阻(進入到線性區域之開關電晶體M所形成)與第二電容C2而至可變增益低雜訊放大電路700之輸出端,並且射頻輸入信號RFIN會受到第一主動電阻與第二主動電阻之阻抗效應而因此大幅衰減。請同時參照圖8,圖8為根據本發明實施例之深度 衰減模式之可變增益低雜訊放大電路之模擬曲線圖,其橫軸為表示頻率(單位為GHz),其縱軸為表示增益(單位為dB)。由圖8可知,在「深度衰減模式」之可變增益低雜訊放大電路700在2.45GHz下之增益約為-13.188dB。 Please refer to FIG. 3A, FIG. 3B and FIG. 7. FIG. 7 is a schematic circuit diagram of a variable gain low noise amplifying circuit in a deep attenuation mode according to an embodiment of the invention. The embodiment of FIG. 7 is related to the disclosure of the variable gain low noise amplifier circuit 700 in the "depth decay mode". move. After the time t2, when the detector 160 detects that the power intensity of the RF input signal RFIN is greater than the second power threshold TH2, the variable gain low noise amplifier circuit 700 enters the "depth decay mode" and the detector 160 will also transmit the detection result RS to the controller 170, and then the controller 170 respectively transmits the first enable signal EN1, the second enable signal EN2 and the switch signal GBS to the corresponding first according to the detection result RS. The power circuit 130 has a second power circuit 140 and a switching transistor M. The switching transistor M continues to conduct according to the switching signal GBS of the second high voltage level VH2 and remains in the linear region to form a higher impedance first active resistor (ie, the on-resistance of the switching transistor M), wherein The second high voltage level VH2 is slightly larger than the first high voltage level VH1, which causes the switching transistor M to be turned on and enters the linear region, that is, the first active use of different voltage levels to achieve different resistance values. resistance. The first power supply circuit 130 continues to output the ground voltage as the first output voltage VOUT1 according to the first enable signal EN1, and the second power supply circuit 140 continues to use the bias voltage as the second output voltage VOUT2 according to the second enable signal EN2. And outputting to the voltage dividing circuit 150, wherein the voltage dividing circuit 150 further divides the ground voltage by a voltage dividing ratio formed by the first resistor R1 and the second resistor R2 and outputs a starting voltage VG to the output transistor Q. The gate. It is worth noting that because the gate of the switching transistor receives the switching signal GBS of the second high voltage level VH2, the gate voltage of the output transistor Q is raised, that is, the starting voltage VG is not The zero voltage and the voltage value of the startup voltage are such that the output transistor Q enters the linear region, thereby causing the output transistor Q to form a second active resistor (ie, the on-resistance of the output transistor Q). Briefly, in this embodiment, the attenuation amplitude of the RF input signal RFIN is deepened by the first active resistor and the second active resistor. Therefore, when the RF input signal RFIN enters the input end of the variable gain low noise amplifier circuit 700, the RF input signal RFIN follows the signal path C and passes through the first active resistor (the switch transistor M entering the linear region) The second capacitor C2 is formed to the output of the variable gain low noise amplifier circuit 700, and the RF input signal RFIN is subjected to the impedance effect of the first active resistor and the second active resistor and thus is greatly attenuated. Please refer to FIG. 8 at the same time, FIG. 8 is a depth according to an embodiment of the present invention. The analog curve of the variable gain low noise amplifier circuit in the decay mode, the horizontal axis represents the frequency (in GHz), and the vertical axis represents the gain (in dB). As can be seen from FIG. 8, the gain of the variable gain low noise amplifier circuit 700 in the "depth decay mode" at 2.45 GHz is about -13.188 dB.

總而言之,本揭露內容透過偵測射頻輸入信號之功率強度來決定進入「正常模式」、「淺度衰減模式」與「深度衰減模式」其中之一,並且透過導通電阻之阻抗效應來衰減射頻輸入信號。值得一提的是,本揭露內容不僅具有以第一主動電阻來衰減射頻輸入信號之「淺度衰減模式」,更具有以第一主動電阻與第二主動電阻來加深射頻輸入信號衰減幅度之「深度衰減模式」。 In summary, the disclosure determines one of the "normal mode", "shallow attenuation mode" and "depth attenuation mode" by detecting the power intensity of the RF input signal, and attenuating the RF input signal through the impedance effect of the on-resistance. . It is worth mentioning that the disclosure not only has a "shallow attenuation mode" for attenuating the RF input signal by the first active resistor, but also has a first active resistor and a second active resistor to deepen the attenuation amplitude of the RF input signal. Depth attenuation mode".

〔具有可變增益低雜訊放大電路之接收機的一實施例〕 [An embodiment of a receiver having a variable gain low noise amplifying circuit]

請參照圖9,圖9為根據本發明實施例之接收機之區塊示意圖。接收機900包括可變增益低雜訊放大電路910、解調電路920與負載930。解調電路920連接可變增益低雜訊放大電路910,負載930連接解調電路920。解調電路920用以解調射頻輸出信號RFOUT並輸出解調信號OUT至負載930。可變增益低雜訊放大電路910可以是上述實施例中之可變增益低雜訊放大電路100、200、500與700的其中之一,並且透過天線來接收基地台所發射之射頻輸入信號RFIN,並透過偵測射頻輸入信號RFIN之功率強度來決定進入「正常模式」、「淺度衰減模式」與「深度衰減模式」,並且透過導通電阻之阻抗效應來衰減射頻輸入信號RFIN。 Please refer to FIG. 9. FIG. 9 is a block diagram of a receiver according to an embodiment of the present invention. The receiver 900 includes a variable gain low noise amplification circuit 910, a demodulation circuit 920, and a load 930. The demodulation circuit 920 is connected to the variable gain low noise amplification circuit 910, and the load 930 is connected to the demodulation circuit 920. The demodulation circuit 920 is configured to demodulate the RF output signal RFOUT and output the demodulation signal OUT to the load 930. The variable gain low noise amplifying circuit 910 may be one of the variable gain low noise amplifying circuits 100, 200, 500 and 700 in the above embodiment, and receive the RF input signal RFIN transmitted by the base station through the antenna. By detecting the power intensity of the RF input signal RFIN, it is determined to enter the "normal mode", "shallow attenuation mode" and "depth decay mode", and the RF input signal RFIN is attenuated by the impedance effect of the on-resistance.

〔可變增益方法的一實施例〕 [An embodiment of the variable gain method]

請參照圖10,圖10為根據本發明實施例之可變增益方法之流程圖。本例所述的方法可以在圖1、圖2、圖5或圖7所示的可變增益低雜訊放大電路的可攜式電子裝置執行,因此請一併參照圖1、圖2、圖5或圖7以利理解。可變增益方法包括以下步驟:偵測射頻輸入信號(步驟S1010)。判斷射頻輸入信號之功率是否大於第一功率門檻值(步驟S1020)。如果射頻輸入信號之功率大於第一功率門檻 值,則繼續判斷射頻輸入信號之功率是否大於第二功率門檻值(步驟S1030)。如果射頻輸入信號之功率位於第一及第二功率門檻值之間,則透過第一主動電阻以淺度衰減射頻輸入信號(步驟S1040)。如果射頻輸入信號之功率大於第二功率門檻值,則透過第一主動電阻與第二主動電阻以深度衰減射頻輸入信號(步驟S1050)。 Please refer to FIG. 10. FIG. 10 is a flowchart of a variable gain method according to an embodiment of the present invention. The method in this example can be implemented in the portable electronic device of the variable gain low noise amplifying circuit shown in FIG. 1, FIG. 2, FIG. 5 or FIG. 7, so please refer to FIG. 1, FIG. 2 and FIG. 5 or Figure 7 to understand. The variable gain method includes the steps of: detecting an RF input signal (step S1010). It is determined whether the power of the radio frequency input signal is greater than the first power threshold (step S1020). If the power of the RF input signal is greater than the first power threshold The value continues to determine whether the power of the RF input signal is greater than the second power threshold (step S1030). If the power of the RF input signal is between the first and second power thresholds, the RF input signal is slightly attenuated by the first active resistor (step S1040). If the power of the RF input signal is greater than the second power threshold, the RF input signal is deeply attenuated by the first active resistor and the second active resistor (step S1050).

關於可變增益低雜訊放大電路之可變增益方法之各步驟的相關細節在上述圖1~圖8實施例已詳細說明,在此恕不贅述。 The details of the steps of the variable gain method of the variable gain low noise amplifying circuit have been described in detail in the above embodiments of FIGS. 1 to 8 and will not be described herein.

在此須說明的是,圖10實施例之各步驟僅為方便說明之須要,本發明實施例並不以各步驟彼此間的順序作為實施本發明各個實施例的限制條件。 It should be noted that the steps of the embodiment of FIG. 10 are merely for convenience of description, and the embodiments of the present invention do not use the steps of the steps as a limitation of the embodiments of the present invention.

〔實施例的可能功效〕 [Possible effects of the examples]

綜上所述,本發明實施例所提出之可變增益低雜訊放大電路及其可變增益方法與接收機,能夠透過偵測射頻輸入信號之功率強度來決定進入「正常模式」、「淺度衰減模式」與「深度衰減模式」其中之一,並且透過導通電阻之阻抗效應來不同幅度地衰減射頻輸入信號。據此,以達到保護接收機後端電路之功效。 In summary, the variable gain low noise amplifying circuit and the variable gain method and receiver thereof according to the embodiments of the present invention can determine the normal mode and the shallow state by detecting the power intensity of the RF input signal. One of the degree decay mode and the "depth decay mode", and the RF input signal is attenuated differently by the impedance effect of the on-resistance. Accordingly, the effect of protecting the back-end circuit of the receiver is achieved.

以上所述僅為本發明之實施例,其並非用以侷限本發明之專利範圍。 The above description is only an embodiment of the present invention, and is not intended to limit the scope of the invention.

200‧‧‧可變增益低雜訊放大電路 200‧‧‧Variable Gain Low Noise Amplifier Circuit

110‧‧‧低雜訊放大器 110‧‧‧Low noise amplifier

120‧‧‧旁路開關電路 120‧‧‧ Bypass Switch Circuit

130‧‧‧第一電源電路 130‧‧‧First power circuit

140‧‧‧第二電源電路 140‧‧‧Second power circuit

150‧‧‧分壓電路 150‧‧‧voltage circuit

160‧‧‧偵測器 160‧‧‧Detector

170‧‧‧控制器 170‧‧‧ Controller

A‧‧‧信號路徑 A‧‧‧Signal Path

C1‧‧‧第一電容 C1‧‧‧first capacitor

C2‧‧‧第二電容 C2‧‧‧second capacitor

EN1‧‧‧第一致能信號 EN1‧‧‧First enable signal

EN2‧‧‧第二致能信號 EN2‧‧‧Secondary enable signal

GND‧‧‧接地電壓 GND‧‧‧ Grounding voltage

GBS‧‧‧開關信號 GBS‧‧‧ switch signal

L1‧‧‧第一電感 L1‧‧‧first inductance

L2‧‧‧第二電感 L2‧‧‧second inductance

M‧‧‧開關電晶體 M‧‧‧Switching transistor

Q‧‧‧輸出電晶體 Q‧‧‧Output transistor

R1‧‧‧第一電阻 R1‧‧‧first resistance

R2‧‧‧第二電阻 R2‧‧‧second resistance

RFIN‧‧‧射頻輸入信號 RFIN‧‧‧RF input signal

RFOUT‧‧‧射頻輸出信號 RFOUT‧‧‧RF output signal

RS‧‧‧偵測結果 RS‧‧‧Detection results

VG‧‧‧啟動電壓 VG‧‧‧ start voltage

VOUT1‧‧‧第一輸出電壓 VOUT1‧‧‧ first output voltage

VOUT2‧‧‧第二輸出電壓 VOUT2‧‧‧second output voltage

Claims (10)

一種可變增益低雜訊放大電路,包括:一低雜訊放大器,接收一射頻輸入信號;一旁路開關電路,並聯連接該低雜訊放大器,該旁路開關電路接收一開關信號並據此決定導通或截止狀態;一第一電源電路,連接至該低雜訊放大器與該旁路開關電路,該第一電源電路接收一第一致能信號並據此輸出一第一輸出電壓;以及一第二電源電路,連接至該低雜訊放大器與該旁路開關電路,該第二電源電路接收一第二致能信號並據此輸出一第二輸出電壓,其中當該射頻輸入信號之功率大於一第一功率門檻值時,則導通該旁路開關電路且使其形成一第一主動電阻並且該第一及該第二電源電路分別根據該第一及該第二致能信號而關閉以使該低雜訊放大器關閉,透過該第一主動電阻以淺度衰減該射頻輸入信號;當該射頻輸入信號之功率大於一第二功率門檻值時,則提高該開關信號之電壓準位以使該低雜訊放大器形成一第二主動電阻,透過該第一及該第二主動電阻以深度衰減該射頻輸入信號。 A variable gain low noise amplifying circuit comprising: a low noise amplifier receiving an RF input signal; a bypass switching circuit connected in parallel to the low noise amplifier, the bypass switch circuit receiving a switching signal and determining accordingly Turning on or off; a first power circuit connected to the low noise amplifier and the bypass switch circuit, the first power circuit receiving a first enable signal and outputting a first output voltage according to the same; a second power circuit connected to the low noise amplifier and the bypass switch circuit, the second power circuit receiving a second enable signal and outputting a second output voltage according to the power output signal, wherein the power of the RF input signal is greater than one When the first power threshold is set, the bypass switch circuit is turned on and formed into a first active resistor, and the first and second power circuits are respectively turned off according to the first and second enable signals to enable the The low noise amplifier is turned off, and the RF input signal is lightly attenuated by the first active resistor; when the power of the RF input signal is greater than a second power threshold, Voltage level of the switching signal so that the LNA is formed a second active resistance, depth attenuate the RF input signal through the first and the second active resistance. 如申請專利範圍第1項所述之可變增益低雜訊放大電路,更包括:一第一電阻,其一端連接該第二電源電路以接收該第二輸出電壓;以及一第二電阻,其一端連接該第一電阻之另一端與該低雜訊放大器,其另一端連接一接地電壓,其中該第一及該第二電阻構成一分壓電路,並且將該第二輸出電壓予以分壓後輸出該啟動電壓至該低雜訊放大器,並且該第二功率門檻值大於該第一功率門檻值。 The variable gain low noise amplifying circuit of claim 1, further comprising: a first resistor connected to the second power supply circuit at one end to receive the second output voltage; and a second resistor One end of the first resistor is connected to the low noise amplifier, and the other end is connected to a ground voltage. The first and the second resistors form a voltage dividing circuit, and the second output voltage is divided. The startup voltage is then output to the low noise amplifier, and the second power threshold is greater than the first power threshold. 如申請專利範圍第2項所述之可變增益低雜訊放大電路,其中該第一輸出電壓為一系統電壓或該接地電壓其中之一,並且該第二輸出電壓為一偏壓電壓或該接地電壓其中之一。 The variable gain low noise amplifying circuit of claim 2, wherein the first output voltage is one of a system voltage or the ground voltage, and the second output voltage is a bias voltage or the One of the grounding voltages. 如申請專利範圍第2項所述之可變增益低雜訊放大電路,其中該低雜訊放大器包括:一輸出電晶體,其閘極連接該射頻輸入信號與該啟動電壓,其源極連接該接地電壓,其汲極連接該第一電源電路以接收該第一輸出電壓且輸出一射頻輸出訊號,其中工作於飽和區之該輸出電晶體用以將該射頻輸入信號予以放大,並且工作於線性區之該輸出電晶體為該第二主動電阻。 The variable gain low noise amplifier circuit of claim 2, wherein the low noise amplifier comprises: an output transistor, the gate is connected to the RF input signal and the startup voltage, and the source is connected to the source a grounding voltage, the drain is connected to the first power circuit to receive the first output voltage and output an RF output signal, wherein the output transistor operating in the saturation region is used to amplify the RF input signal and operates in a linear The output transistor of the region is the second active resistor. 如申請專利範圍第4項所述之可變增益低雜訊放大電路,其中該旁路開關電路包括:一開關電晶體,其閘極接收該開關信號並據此決定導通或截止狀態,其源極連接該輸出電晶體之閘極,其汲極連接該第一電源電路以接收該第一輸出電壓,其中該開關電晶體根據該開關信號之電壓準位予以調整該第一主動電阻之電阻值,其中當射頻輸入訊號之功率大於該第一功率門檻值時,則該開關電晶體會根據該開關信號之電壓準位而工作於線性區以形成該第一主動電阻,並且該第一及該第二電源電路分別根據該第一及該第二致能信號而關閉以使該輸出電晶體關閉,進而透過該第一主動電阻以淺度衰減該射頻輸入信號。 The variable gain low noise amplifying circuit of claim 4, wherein the bypass switch circuit comprises: a switching transistor, wherein the gate receives the switching signal and determines an on or off state according to the source thereof a pole connected to the gate of the output transistor, the drain is connected to the first power circuit to receive the first output voltage, wherein the switch transistor adjusts the resistance of the first active resistor according to the voltage level of the switch signal When the power of the RF input signal is greater than the first power threshold, the switch transistor operates in the linear region according to the voltage level of the switch signal to form the first active resistor, and the first and the first The second power circuit is respectively turned off according to the first and the second enable signals to turn off the output transistor, and then the RF input signal is lightly attenuated by the first active resistor. 如申請專利範圍第5項所述之可變增益低雜訊放大電路,其中當該射頻輸入信號之功率大於一第二功率門檻值時,則提高該開關信號之電壓準位來使該開關電晶體工作於線性區已形成該第一主動電阻,藉此提高該啟動電壓來開啟該輸出電晶體並使該輸出電晶體工作於線性區以形成該第二主動電阻,進而透過該第一及該第二主動電阻以深度衰減該射頻輸入信號。 The variable gain low noise amplifier circuit of claim 5, wherein when the power of the RF input signal is greater than a second power threshold, the voltage level of the switch signal is increased to make the switch The first active resistor is formed by the crystal operating in the linear region, thereby increasing the startup voltage to turn on the output transistor and operating the output transistor in the linear region to form the second active resistor, thereby transmitting the first and the second The second active resistor attenuates the RF input signal in depth. 一種接收機,包括:一如申請專利範圍第1項所述之可變增益低雜訊放大電路,用以接收一射頻輸入訊號且輸出一射頻輸出信號;一解調電路,連接該可變增益低雜訊放大電路,該解調電路用以解調該射頻輸出信號並輸出一解調信號;以及一負載,連接該解調電路,該負載接收該解調信號。 A receiver comprising: a variable gain low noise amplifying circuit as claimed in claim 1 for receiving an RF input signal and outputting a RF output signal; and a demodulation circuit connecting the variable gain a low noise amplifying circuit for demodulating the RF output signal and outputting a demodulated signal; and a load connected to the demodulation circuit, the load receiving the demodulated signal. 如申請專利範圍第7項所述之接收機,其中該可變增益低雜訊放大電路更包括一第一電阻,其一端連接該第二電源電路以接收該第二輸出電壓;以及一第二電阻,其一端連接該第一電阻之另一端與該低雜訊放大器,其另一端連接一接地電壓,其中該第一及該第二電阻構成一分壓電路,並且將該第二輸出電壓予以分壓後輸出一啟動電壓至該低雜訊放大器,並且該第二功率門檻值大於該第一功率門檻值,其中該低雜訊放大器包括一輸出電晶體,其閘極連接該射頻輸入信號與該啟動電壓,其源極連接該接地電壓,其汲極連接該第一電源電路以接收該第一輸出電壓且輸出一射頻輸出訊號,其中工作於飽和區之該輸出電晶體用以將該射頻輸入信號予以放大,並且工作於線性區之該輸出電晶體為該第二主動電阻,並且該旁路開關電路包括一開關電晶體,其閘極接收該開關信號並據此決定導通或截止狀態,其源極連接該輸出電晶體之閘極,其汲極連接該第一電源電路以接收該第一輸出電壓,其中該開關電晶體根據該開關信號之電壓準位予以調整該第一主動電阻之電阻值,其中當射頻輸入訊號之功率大於該第一功率門檻值時,則該開關電晶體會根據該開關信號之電壓準位而工作於線性區以形成該第一主動電阻,並且該第一及該第二電源電路分別根據該第一及該第二致能信號而關閉以使該輸出電晶體關閉,進而透過該第一主動電阻以淺度衰減該射頻輸入信號。 The receiver of claim 7, wherein the variable gain low noise amplifying circuit further comprises a first resistor, one end of which is connected to the second power circuit to receive the second output voltage; and a second a resistor, one end of which is connected to the other end of the first resistor and the low noise amplifier, and the other end of which is connected to a ground voltage, wherein the first and the second resistors form a voltage dividing circuit, and the second output voltage is And dividing a voltage to output a starting voltage to the low noise amplifier, and the second power threshold is greater than the first power threshold, wherein the low noise amplifier comprises an output transistor, and the gate is connected to the RF input signal And the starting voltage, the source is connected to the ground voltage, the drain is connected to the first power circuit to receive the first output voltage and output an RF output signal, wherein the output transistor operating in the saturation region is used to The RF input signal is amplified, and the output transistor operating in the linear region is the second active resistor, and the bypass switch circuit includes a switching transistor, and the gate is connected Receiving the switch signal and determining an on or off state according to which the source is connected to the gate of the output transistor, and the drain is connected to the first power circuit to receive the first output voltage, wherein the switch transistor is according to the switch The voltage level of the signal is adjusted to the resistance value of the first active resistor. When the power of the RF input signal is greater than the first power threshold, the switching transistor operates in a linear manner according to the voltage level of the switching signal. Forming the first active resistor, and the first and second power supply circuits are respectively turned off according to the first and second enable signals to turn off the output transistor, and then pass through the first active resistor to be shallow Attenuates the RF input signal. 一種可變增益方法,包括: 偵測一射頻輸入信號;判斷該射頻輸入信號之功率是否大於一第一功率門檻值;如果該射頻輸入信號之功率大於該第一功率門檻值,則繼續判斷該射頻輸入信號之功率是否大於一第二功率門檻值;如果該射頻輸入信號之功率位於該第一及該第二功率門檻值之間,則透過一第一主動電阻以淺度衰減該射頻輸入信號;如果該射頻輸入信號之功率大於該第二功率門檻值,則透過該第一主動電阻與一第二主動電阻以深度衰減該射頻輸入信號,其中該可變增益方法用於如申請專利範圍第1項所述之可變增益低雜訊放大電路或如申請專利範圍第7項所述之接收機。 A variable gain method comprising: Detecting an RF input signal; determining whether the power of the RF input signal is greater than a first power threshold; if the power of the RF input signal is greater than the first power threshold, determining whether the power of the RF input signal is greater than one a second power threshold; if the power of the RF input signal is between the first and second power thresholds, the RF input signal is shallowly attenuated by a first active resistor; if the power of the RF input signal And greater than the second power threshold value, the RF input signal is deeply attenuated by the first active resistor and a second active resistor, wherein the variable gain method is used for the variable gain as described in claim 1 A low noise amplifying circuit or a receiver as described in claim 7 of the patent application. 如申請專利範圍第9項所述之可變增益方法,其中該可變增益低雜訊放大電路更包括一第一電阻,其一端連接該第二電源電路以接收該第二輸出電壓;以及一第二電阻,其一端連接該第一電阻之另一端與該低雜訊放大器,其另一端連接一接地電壓,其中該第一及該第二電阻構成一分壓電路,並且將該第二輸出電壓予以分壓後輸出一啟動電壓至該低雜訊放大器,並且該第二功率門檻值大於該第一功率門檻值,其中該低雜訊放大器包括一輸出電晶體,其閘極連接該射頻輸入信號與該啟動電壓,其源極連接該接地電壓,其汲極連接該第一電源電路以接收該第一輸出電壓且輸出一射頻輸出訊號,其中工作於飽和區之該輸出電晶體用以將該射頻輸入信號予以放大,並且工作於線性區之該輸出電晶體為該第二主動電阻,並且該旁路開關電路包括一開關電晶體,其閘極接收該開關信號並據此決定導通或截止狀態,其源極連接該輸出電晶體之閘極,其汲極連接該第一電源電路以接收該第一輸出電壓,其中該開關電晶體根據該開關信號之電壓準位予以調整該第一主動電阻之電阻值,其 中當射頻輸入訊號之功率大於該第一功率門檻值時,則該開關電晶體會根據該開關信號之電壓準位而工作於線性區以形成該第一主動電阻,並且該第一及該第二電源電路分別根據該第一及該第二致能信號而關閉以使該輸出電晶體關閉,進而透過該第一主動電阻以淺度衰減該射頻輸入信號。 The variable gain method of claim 9, wherein the variable gain low noise amplifying circuit further comprises a first resistor connected to the second power supply circuit at one end to receive the second output voltage; a second resistor, one end of which is connected to the other end of the first resistor and the low noise amplifier, and the other end of which is connected to a ground voltage, wherein the first and the second resistors form a voltage dividing circuit, and the second The output voltage is divided to output a starting voltage to the low noise amplifier, and the second power threshold is greater than the first power threshold, wherein the low noise amplifier comprises an output transistor, and the gate is connected to the RF The input signal and the starting voltage are connected to the ground voltage of the source, and the drain is connected to the first power circuit to receive the first output voltage and output an RF output signal, wherein the output transistor operating in the saturation region is used for Amplifying the radio frequency input signal, and the output transistor operating in the linear region is the second active resistor, and the bypass switch circuit includes a switching transistor, The gate receives the switch signal and determines an on or off state according to which the source is connected to the gate of the output transistor, and the drain is connected to the first power circuit to receive the first output voltage, wherein the switch transistor is The voltage level of the switch signal adjusts the resistance value of the first active resistor, When the power of the RF input signal is greater than the first power threshold, the switch transistor operates in the linear region according to the voltage level of the switch signal to form the first active resistor, and the first and the first The two power supply circuits are respectively turned off according to the first and the second enable signals to turn off the output transistor, and then the RF input signal is lightly attenuated by the first active resistor.
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CN105245191A (en) * 2015-05-22 2016-01-13 络达科技股份有限公司 Power control method of amplifier module
CN105978512A (en) * 2016-05-06 2016-09-28 江苏卓胜微电子有限公司 Low-noise amplifier with multi-configurable bypass mode
CN108306623A (en) * 2017-01-13 2018-07-20 上海韦玏微电子有限公司 Low-noise amplifier
CN115622579A (en) * 2022-11-08 2023-01-17 杭州地芯科技有限公司 Open-loop compensation circuit based on phase inverter operational amplifier, receiver and radio frequency transceiver
US12081175B2 (en) 2022-05-18 2024-09-03 Hangzhou Geo-Chip Technology Co., Ltd. Operational amplifier and electronic system

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105245191A (en) * 2015-05-22 2016-01-13 络达科技股份有限公司 Power control method of amplifier module
TWI572134B (en) * 2015-05-22 2017-02-21 絡達科技股份有限公司 Power control method of amplifier module
US9966910B2 (en) 2015-05-22 2018-05-08 Airoha Technology Corp. Power control method of amplifying module
CN105245191B (en) * 2015-05-22 2019-06-14 络达科技股份有限公司 The Poewr control method of amplification module
CN105978512A (en) * 2016-05-06 2016-09-28 江苏卓胜微电子有限公司 Low-noise amplifier with multi-configurable bypass mode
CN108306623A (en) * 2017-01-13 2018-07-20 上海韦玏微电子有限公司 Low-noise amplifier
US12081175B2 (en) 2022-05-18 2024-09-03 Hangzhou Geo-Chip Technology Co., Ltd. Operational amplifier and electronic system
CN115622579A (en) * 2022-11-08 2023-01-17 杭州地芯科技有限公司 Open-loop compensation circuit based on phase inverter operational amplifier, receiver and radio frequency transceiver
CN115622579B (en) * 2022-11-08 2024-06-11 杭州地芯科技有限公司 Open loop compensation circuit based on inverter operational amplifier, receiver and radio frequency transceiver

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