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TW201040736A - Peripheral device - Google Patents

Peripheral device Download PDF

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Publication number
TW201040736A
TW201040736A TW98115125A TW98115125A TW201040736A TW 201040736 A TW201040736 A TW 201040736A TW 98115125 A TW98115125 A TW 98115125A TW 98115125 A TW98115125 A TW 98115125A TW 201040736 A TW201040736 A TW 201040736A
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Taiwan
Prior art keywords
memory
peripheral device
circuit modules
code
computer system
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TW98115125A
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Chinese (zh)
Inventor
Shu-Hung Wang
Chien-Chang Tseng
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Jmicron Technology Corp
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Priority to TW98115125A priority Critical patent/TW201040736A/en
Publication of TW201040736A publication Critical patent/TW201040736A/en

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Abstract

A peripheral device utilized in a computer system is provided. The peripheral device includes: a bus interface, a plurality of circuit modules and a memory unit. The plurality of circuit modules are coupled to the bus interface, and utilized for respectively executing corresponding functions in accordance with commands from the computer system. The memory unit is coupled to the plurality of circuit modules, and utilized for storing specific initialization codes corresponding to each circuit modules needed in the boot-up.

Description

201040736 六、發明說明: 【發明所屬之技術領域】201040736 VI. Description of the invention: [Technical field to which the invention belongs]

本發明係關於電腦系統中之週邊裝置,尤指一種建構於周邊元 件互連匯流排之周邊裝置’該周邊裝置僅需使用單一記憶單元來储 存對應於該周邊裝置中複數個電路模組之複數個擴展唯讀記憶體 (Expansion ROM)的内容。 【先前技術】 一般來說,電腦系統可能包含有數個基本輸入輸出系統(Basie Input/Output System,BIOS),其中,位於主機板上的BIOS(又稱系統 BIOS)通常包含有用以存取基本硬體元件(如:鍵盤、軟碟機、硬碟 機控制器、儲存裝置等)的程式碼,可於開機程序中,正確地驅動這 〇 些硬體元件’從而於作業系統載入前,提供其對應功能(如:將作業 系統載入至記憶體中)。除此之外,周邊裝置,如SCSI轉接卡、網 路介面卡、曰效卡、顯示卡專,亦有其專屬的程式碼來執行類似於 基本輸出輸入系統的功能’可用來彌補或取代系統Bi〇s的不足之 處,或者是提供開機程式碼來透過該周邊裝置所耦接的儲存媒介來 開機,這些周邊裝置專屬的程式碼一般來說儲存在被稱作為擴展唯 讀記憶體(Expansion ROM)的唯讀記憶體或非揮發性記憶體。 4 201040736 從另一方面來說,當今的常見電腦系統中,普遍使用周邊元件 互連(Peripheral Component Interconnect, PCI)匯流排來連接不同的周 邊裝置,一般來說,這些周邊裝置通常以擴充卡的形式來插入主機 板上的插槽來連接。依據周邊元件互連匯流排之規格書所規範的内 容’每一個PCI ®流排可支援32個裝置,每個裝置至多可以擁有8 個功能。事實上,大多數的PCI擴充卡(ρα周邊裝置),僅具有一個 規格書上所定義之功能,如網路卡僅提供網路存取的功能、音效卡 〇僅提供音效處理的功能,故一般的pci擴充卡往往僅包含有一個擴 展唯讀記憶體,倘若要在單一 PCI擴充卡上實現多種不同的功能, 除了在此PCI擴充卡設置提供不同功能的電路模组,亦必須在此pci 擴充卡上實現多個對應的擴展唯讀記憶體,以於開機程序中初始化 這些不同的電路模組。 因此,在具有多個功能的一 PCI擴充卡(Mu職她請rd)上, 〇實現之多個擴展唯讀記憶體的需求無疑提高了 PCI擴充卡製造上的 成本。 【發明内容】 杨為了降低在單夕功此PQ擴充卡上設置多個擴展唯讀記憶體 斤曰加的製Ια成本’本發明提出一種將多個擴展唯讀記憶體之内容 (矛气馬)儲存於單一δ己憶單元的概念,並透過硬體來進行位址映 射使夕功月b PCI擴充卡上的每一功能所對應之記憶單元的區塊(個 5 201040736 別的擴展記憶體)可分別進行穿透映射(transparent-mapping)至記憶 體位址空間。 因此,依據本發明之一實施例,其係提供一種用於一電腦系統 中之一周邊裝置。該周邊裝置包含有:一匯流排介面;複數個電路 模組,耦接於該匯流排介面’依據該電腦系統之指令來分別執行所 對應的功能;以及一記憶單元,耦接於該複數個電路模組,該記憶 0 單元係由該複數個電路模組所共用,用以儲存該複數個電路模組於 該電腦系統啟動時所需執行的初始化操作所對應之一程式碼。 【實施方式】 多功能PCI擴充卡中的每一個功能(電路模組),都有專屬的256 個暫存器’而其中位於30h^32位元長的暫存器,一般被稱之為擴 展唯讀記憶體基底位址暫存器(Expansi〇n R〇M Base Address 〇 Register·) ’时提供該魏麟狀祕唯讀記讎絲底位址等 相關資訊。 在系統BIOS所提供的開機自我測試(ρ〇·_〇η sdf如,p〇ST) 中’POST程序會檢查每-PCI魏的組態空間(c〇nfi興ti〇n Space) 於3〇h的位址上是否存有上述的擴展唯讀記憶體基底位址暫存器, 若有即代表了该功能有其對應的擴展唯讀記憶體,p〇ST程序會 依據該擴展唯讀記憶縣躲址暫存^所提供㈣訊,將該擴展唯 6 201040736 讀記憶體映射至記憶體位址空間中未使用的部份。當位址映射結束 之後,POST程序會跳至該擴展唯讀記憶體所映射的位址,去執行 該擴展唯讀記憶體所儲存的程式碼。 因此’請參考第1圖,其係本發明依據本發明之—實施例所繪 之多功肖b PCI擴充卡的功能方塊與其位址映射的示意圖擴充 卡100已s有複數個電路模組川〜118、一 pCI介面一記憶單 〇元130、複數個擴展唯讀記憶體基底位址暫存器141〜148以及一映 射處理模組15〇。PCI擴充卡100麵接於一主機細,並且主機2〇〇 包含有中央處理器210與主記憶體220。 PCI ;ι面120主要用以將PCI擴充卡1〇〇耦接於主機2⑻之一 pci匯流排(未式出)。電路模组lu〜118,輕接於ρα介面12〇,依 據主機200所發佈之指令來分別執行所對應的功能,一般來說,電 路模組可能為一輸人輸出控制器(I/〇c〇ntr〇ller)、視訊處理器(vide〇 processor)、網路介面控制器(Netw〇rkImerfacec〇mr〇㈣等,本發明 並未對其加諸限制。記憶單元13〇係耦接於電路模組HI〜118,且 由電路模組111〜118所共用,用以儲存電路模組ηι〜118於主機2〇〇 啟動時所需執行的初始化操作所對應之一程式碼。更詳細的說,於 習之技術中,電路模組111〜118所對應之複數個擴展唯讀記憶體所 儲存之程式碼現已一併儲存於記憶單元丨3〇中。 概略來說’於電源開啟後’中央處理器21〇會執行主機2〇〇中 7 201040736 (未式出),以進行P0ST程序,詳細的p〇ST程序内容應為熟 本發月所屬技藝之人所明瞭,在此不多作贅述。當⑽T程序將 .擴展唯讀記鐘映射至記鐘位址空間的過財,依據—擴展記憶 體基絲存賴賴展唯敎紐的獅(ROM hea㈣所提供的資 訊(,:擴展唯讀記憶體⑽程式碼大小(以M2位元組之資料區塊 為單位))將擴展唯讀記憶體映射,然而,由於本發明在單一記憶單 το U0内儲存有複數個電路模組⑴〜⑴所對應的擴展唯讀記憶體 Ο之程式碼(分別儲存在擴展唯讀記憶體區塊161〜168中)。因此,當 POST程序將擴展唯讀記憶體區塊161映射至子記憶體位址空間211 後’必須要再依序將記鮮元丨3〇巾的擴展唯讀記憶體區塊丨62〜i 68 分別映射至子記憶體位址空間212〜218。 因此必須透過映射處理模組15〇的協助,p〇ST程序才得以將 後續的擴展唯讀記憶體區塊162〜168依序映射至子記憶體位址空間 D 212〜218,並可使映射過程對每一擴展記憶體區而言為可穿透 (transparent)。當所有擴展唯讀記憶體區塊的映射完成後,p〇ST程 序會將擴展唯讀記憶體區塊内的部份未執行的程式碼複製至主記憶 體220中,通常這部份的程式碼稱之為初始化資料(initialization data),以加速擴展唯讀記憶體内之程式碼的執行,從而增加p〇ST 程序的速度。接著,POST程序依序至唯讀記憶體區塊161〜168所 分別映射的記憶體位址來執行其中的程式碼,--初始化電路模組 111〜118,或者提供開機程式碼(端視電路模組111〜118的功能而定)。 8 201040736 然而,為了找到這些已完成位址映射的擴展唯讀記憶體,於 POST程序中,以2K位元組為邊界,掃描實體記憶體位址COOOOh 至EOOOOh的區域中’是否存有AA55h的值’其係為一擴展唯讀記 憶體記號。一般來說,顯示卡的擴展記憶體通常會被存放於 COOOOh〜C7FFFh的位址空間中’網路控制晶片的擴展記憶體將會被 存放至C8000〜DFFFF的位址空間。因此,在每一擴展唯讀記憶體 的標頭中,位址(偏移量)〇h與lh的空間中儲存了 AAh與55h,在 〇 2h的空間中則記載該擴展唯讀記憶體佔用了多少個512位元組的實 體記憶體區塊。依據上述這些資訊,POST程序的後續動作便可完 成電路模組111〜118的初始化了。 簡言之,透過本發明所提出的周邊裝置之架構,可使一多功能 pci擴充卡於於單一記憶單元上儲存多個擴展記憶體的程式碼,並 透過硬體(映射處理模組)來進行位址映射,使多功能PCI擴充卡上 Q 的每一功能所對應之記憶單元的區塊可分別進行穿透映射至記憶體 位址空間。 ' 以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍 •所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 第1圖係本發明周邊裝置之實施例的魏方塊與其位址映射的示意 9 201040736The present invention relates to peripheral devices in a computer system, and more particularly to a peripheral device constructed in a peripheral component interconnection busbar. The peripheral device only needs to use a single memory unit to store a plurality of circuit modules corresponding to the plurality of circuit modules in the peripheral device. Expand the contents of the read-only memory (Expansion ROM). [Prior Art] Generally speaking, a computer system may include a plurality of Basic Input/Output System (BIOS), wherein a BIOS (also called a system BIOS) located on a motherboard usually contains useful to access basic hard The code of the body components (such as keyboard, floppy disk drive, hard disk drive controller, storage device, etc.) can correctly drive these hardware components during the boot process, thus providing the operating system before loading Its corresponding function (such as: loading the operating system into the memory). In addition, peripheral devices, such as SCSI riser cards, network interface cards, efficiency cards, and display cards, also have their own proprietary code to perform functions similar to basic output input systems, which can be used to make up or replace The inadequacies of the system Bi〇s, or the provision of the boot code to boot through the storage medium to which the peripheral device is coupled, the code specific to these peripheral devices is generally stored in an extended read-only memory ( Expansion ROM) Read-only memory or non-volatile memory. 4 201040736 On the other hand, in today's common computer systems, Peripheral Component Interconnect (PCI) busbars are commonly used to connect different peripheral devices. Generally, these peripheral devices are usually expansion cards. Form to plug into the slot on the motherboard to connect. According to the specification of the specifications of the peripheral component interconnection bus, each PCI ® bus can support 32 devices, and each device can have up to 8 functions. In fact, most PCI expansion cards (ρα peripherals) have only one function defined in the specification. For example, the network card only provides the function of network access, and the sound card only provides the function of sound processing. A typical pci expansion card often only contains one extended read-only memory. In order to implement a variety of different functions on a single PCI expansion card, in addition to the circuit modules that provide different functions in this PCI expansion card, it must also be in this pci. A plurality of corresponding extended read-only memories are implemented on the expansion card to initialize the different circuit modules in the boot process. Therefore, on a PCI expansion card with multiple functions (Mu's job rd), the need to implement multiple extended read-only memories has undoubtedly increased the cost of PCI expansion card manufacturing. SUMMARY OF THE INVENTION In order to reduce the cost of setting a plurality of extended read-only memory devices on the PQ expansion card, the present invention proposes a content of a plurality of extended read-only memories. The concept of storing in a single δ-remembered unit, and performing address mapping through hardware to make the block of the memory unit corresponding to each function on the b-power expansion card (5 201040736 other extended memory) ) Transparent-mapping can be performed separately to the memory address space. Thus, in accordance with an embodiment of the present invention, a peripheral device for use in a computer system is provided. The peripheral device includes: a bus interface; a plurality of circuit modules coupled to the bus interface to perform respective functions according to instructions of the computer system; and a memory unit coupled to the plurality of The circuit module, the memory 0 unit is shared by the plurality of circuit modules, and is used to store one of the codes corresponding to the initialization operation required by the plurality of circuit modules when the computer system starts. [Embodiment] Each function (circuit module) in the multi-function PCI expansion card has a dedicated 256 registers, and a register of 30h^32 bits long is generally called an extension. The read-only memory base address register (Expansi〇n R〇M Base Address 〇Register·) 'provides information about the Wei Lin-like secret reading only. In the boot self-test provided by the system BIOS (ρ〇·_〇η sdf, eg p〇ST), the 'POST program will check the configuration space of each-PCI Wei (c〇nfixingti〇n Space) at 3〇 Whether the above-mentioned extended read-only memory base address register exists in the address of h, if any means that the function has its corresponding extended read-only memory, the p〇ST program according to the extended read-only memory The county hides the temporary storage ^ provided (four) news, the extension only 6 201040736 read memory mapped to the unused part of the memory address space. After the address mapping is completed, the POST program jumps to the address mapped by the extended read-only memory to execute the code stored in the extended read-only memory. Therefore, please refer to FIG. 1 , which is a schematic diagram of a functional block of the multi-function b PCI expansion card and its address mapping according to the embodiment of the present invention. The expansion card 100 has a plurality of circuit modules. ~118, a pCI interface, a memory unit 130, a plurality of extended read-only memory base address registers 141 to 148, and a mapping processing module 15A. The PCI expansion card 100 is connected to a host computer, and the host computer 2 includes a central processing unit 210 and a main memory 220. PCI; ι 120 is mainly used to couple the PCI expansion card 1 p to one of the host 2 (8) pci bus (not shown). The circuit modules lu~118 are lightly connected to the ρα interface 12〇, and respectively perform corresponding functions according to instructions issued by the host 200. Generally, the circuit module may be an input output controller (I/〇c 〇ntr〇ller), video processor (vide〇processor), network interface controller (Netw〇rkImerfacec〇mr〇 (4), etc., the invention is not limited thereto. The memory unit 13 is coupled to the circuit mode The groups HI~118 are shared by the circuit modules 111-118 for storing one of the codes corresponding to the initialization operations required by the circuit modules η1 to 118 to be executed when the host 2 is started. More specifically, In the technique of Xi, the code stored in the plurality of extended read-only memories corresponding to the circuit modules 111-118 is now stored in the memory unit 。3〇. Generally speaking, 'after the power is turned on' The processor 21〇 executes the host 2〇〇中7 201040736 (not shown) to perform the P0ST program, and the detailed p〇ST program content should be known to those skilled in the art of this month, and will not be described here. When the (10)T program maps the extended read-only memory to the clock The wealth of the address space, based on the information provided by the ROM Hea (4), which expands the memory of the memory base. (:: Extended read-only memory (10) code size (in M2 bytes) The block is a unit))) The read-only memory map is expanded. However, since the present invention stores the code of the extended read-only memory corresponding to the plurality of circuit modules (1) to (1) in a single memory unit τ U0 (respectively Stored in the extended read-only memory blocks 161 to 168. Therefore, when the POST program maps the extended read-only memory block 161 to the sub-memory address space 211, it is necessary to sequentially record the fresh elements 丨3 The extended read-only memory blocks 丨62~i 68 of the wipes are mapped to the sub-memory address spaces 212-218, respectively. Therefore, the help of the mapping processing module 15〇, the p〇ST program can be followed by the extended extension only. The read memory blocks 162-168 are sequentially mapped to the sub-memory address space D 212-218, and the mapping process can be transparent to each extended memory area. When all extended read-only memories After the mapping of the body block is completed, the p〇ST program Copying some unexecuted code in the extended read-only memory block to the main memory 220, usually the part of the code is called initialization data to speed up the expansion of the read-only memory. The execution of the code increases the speed of the p〇ST program. Then, the POST program sequentially executes the code to the memory address mapped by the read-only memory blocks 161 to 168, respectively, and initializes the circuit mode. Groups 111 to 118, or provide boot code (depending on the function of the circuit modules 111 to 118). 8 201040736 However, in order to find the extended read-only memory of these completed address mappings, in the POST program, the 2K byte is used as the boundary to scan whether the value of AA55h exists in the area of the physical memory address COOOOh to EOOOOh. 'It is an extended read-only memory mark. Generally, the expansion memory of the display card is usually stored in the address space of COOOOh~C7FFFh. The extended memory of the network control chip will be stored in the address space of C8000~DFFFF. Therefore, in the header of each extended read-only memory, AAh and 55h are stored in the space of the address (offset) 〇h and lh, and the extended read-only memory is recorded in the space of 〇2h. How many 512-bit physical memory blocks are there. Based on the above information, the subsequent actions of the POST program can complete the initialization of the circuit blocks 111-118. In short, through the architecture of the peripheral device proposed by the present invention, a multi-function PCI expansion card can be stored on a single memory unit to store a plurality of extended memory codes, and is transmitted through a hardware (mapping processing module). The address mapping is performed so that the blocks of the memory unit corresponding to each function of Q on the multi-function PCI expansion card can be separately mapped to the memory address space. The above description is only the preferred embodiment of the present invention, and all changes and modifications made to the scope of the present invention are intended to be within the scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a Wei block and its address mapping of an embodiment of a peripheral device of the present invention. 9 201040736

【主要元件符號說明】 • 100 111 〜118 120 130 Ο 141〜148 150 161〜168 200 210 211-218 220 〇 pci擴充卡 電路模組 PCI介面 記憶單元 擴展唯讀記憶體基底暫存器 映射處理模組 擴展唯讀記憶體區塊 主機 中央處理器 子記憶體位址空間 主記憶體[Main component symbol description] • 100 111 ~118 120 130 Ο 141~148 150 161~168 200 210 211-218 220 〇pci expansion card circuit module PCI interface memory unit expansion read-only memory base register mapping processing mode Group extended read-only memory block host central processor sub-memory address space main memory

Claims (1)

201040736 七、申請專利範圍: .1. -種用於-電腦系統中之一周邊裝置,包含有: 一匯流排介面; 曹 複數個電路模紅,耦接於該匯流排介面,依據該電腦系統之指 令來分別執行所對應的功能;以及 一s己憶單元’耦接於該複數個電路模組,該記憶單元係由該複 〇 數個電路模組所共用’用以儲存該複數個電路模組於該電腦 系統啟動時所需執行的初始化操作所對應之一程式碼。 2·如申請專利範圍第1項所述之周邊裝置,其中該程式碼包含有分 別對應該複數個電路模組之複數個程式碼區段,以及每一程式 碼區&係用於該電腦系統啟動時,初始化一相對應電路模組以 及對該相對應電路模組進行相關的設定。 〇 3.如中請專利翻第㈣所述之周邊裝置,其+麵流排介面係為 (Peripheral Component Interconnect, PCI) 〇 Λ 4. 如申請專利侧第i項所述之周邊裝置,其中該記憶單元係為一 非揮發性記憶體。 5. 如申請專利細第4項所述之周邊裝置,其中該非揮發性記憶體 11 201040736 係為該週邊裝置之一擴展唯讀記憶體(Expansion ROM)。 八、圖式:201040736 VII. Patent application scope: .1. - A peripheral device used in a computer system, comprising: a bus interface; Cao complex circuit red, coupled to the bus interface, according to the computer system The instructions are respectively configured to perform the corresponding functions; and a suffix unit is coupled to the plurality of circuit modules, the memory unit being shared by the plurality of circuit modules for storing the plurality of circuits The module corresponds to a code corresponding to the initialization operation required to be executed when the computer system is started. 2. The peripheral device of claim 1, wherein the code comprises a plurality of code segments respectively corresponding to the plurality of circuit modules, and each code region & is used for the computer When the system is started, a corresponding circuit module is initialized and related settings are made to the corresponding circuit module. 〇3. For the peripheral device described in (4), the + surface flow interface is a Peripheral Component Interconnect (PCI). 4. The peripheral device according to item i of the patent application side, wherein The memory unit is a non-volatile memory. 5. The peripheral device of claim 4, wherein the non-volatile memory 11 201040736 is an extended read-only memory (Expansion ROM) of the peripheral device. Eight, the pattern: 1212
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