201035714 六、發明說明： 【發明所屬之技術領域】 本發明係有關線性穩壓器以及相關之積體電路。 【先前技術】 Ο ❹ 由於各種電子系統所需的供應電壓不盡相同，供應電壓的轉換一 直是十分重要的研究課題。電壓轉換的方式可大致分為兩種·一種為 切換式（switch-mode)穩壓器，另一種則為線性穩壓器（Unear regulator)。-般而言’線性穩壓器的優點是其輸出電壓對輸入電壓或 負。載的變化反雜迅速、輸出猶波與雜錄低、電路架構較簡 早’積較小、價格較為低廉’衫要的缺點在於轉換效率較低，且 只能作降壓的轉換。近年來·降線性穩壓器〇〇wdr〇p_〇utii讎 ΓΓΓ" ’LD0)更因為其轉換效率的提昇，加上其小體積、低雜訊 ^寺^成為小神降壓與穩壓電路社流4各式由電池供應電源 攜式糸統以及通訊相關的電子產品上，均被大量地使用。 v第習知的線性觀器。輸入電麗為輸出《為 出II v EF一般是由積體電路中所自行產生，為一紐。輪 出電壓V0UT，透過分壓電路中 々疋徂徇 誤差放大H 26依據_電壓v i^與32 ’赶_碰〜。 率晶體28 參考龍％的差異，來控制功 體8在正常狀態時，輸出電壓y定值，且符合以下 4 201035714 關係： V〇UT*R32/( R32+ R3〇) = Vref ........⑴ 其中’尺32與R3〇分別為電阻32與30的電阻值。 ， 虛線施與20b為兩種可能的積體電路，其中，積體電路20a並 沒有包含電阻32與30，但是積體電路2〇b有。在第1圖中，積體電 路2〇a有五個接腳：輸入電壓接腳IN、緩啟動(soft start)接腳SS、輸 〇 出電壓接腳0UT、回饋(feedback)接腳FB、以及接地接腳GND ;積體 電路20b則少了回饋(feedback)接腳FB，只有四個接腳。 積體電路20績系統設計者比較方便。積體電路2〇a可以讓系統 ««又计者以選擇外在電阻32與3〇的方式，決定自己想要的輸出電壓 out積體電路2〇b因為電阻32與3〇以經固定在積體電路内了，所 以輸出電壓ν〇υτ並無法改變。 〇 30的成本 一但尺積體電路20a對晶片製造者與系統設計者而言，成本比較 阳積體電路施比積體電路挪乡了一個需要大面積的回饋接聊 相較於使用積體電路20b ’使用積體電路20a將多需要電阻32與 【發明内容】 本發明之一實施例提供一種線性穩壓器積體電路，包含有—輸入 5 201035714 腳、—輸出賴接腳、—功率晶體、—誤差放大器、以及-電 入電壓接腳用以接收-輪入電壓。該輸出電壓接卿 壓接^之卩1 解連接於該輪出賴接腳與該輸入電 $功率日二。心差放大器味—回饋電壓與—參考電壓，用以控制 遠力率4。該龍奴接腳可連接至—外 電壓。該_電壓對應該輸出輕。 又祕考 外接：==:ΓΓΓ包含有一積體電路以及- 用以接誤差_、以及，設定接腳。該輸人電壓接腳 =二=壓。該輸出電壓接腳用以輸出-輸出賴。該功率 ==ΓΓ接腳與該輸入電壓接腳之間。該誤差放大器比 該電壓設咖，===Γ棒樓餘連接至 接腳 本==繼穩壓積體電路，包含有一輸入電壓 及-多功能接腳、一功率晶體、一誤差放大器、一分壓電路以 接腳用以輪出,。雜出電壓 入電壓接腳之間。該誤差放大器比較體===接腳與該輸 之間該輸出電壓接腳與該誤差放大器 依據該輸出電壓’產生該回饋電壓。該多功能接腳，可用以設 201035714 定該參考電麗以及一緩啟動時間。 【實施方式】 =本發明之上述和其他目的、特徵、和優點_顯易 寺牛出較佳實施例，並配合所附圖式，作詳細說明如下。 ❹ 件符糊^的方便，具有賴的或是類似的功能將會以相同的元 2虎表不。_，刪謝相_版元崎示2 …、相同。本發明之顧應以依射料概絲決定。 、 第2圖為依據本發明實施的一線性穩壓器，包含有一積體電路 6〇、-輸入舰電容22、—輸域波電容34、一電阻％以及一電容 94。輸入遽波電容22連接在積體電路6〇之輸入電難腳取，接收: 入電屢Vjn。輸出濾波電容34連接在積體電路6〇之輸出電壓 ❹〇UT，維持輸出電壓I。内建的分壓電路由電阻32與30所構成， 連接於輸出電壓接腳〇υτ與誤差放大器％之正端間，依據輸出賴 -V贿而產生回饋電壓VFB。誤差放大器26的負端連接至多功能接腳 ~ SS/SET，其賴麵為參考賴v顧。誤差放大^ %依據回饋電壓 與參考電壓Vrefi的差異，來控制功率晶體28。等倍放大器从等 放上7視為冑壓源’其電壓值為參考電壓VreF。。電阻62連接於誤 差放大器26的負端與等倍放大器64之間。 多功能接腳SS/SET可以有兩個功能：設定參考電壓Vrefi與一緩 7 201035714 啟動__)時間。在此說明書中，緩啟動時間表示參考電壓由〇上 昇至-預設值所需要的時間。兩種舰可以各自獨立存在或是一起出 現。 在第2圖的實施例中，積體電路6〇透過多功能接腳s憲τ外接 •有電阻％與電容94。透過推導可得知，在穩態時，電阻％與電阻泣 構成一分壓電路，而參考電壓Vref〗將會符合以下公式：201035714 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a linear regulator and related integrated circuits. [Prior Art] Ο ❹ Since the supply voltages required for various electronic systems are not the same, the conversion of supply voltage has always been an important research topic. The voltage conversion method can be roughly divided into two types: one is a switch-mode regulator, and the other is a linear regulator (Unear regulator). The general advantage of a linear regulator is that its output voltage is negative to the input voltage. The load changes quickly, the output is slow and the recording is low, and the circuit structure is simple. The smaller the product is, the lower the price is. The shortcoming of the shirt is that the conversion efficiency is low, and only the buck conversion can be performed. In recent years, the linear regulator 〇〇wdr〇p_〇utii雠ΓΓΓ" 'LD0) is more because of its conversion efficiency, plus its small size, low noise ^ Temple ^ become a small god buck and regulator Circuits are widely used in a variety of ways, from battery-powered portable systems to communication-related electronic products. v The conventional linear viewer. Input electric output is the output "For II v EF is generally generated by the integrated circuit itself, for one. The turn-on voltage VOUT is transmitted through the voltage divider circuit. 误差 Error amplification H 26 is based on _voltage v i^ and 32 。 _ _ touch ~. Rate crystal 28 refers to the difference of dragon % to control the output voltage y of the power body 8 in the normal state, and meets the following 4 201035714 relationship: V〇UT*R32/( R32+ R3〇) = Vref ..... (1) where 'foot 32 and R3 〇 are the resistance values of resistors 32 and 30, respectively. The dotted line and 20b are two possible integrated circuits, wherein the integrated circuit 20a does not include the resistors 32 and 30, but the integrated circuit 2〇b has. In the first figure, the integrated circuit 2A has five pins: an input voltage pin IN, a soft start pin SS, a power output pin 0UT, a feedback pin FB, And the ground pin GND; the integrated circuit 20b has less feedback pin FB, only four pins. The integrated circuit 20 performance system designer is more convenient. The integrated circuit 2〇a allows the system «« to determine the desired output voltage out of the integrated circuit 2〇b by selecting the external resistors 32 and 3〇 because the resistors 32 and 3〇 are fixed at The integrated circuit is inside, so the output voltage ν 〇υ τ cannot be changed. The cost of the 〇30 is the same as that of the chip maker and the system designer, and the cost comparison of the anode integrated circuit is higher than that of the integrated circuit that requires a large area of feedback. The circuit 20b' uses the integrated circuit 20a to require the resistor 32 and the like. SUMMARY OF THE INVENTION One embodiment of the present invention provides a linear regulator integrated circuit including - input 5 201035714 pin, - output pull pin, - power The crystal, the error amplifier, and the -input voltage pin are used to receive - wheel-in voltage. The output voltage is connected to the crimping pin 1 to be connected to the wheel of the pin and the input power is $2. The heartbeat amplifier-feedback voltage and the reference voltage are used to control the far-reaching rate of 4. The dragon slave pin can be connected to the external voltage. The _ voltage should be lighter in output. Also secret test External: ==: ΓΓΓ contains an integrated circuit and - used to connect the error _, and, set the pin. The input voltage pin = two = pressure. The output voltage pin is used for output-output. This power == between the pin and the input voltage pin. The error amplifier is connected to the voltage, and the === Γ 楼 楼 connected to the script == relaying integrated circuit, including an input voltage and - multi-function pin, a power crystal, an error amplifier, one point The voltage circuit is used to turn out with a pin. The mixed voltage is between the voltage pins. The error amplifier comparator === the output voltage pin between the pin and the input and the error amplifier generates the feedback voltage according to the output voltage. The multi-function pin can be used to set the reference voltage and a slow start time for 201035714. [Embodiment] The above and other objects, features, and advantages of the present invention will be described in detail with reference to the accompanying drawings. ❹ 符 符 ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ _, delete the phase _ version Yuanqi shows 2 ..., the same. The consideration of the present invention should be determined by the ray of the projecting material. 2 is a linear regulator according to the present invention, comprising an integrated circuit 6〇, an input ship capacitor 22, a domain wave capacitor 34, a resistor %, and a capacitor 94. The input chopper capacitor 22 is connected to the input circuit of the integrated circuit 6〇, and receives: the input power is repeatedly Vjn. The output filter capacitor 34 is connected to the output voltage ❹〇UT of the integrated circuit 6〇 to maintain the output voltage I. The built-in partial piezoelectric routing resistors 32 and 30 are connected between the output voltage pin τ and the positive terminal of the error amplifier %, and generate a feedback voltage VFB according to the output. The negative terminal of the error amplifier 26 is connected to the multi-function pin ~ SS/SET, and its surface is the reference. The error amplification %% controls the power crystal 28 based on the difference between the feedback voltage and the reference voltage Vrefi. The equal-magnification amplifier is regarded as the source of voltage from the equal-pad 7 and its voltage value is the reference voltage VreF. . The resistor 62 is connected between the negative terminal of the error amplifier 26 and the equal-amplifier 64. The multi-function pin SS/SET can have two functions: setting the reference voltage Vrefi and a slow 7 201035714 start __) time. In this specification, the slow start time indicates the time required for the reference voltage to rise from 〇 to the preset value. Both ships can exist independently or together. In the embodiment of Fig. 2, the integrated circuit 6 is externally connected through the multi-function pin s θ. There is a resistor % and a capacitor 94. It can be known from the derivation that at steady state, the resistance % and the resistance weep form a voltage dividing circuit, and the reference voltage Vref will conform to the following formula:
Vrefi= Vrefo* R961 (R62 + R96) ........(2) O 其中，〜與R%分別為電阻62與96的電阻值。 輸出電壓V0UT與參考電壓vREF1的關係如下： V〇ut*R32/( R32+ R30) = VREF1 ........⑶ 因此，由公式(2)與⑶可知，第2圖之線性穩壓器中，外接之電阻％ 可以用來設定參考· Vrefi，姆地設定了触電壓v贿。 電容94可以設定緩啟動時間。第2圖中，多功能接腳％猶所 〇看到的等效電阻值為(〜*、)/(R62 + R96)，等效電容值為為電容 94的電容值）。當剛啟動時，電容94的跨壓為〇，即為〇。啟動 •後’參考電MV_慢慢的上升，也使得輸㈣壓v。^慢的上升， •避免突然的輸出大電流或大電壓對其他元件所造成_lv_要上 升到公式(2)的穩態值所需要的緩啟動時間，由多功能接腳沾膽所 看到的電阻電容時間常數所喊。因此，—旦輸出電壓v咖設定了， 選擇電容94便可以設定緩啟動時間。 接上電谷94的另-個好處是可以使參考電壓乂腿穩定。假定因 8 201035714 為某種原因，高頻雜訊出現在等倍放大器64的輸出端。此時’電容 科便可濾、除高頻雜訊對參考電壓V咖的大部份影響，使參考電壓 v删大致維持在公式⑵的值，相對的維持了輸出電壓的穩定。 比較第2圖中的積體電賴與第1圖中之積體電路施斑施可 發現’積體電路60擁有許多積體電路2〇a與2%的综合優點。壁如說， 積體電路60的輸出電壓％是可調的，只需要—個外接電阻％來設 ο 定’對線性穩壓器系統設計者而言是相對方便的。麵電路6〇只有四 個接腳，晶片面積可能可以比較小。連接到多功能接腳瞧τ的電 與電容94可以用來設定輸出電壓> 與緩啟動時間，功能不因 接腳數目的減少而變少。Vrefi= Vrefo* R961 (R62 + R96) ........(2) O where ~ and R% are the resistance values of the resistors 62 and 96, respectively. The relationship between the output voltage V0UT and the reference voltage vREF1 is as follows: V〇ut*R32/( R32+ R30) = VREF1 ........(3) Therefore, the equations (2) and (3) show that the linear regulator of Figure 2 In the device, the external resistance % can be used to set the reference · Vrefi, the ground set the voltage voltage bri. Capacitor 94 can set a slow start time. In Figure 2, the equivalent resistance value seen by the multi-function pin is (~*,)/(R62 + R96), and the equivalent capacitance value is the capacitance value of the capacitor 94). When it is just started, the voltage across the capacitor 94 is 〇, which is 〇. Start-up • After the reference MV_ slowly rises, it also causes the input (four) to press v. ^ Slow rise, • Avoid sudden output of large current or large voltage caused by other components. _lv_ The slow start time required to rise to the steady state value of equation (2), as seen by the multi-function pin The time constant of the resistor and capacitor is called. Therefore, once the output voltage v is set, the capacitor 94 can be selected to set the slow start time. Another benefit of connecting the electric valley 94 is that the reference voltage can be stabilized. Assume that 8 201035714 for some reason, high frequency noise appears at the output of the equal-amplifier 64. At this time, the capacitance can filter and remove most of the influence of the high-frequency noise on the reference voltage V, so that the reference voltage v is substantially maintained at the value of the formula (2), and the output voltage is relatively stable. Comparing the integrated circuit in Fig. 2 with the integrated circuit in Fig. 1, it can be found that the integrated circuit 60 has a comprehensive advantage of a large number of integrated circuits 2〇a and 2%. For example, the output voltage % of the integrated circuit 60 is adjustable, and only an external resistor % is required to be set to be relatively convenient for the linear regulator system designer. The surface circuit 6〇 has only four pins, and the chip area may be relatively small. The power and capacitance 94 connected to the multi-function pin 瞧τ can be used to set the output voltage > and the slow-start time, and the function is not reduced by the reduction in the number of pins.
Q 第3圖為依據本發明實施的另—線性穩壓器。第3圖鱼第2圖之 相=或是相_元件將__符絲示。此業界具有—般知識者可 ==_之說明’ 了解第3圖中相同或是相類似元件之功能與操 -疋’第2圖與第3圖中相同的符號不代表需要使用相同裝置， 而可能是使用等同的裝置來實現。 腳ssH積體電路8G中，誤差放大器26_連接至多功能接 、上賴麵為參考賴V_。誤差放大H26依據回饋 fVFB與參考電壓的差異，來控制功率晶㈣。電流源82、 )1 6以及雙接面電晶體(BJT)87串接於在電源Vcc與接地接腳 GND之間。電阻84 ’當做—緩衝電阻(buffered resistor·)，連接於誤差 放大器26的負端與電流源82之間。 9 201035714 類似的，積體電路80之多功能接腳SS/SET可以有兩個功能：設 疋參考電壓Vreh與一緩啟動(s〇ft start)時間，分別由電阻96與電容 來大致設定。 透過推導可得知，在穩態時，第3圖之參考電壓VREFdf會符合 以下公式：Q Figure 3 is a further linear regulator in accordance with the practice of the present invention. Figure 3 Figure 2 of the fish phase = or phase _ components will be __. This industry has a general knowledge of ==_ description 'understand the same or similar components in Figure 3 function and operation - 疋 'the same symbol in Figure 2 and Figure 3 does not mean the use of the same device, It may be implemented using an equivalent device. In the pin ssH integrated circuit 8G, the error amplifier 26_ is connected to the multi-function connection, and the upper surface is referred to as the reference V_. The error amplification H26 controls the power crystal (4) according to the difference between the feedback fVFB and the reference voltage. The current source 82, ) 16 and the double junction transistor (BJT) 87 are connected in series between the power supply Vcc and the ground pin GND. The resistor 84' acts as a buffered resistor and is connected between the negative terminal of the error amplifier 26 and the current source 82. 9 201035714 Similarly, the multi-function pin SS/SET of the integrated circuit 80 can have two functions: setting the reference voltage Vreh and a slow start (s〇ft start) time, which are roughly set by the resistor 96 and the capacitor, respectively. It can be seen from the derivation that at steady state, the reference voltage VREFdf of Figure 3 will meet the following formula:
VreF2= (½ -工96) * Κ·86 + VeB —工82* Κ·86 + Veb - I96 * R86 ........(4) 其中，I82為電流源82的電流值，I%為流經電阻96的電流值，r86為 電阻86的電阻值，vEB為雙接面電晶體86的射極(emitter)至基極(base) 的跨壓。假疋多功能接腳SS/SET沒有接上電阻96與電容94時，其 上之參考電壓為VREF3(=I82*R86 + VEB)，且電阻84的電阻值可忽略， 則公式(4)變成：VreF2= (1⁄2 - work 96) * Κ·86 + VeB — work 82* Κ·86 + Veb - I96 * R86 ........(4) where I82 is the current value of current source 82, I % is the current value flowing through the resistor 96, r86 is the resistance value of the resistor 86, and vEB is the voltage across the emitter to the base of the double junction transistor 86. If the multi-function pin SS/SET is not connected to the resistor 96 and the capacitor 94, the reference voltage on it is VREF3 (=I82*R86 + VEB), and the resistance value of the resistor 84 is negligible, then the formula (4) becomes :
Vref2= VreF3 - I96 * Rs6 =VREF3 * (R96 / (R86 + R96)) ........(5) 因此，外接之電阻96可以用來設定參考電壓Vref2，相對地設定了輸 出電壓V〇UT。 電谷94可以設定緩啟動時間。第3圖中’多功能接腳SS/SET所 看到的等效電阻值為(r%*R86)/(R86 + R96)，等效電容值為c94(為電容 94的電容值）。Vref2要從剛啟動時的〇電壓，上升到公式⑶的穩態值 所需要的緩啟動時間，由多功能接腳SS/SET所看到的電阻電容時間 吊數所決疋。因此，一旦輸出電壓V〇ut設定了，電容94便可以設定 201035714 緩啟動時間。 在第3圖中，接上電容94的另一個好處是可 考電壓VREF2的影響，使參考電壓v 、巧頻雜訊對參 ^的穩定。 _穩《’麵的轉了輪出電壓 ❹ ❹ 弟3圖的積體電路80具有跟第2圖的積體電路 办說，輸出龍VGUT是可調的，只 =優點。 積雜電路如只有四個接聊；連制多功能接腳纽定； 電容94可以用來設定輸出電壓v贿與緩啟動時間。'-且96與 雖然本發明已峨佳實施_露如上，離麟㈣限定本發 2任何在本發明蘭技術娥具有通f知識者，在獨離本發明之 =和範_ ’當可作些許之㈣與潤飾，因此本發明之倾範圍當 視後附之申料職騎界定者為準。 【圖式簡單說明】 第1圖為一習知的線性穩壓器。 第2圖與第3圖為依據本發明實施的二線性穩壓器。 【主要元件符號說明】 輸入電壓Vref2= VreF3 - I96 * Rs6 =VREF3 * (R96 / (R86 + R96)) ........(5) Therefore, the external resistor 96 can be used to set the reference voltage Vref2 and set the output voltage relatively. V〇UT. The electric valley 94 can set a slow start time. In Figure 3, the equivalent resistance value seen by the multi-function pin SS/SET is (r%*R86)/(R86 + R96), and the equivalent capacitance value is c94 (which is the capacitance value of the capacitor 94). The slow start time required for Vref2 to rise from the 〇 voltage at the start-up to the steady-state value of equation (3) is determined by the number of cascading resistors seen by the multi-function pin SS/SET. Therefore, once the output voltage V〇ut is set, the capacitor 94 can set the 201035714 slow start time. In Fig. 3, another benefit of connecting capacitor 94 is the effect of voltage VREF2, which stabilizes the reference voltage v and the frequency noise. _ stable "the surface of the turn-off voltage ❹ ❹ brother 3 picture of the integrated circuit 80 has the integrated circuit with Figure 2, the output dragon VGUT is adjustable, If there are only four connections in the circuit, the multi-function pin is connected; the capacitor 94 can be used to set the output voltage v bribe and slow start time. '- and 96 and although the present invention has been implemented well _ as above, from Lin (four) to limit the hair 2 any of the knowledge of the invention in the invention, the knowledge of the invention and the _ _ can be made a little (4) and retouching, therefore, the scope of the invention is subject to the definition of the application of the vehicle. [Simple Description of the Drawing] Fig. 1 is a conventional linear regulator. 2 and 3 show a bilinear regulator in accordance with an embodiment of the present invention. [Main component symbol description] Input voltage
^IN 201035714 V〇UT 輸出電壓 30、32、62、84、86、96 電阻 Vfb 回饋電壓 26 誤差放大器 Vref ' Vref〇 ' VREF1 ' VREF2 參考電壓 ^ 28 功率晶體 20a、20b、60、80 積體電路 22 輸入濾波電容 o 34 輸出濾波電容 94 電容 IN 輸入電壓接腳 OUT 輸出電壓接腳 SS/SET 多功能接腳 64 等倍放大器 82 電流源 O 87 雙接面電晶體(BJT) V〇c 電源 GND 接地接腳 12^IN 201035714 V〇UT Output voltage 30, 32, 62, 84, 86, 96 Resistor Vfb Feedback voltage 26 Error amplifier Vref ' Vref〇' VREF1 ' VREF2 Reference voltage ^ 28 Power crystal 20a, 20b, 60, 80 Integrated circuit 22 Input filter capacitor o 34 Output filter capacitor 94 Capacitor IN Input voltage pin OUT Output voltage pin SS/SET Multi-function pin 64 Equal-amplifier 82 Current source O 87 Double junction transistor (BJT) V〇c Power supply GND Ground pin 12