200941433 Λυ /υ /υ 26418twf.doc/n 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種顯示裝置及其顯示面板的驅動 方法’且特別是有關於一種感應靈敏度較均勻的顯示裝置 及其顯示面板的驅動方法。 【先前技術】 在各類輸入面板產品中，一般外加感測膜的輸入面板 除了會增加額外的成本，也會降低大約20%的穿透度。而 散入式輸入面板係利用非晶石夕（Amorphous-Si)的特性來 設計能夠感測觸碰的感應電路，並將感應電路整合到液晶 顯示器的薄膜電晶體陣列製程中。相較之下，嵌入式輸入 面板具有低成本與較佳的光學特性，因此逐漸取代外加感 測膜的輸入面板。 圖1A纷示為具有嵌入式輸入面板之習知顯示褒置的 電路架構圖。習知顯示裝置·包括—後人式顯示面板 110、一閘極驅動器120以及一訊號處理電路13〇，且嵌入 式顯示面板no包括耗接至閘極線GLu〜GLin與訊號讀取 線RL„〜RL1M的多數個感應電路，譬如感應電路 111〜113，且每一個感應電路都會耦接至一條閘極線盥一 條訊號讀取線。 〃 圖1B緣示為習知顯示裝置1〇〇的驅動波形時序圖， 其中VR為-感應訊號讀取線上的感應訊號，sg 為閘極驅動器120所產生的閘極訊號。請同時參^圖= 5 26418twf.doc/n 200941433 iTwU / I yj 與圖IB，閘極驅動器120會在一晝面週期内依序輸出閘極 脈衝PUn〜PU1N。嵌入式顯示面板no中的感應電路則依 據閘極脈衝PUu〜PU1N而依序被啟動，以感測欲入式顯示 面板110的觸控點而產生相應的感應訊號。譬如，嵌入式 顯示面板110在正常情況下被觸壓時，則感應訊號VR會 呈現如標號141與142所示的波形。另一方面，訊號處理 電路130將依據感應訊號來判別嵌入式顯示面板的觸 ❹ 控點是否已被觸壓。 值得注意的是，在兩相鄰晝面週期之間，嵌入式顯示 面板110會有一短暫時間無法接收到任何閘極脈衝，此短 暫時間即為空白期間(blanking time )TB。在空白期間TB 内’由於閘極訊號SGU〜SG1N皆呈現低電位，因此感應訊 號VR的準位會下降’並在下一個晝面開始時，逐漸拉升 至正常準位。然而，在感應訊號VR拉升至正常準位的期 間内，若嵌入式顯示面板11〇又被觸壓，則感應訊號VR 會呈現如標號143及144所示的波形。此時，訊號處理電 路130將無法正確地判別出感應訊號VR的準位，進而降 低喪入式顯示面板110之最上方部分的辨識度。 為了解決上述問題’圖1C與圖1D分別繪示為習知顯 示裳置100的另一驅動波形時序圖。在圖1C中，此驅動 方法是將閘極脈衝PU1N橫跨兩相鄰晝面週期之間的空白 期間τΒ。藉此’感應訊號VR在空白期間Tb内將可依舊 維持在正常準位。然而’此驅動方法雖可改善輸入面板之 靈敏度不均勻的情況，但隨著閘極脈衝Ρϋ1Ν之寬度的變 26418twf.doc/n 200941433 Λ &V f V/ > 大，習知顯不裝置100的電路架構也將更為複雜。 另一方面’在圖1C中，此驅動方法是在嵌入式顯示 面板110中多配置一條閘極線來傳送閘極訊號SGi(n+i)。藉 此，嵌入式顯不面板Π0會在空白期間TB内，接收到閘極200941433 Λυ /υ /υ 26418twf.doc/n IX. Description of the Invention: [Technical Field] The present invention relates to a display device and a driving method thereof for a display panel, and in particular to a sensor having a relatively uniform sensitivity A display device and a driving method thereof. [Prior Art] In various input panel products, the input panel of the external sensing film generally reduces the penetration by about 20% in addition to the additional cost. The diffused input panel utilizes the characteristics of Amorphous-Si to design a sensing circuit capable of sensing touch and integrate the sensing circuit into the thin film transistor array process of the liquid crystal display. In contrast, embedded input panels have low cost and better optical characteristics, and thus gradually replace the input panel with an additional sensing film. Figure 1A is a circuit diagram of a conventional display device with an embedded input panel. The conventional display device includes a rear display panel 110, a gate driver 120, and a signal processing circuit 13A, and the embedded display panel no includes the drain wires GLu GL GLin and the signal reading line RL. ~ RL1M's plurality of sensing circuits, such as sensing circuits 111 to 113, and each sensing circuit is coupled to a gate line and a signal reading line. 〃 Figure 1B shows the driving of the conventional display device 1〇〇 Waveform timing diagram, where VR is the inductive signal on the sense signal read line, and sg is the gate signal generated by the gate driver 120. Please also refer to Fig. = 5 26418twf.doc/n 200941433 iTwU / I yj and Figure IB The gate driver 120 sequentially outputs the gate pulses PUn~PU1N in a meander period. The sensing circuit in the embedded display panel no is sequentially activated according to the gate pulses PUu~PU1N to sense the desired The touch point of the display panel 110 generates a corresponding sensing signal. For example, when the embedded display panel 110 is normally pressed, the sensing signal VR will exhibit waveforms as indicated by reference numerals 141 and 142. Signal processing The circuit 130 will determine whether the touch control point of the embedded display panel has been touched according to the sensing signal. It is worth noting that the embedded display panel 110 may not be received for a short time between two adjacent face periods. For any gate pulse, this short time is the blanking time TB. During the blank period TB, 'because the gate signals SGU~SG1N are low, the level of the sensing signal VR will drop' and the next one will be At the beginning of the face, it is gradually pulled up to the normal level. However, if the embedded display panel 11 is pressed again during the period when the inductive signal VR is pulled up to the normal level, the inductive signal VR will appear as the reference numeral 143 and The waveform shown in 144. At this time, the signal processing circuit 130 cannot correctly determine the level of the sensing signal VR, thereby reducing the recognition degree of the uppermost portion of the enter-in display panel 110. To solve the above problem, FIG. 1C and FIG. 1D is a timing diagram showing another driving waveform of the conventional display skirt 100. In FIG. 1C, the driving method is to divide the gate pulse PU1N across the gap between two adjacent pupil periods. During the period τΒ, the 'sensing signal VR will remain at the normal level during the blank period Tb. However, this driving method can improve the sensitivity of the input panel, but with the width of the gate pulse Ρϋ1Ν Change 26184twf.doc/n 200941433 Λ &V f V/ > Large, the circuit architecture of the device 100 will be more complicated. On the other hand, in Figure 1C, this driving method is in the embedded display panel 110. A gate line is configured to transmit the gate signal SGi(n+i). Therefore, the embedded display panel Π0 will receive the gate during the blank period TB.
訊號SGkn+o中的閘極脈衝pUi(N+i),以致使感應訊號VR 維持在正常準位。然而，此種驅動方法不僅增加了習知顯 示裝置100的電路複雜，也增加了嵌入式顯示面板110的 佈局面積。 【發明内容】 本發明提供一種顯示裝置，用以提升顯示面板之最上 方部分的辨識度。 本發明提供-種顯示面板的驅動方法，用以提昇顯示 面板的感應靈敏度。 本發明提出-種顯示裝置，包括一顯示面板以及一問 極驅動器。顯示面板包括則条閘極線，其中約條間極線 Ο 肖以傳送第i個閘極脈衝，i與N為正整數且。間 極驅動器則以特定間隔時間依序產生第】至第則固閉極脈 衝，並以第Ν個閘極脈衝為基準相隔一晝面間隔時間後再 次產生第1至第Ν個閘極脈衝，其中晝面間隔時間與特定 間隔時間的比值介於0.7至1.3之間。 ’、 在本發明之-實施例中，上述兩相鄰問極脈衝之高轉 態點之間的時間為特定間隔時間，而兩相鄰之第1^與 個閘極脈衝其高轉態點之_時間為晝面間隔時間、。此 2〇〇941i33264l8twfdoc/n 外’第i至第n個閘極脈衝的寬度介於6 7微秒至7i 4微 秒之間。 在本發明之-實施例中，上述顯示面板更包括多數條 訊號讀取線。其中，所述訊號讀取線與所述閘極線交錯配 置’並用以傳送感應訊號。此外’感應電路配置在間極線 與訊號讀取_交錯之處，並紐連接料應的閘極線與 訊號讀取線。 φ 林發明之—實施例中，上述顯示裝置更包括-訊號 處理電路。其中，此訊號處理電路輕接至所述訊號讀取線， 並用以依據感應訊號來判別顯示面板的觸控點是否已被觸 壓。 從另-角度來看’本發明提出一種顯示面板的驅動方 法，適用於包括多數佩應電路的—顯示面板，並包括下 列步驟：⑻以-特定間隔時間依序產生第i至第則固問極 脈衝；（_用第1至第N _極脈衝啟輯述感應電路， 以感測顯示面板的觸控點而產生多數個感應訊號；以及(c) ❹ 以第N個閘極脈衝為基準相隔—晝面_ _後，重複步 驟⑻與(b)。其中’畫面間隔時間與特定間隔時間的比值介 於0.7至1.3之間’且N為正整數。 在本發明之-實施例中，上述兩相鄰閘極脈衝之高轉 態點之間的時間為特定間隔時間，而兩相鄰之第1^與第ι 個閘極脈衝之南轉態點之間的時間為晝面間隔時間。此 外，第1至第N個閘極脈衝的寬度介於6 7微秒至714 秒之間。 ’ 26418twf.doc/ix 200941433 Λ. fcV / V » Vf 綜上所述，本發明將晝面間隔時間與特定間隔時間的 比值没定在0.7至1.3之間。藉此，當顯示面板尚未被碰 觸時，訊號讀取線所傳送的感應訊號將維持在一特定準 位。相對地，顯示面板之最上方部分的感應靈敏度便不會 下降，進而提升顯示面板的感應靈敏度。此外，由於每一 個閘極脈衝的寬度皆相同，且本發明無需配置額外的閘極 線，故本發明能有效地降低顯示裝置的電路複雜度以及佈 φ 局面積。 為讓本發明之上述特徵和優點能更明顯易懂，下文特 舉較佳實施例’並配合所附圖式，作詳細說明如下。 【實施方式】 圖2繪不為根據本發明一實施例之顯示裝置的電路架 構圖。請參照圖2，顯示裝置200包括一顯示面板210、一 閘極驅動器220、一訊號處理電路230以及一源極驅動器 240。此外，顯示面板210包括N條閘極線GL^GLn、多 ® 數個感應電路以及多數條訊號讀取線RL广RLM。其中，所 述感應電路譬如是圖2中的感應電路211〜213，且N為正 整數。 請繼續參照圖2 ’訊號讀取線RLh-RLm與閘極線 GLpGLn交錯配置。顯示面板210中的感應電路配置在閘 極線GL!〜GLN與訊號讀取線RLi〜RLM的交錯之處，並電 性連接至對應的閘極線與訊號讀取線。舉例來說，感應電 路211配置在閘極線GLi與訊號讀取線RLM的交錯之處， 200941433 η.υ/υ/υ 26418twf.doc/n 並電性連接至其所對應的閘極線GLi與訊號讀取線RLM。 再者，閘極驅動器220耦接至閘極線GLpGLn。訊號處理 電路230耦接至訊號讀取線RLHRLm。源極驅動器240耦 接至顯示面板210。 值得一提的是’感應電路的配置方式可以按照顯示面 板210中晝素（未繪示出）的排列方式而加以設置，因此 本實施例可將每一個晝素都搭配一個感應電路。然而，熟 ❹ 悉此技術者也可根據顯示面板的解析度來調整晝素與感應 電路的對應關係。此外，在本實施例中，顯示面板21〇為 欲入式輸入面板，而感應電路則可利用電荷式感應電路或 是電流式感應電路來加以實現。 圖3繪示為根據本發明一實施例之顯示裝置的驅動波 形時序圖，其中VR3為一感應訊號讀取線上的感應訊號， SG广SGN為閘極驅動器220所產生的閘極訊號。請同時表 照圖2及圖3，閘極驅動器220會在一畫面週期内依序輪 出閘極脈衝PUHPUn，並透過閘極線GLi〜GLn傳送至顯 ❹ 示面板210。在此’閘極線（¾用以傳送閘極脈衝pUi， 閘極線GL2用以傳送閘極脈衝PR ’以此類推，第i條閉 極線GLi用以傳送第i個閘極脈衝卩切，丨為正整數且i笈· SN。 ^ 另一方面，源極驅動器240會根據閘極驅動器22〇之 時序控制而傳送資料訊號至顯示面板210。籍此\顯示面 板210中的晝素將在一晝面週期内依序被驅動。此外，顯 示面板210中的感應電路也會依據閘極脈衝pUn〜pu 26418twf.doc/n 200941433 d. 1.W / V/ / v 依序被啟動’以感測顯示面板210的觸控點而產生多數個 感應訊號。之後，訊號處理電路230將依據所述感應訊號 來判別顯示面板210的觸控點是否已被觸壓。 值得注意的是’閘極驅動器220會在一個畫面週期中 以一個特定間隔時間Ti依序產生閘極脈衝pu广PUn，並以 閘極脈衝pun為基準相隔一晝面間隔時間Tj後，再產生下 一個晝面週期内的閘極脈衝rol〜PUN。其中，畫面間隔時 ❹ 間Tj與特定間隔時間Ti的比值介於0.7至1.3之間，且閘 極脈衝PI^-PUn的寬度w皆相同，並可介於6.7微秒至 71.4微秒之間。 當顯示面板210在一晝面週期中尚未被碰觸時，感應 訊號VR3將維持在一特定準位。相對地’當顯示面板21〇 在一畫面週期中被碰觸時，則感應訊號VR3會呈現如標號 341及342所示的波形。 此外，由於畫面間隔時間乃與特定間隔時間乃的比 值可介於〇.7至13之間，當顯示面板210在兩相鄰晝面 ® 週期之間尚未被碰觸時’感應訊號VR3仍可維持在一特定 準位。相對地，當顯示面板210在每一晝面週期的初期被 碰觸時，感應訊號VR3會呈現如標號343及344所示的波 形。 由此可知’由於感應訊號VR3都一值維持在一較為穩 疋的特定準位，因而不會影響最初幾條閘極線開啟時的辨 識準確度。如此一來，顯示面板210之最上方部分的感應 靈敏度便不會下降，使得面板整體的感應靈敏度更為均 11 26418twf.doc/n 200941433 勻。此外’本實施例無須設置額外的閘極線，且每一個閘 極脈衝的寬度W也皆相同，故能有效地降低顯示裝置2〇〇 的電路複雜度以及佈局面積。 ❹ ❹ 值得一提的是，本實施例將特定間隔時間T i設定為兩 相鄰閘極脈衝之高轉態點之間的時間，並將晝面間隔時間 Tj設定為兩相鄰之第N個閘極脈衝PUn與第i個閘極脈衝 PU!之兩轉態點之間的時間。然而，熟悉此技術者可也將 特定間隔時間Ti設定為兩相鄰閘極脈衝之低轉離點之間 的時間，並將晝面間隔時間Tj設定為兩相鄰之第；;個間^ 脈衝PUN與第1個閘極脈衝PUi之低轉態點之間的時間。 、圖4繪示為根據本發明一實施例之顯示面板的驅動方 法流程圖，其巾此麟方法適用於包括錄_應電路的 顯示面板。在步驟S401中，以一個特定間隔時間依序產 生第1至第N個閘極脈衝，其中N為正整數。之後，在步 驟S402中利用第1至第N個閘極脈衝啟動多數個感應 以感測顯示面板的觸控點而產生多數個感應訊號Γ 接者’在步驟S4G3中，以第N_極脈衝為基準，相隔 —個晝面間隔時間後，重複步驟S401與S402。 人於:ί意的是，晝面間隔時間與特定間隔時間的比值 二；/ .3之間，且每一個閘極脈衝寬度皆相同並可 介於6.7微秒至71 4掷·备丨、夕ρ弓,,.. 可為雨她… 卜，上簡定間隔時間 衝之高轉態點之_時間，或是兩相鄰 轉態點之間的時間。且上述畫面間隔時間可 為兩相鄰之第Ν與第1個閘極脈衝之高轉態點之間的時 12 26418twf.doc/n 200941433The gate pulse pUi(N+i) in the signal SGkn+o is such that the inductive signal VR is maintained at the normal level. However, such a driving method not only increases the circuit complexity of the conventional display device 100, but also increases the layout area of the embedded display panel 110. SUMMARY OF THE INVENTION The present invention provides a display device for improving the visibility of the uppermost portion of a display panel. The present invention provides a driving method of a display panel for improving the sensing sensitivity of the display panel. The present invention provides a display device including a display panel and a speaker driver. The display panel includes a strip gate line, wherein about the strip line Ο is transmitted to transmit the ith gate pulse, and i and N are positive integers. The inter-pole driver sequentially generates the first to the second solid-state pulse pulses at a specific interval, and generates the first to the second gate pulses after a one-dimensional interval interval based on the first gate pulse. The ratio of the inter-tank interval to the specific interval is between 0.7 and 1.3. In the embodiment of the present invention, the time between the high transition points of the two adjacent polarity pulse pulses is a specific interval time, and the two adjacent first and the second gate pulses have a high transition point. The time is the interval between the faces. The width of the 2nd to nth gate pulses of the 2nd 941i33264l8twfdoc/n is between 6 7 microseconds and 7i 4 microseconds. In an embodiment of the invention, the display panel further includes a plurality of signal reading lines. The signal reading line is interleaved with the gate line and used to transmit an inductive signal. In addition, the 'inductance circuit is arranged at the intersection of the inter-polar line and the signal reading_interleaving, and the gate line and the signal reading line should be connected. In the embodiment of the invention, the display device further includes a signal processing circuit. The signal processing circuit is lightly connected to the signal reading line, and is configured to determine whether the touch point of the display panel has been touched according to the sensing signal. From another perspective, the present invention provides a driving method for a display panel, which is suitable for a display panel including a plurality of transmissive circuits, and includes the following steps: (8) sequentially generating the i-th to the second solid at a specific interval time. Pole pulse; (_ use the first to the Nth pulse to describe the sensing circuit to sense the touch point of the display panel to generate a plurality of sensing signals; and (c) ❹ based on the Nth gate pulse Steps (8) and (b) are repeated after the interval __, where the ratio of the picture interval time to the specific interval time is between 0.7 and 1.3' and N is a positive integer. In the embodiment of the present invention, The time between the high transition points of the two adjacent gate pulses is a specific interval time, and the time between the south transition points of the two adjacent first and first ι gate pulses is the time interval between the two transitions In addition, the width of the 1st to Nth gate pulses is between 6 7 microseconds and 714 seconds. ' 26418twf.doc/ix 200941433 Λ. fcV / V » Vf In summary, the present invention will The ratio of the interval time to the specific interval time is not set between 0.7 and 1.3. Thereby, when displayed When the board has not been touched, the sensing signal transmitted by the signal reading line will be maintained at a certain level. In contrast, the sensing sensitivity of the uppermost portion of the display panel will not decrease, thereby improving the sensing sensitivity of the display panel. Since the width of each gate pulse is the same, and the present invention does not need to configure an additional gate line, the present invention can effectively reduce the circuit complexity of the display device and the area of the cloth φ. To make the above features of the present invention The advantages and advantages of the display device are described in detail below with reference to the accompanying drawings. FIG. 2 is a circuit diagram of a display device according to an embodiment of the invention. Referring to FIG. 2, the display device 200 includes a display panel 210, a gate driver 220, a signal processing circuit 230, and a source driver 240. In addition, the display panel 210 includes N gate lines GL^GLn and multiple numbers. The sensing circuit and the plurality of signal reading lines RL are widely RLM, wherein the sensing circuits are, for example, the sensing circuits 211 to 213 in FIG. 2, and N is a positive integer. 2, the signal reading line RLh-RLm is alternately arranged with the gate line GLpGLn. The sensing circuit in the display panel 210 is disposed at the intersection of the gate lines GL!~GLN and the signal reading lines RLi~RLM, and Electrically connected to the corresponding gate line and the signal reading line. For example, the sensing circuit 211 is disposed at the intersection of the gate line GLi and the signal reading line RLM, 200941433 η.υ/υ/υ 26418twf.doc /n is electrically connected to its corresponding gate line GLi and signal reading line RLM. Further, the gate driver 220 is coupled to the gate line GLpGLn. The signal processing circuit 230 is coupled to the signal reading line RLHRLm. The source driver 240 is coupled to the display panel 210. It is worth mentioning that the configuration of the sensing circuit can be arranged according to the arrangement of the pixels (not shown) in the display panel 210. Therefore, in this embodiment, each element can be combined with an inductive circuit. However, those skilled in the art can also adjust the correspondence between the pixel and the sensing circuit according to the resolution of the display panel. In addition, in the embodiment, the display panel 21 is a desired input panel, and the sensing circuit can be implemented by using a charge sensing circuit or a current sensing circuit. 3 is a timing diagram of driving waveforms of a display device according to an embodiment of the invention, wherein VR3 is an inductive signal on an inductive signal reading line, and SG wide SGN is a gate signal generated by the gate driver 220. Referring to FIG. 2 and FIG. 3 simultaneously, the gate driver 220 sequentially turns off the gate pulse PUHPUn in one frame period and transmits it to the display panel 210 through the gate lines GLi to GLn. Here, the 'gate line (3⁄4 is used to transmit the gate pulse pUi, the gate line GL2 is used to transmit the gate pulse PR' and so on, and the ith closed line GLi is used to transmit the ith gate pulse , 丨 is a positive integer and i笈· SN. On the other hand, the source driver 240 transmits a data signal to the display panel 210 according to the timing control of the gate driver 22〇. Thus, the pixels in the display panel 210 will be In addition, the sensing circuit in the display panel 210 is also activated according to the gate pulse pUn~pu 26418twf.doc/n 200941433 d. 1.W / V/ / v. A plurality of sensing signals are generated by sensing the touch points of the display panel 210. Thereafter, the signal processing circuit 230 determines whether the touch points of the display panel 210 have been touched according to the sensing signals. The pole driver 220 sequentially generates the gate pulse pu wide PUn at a specific interval time Ti in one picture period, and is separated by a gate interval pun pun with a gate interval pun pun, and then generates a next 昼 plane period. The gate pulse rol~PUN. Among them, between the screens The ratio of the time Tj to the specific interval time Ti is between 0.7 and 1.3, and the width w of the gate pulse PI^-PUn is the same and can be between 6.7 microseconds and 71.4 microseconds. When the sensor 210 has not been touched in a kneading period, the sensing signal VR3 will be maintained at a certain level. Relatively when the display panel 21 is touched in a picture period, the sensing signal VR3 will be presented as a label. Waveforms shown in 341 and 342. In addition, since the ratio of the screen interval time to the specific interval time may be between 〇.7 and 13, when the display panel 210 has not been touched between two adjacent ®面® periods The inductive signal VR3 can still be maintained at a certain level. In contrast, when the display panel 210 is touched at the beginning of each kneading period, the inductive signal VR3 exhibits waveforms as indicated by reference numerals 343 and 344. Therefore, it can be seen that since the sensing signal VR3 is maintained at a relatively stable specific level, the identification accuracy of the first few gate lines is not affected. Thus, the uppermost portion of the display panel 210. Inductive sensitivity will not drop The sensitivity of the panel as a whole is more uniform, and the additional gate line is not required, and the width W of each gate pulse is also the same, so the display can be effectively reduced. The circuit complexity and layout area of the device 2〇〇 ❹ 值得 It is worth mentioning that this embodiment sets the specific interval time T i to the time between the high transition points of two adjacent gate pulses, and The face interval time Tj is set to the time between the two adjacent Nth gate pulses PUn and the two transition points of the ith gate pulse PU!. However, those skilled in the art can also set the specific interval time Ti to the time between the low turn-off points of two adjacent gate pulses, and set the face interval time Tj to be two adjacent; The time between the pulse PUN and the low transition point of the first gate pulse PUi. FIG. 4 is a flow chart showing a driving method of a display panel according to an embodiment of the present invention, and the method is applicable to a display panel including a recording circuit. In step S401, the first to Nth gate pulses are sequentially generated at a specific interval, wherein N is a positive integer. Thereafter, in step S402, the first to the Nth gate pulses are used to activate a plurality of sensings to sense the touch points of the display panel to generate a plurality of sensing signals. In step S4G3, the Nth pulse is generated. For the reference, steps S401 and S402 are repeated after a gap interval. People: ί means that the ratio of the interval between the face and the specific interval is two; / .3, and each gate pulse width is the same and can be between 6.7 microseconds and 71 4 throws,夕ρ bow,,.. can be raining for her... Bu, the time between the high transition point of the time interval, or the time between two adjacent transition points. And the above picture interval time can be between the two adjacent third and the first gate pulse high turning point 12 26418twf.doc/n 200941433
2. i.V/ I \f I \J 間，亦可為相鄰之第N與第i個閘極脈衝之低轉態點之間 的時間。至於本驅動方法之其餘細節已包含在上述實施例 中，故在此不加累述。 綜上所述’本發明將晝面間隔時間與特定間隔時間的 比值設定在0.7至1.3之間。藉此’當顯示面板尚未被碰 觸時，訊號讀取線所傳送的感應訊號將維持在一特定準 位。相對地，顯示面板之最上方部分的感應靈敏度便不會 ❹ 下降，進而提升顯示面板的感應靈敏度。此外，由於每一 個閘極脈衝的寬度皆相同，且本發明無需配置額外的閘極 線，故本發明能有效地降低顯示裝置的電路複雜度以及佈 局面積。 雖然本發明已以較佳實施例揭露如上，然其並非用以 限定本發明，任何所屬技術領域中具有通常知識者，在不 脫離本發明之精神和範圍内，當可作些許之更動與潤飾， 因此本發明之保護範圍當視後附之申請專利範圍所界定者 為準。 【圖式簡單說明】 圖1A繪示為具有嵌入式輸入面板之習知顯示裝置的 電路架構圖。 圖1B繪示為習知顯示裝置的驅動波形時序圖。 圖1C繪示為習知顯示裝置的另一驅動波形時序圖。 圖1D繪示為習知顯示裝置的又一驅動波形時序圖。 圖2繪示為根據本發明一實施例之顯示裝置的電路架 26418twf.doc/n 2009414332. Between i.V/I \f I \J, it can also be the time between the low transition points of the adjacent Nth and ith gate pulses. The remaining details of the present driving method are included in the above embodiment, and therefore will not be described here. In summary, the present invention sets the ratio of the kneading interval to the specific interval time between 0.7 and 1.3. Therefore, when the display panel has not been touched, the sensing signal transmitted by the signal reading line will be maintained at a certain level. In contrast, the sensing sensitivity of the uppermost portion of the display panel does not decrease, thereby increasing the sensing sensitivity of the display panel. In addition, since the width of each gate pulse is the same, and the present invention does not require an additional gate line, the present invention can effectively reduce the circuit complexity and layout area of the display device. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1A is a circuit diagram of a conventional display device having an embedded input panel. FIG. 1B is a timing diagram of driving waveforms of a conventional display device. FIG. 1C is a timing diagram of another driving waveform of a conventional display device. FIG. 1D is a timing diagram of still another driving waveform of a conventional display device. 2 is a circuit diagram of a display device according to an embodiment of the invention. 26418twf.doc/n 200941433
Λ. I yj I \J 構圖。 圖3繪示為根據本發明一實施例之顯示裝置的驅動波 形時序圖。 圖4繪示為根據本發明一實施例之顯示面板的驅動方 法流程圖。 【主要元件符號說明】 Ο 100、200 :顯示裝置 110、210 :顯示面板 120、220 :閘極驅動器 130、230 :訊號處理電路 111〜113、211〜213 :感應電路 141 〜144、341 〜344 :波形 240 :源極驅動器 S401〜S403 :用以說明圖4實施例的各步驟 GLn〜GLin、GL!~GLn :閘極線 © RLu〜RLim、RLi〜RLm .訊號讀取線 SGn〜SGin、SGi(n+i)、SG广SGn :閘極訊號 VR、VR3 :感應訊號 PUn〜PUin、PUi(n+i)、PUi〜PUn :閘極脈衝 Tb :空白期間 T i :特定間隔時間 Tj ·畫面間隔時間 W:閘極脈衝寬度 14Λ. I yj I \J Composition. 3 is a timing chart of driving waveforms of a display device in accordance with an embodiment of the present invention. 4 is a flow chart showing a driving method of a display panel according to an embodiment of the invention. [Description of main component symbols] Ο 100, 200: display devices 110, 210: display panels 120, 220: gate drivers 130, 230: signal processing circuits 111 to 113, 211 to 213: sensing circuits 141 to 144, 341 to 344 Waveform 240: source driver S401 to S403: for explaining steps GLn to GLin, GL! to GLn of the embodiment of Fig. 4: gate lines © RLu to RLim, RLi to RLm. Signal reading lines SGn to SGin, SGi(n+i), SG wide SGn: gate signal VR, VR3: sensing signals PUn~PUin, PUi(n+i), PUi~PUn: gate pulse Tb: blank period T i : specific interval time Tj · Screen interval time W: gate pulse width 14