200803663 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種基板表面處理結構及其製作方法， 尤指一種適用於電性連接墊表面形成化學金層之基板表面 5 處理結構及其製作方法。 【先前技術】 一般而言，基板之電性連接墊表面處理製程之目的， 係將基板表面上作為電性連接之電性連接墊，塗佈一有機 1〇 保焊膜（Organic Solderability Preservatives 簡稱osp)之方 式，使電性連接墊不易氧化，而使基板可置放一段時間再 進仃下一製程。若未如此處理，則由於基板擺放一段時間， 電性連接墊之鋼易氧化而生出氧化金屬層，屆時這層氧化 之表面就如同不沾鍋一樣，融熔狀之焊料根本無法沾上， 15而無法焊接組裝電子元件或導線。另電性連接塾氧化後亦 會影響外部電子元件傳輸訊號至基板之電訊品質。 ^ 若採塗佈一有機保焊膜（0SP)之方式，即於基板上作為 電f生連接墊表面進行一透明膜之護銅處理，可達到銅面保 濩/、具可焊性之雙重目的。然該有機保焊膜（osp)若經歷之 〇時間過長，仍會揮發掉，而喪失其銅面保護之功效，並非 十分理想。 另外，若採金屬化處理，即於基板上作為電性連接墊 ^面進行鑛錫’其製程如圖1A至圖1C之習知基板表面處理 、°構之製作方法示意圖所示。首先，參照圖1A所示，提供 200803663 一基板10，其中基板10表面並依序形成有一銅箔11、一線 路層12及一防焊層13，且該防焊層13並形成有複數開口以 顯露其下之該線路層12，作為電性連接墊14之部分，其中 電性連接墊14包括有複數焊錫墊14a及至少一打線焊墊 14b。且打線焊墊14b表面並形成有一鎳/金層15(先形成一鎳 層再覆蓋一金層）。接著，如圖1B所示，形成一有機保焊層 16於該焊錫墊14a表面。最後，如圖ic所示，以網版印刷方 #. 10 15 式开》成一焊錫材料17於焊錫墊14a開口中，並在之後進行表 面接著製程（SMT)，以接置有被動元件（圖未示）於基板1〇表 面；於接置被動元件製程中使該有機保焊層16因高溫而揮 發。其中該有機保焊層16可達到銅面保護與具可焊性之雙 重目的。 然上述於基板表面上電性連接墊之金屬表面處理製程 甲，網版印刷於較小且較密之焊錫墊表面進行刷錫製程時 有對位之困難度且有機保焊層無法長時置放，故對基板之 後續製程及品質有所影響。 本發明之-特色係有關於一種基板表面處理結構，直 基板及—化學金層。其中，基板表面依序形成有 露1下：ί::焊層’且防焊層並形成有複數開口，以顯 路/、下之線路層作為電性連接塾之部分，該等電 L 包括=一打線焊墊及複數焊锡墊，打線焊塾表面形 成有-錄/金層’且焊錫墊表面形成有_化學金層。 20 200803663 藉此，本發明之基板表面處理結構，其焊錫墊表面經 由化學金層之保護，在長時間之環境下也不易氧化。 此外，上述之鎳/金層表面也形成有一化學金層。 另外’上述防焊層可選自綠漆及黑漆之其中一者。 5 再者，上述基板可選自單層電路板及多層電路板之其 中一者。 本發明之另一特色是有關於一種基板表面處理結構之 製作方法，包括有以下步驟： (A) 提供一基板，基板表面依序形成有一線路層及一防 10焊層，防焊層並形成有複數開口，以顯露其下之線路層作 為電性連接墊之部分，該等電性連接墊包括有至少一打線 焊墊及複數焊錫墊； (B) 形成一鎳/金層於打線焊墊表面；以及 (C) 形成一化學金層於複數開口中。 15 此外，本發明之基板表面處理結構之製作方法，其中， 於上述步驟（B)之後，可更包括一步驟（B1):形成一阻層於 複數開口及防焊層表面，且該阻層並形成有複數阻層開 口 ’以顯露其下之複數焊錫墊表面。 另外’本發明之基板表面處理結構之製作方法，其中， 20於上述步驟（C)之後，可更包括一步驟（C1):移除阻層。 又，上述步驟（C)中之化學金層之形成方法可選自濺 鍍、蒸鍍、物理沉積及化學沈積之其中一者。 此外，上述步驟（B1)中之阻層之形成方法可選自印 刷、旋轉塗佈、貼合及壓合之其中一者。 200803663 ^外，上述步驟(叫中之阻層開口之形成方法可為 光及顯影或其他等效之方法 ，上述步驟（叫中之阻層之移除方法可為物理 離及化學移除之其中一者 【實施方式】 請參閱圖2A至2B係本發明第一較佳實施例之基板表 ， 面處理、，、D構之製作方法示意圖。首先，如圖2 A所示，提供 一基板20,且該基板係可為單層或已完成前段線路製程之 10多層電路板；另該基板20上表面及下表面依序形成有一導 電金屬層21、一線路層22及一絕緣保護用之防焊層23，該 防焊層23並以曝光及顯影方式形成有複數開口，以顯露其 下之線路層22作為電性連接墊24之部分，其中該複數電性 連接墊24包括至少一打線焊塾24b及複數焊錫塾24a(步驟 15 A)。接著，於該打線焊墊24b表面形成一鎳/金層（先形成一 鎳層再覆蓋一金層）25(步驟B)。 之後，如圖2B所示，同時化學鍍覆一化學金層27於該 複數焊錫墊24a表面及該打線焊墊24b之該鎳/金層25表面 (步驟C)。 20 藉此’本實施例所製成之基板20表面處理結構，其焊 錫墊24a及打線焊墊24b之鎳/金層25表面皆具有一化學金層 27°藉由該化學金層27之保護，焊錫墊24a在長時間之環境 下也不易氧化。 200803663 請再繼續參閱圖3A至3D係本發明第二較佳實施例之 基板表面處理結構之製作方法示意圖。第二實施例之步驟 (A)之製程與第一實施例之步驟（A)之製程完全相同，首先， 如圖3A所示，提供一基板30，且該基板係可為單層或已完 5 成前段線路製程之多層電路板；另該基板30上表面及下表 面依序形成有一導電金屬層31、一線路層32及一防焊層 33，該防焊層33並形成有複數開口，以顯露其下之線路層 32作為電性連接墊之部分，其中該複數電性連接墊34包括 至少一打線焊墊34b及複數焊錫墊34a(步驟A)。接著，於該 10 至少一打線焊塾3 4b表面形成一鎳/金層（先形成一鎳層再覆 蓋一金層）35(步驟B)。 接著，如圖3B所示，形成一感光性高分子材料之阻層 36於該複數開口及該防焊層33表面，且該阻層36並以曝光 及顯影方式形成複數阻層開口 37，以顯露其下之該複數焊 15 錫墊34a表面（步驟B1)。再如圖3C所示，化學鍍覆一化學金 層38於該焊錫墊34a表面（步驟C)。最後，如圖3D所示，移 除該阻層36，以顯露其下之該打線焊墊34b之鎳/金層35及 該防焊層33(步驟C1)。 第二實施例所完成之基板30表面處理結構與第一實施 20 例之差異，係第二實施例僅在焊錫墊34a表面形成化學金層 38，而第一實施例係同時在焊錫墊24a表面及打線焊墊24b 之鎳/金層25表面皆形成化學金層27。第二實施例之焊錫墊 34a表面經由化學金層38之保護，也具有如同上述第一實施 9 200803663 例之功效，即第二實施例之焊錫墊34a表面於長時間之严 下也不易氧化。 衣兄 上述實施例僅係為了方便說明而舉例而已，本發明所 主張之權利範圍自應以申請專利範圍所述為準，而^僅 於上述實施例。 又 【圖式簡單說明】 圖1A至圖1C係習知基板表面處理結構之製作方法示意圖。 圖2A至圖2B係本發明第一較佳實施例之基板表面處理結 構之製作方法示意圖。 圖3A至圖3D係本發明第二較佳實施例之基板表面處理結 構之製作方法示意圖。 12 14 14b 16 20 22 24 24b 27 【主要元件符號說明 10 基板 線路層 電性連接墊 打線焊墊 有機保焊層 基板 線路層 電性連接墊 打線焊墊 化學金層 11 銅箔 13 防焊層 14a 焊錫墊 15 鎳/金層 17 焊錫材料 21 導電金屬層 23 防焊層 24a 焊錫墊 25 鎳/金層 3〇 基板 200803663 31 導電金屬層 32 線路層 33 防焊層 34 電性連接墊 34a 焊錫墊 34b 打線焊墊 35 鎳/金層 36 阻層 37 阻層開口 38 化學金層 11200803663 IX. Description of the Invention: The present invention relates to a substrate surface treatment structure and a method for fabricating the same, and more particularly to a substrate surface 5 processing structure suitable for forming a chemical gold layer on an electrical connection pad surface and its fabrication method. [Prior Art] Generally, the purpose of the surface treatment process of the electrical connection pad of the substrate is to apply an organic solder mask to the surface of the substrate as an electrical connection pad (Organic Solderability Preservatives for short). In such a way that the electrical connection pads are not easily oxidized, and the substrate can be placed for a period of time before proceeding to the next process. If it is not treated as such, since the substrate is placed for a period of time, the steel of the electrical connection pad is easily oxidized to produce an oxidized metal layer. At this time, the surface of the oxidized layer is like a non-stick pan, and the molten solder cannot be stained at all. 15 can not be welded to assemble electronic components or wires. In addition, the electrical connection will also affect the telecommunications quality of the external electronic components transmitting signals to the substrate. ^ If a method of coating an organic solder mask (0SP) is applied, a copper film is treated on the substrate as a surface of the electric connection pad to achieve a copper surface protection/weldability. purpose. However, if the organic solder mask (osp) is too long to evaporate and lose its copper surface protection, it is not ideal. Further, if the metallization treatment is employed, the ore is processed as an electrical connection pad on the substrate. The process is as shown in the schematic view of the substrate surface treatment and the structure of the structure shown in Figs. 1A to 1C. First, referring to FIG. 1A, a substrate 10 is provided, wherein a surface of the substrate 10 is sequentially formed with a copper foil 11, a circuit layer 12 and a solder resist layer 13, and the solder resist layer 13 is formed with a plurality of openings. The circuit layer 12 is exposed as part of the electrical connection pad 14, wherein the electrical connection pad 14 includes a plurality of solder pads 14a and at least one wire bonding pad 14b. And a nickel/gold layer 15 is formed on the surface of the bonding pad 14b (a nickel layer is formed first and then a gold layer is formed). Next, as shown in Fig. 1B, an organic solder resist layer 16 is formed on the surface of the solder pad 14a. Finally, as shown in FIG. 2C, a solder material 17 is formed in the opening of the solder pad 14a by a screen printing method, and then a surface subsequent process (SMT) is performed to connect the passive component (Fig. Not shown) on the surface of the substrate 1; the organic solder resist layer 16 is volatilized due to high temperature during the process of attaching the passive component. The organic soldering layer 16 can achieve the dual purpose of copper surface protection and solderability. However, the above-mentioned metal surface treatment process A of the electrical connection pad on the surface of the substrate, the screen printing on the surface of the smaller and dense solder pad for the soldering process has difficulty in alignment and the organic soldering layer cannot be long-timed. Release, so it has an impact on the subsequent process and quality of the substrate. The feature of the present invention relates to a substrate surface treatment structure, a straight substrate and a chemical gold layer. Wherein, the surface of the substrate is sequentially formed with the following: ί:: solder layer 'and the solder resist layer is formed with a plurality of openings, and the circuit layer of the explicit/lower line is used as a part of the electrical connection, and the electric L includes = One wire pad and a plurality of solder pads, the surface of the wire bonding pad is formed with a - recording/gold layer and the surface of the solder pad is formed with a chemical gold layer. 20 200803663 Thereby, the surface treatment structure of the substrate of the present invention has the surface of the solder pad protected by the chemical gold layer and is not easily oxidized under a long period of time. In addition, a chemical gold layer is also formed on the surface of the above nickel/gold layer. Further, the above solder resist layer may be selected from one of green paint and black paint. Further, the substrate may be selected from one of a single layer circuit board and a multilayer circuit board. Another feature of the present invention relates to a method for fabricating a surface treatment structure of a substrate, comprising the steps of: (A) providing a substrate, the surface of the substrate is sequentially formed with a circuit layer and an anti-10 solder layer, and the solder resist layer is formed. a plurality of openings are formed to expose the underlying circuit layer as part of the electrical connection pad, the electrical connection pads comprising at least one wire bonding pad and a plurality of solder pads; (B) forming a nickel/gold layer on the wire bonding pad a surface; and (C) forming a chemical gold layer in the plurality of openings. In addition, in the method for fabricating the surface treatment structure of the substrate of the present invention, after the step (B), the method further includes a step (B1) of forming a resist layer on the surface of the plurality of openings and the solder resist layer, and the resist layer A plurality of barrier openings are formed to expose the surface of the plurality of solder pads. In addition, the method for fabricating the surface treatment structure of the substrate of the present invention, wherein after the step (C), may further comprise a step (C1): removing the resist layer. Further, the method of forming the chemical gold layer in the above step (C) may be selected from one of sputtering, evaporation, physical deposition, and chemical deposition. Further, the method of forming the resist layer in the above step (B1) may be selected from one of printing, spin coating, lamination, and press bonding. 200803663 ^ In addition, the above steps (the formation method of the resist layer opening may be light and development or other equivalent methods, the above steps (the method of removing the resist layer may be physically and chemically removed) [Embodiment] Please refer to FIG. 2A to FIG. 2B are schematic diagrams showing a method for fabricating a substrate surface, a surface treatment, and a D structure according to a first preferred embodiment of the present invention. First, as shown in FIG. 2A, a substrate 20 is provided. And the substrate can be a single layer or a multi-layer circuit board that has completed the front-end circuit process; and the upper surface and the lower surface of the substrate 20 are sequentially formed with a conductive metal layer 21, a circuit layer 22, and an insulation protection. The solder layer 23, the solder resist layer 23 is formed with a plurality of openings in an exposure and development manner to expose the underlying circuit layer 22 as part of the electrical connection pad 24, wherein the plurality of electrical connection pads 24 includes at least one wire bonding塾24b and a plurality of solder bumps 24a (step 15 A). Next, a nickel/gold layer (first forming a nickel layer and then covering a gold layer) 25 is formed on the surface of the wire bonding pad 24b (step B). 2B, while chemically plating a chemical gold layer 27 The surface of the plurality of solder pads 24a and the surface of the nickel/gold layer 25 of the bonding pad 24b (step C). 20 The surface treatment structure of the substrate 20 prepared by the embodiment, the solder pad 24a and the wire bonding The surface of the nickel/gold layer 25 of the pad 24b has a chemical gold layer 27°. The solder pad 24a is not easily oxidized under a long time environment. 200803663 Please refer to FIG. 3A to 3D again. A schematic diagram of a method for fabricating a substrate surface treatment structure according to a second preferred embodiment of the present invention. The process of the step (A) of the second embodiment is identical to the process of the step (A) of the first embodiment. First, as shown in FIG. 3A A substrate 30 is provided, and the substrate can be a single layer or a multi-layer circuit board that has completed the front-end circuit process; and the upper surface and the lower surface of the substrate 30 are sequentially formed with a conductive metal layer 31 and a circuit layer 32. And a solder resist layer 33, the solder resist layer 33 is formed with a plurality of openings to expose the underlying circuit layer 32 as part of the electrical connection pad, wherein the plurality of electrical connection pads 34 includes at least one wire bonding pad 34b and a plurality of solder pads 34a (step A). Next, 10 At least one wire bonding pad 3 4b surface forms a nickel/gold layer (first forming a nickel layer and then covering a gold layer) 35 (step B). Next, as shown in FIG. 3B, a photosensitive polymer material is formed. The layer 36 is on the surface of the plurality of openings and the solder resist layer 33, and the resist layer 36 is formed by a plurality of resist openings 37 by exposure and development to expose the surface of the plurality of solder pads 34a (step B1). 3C, a chemical gold layer 38 is electrolessly plated on the surface of the solder pad 34a (step C). Finally, as shown in FIG. 3D, the resist layer 36 is removed to reveal the underlying solder pad. The nickel/gold layer 35 of 34b and the solder resist layer 33 (step C1). The surface treatment structure of the substrate 30 completed in the second embodiment is different from that of the first embodiment. The second embodiment forms the chemical gold layer 38 only on the surface of the solder pad 34a, and the first embodiment is simultaneously on the surface of the solder pad 24a. And a surface of the nickel/gold layer 25 of the wire bonding pad 24b forms a chemical gold layer 27. The surface of the solder pad 34a of the second embodiment is protected by the chemical gold layer 38, and has the same effect as the above-described first embodiment 9 200803663, that is, the surface of the solder pad 34a of the second embodiment is not easily oxidized under a long period of time. The above embodiments are merely illustrative for the convenience of the description, and the scope of the claims is intended to be based on the scope of the claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A to FIG. 1C are schematic views showing a manufacturing method of a conventional substrate surface treatment structure. 2A to 2B are views showing a method of fabricating a surface treatment structure of a substrate according to a first preferred embodiment of the present invention. 3A to 3D are views showing a method of fabricating a surface treatment structure of a substrate according to a second preferred embodiment of the present invention. 12 14 14b 16 20 22 24 24b 27 [Main component symbol description 10 Substrate circuit layer Electrical connection pad Wire bonding pad Organic soldering layer Substrate circuit layer Electrical connection pad Wire bonding pad Chemical gold layer 11 Copper foil 13 Solder mask 14a Solder pad 15 Nickel/gold layer 17 Solder material 21 Conductive metal layer 23 Solder mask 24a Solder pad 25 Nickel/gold layer 3〇 substrate 200803663 31 Conductive metal layer 32 Line layer 33 Solder mask 34 Electrical connection pad 34a Solder pad 34b Wire bonding pad 35 Nickel/gold layer 36 Resistive layer 37 Resistive layer opening 38 Chemical gold layer 11